| config.ini (11570:4aac82f10951) | config.ini (11680:b4d943429dc6) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 135 unchanged lines hidden (view full) --- 144localHistoryTableSize=2048 145localPredictorSize=2048 146numThreads=1 147useIndirect=true 148 149[system.cpu.dcache] 150type=Cache 151children=tags | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=false 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 135 unchanged lines hidden (view full) --- 144localHistoryTableSize=2048 145localPredictorSize=2048 146numThreads=1 147useIndirect=true 148 149[system.cpu.dcache] 150type=Cache 151children=tags |
| 152addr_ranges=0:18446744073709551615 | 152addr_ranges=0:18446744073709551615:0:0:0:0 |
| 153assoc=2 154clk_domain=system.cpu_clk_domain 155clusivity=mostly_incl 156default_p_state=UNDEFINED 157demand_mshr_reserve=1 158eventq_index=0 159hit_latency=2 160is_read_only=false --- 417 unchanged lines hidden (view full) --- 578[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 579type=MinorOpClass 580eventq_index=0 581opClass=InstPrefetch 582 583[system.cpu.icache] 584type=Cache 585children=tags | 153assoc=2 154clk_domain=system.cpu_clk_domain 155clusivity=mostly_incl 156default_p_state=UNDEFINED 157demand_mshr_reserve=1 158eventq_index=0 159hit_latency=2 160is_read_only=false --- 417 unchanged lines hidden (view full) --- 578[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1] 579type=MinorOpClass 580eventq_index=0 581opClass=InstPrefetch 582 583[system.cpu.icache] 584type=Cache 585children=tags |
| 586addr_ranges=0:18446744073709551615 | 586addr_ranges=0:18446744073709551615:0:0:0:0 |
| 587assoc=2 588clk_domain=system.cpu_clk_domain 589clusivity=mostly_incl 590default_p_state=UNDEFINED 591demand_mshr_reserve=1 592eventq_index=0 593hit_latency=2 594is_read_only=true --- 43 unchanged lines hidden (view full) --- 638[system.cpu.itb] 639type=AlphaTLB 640eventq_index=0 641size=48 642 643[system.cpu.l2cache] 644type=Cache 645children=tags | 587assoc=2 588clk_domain=system.cpu_clk_domain 589clusivity=mostly_incl 590default_p_state=UNDEFINED 591demand_mshr_reserve=1 592eventq_index=0 593hit_latency=2 594is_read_only=true --- 43 unchanged lines hidden (view full) --- 638[system.cpu.itb] 639type=AlphaTLB 640eventq_index=0 641size=48 642 643[system.cpu.l2cache] 644type=Cache 645children=tags |
| 646addr_ranges=0:18446744073709551615 | 646addr_ranges=0:18446744073709551615:0:0:0:0 |
| 647assoc=8 648clk_domain=system.cpu_clk_domain 649clusivity=mostly_incl 650default_p_state=UNDEFINED 651demand_mshr_reserve=1 652eventq_index=0 653hit_latency=20 654is_read_only=false --- 100 unchanged lines hidden (view full) --- 755domains= 756enable=false 757eventq_index=0 758sys_clk_domain=system.clk_domain 759transition_latency=100000000 760 761[system.membus] 762type=CoherentXBar | 647assoc=8 648clk_domain=system.cpu_clk_domain 649clusivity=mostly_incl 650default_p_state=UNDEFINED 651demand_mshr_reserve=1 652eventq_index=0 653hit_latency=20 654is_read_only=false --- 100 unchanged lines hidden (view full) --- 755domains= 756enable=false 757eventq_index=0 758sys_clk_domain=system.clk_domain 759transition_latency=100000000 760 761[system.membus] 762type=CoherentXBar |
| 763children=snoop_filter |
|
| 763clk_domain=system.clk_domain 764default_p_state=UNDEFINED 765eventq_index=0 766forward_latency=4 767frontend_latency=3 768p_state_clk_gate_bins=20 769p_state_clk_gate_max=1000000000000 770p_state_clk_gate_min=1000 771point_of_coherency=true 772power_model=Null 773response_latency=2 | 764clk_domain=system.clk_domain 765default_p_state=UNDEFINED 766eventq_index=0 767forward_latency=4 768frontend_latency=3 769p_state_clk_gate_bins=20 770p_state_clk_gate_max=1000000000000 771p_state_clk_gate_min=1000 772point_of_coherency=true 773power_model=Null 774response_latency=2 |
| 774snoop_filter=Null | 775snoop_filter=system.membus.snoop_filter |
| 775snoop_response_latency=4 776system=system 777use_default_range=false 778width=16 779master=system.physmem.port 780slave=system.system_port system.cpu.l2cache.mem_side 781 | 776snoop_response_latency=4 777system=system 778use_default_range=false 779width=16 780master=system.physmem.port 781slave=system.system_port system.cpu.l2cache.mem_side 782 |
| 783[system.membus.snoop_filter] 784type=SnoopFilter 785eventq_index=0 786lookup_latency=1 787max_capacity=8388608 788system=system 789 |
|
| 782[system.physmem] 783type=DRAMCtrl | 790[system.physmem] 791type=DRAMCtrl |
| 784IDD0=0.075000 | 792IDD0=0.055000 |
| 785IDD02=0.000000 | 793IDD02=0.000000 |
| 786IDD2N=0.050000 | 794IDD2N=0.032000 |
| 787IDD2N2=0.000000 788IDD2P0=0.000000 789IDD2P02=0.000000 | 795IDD2N2=0.000000 796IDD2P0=0.000000 797IDD2P02=0.000000 |
| 790IDD2P1=0.000000 | 798IDD2P1=0.032000 |
| 791IDD2P12=0.000000 | 799IDD2P12=0.000000 |
| 792IDD3N=0.057000 | 800IDD3N=0.038000 |
| 793IDD3N2=0.000000 794IDD3P0=0.000000 795IDD3P02=0.000000 | 801IDD3N2=0.000000 802IDD3P0=0.000000 803IDD3P02=0.000000 |
| 796IDD3P1=0.000000 | 804IDD3P1=0.038000 |
| 797IDD3P12=0.000000 | 805IDD3P12=0.000000 |
| 798IDD4R=0.187000 | 806IDD4R=0.157000 |
| 799IDD4R2=0.000000 | 807IDD4R2=0.000000 |
| 800IDD4W=0.165000 | 808IDD4W=0.125000 |
| 801IDD4W2=0.000000 | 809IDD4W2=0.000000 |
| 802IDD5=0.220000 | 810IDD5=0.235000 |
| 803IDD52=0.000000 | 811IDD52=0.000000 |
| 804IDD6=0.000000 | 812IDD6=0.020000 |
| 805IDD62=0.000000 806VDD=1.500000 807VDD2=0.000000 808activation_limit=4 809addr_mapping=RoRaBaCoCh 810bank_groups_per_rank=0 811banks_per_rank=8 812burst_length=8 813channels=1 814clk_domain=system.clk_domain 815conf_table_reported=true 816default_p_state=UNDEFINED 817device_bus_width=8 818device_rowbuffer_size=1024 819device_size=536870912 820devices_per_rank=8 821dll=true 822eventq_index=0 823in_addr_map=true | 813IDD62=0.000000 814VDD=1.500000 815VDD2=0.000000 816activation_limit=4 817addr_mapping=RoRaBaCoCh 818bank_groups_per_rank=0 819banks_per_rank=8 820burst_length=8 821channels=1 822clk_domain=system.clk_domain 823conf_table_reported=true 824default_p_state=UNDEFINED 825device_bus_width=8 826device_rowbuffer_size=1024 827device_size=536870912 828devices_per_rank=8 829dll=true 830eventq_index=0 831in_addr_map=true |
| 832kvm_map=true |
|
| 824max_accesses_per_row=16 825mem_sched_policy=frfcfs 826min_writes_per_switch=16 827null=false 828p_state_clk_gate_bins=20 829p_state_clk_gate_max=1000000000000 830p_state_clk_gate_min=1000 831page_policy=open_adaptive 832power_model=Null | 833max_accesses_per_row=16 834mem_sched_policy=frfcfs 835min_writes_per_switch=16 836null=false 837p_state_clk_gate_bins=20 838p_state_clk_gate_max=1000000000000 839p_state_clk_gate_min=1000 840page_policy=open_adaptive 841power_model=Null |
| 833range=0:134217727 | 842range=0:134217727:0:0:0:0 |
| 834ranks_per_channel=2 835read_buffer_size=32 836static_backend_latency=10000 837static_frontend_latency=10000 838tBURST=5000 839tCCD_L=0 840tCK=1250 841tCL=13750 --- 5 unchanged lines hidden (view full) --- 847tRP=13750 848tRRD=6000 849tRRD_L=0 850tRTP=7500 851tRTW=2500 852tWR=15000 853tWTR=7500 854tXAW=30000 | 843ranks_per_channel=2 844read_buffer_size=32 845static_backend_latency=10000 846static_frontend_latency=10000 847tBURST=5000 848tCCD_L=0 849tCK=1250 850tCL=13750 --- 5 unchanged lines hidden (view full) --- 856tRP=13750 857tRRD=6000 858tRRD_L=0 859tRTP=7500 860tRTW=2500 861tWR=15000 862tWTR=7500 863tXAW=30000 |
| 855tXP=0 | 864tXP=6000 |
| 856tXPDLL=0 | 865tXPDLL=0 |
| 857tXS=0 | 866tXS=270000 |
| 858tXSDLL=0 859write_buffer_size=64 860write_high_thresh_perc=85 861write_low_thresh_perc=50 862port=system.membus.master[0] 863 864[system.voltage_domain] 865type=VoltageDomain 866eventq_index=0 867voltage=1.000000 868 | 867tXSDLL=0 868write_buffer_size=64 869write_high_thresh_perc=85 870write_low_thresh_perc=50 871port=system.membus.master[0] 872 873[system.voltage_domain] 874type=VoltageDomain 875eventq_index=0 876voltage=1.000000 877 |