Deleted Added
sdiff udiff text old ( 10636:9ac724889705 ) new ( 10736:4433fb00fa7d )
full compact
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=false
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=System
13children=clk_domain cpu cpu_clk_domain dvfs_handler membus physmem voltage_domain
14boot_osflags=a
15cache_line_size=64
16clk_domain=system.clk_domain
17eventq_index=0
18init_param=0
19kernel=
20kernel_addr_check=true
21load_addr_mask=1099511627775
22load_offset=0
23mem_mode=timing
24mem_ranges=
25memories=system.physmem
26num_work_ids=16
27readfile=
28symbolfile=
29work_begin_ckpt_count=0
30work_begin_cpu_id_exit=-1
31work_begin_exit_count=0
32work_cpus_ckpt_count=0
33work_end_ckpt_count=0
34work_end_exit_count=0
35work_item_id=-1
36system_port=system.membus.slave[0]
37
38[system.clk_domain]
39type=SrcClockDomain
40clock=1000
41domain_id=-1
42eventq_index=0
43init_perf_level=0
44voltage_domain=system.voltage_domain
45
46[system.cpu]
47type=MinorCPU
48children=branchPred dcache dtb executeFuncUnits icache interrupts isa itb l2cache toL2Bus tracer workload
49branchPred=system.cpu.branchPred
50checker=Null
51clk_domain=system.cpu_clk_domain
52cpu_id=0
53decodeCycleInput=true
54decodeInputBufferSize=3
55decodeInputWidth=2
56decodeToExecuteForwardDelay=1
57do_checkpoint_insts=true
58do_quiesce=true
59do_statistics_insts=true
60dtb=system.cpu.dtb
61enableIdling=true
62eventq_index=0
63executeAllowEarlyMemoryIssue=true
64executeBranchDelay=1
65executeCommitLimit=2
66executeCycleInput=true
67executeFuncUnits=system.cpu.executeFuncUnits
68executeInputBufferSize=7
69executeInputWidth=2
70executeIssueLimit=2
71executeLSQMaxStoreBufferStoresPerCycle=2
72executeLSQRequestsQueueSize=1
73executeLSQStoreBufferSize=5
74executeLSQTransfersQueueSize=2
75executeMaxAccessesInMemory=2
76executeMemoryCommitLimit=1
77executeMemoryIssueLimit=1
78executeMemoryWidth=0
79executeSetTraceTimeOnCommit=true
80executeSetTraceTimeOnIssue=false
81fetch1FetchLimit=1
82fetch1LineSnapWidth=0
83fetch1LineWidth=0
84fetch1ToFetch2BackwardDelay=1
85fetch1ToFetch2ForwardDelay=1
86fetch2CycleInput=true
87fetch2InputBufferSize=2
88fetch2ToDecodeForwardDelay=1
89function_trace=false
90function_trace_start=0
91interrupts=system.cpu.interrupts
92isa=system.cpu.isa
93itb=system.cpu.itb
94max_insts_all_threads=0
95max_insts_any_thread=0
96max_loads_all_threads=0
97max_loads_any_thread=0
98numThreads=1
99profile=0
100progress_interval=0
101simpoint_start_insts=
102socket_id=0
103switched_out=false
104system=system
105tracer=system.cpu.tracer
106workload=system.cpu.workload
107dcache_port=system.cpu.dcache.cpu_side
108icache_port=system.cpu.icache.cpu_side
109
110[system.cpu.branchPred]
111type=BranchPredictor
112BTBEntries=4096
113BTBTagSize=16
114RASSize=16
115choiceCtrBits=2
116choicePredictorSize=8192
117eventq_index=0
118globalCtrBits=2
119globalPredictorSize=8192
120instShiftAmt=2
121localCtrBits=2
122localHistoryTableSize=2048
123localPredictorSize=2048
124numThreads=1
125predType=tournament
126
127[system.cpu.dcache]
128type=BaseCache
129children=tags
130addr_ranges=0:18446744073709551615
131assoc=2
132clk_domain=system.cpu_clk_domain
133demand_mshr_reserve=1
134eventq_index=0
135forward_snoops=true
136hit_latency=2
137is_top_level=true
138max_miss_count=0
139mshrs=4
140prefetch_on_access=false
141prefetcher=Null
142response_latency=2
143sequential_access=false
144size=262144
145system=system
146tags=system.cpu.dcache.tags
147tgts_per_mshr=20
148two_queue=false
149write_buffers=8
150cpu_side=system.cpu.dcache_port
151mem_side=system.cpu.toL2Bus.slave[1]
152
153[system.cpu.dcache.tags]
154type=LRU
155assoc=2
156block_size=64
157clk_domain=system.cpu_clk_domain
158eventq_index=0
159hit_latency=2
160sequential_access=false
161size=262144
162
163[system.cpu.dtb]
164type=AlphaTLB
165eventq_index=0
166size=64
167
168[system.cpu.executeFuncUnits]
169type=MinorFUPool
170children=funcUnits0 funcUnits1 funcUnits2 funcUnits3 funcUnits4 funcUnits5 funcUnits6
171eventq_index=0
172funcUnits=system.cpu.executeFuncUnits.funcUnits0 system.cpu.executeFuncUnits.funcUnits1 system.cpu.executeFuncUnits.funcUnits2 system.cpu.executeFuncUnits.funcUnits3 system.cpu.executeFuncUnits.funcUnits4 system.cpu.executeFuncUnits.funcUnits5 system.cpu.executeFuncUnits.funcUnits6
173
174[system.cpu.executeFuncUnits.funcUnits0]
175type=MinorFU
176children=opClasses timings
177cantForwardFromFUIndices=
178eventq_index=0
179issueLat=1
180opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses
181opLat=3
182timings=system.cpu.executeFuncUnits.funcUnits0.timings
183
184[system.cpu.executeFuncUnits.funcUnits0.opClasses]
185type=MinorOpClassSet
186children=opClasses
187eventq_index=0
188opClasses=system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses
189
190[system.cpu.executeFuncUnits.funcUnits0.opClasses.opClasses]
191type=MinorOpClass
192eventq_index=0
193opClass=IntAlu
194
195[system.cpu.executeFuncUnits.funcUnits0.timings]
196type=MinorFUTiming
197children=opClasses
198description=Int
199eventq_index=0
200extraAssumedLat=0
201extraCommitLat=0
202extraCommitLatExpr=Null
203mask=0
204match=0
205opClasses=system.cpu.executeFuncUnits.funcUnits0.timings.opClasses
206srcRegsRelativeLats=2
207suppress=false
208
209[system.cpu.executeFuncUnits.funcUnits0.timings.opClasses]
210type=MinorOpClassSet
211eventq_index=0
212opClasses=
213
214[system.cpu.executeFuncUnits.funcUnits1]
215type=MinorFU
216children=opClasses timings
217cantForwardFromFUIndices=
218eventq_index=0
219issueLat=1
220opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses
221opLat=3
222timings=system.cpu.executeFuncUnits.funcUnits1.timings
223
224[system.cpu.executeFuncUnits.funcUnits1.opClasses]
225type=MinorOpClassSet
226children=opClasses
227eventq_index=0
228opClasses=system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses
229
230[system.cpu.executeFuncUnits.funcUnits1.opClasses.opClasses]
231type=MinorOpClass
232eventq_index=0
233opClass=IntAlu
234
235[system.cpu.executeFuncUnits.funcUnits1.timings]
236type=MinorFUTiming
237children=opClasses
238description=Int
239eventq_index=0
240extraAssumedLat=0
241extraCommitLat=0
242extraCommitLatExpr=Null
243mask=0
244match=0
245opClasses=system.cpu.executeFuncUnits.funcUnits1.timings.opClasses
246srcRegsRelativeLats=2
247suppress=false
248
249[system.cpu.executeFuncUnits.funcUnits1.timings.opClasses]
250type=MinorOpClassSet
251eventq_index=0
252opClasses=
253
254[system.cpu.executeFuncUnits.funcUnits2]
255type=MinorFU
256children=opClasses timings
257cantForwardFromFUIndices=
258eventq_index=0
259issueLat=1
260opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses
261opLat=3
262timings=system.cpu.executeFuncUnits.funcUnits2.timings
263
264[system.cpu.executeFuncUnits.funcUnits2.opClasses]
265type=MinorOpClassSet
266children=opClasses
267eventq_index=0
268opClasses=system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses
269
270[system.cpu.executeFuncUnits.funcUnits2.opClasses.opClasses]
271type=MinorOpClass
272eventq_index=0
273opClass=IntMult
274
275[system.cpu.executeFuncUnits.funcUnits2.timings]
276type=MinorFUTiming
277children=opClasses
278description=Mul
279eventq_index=0
280extraAssumedLat=0
281extraCommitLat=0
282extraCommitLatExpr=Null
283mask=0
284match=0
285opClasses=system.cpu.executeFuncUnits.funcUnits2.timings.opClasses
286srcRegsRelativeLats=0
287suppress=false
288
289[system.cpu.executeFuncUnits.funcUnits2.timings.opClasses]
290type=MinorOpClassSet
291eventq_index=0
292opClasses=
293
294[system.cpu.executeFuncUnits.funcUnits3]
295type=MinorFU
296children=opClasses
297cantForwardFromFUIndices=
298eventq_index=0
299issueLat=9
300opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses
301opLat=9
302timings=
303
304[system.cpu.executeFuncUnits.funcUnits3.opClasses]
305type=MinorOpClassSet
306children=opClasses
307eventq_index=0
308opClasses=system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses
309
310[system.cpu.executeFuncUnits.funcUnits3.opClasses.opClasses]
311type=MinorOpClass
312eventq_index=0
313opClass=IntDiv
314
315[system.cpu.executeFuncUnits.funcUnits4]
316type=MinorFU
317children=opClasses timings
318cantForwardFromFUIndices=
319eventq_index=0
320issueLat=1
321opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses
322opLat=6
323timings=system.cpu.executeFuncUnits.funcUnits4.timings
324
325[system.cpu.executeFuncUnits.funcUnits4.opClasses]
326type=MinorOpClassSet
327children=opClasses00 opClasses01 opClasses02 opClasses03 opClasses04 opClasses05 opClasses06 opClasses07 opClasses08 opClasses09 opClasses10 opClasses11 opClasses12 opClasses13 opClasses14 opClasses15 opClasses16 opClasses17 opClasses18 opClasses19 opClasses20 opClasses21 opClasses22 opClasses23 opClasses24 opClasses25
328eventq_index=0
329opClasses=system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24 system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25
330
331[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses00]
332type=MinorOpClass
333eventq_index=0
334opClass=FloatAdd
335
336[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses01]
337type=MinorOpClass
338eventq_index=0
339opClass=FloatCmp
340
341[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses02]
342type=MinorOpClass
343eventq_index=0
344opClass=FloatCvt
345
346[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses03]
347type=MinorOpClass
348eventq_index=0
349opClass=FloatMult
350
351[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses04]
352type=MinorOpClass
353eventq_index=0
354opClass=FloatDiv
355
356[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses05]
357type=MinorOpClass
358eventq_index=0
359opClass=FloatSqrt
360
361[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses06]
362type=MinorOpClass
363eventq_index=0
364opClass=SimdAdd
365
366[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses07]
367type=MinorOpClass
368eventq_index=0
369opClass=SimdAddAcc
370
371[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses08]
372type=MinorOpClass
373eventq_index=0
374opClass=SimdAlu
375
376[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses09]
377type=MinorOpClass
378eventq_index=0
379opClass=SimdCmp
380
381[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses10]
382type=MinorOpClass
383eventq_index=0
384opClass=SimdCvt
385
386[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses11]
387type=MinorOpClass
388eventq_index=0
389opClass=SimdMisc
390
391[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses12]
392type=MinorOpClass
393eventq_index=0
394opClass=SimdMult
395
396[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses13]
397type=MinorOpClass
398eventq_index=0
399opClass=SimdMultAcc
400
401[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses14]
402type=MinorOpClass
403eventq_index=0
404opClass=SimdShift
405
406[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses15]
407type=MinorOpClass
408eventq_index=0
409opClass=SimdShiftAcc
410
411[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses16]
412type=MinorOpClass
413eventq_index=0
414opClass=SimdSqrt
415
416[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses17]
417type=MinorOpClass
418eventq_index=0
419opClass=SimdFloatAdd
420
421[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses18]
422type=MinorOpClass
423eventq_index=0
424opClass=SimdFloatAlu
425
426[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses19]
427type=MinorOpClass
428eventq_index=0
429opClass=SimdFloatCmp
430
431[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses20]
432type=MinorOpClass
433eventq_index=0
434opClass=SimdFloatCvt
435
436[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses21]
437type=MinorOpClass
438eventq_index=0
439opClass=SimdFloatDiv
440
441[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses22]
442type=MinorOpClass
443eventq_index=0
444opClass=SimdFloatMisc
445
446[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses23]
447type=MinorOpClass
448eventq_index=0
449opClass=SimdFloatMult
450
451[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses24]
452type=MinorOpClass
453eventq_index=0
454opClass=SimdFloatMultAcc
455
456[system.cpu.executeFuncUnits.funcUnits4.opClasses.opClasses25]
457type=MinorOpClass
458eventq_index=0
459opClass=SimdFloatSqrt
460
461[system.cpu.executeFuncUnits.funcUnits4.timings]
462type=MinorFUTiming
463children=opClasses
464description=FloatSimd
465eventq_index=0
466extraAssumedLat=0
467extraCommitLat=0
468extraCommitLatExpr=Null
469mask=0
470match=0
471opClasses=system.cpu.executeFuncUnits.funcUnits4.timings.opClasses
472srcRegsRelativeLats=2
473suppress=false
474
475[system.cpu.executeFuncUnits.funcUnits4.timings.opClasses]
476type=MinorOpClassSet
477eventq_index=0
478opClasses=
479
480[system.cpu.executeFuncUnits.funcUnits5]
481type=MinorFU
482children=opClasses timings
483cantForwardFromFUIndices=
484eventq_index=0
485issueLat=1
486opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses
487opLat=1
488timings=system.cpu.executeFuncUnits.funcUnits5.timings
489
490[system.cpu.executeFuncUnits.funcUnits5.opClasses]
491type=MinorOpClassSet
492children=opClasses0 opClasses1
493eventq_index=0
494opClasses=system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1
495
496[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses0]
497type=MinorOpClass
498eventq_index=0
499opClass=MemRead
500
501[system.cpu.executeFuncUnits.funcUnits5.opClasses.opClasses1]
502type=MinorOpClass
503eventq_index=0
504opClass=MemWrite
505
506[system.cpu.executeFuncUnits.funcUnits5.timings]
507type=MinorFUTiming
508children=opClasses
509description=Mem
510eventq_index=0
511extraAssumedLat=2
512extraCommitLat=0
513extraCommitLatExpr=Null
514mask=0
515match=0
516opClasses=system.cpu.executeFuncUnits.funcUnits5.timings.opClasses
517srcRegsRelativeLats=1
518suppress=false
519
520[system.cpu.executeFuncUnits.funcUnits5.timings.opClasses]
521type=MinorOpClassSet
522eventq_index=0
523opClasses=
524
525[system.cpu.executeFuncUnits.funcUnits6]
526type=MinorFU
527children=opClasses
528cantForwardFromFUIndices=
529eventq_index=0
530issueLat=1
531opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses
532opLat=1
533timings=
534
535[system.cpu.executeFuncUnits.funcUnits6.opClasses]
536type=MinorOpClassSet
537children=opClasses0 opClasses1
538eventq_index=0
539opClasses=system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0 system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1
540
541[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses0]
542type=MinorOpClass
543eventq_index=0
544opClass=IprAccess
545
546[system.cpu.executeFuncUnits.funcUnits6.opClasses.opClasses1]
547type=MinorOpClass
548eventq_index=0
549opClass=InstPrefetch
550
551[system.cpu.icache]
552type=BaseCache
553children=tags
554addr_ranges=0:18446744073709551615
555assoc=2
556clk_domain=system.cpu_clk_domain
557demand_mshr_reserve=1
558eventq_index=0
559forward_snoops=true
560hit_latency=2
561is_top_level=true
562max_miss_count=0
563mshrs=4
564prefetch_on_access=false
565prefetcher=Null
566response_latency=2
567sequential_access=false
568size=131072
569system=system
570tags=system.cpu.icache.tags
571tgts_per_mshr=20
572two_queue=false
573write_buffers=8
574cpu_side=system.cpu.icache_port
575mem_side=system.cpu.toL2Bus.slave[0]
576
577[system.cpu.icache.tags]
578type=LRU
579assoc=2
580block_size=64
581clk_domain=system.cpu_clk_domain
582eventq_index=0
583hit_latency=2
584sequential_access=false
585size=131072
586
587[system.cpu.interrupts]
588type=AlphaInterrupts
589eventq_index=0
590
591[system.cpu.isa]
592type=AlphaISA
593eventq_index=0
594system=system
595
596[system.cpu.itb]
597type=AlphaTLB
598eventq_index=0
599size=48
600
601[system.cpu.l2cache]
602type=BaseCache
603children=tags
604addr_ranges=0:18446744073709551615
605assoc=8
606clk_domain=system.cpu_clk_domain
607demand_mshr_reserve=1
608eventq_index=0
609forward_snoops=true
610hit_latency=20
611is_top_level=false
612max_miss_count=0
613mshrs=20
614prefetch_on_access=false
615prefetcher=Null
616response_latency=20
617sequential_access=false
618size=2097152
619system=system
620tags=system.cpu.l2cache.tags
621tgts_per_mshr=12
622two_queue=false
623write_buffers=8
624cpu_side=system.cpu.toL2Bus.master[0]
625mem_side=system.membus.slave[1]
626
627[system.cpu.l2cache.tags]
628type=LRU
629assoc=8
630block_size=64
631clk_domain=system.cpu_clk_domain
632eventq_index=0
633hit_latency=20
634sequential_access=false
635size=2097152
636
637[system.cpu.toL2Bus]
638type=CoherentXBar
639clk_domain=system.cpu_clk_domain
640eventq_index=0
641header_cycles=1
642snoop_filter=Null
643system=system
644use_default_range=false
645width=32
646master=system.cpu.l2cache.cpu_side
647slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
648
649[system.cpu.tracer]
650type=ExeTracer
651eventq_index=0
652
653[system.cpu.workload]
654type=LiveProcess
655cmd=hello
656cwd=
657drivers=
658egid=100
659env=
660errout=cerr
661euid=100
662eventq_index=0
663executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/alpha/linux/hello
664gid=100
665input=cin
666kvmInSE=false
667max_stack_size=67108864
668output=cout
669pid=100
670ppid=99
671simpoint=0
672system=system
673uid=100
674useArchPT=false
675
676[system.cpu_clk_domain]
677type=SrcClockDomain
678clock=500
679domain_id=-1
680eventq_index=0
681init_perf_level=0
682voltage_domain=system.voltage_domain
683
684[system.dvfs_handler]
685type=DVFSHandler
686domains=
687enable=false
688eventq_index=0
689sys_clk_domain=system.clk_domain
690transition_latency=100000000
691
692[system.membus]
693type=CoherentXBar
694clk_domain=system.clk_domain
695eventq_index=0
696header_cycles=1
697snoop_filter=Null
698system=system
699use_default_range=false
700width=8
701master=system.physmem.port
702slave=system.system_port system.cpu.l2cache.mem_side
703
704[system.physmem]
705type=DRAMCtrl
706IDD0=0.075000
707IDD02=0.000000
708IDD2N=0.050000
709IDD2N2=0.000000
710IDD2P0=0.000000
711IDD2P02=0.000000
712IDD2P1=0.000000
713IDD2P12=0.000000
714IDD3N=0.057000
715IDD3N2=0.000000
716IDD3P0=0.000000
717IDD3P02=0.000000
718IDD3P1=0.000000
719IDD3P12=0.000000
720IDD4R=0.187000
721IDD4R2=0.000000
722IDD4W=0.165000
723IDD4W2=0.000000
724IDD5=0.220000
725IDD52=0.000000
726IDD6=0.000000
727IDD62=0.000000
728VDD=1.500000
729VDD2=0.000000
730activation_limit=4
731addr_mapping=RoRaBaChCo
732bank_groups_per_rank=0
733banks_per_rank=8
734burst_length=8
735channels=1
736clk_domain=system.clk_domain
737conf_table_reported=true
738device_bus_width=8
739device_rowbuffer_size=1024
740device_size=536870912
741devices_per_rank=8
742dll=true
743eventq_index=0
744in_addr_map=true
745max_accesses_per_row=16
746mem_sched_policy=frfcfs
747min_writes_per_switch=16
748null=false
749page_policy=open_adaptive
750range=0:134217727
751ranks_per_channel=2
752read_buffer_size=32
753static_backend_latency=10000
754static_frontend_latency=10000
755tBURST=5000
756tCCD_L=0
757tCK=1250
758tCL=13750
759tCS=2500
760tRAS=35000
761tRCD=13750
762tREFI=7800000
763tRFC=260000
764tRP=13750
765tRRD=6000
766tRRD_L=0
767tRTP=7500
768tRTW=2500
769tWR=15000
770tWTR=7500
771tXAW=30000
772tXP=0
773tXPDLL=0
774tXS=0
775tXSDLL=0
776write_buffer_size=64
777write_high_thresh_perc=85
778write_low_thresh_perc=50
779port=system.membus.master[0]
780
781[system.voltage_domain]
782type=VoltageDomain
783eventq_index=0
784voltage=1.000000
785