1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.196390 # Number of seconds simulated 4sim_ticks 5196390180000 # Number of ticks simulated 5final_tick 5196390180000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks 7host_inst_rate 991078 # Simulator instruction rate (inst/s) 8host_op_rate 1910460 # Simulator op (including micro ops) rate (op/s) --- 635 unchanged lines hidden (view full) --- 644system.cpu.num_cc_register_writes 95534921 # number of times the CC registers were written 645system.cpu.num_mem_refs 22245363 # number of memory refs 646system.cpu.num_load_insts 13878746 # Number of load instructions 647system.cpu.num_store_insts 8366617 # Number of store instructions 648system.cpu.num_idle_cycles 9785238216.998117 # Number of idle cycles 649system.cpu.num_busy_cycles 607542143.001883 # Number of busy cycles 650system.cpu.not_idle_fraction 0.058458 # Percentage of non-idle cycles 651system.cpu.idle_fraction 0.941542 # Percentage of idle cycles |
652system.cpu.Branches 26307103 # Number of branches fetched |
653system.cpu.kern.inst.arm 0 # number of arm instructions executed 654system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 655system.cpu.icache.tags.replacements 788090 # number of replacements 656system.cpu.icache.tags.tagsinuse 510.351939 # Cycle average of tags in use 657system.cpu.icache.tags.total_refs 144584753 # Total number of references to valid blocks. 658system.cpu.icache.tags.sampled_refs 788602 # Sample count of references to valid blocks. 659system.cpu.icache.tags.avg_refs 183.343122 # Average number of references to valid blocks. 660system.cpu.icache.tags.warmup_cycle 161436066250 # Cycle when the warmup percentage was hit. --- 659 unchanged lines hidden --- |