21a22
> mem_ranges=0:134217727
75c76
< children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer
---
> children=dcache dtb dtb_walker_cache icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer
79d79
< defer_registration=false
86a87
> isa=system.cpu.isa
94a96
> switched_out=false
108d109
< hash_delay=1
115,116d115
< prioritizeRequests=false
< repl=Null
119d117
< subblock_size=0
122d119
< trace_addr=0
147d143
< hash_delay=1
154,155d149
< prioritizeRequests=false
< repl=Null
158d151
< subblock_size=0
161d153
< trace_addr=0
174d165
< hash_delay=1
181,182d171
< prioritizeRequests=false
< repl=Null
185d173
< subblock_size=0
188d175
< trace_addr=0
201c188
< int_master=system.membus.slave[4]
---
> int_master=system.membus.slave[3]
204a192,194
> [system.cpu.isa]
> type=X86ISA
>
224d213
< hash_delay=1
231,232d219
< prioritizeRequests=false
< repl=Null
235d221
< subblock_size=0
238d223
< trace_addr=0
251d235
< hash_delay=1
258,259d241
< prioritizeRequests=false
< repl=Null
262d243
< subblock_size=0
265d245
< trace_addr=0
269c249
< mem_side=system.membus.slave[3]
---
> mem_side=system.membus.slave[2]
665d644
< hash_delay=1
672,673d650
< prioritizeRequests=false
< repl=Null
676d652
< subblock_size=0
679d654
< trace_addr=0
683c658
< mem_side=system.membus.slave[2]
---
> mem_side=system.membus.slave[4]
695c670
< slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
---
> slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side