| stats.txt (9312:e05e1b69ebf2) | stats.txt (9474:23c3e1c0e9e4) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112041 # Number of seconds simulated | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112041 # Number of seconds simulated |
| 4sim_ticks 5112040968500 # Number of ticks simulated 5final_tick 5112040968500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) | 4sim_ticks 5112040970500 # Number of ticks simulated 5final_tick 5112040970500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) |
| 6sim_freq 1000000000000 # Frequency of simulated ticks | 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 468346 # Simulator instruction rate (inst/s) 8host_op_rate 958973 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 11982395829 # Simulator tick rate (ticks/s) 10host_mem_usage 354180 # Number of bytes of host memory used 11host_seconds 426.63 # Real time elapsed on the host 12sim_insts 199810236 # Number of instructions simulated 13sim_ops 409125920 # Number of ops (including micro ops) simulated | 7host_inst_rate 1661898 # Simulator instruction rate (inst/s) 8host_op_rate 3402855 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 42518772648 # Simulator tick rate (ticks/s) 10host_mem_usage 621064 # Number of bytes of host memory used 11host_seconds 120.23 # Real time elapsed on the host 12sim_insts 199810242 # Number of instructions simulated 13sim_ops 409125923 # Number of ops (including micro ops) simulated |
| 14system.physmem.bytes_read::pc.south_bridge.ide 2464640 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 128 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 853824 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 10600128 # Number of bytes read from this memory 19system.physmem.bytes_read::total 13919040 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 853824 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 853824 # Number of instructions bytes read from this memory --- 182 unchanged lines hidden (view full) --- 204system.physmem.readRowHitRate nan # Row buffer hit rate for reads 205system.physmem.writeRowHitRate nan # Row buffer hit rate for writes 206system.physmem.avgGap nan # Average gap between requests 207system.iocache.replacements 47569 # number of replacements 208system.iocache.tagsinuse 0.042402 # Cycle average of tags in use 209system.iocache.total_refs 0 # Total number of references to valid blocks. 210system.iocache.sampled_refs 47585 # Sample count of references to valid blocks. 211system.iocache.avg_refs 0 # Average number of references to valid blocks. | 14system.physmem.bytes_read::pc.south_bridge.ide 2464640 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 128 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 853824 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 10600128 # Number of bytes read from this memory 19system.physmem.bytes_read::total 13919040 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 853824 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 853824 # Number of instructions bytes read from this memory --- 182 unchanged lines hidden (view full) --- 204system.physmem.readRowHitRate nan # Row buffer hit rate for reads 205system.physmem.writeRowHitRate nan # Row buffer hit rate for writes 206system.physmem.avgGap nan # Average gap between requests 207system.iocache.replacements 47569 # number of replacements 208system.iocache.tagsinuse 0.042402 # Cycle average of tags in use 209system.iocache.total_refs 0 # Total number of references to valid blocks. 210system.iocache.sampled_refs 47585 # Sample count of references to valid blocks. 211system.iocache.avg_refs 0 # Average number of references to valid blocks. |
| 212system.iocache.warmup_cycle 4994776680059 # Cycle when the warmup percentage was hit. | 212system.iocache.warmup_cycle 4994776682059 # Cycle when the warmup percentage was hit. |
| 213system.iocache.occ_blocks::pc.south_bridge.ide 0.042402 # Average occupied blocks per requestor 214system.iocache.occ_percent::pc.south_bridge.ide 0.002650 # Average percentage of cache occupancy 215system.iocache.occ_percent::total 0.002650 # Average percentage of cache occupancy 216system.iocache.ReadReq_misses::pc.south_bridge.ide 904 # number of ReadReq misses 217system.iocache.ReadReq_misses::total 904 # number of ReadReq misses 218system.iocache.WriteReq_misses::pc.south_bridge.ide 46720 # number of WriteReq misses 219system.iocache.WriteReq_misses::total 46720 # number of WriteReq misses 220system.iocache.demand_misses::pc.south_bridge.ide 47624 # number of demand (read+write) misses --- 34 unchanged lines hidden (view full) --- 255system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 256system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 257system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 258system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 259system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 260system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 261system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 262system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. | 213system.iocache.occ_blocks::pc.south_bridge.ide 0.042402 # Average occupied blocks per requestor 214system.iocache.occ_percent::pc.south_bridge.ide 0.002650 # Average percentage of cache occupancy 215system.iocache.occ_percent::total 0.002650 # Average percentage of cache occupancy 216system.iocache.ReadReq_misses::pc.south_bridge.ide 904 # number of ReadReq misses 217system.iocache.ReadReq_misses::total 904 # number of ReadReq misses 218system.iocache.WriteReq_misses::pc.south_bridge.ide 46720 # number of WriteReq misses 219system.iocache.WriteReq_misses::total 46720 # number of WriteReq misses 220system.iocache.demand_misses::pc.south_bridge.ide 47624 # number of demand (read+write) misses --- 34 unchanged lines hidden (view full) --- 255system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 256system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 257system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 258system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 259system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 260system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 261system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 262system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. |
| 263system.cpu.numCycles 10224081960 # number of cpu cycles simulated | 263system.cpu.numCycles 10224081964 # number of cpu cycles simulated |
| 264system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 265system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed | 264system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 265system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed |
| 266system.cpu.committedInsts 199810236 # Number of instructions committed 267system.cpu.committedOps 409125920 # Number of ops (including micro ops) committed 268system.cpu.num_int_alu_accesses 374289911 # Number of integer alu accesses | 266system.cpu.committedInsts 199810242 # Number of instructions committed 267system.cpu.committedOps 409125923 # Number of ops (including micro ops) committed 268system.cpu.num_int_alu_accesses 374289914 # Number of integer alu accesses |
| 269system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 270system.cpu.num_func_calls 0 # number of times a function call or return occured | 269system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses 270system.cpu.num_func_calls 0 # number of times a function call or return occured |
| 271system.cpu.num_conditional_control_insts 39954536 # number of instructions that are conditional controls 272system.cpu.num_int_insts 374289911 # number of integer instructions | 271system.cpu.num_conditional_control_insts 39954535 # number of instructions that are conditional controls 272system.cpu.num_int_insts 374289914 # number of integer instructions |
| 273system.cpu.num_fp_insts 0 # number of float instructions | 273system.cpu.num_fp_insts 0 # number of float instructions |
| 274system.cpu.num_int_register_reads 915450709 # number of times the integer registers were read 275system.cpu.num_int_register_writes 480322748 # number of times the integer registers were written | 274system.cpu.num_int_register_reads 915450706 # number of times the integer registers were read 275system.cpu.num_int_register_writes 480322745 # number of times the integer registers were written |
| 276system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 277system.cpu.num_fp_register_writes 0 # number of times the floating registers were written | 276system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 277system.cpu.num_fp_register_writes 0 # number of times the floating registers were written |
| 278system.cpu.num_mem_refs 35624588 # number of memory refs | 278system.cpu.num_mem_refs 35624590 # number of memory refs |
| 279system.cpu.num_load_insts 27216588 # Number of load instructions | 279system.cpu.num_load_insts 27216588 # Number of load instructions |
| 280system.cpu.num_store_insts 8408000 # Number of store instructions 281system.cpu.num_idle_cycles 9770609595.971962 # Number of idle cycles 282system.cpu.num_busy_cycles 453472364.028039 # Number of busy cycles | 280system.cpu.num_store_insts 8408002 # Number of store instructions 281system.cpu.num_idle_cycles 9770609597.971960 # Number of idle cycles 282system.cpu.num_busy_cycles 453472366.028039 # Number of busy cycles |
| 283system.cpu.not_idle_fraction 0.044353 # Percentage of non-idle cycles 284system.cpu.idle_fraction 0.955647 # Percentage of idle cycles 285system.cpu.kern.inst.arm 0 # number of arm instructions executed 286system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 287system.cpu.icache.replacements 790732 # number of replacements | 283system.cpu.not_idle_fraction 0.044353 # Percentage of non-idle cycles 284system.cpu.idle_fraction 0.955647 # Percentage of idle cycles 285system.cpu.kern.inst.arm 0 # number of arm instructions executed 286system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 287system.cpu.icache.replacements 790732 # number of replacements |
| 288system.cpu.icache.tagsinuse 510.627676 # Cycle average of tags in use 289system.cpu.icache.total_refs 243360722 # Total number of references to valid blocks. | 288system.cpu.icache.tagsinuse 510.627675 # Cycle average of tags in use 289system.cpu.icache.total_refs 243360727 # Total number of references to valid blocks. |
| 290system.cpu.icache.sampled_refs 791244 # Sample count of references to valid blocks. | 290system.cpu.icache.sampled_refs 791244 # Sample count of references to valid blocks. |
| 291system.cpu.icache.avg_refs 307.567226 # Average number of references to valid blocks. 292system.cpu.icache.warmup_cycle 148763110500 # Cycle when the warmup percentage was hit. 293system.cpu.icache.occ_blocks::cpu.inst 510.627676 # Average occupied blocks per requestor | 291system.cpu.icache.avg_refs 307.567232 # Average number of references to valid blocks. 292system.cpu.icache.warmup_cycle 148763114500 # Cycle when the warmup percentage was hit. 293system.cpu.icache.occ_blocks::cpu.inst 510.627675 # Average occupied blocks per requestor |
| 294system.cpu.icache.occ_percent::cpu.inst 0.997320 # Average percentage of cache occupancy 295system.cpu.icache.occ_percent::total 0.997320 # Average percentage of cache occupancy | 294system.cpu.icache.occ_percent::cpu.inst 0.997320 # Average percentage of cache occupancy 295system.cpu.icache.occ_percent::total 0.997320 # Average percentage of cache occupancy |
| 296system.cpu.icache.ReadReq_hits::cpu.inst 243360722 # number of ReadReq hits 297system.cpu.icache.ReadReq_hits::total 243360722 # number of ReadReq hits 298system.cpu.icache.demand_hits::cpu.inst 243360722 # number of demand (read+write) hits 299system.cpu.icache.demand_hits::total 243360722 # number of demand (read+write) hits 300system.cpu.icache.overall_hits::cpu.inst 243360722 # number of overall hits 301system.cpu.icache.overall_hits::total 243360722 # number of overall hits | 296system.cpu.icache.ReadReq_hits::cpu.inst 243360727 # number of ReadReq hits 297system.cpu.icache.ReadReq_hits::total 243360727 # number of ReadReq hits 298system.cpu.icache.demand_hits::cpu.inst 243360727 # number of demand (read+write) hits 299system.cpu.icache.demand_hits::total 243360727 # number of demand (read+write) hits 300system.cpu.icache.overall_hits::cpu.inst 243360727 # number of overall hits 301system.cpu.icache.overall_hits::total 243360727 # number of overall hits |
| 302system.cpu.icache.ReadReq_misses::cpu.inst 791251 # number of ReadReq misses 303system.cpu.icache.ReadReq_misses::total 791251 # number of ReadReq misses 304system.cpu.icache.demand_misses::cpu.inst 791251 # number of demand (read+write) misses 305system.cpu.icache.demand_misses::total 791251 # number of demand (read+write) misses 306system.cpu.icache.overall_misses::cpu.inst 791251 # number of overall misses 307system.cpu.icache.overall_misses::total 791251 # number of overall misses | 302system.cpu.icache.ReadReq_misses::cpu.inst 791251 # number of ReadReq misses 303system.cpu.icache.ReadReq_misses::total 791251 # number of ReadReq misses 304system.cpu.icache.demand_misses::cpu.inst 791251 # number of demand (read+write) misses 305system.cpu.icache.demand_misses::total 791251 # number of demand (read+write) misses 306system.cpu.icache.overall_misses::cpu.inst 791251 # number of overall misses 307system.cpu.icache.overall_misses::total 791251 # number of overall misses |
| 308system.cpu.icache.ReadReq_accesses::cpu.inst 244151973 # number of ReadReq accesses(hits+misses) 309system.cpu.icache.ReadReq_accesses::total 244151973 # number of ReadReq accesses(hits+misses) 310system.cpu.icache.demand_accesses::cpu.inst 244151973 # number of demand (read+write) accesses 311system.cpu.icache.demand_accesses::total 244151973 # number of demand (read+write) accesses 312system.cpu.icache.overall_accesses::cpu.inst 244151973 # number of overall (read+write) accesses 313system.cpu.icache.overall_accesses::total 244151973 # number of overall (read+write) accesses | 308system.cpu.icache.ReadReq_accesses::cpu.inst 244151978 # number of ReadReq accesses(hits+misses) 309system.cpu.icache.ReadReq_accesses::total 244151978 # number of ReadReq accesses(hits+misses) 310system.cpu.icache.demand_accesses::cpu.inst 244151978 # number of demand (read+write) accesses 311system.cpu.icache.demand_accesses::total 244151978 # number of demand (read+write) accesses 312system.cpu.icache.overall_accesses::cpu.inst 244151978 # number of overall (read+write) accesses 313system.cpu.icache.overall_accesses::total 244151978 # number of overall (read+write) accesses |
| 314system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003241 # miss rate for ReadReq accesses 315system.cpu.icache.ReadReq_miss_rate::total 0.003241 # miss rate for ReadReq accesses 316system.cpu.icache.demand_miss_rate::cpu.inst 0.003241 # miss rate for demand accesses 317system.cpu.icache.demand_miss_rate::total 0.003241 # miss rate for demand accesses 318system.cpu.icache.overall_miss_rate::cpu.inst 0.003241 # miss rate for overall accesses 319system.cpu.icache.overall_miss_rate::total 0.003241 # miss rate for overall accesses 320system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 321system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked --- 4 unchanged lines hidden (view full) --- 326system.cpu.icache.fast_writes 0 # number of fast writes performed 327system.cpu.icache.cache_copies 0 # number of cache copies performed 328system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 329system.cpu.itb_walker_cache.replacements 3335 # number of replacements 330system.cpu.itb_walker_cache.tagsinuse 3.026483 # Cycle average of tags in use 331system.cpu.itb_walker_cache.total_refs 8029 # Total number of references to valid blocks. 332system.cpu.itb_walker_cache.sampled_refs 3346 # Sample count of references to valid blocks. 333system.cpu.itb_walker_cache.avg_refs 2.399582 # Average number of references to valid blocks. | 314system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003241 # miss rate for ReadReq accesses 315system.cpu.icache.ReadReq_miss_rate::total 0.003241 # miss rate for ReadReq accesses 316system.cpu.icache.demand_miss_rate::cpu.inst 0.003241 # miss rate for demand accesses 317system.cpu.icache.demand_miss_rate::total 0.003241 # miss rate for demand accesses 318system.cpu.icache.overall_miss_rate::cpu.inst 0.003241 # miss rate for overall accesses 319system.cpu.icache.overall_miss_rate::total 0.003241 # miss rate for overall accesses 320system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 321system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked --- 4 unchanged lines hidden (view full) --- 326system.cpu.icache.fast_writes 0 # number of fast writes performed 327system.cpu.icache.cache_copies 0 # number of cache copies performed 328system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 329system.cpu.itb_walker_cache.replacements 3335 # number of replacements 330system.cpu.itb_walker_cache.tagsinuse 3.026483 # Cycle average of tags in use 331system.cpu.itb_walker_cache.total_refs 8029 # Total number of references to valid blocks. 332system.cpu.itb_walker_cache.sampled_refs 3346 # Sample count of references to valid blocks. 333system.cpu.itb_walker_cache.avg_refs 2.399582 # Average number of references to valid blocks. |
| 334system.cpu.itb_walker_cache.warmup_cycle 5102019608500 # Cycle when the warmup percentage was hit. | 334system.cpu.itb_walker_cache.warmup_cycle 5102019610500 # Cycle when the warmup percentage was hit. |
| 335system.cpu.itb_walker_cache.occ_blocks::cpu.itb.walker 3.026483 # Average occupied blocks per requestor 336system.cpu.itb_walker_cache.occ_percent::cpu.itb.walker 0.189155 # Average percentage of cache occupancy 337system.cpu.itb_walker_cache.occ_percent::total 0.189155 # Average percentage of cache occupancy 338system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 8031 # number of ReadReq hits 339system.cpu.itb_walker_cache.ReadReq_hits::total 8031 # number of ReadReq hits 340system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits 341system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits 342system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 8033 # number of demand (read+write) hits --- 31 unchanged lines hidden (view full) --- 374system.cpu.itb_walker_cache.writebacks::writebacks 593 # number of writebacks 375system.cpu.itb_walker_cache.writebacks::total 593 # number of writebacks 376system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate 377system.cpu.dtb_walker_cache.replacements 7597 # number of replacements 378system.cpu.dtb_walker_cache.tagsinuse 5.013746 # Cycle average of tags in use 379system.cpu.dtb_walker_cache.total_refs 13015 # Total number of references to valid blocks. 380system.cpu.dtb_walker_cache.sampled_refs 7611 # Sample count of references to valid blocks. 381system.cpu.dtb_walker_cache.avg_refs 1.710025 # Average number of references to valid blocks. | 335system.cpu.itb_walker_cache.occ_blocks::cpu.itb.walker 3.026483 # Average occupied blocks per requestor 336system.cpu.itb_walker_cache.occ_percent::cpu.itb.walker 0.189155 # Average percentage of cache occupancy 337system.cpu.itb_walker_cache.occ_percent::total 0.189155 # Average percentage of cache occupancy 338system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 8031 # number of ReadReq hits 339system.cpu.itb_walker_cache.ReadReq_hits::total 8031 # number of ReadReq hits 340system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits 341system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits 342system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 8033 # number of demand (read+write) hits --- 31 unchanged lines hidden (view full) --- 374system.cpu.itb_walker_cache.writebacks::writebacks 593 # number of writebacks 375system.cpu.itb_walker_cache.writebacks::total 593 # number of writebacks 376system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate 377system.cpu.dtb_walker_cache.replacements 7597 # number of replacements 378system.cpu.dtb_walker_cache.tagsinuse 5.013746 # Cycle average of tags in use 379system.cpu.dtb_walker_cache.total_refs 13015 # Total number of references to valid blocks. 380system.cpu.dtb_walker_cache.sampled_refs 7611 # Sample count of references to valid blocks. 381system.cpu.dtb_walker_cache.avg_refs 1.710025 # Average number of references to valid blocks. |
| 382system.cpu.dtb_walker_cache.warmup_cycle 5101206384000 # Cycle when the warmup percentage was hit. | 382system.cpu.dtb_walker_cache.warmup_cycle 5101206386000 # Cycle when the warmup percentage was hit. |
| 383system.cpu.dtb_walker_cache.occ_blocks::cpu.dtb.walker 5.013746 # Average occupied blocks per requestor 384system.cpu.dtb_walker_cache.occ_percent::cpu.dtb.walker 0.313359 # Average percentage of cache occupancy 385system.cpu.dtb_walker_cache.occ_percent::total 0.313359 # Average percentage of cache occupancy 386system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 13017 # number of ReadReq hits 387system.cpu.dtb_walker_cache.ReadReq_hits::total 13017 # number of ReadReq hits 388system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 13017 # number of demand (read+write) hits 389system.cpu.dtb_walker_cache.demand_hits::total 13017 # number of demand (read+write) hits 390system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 13017 # number of overall hits --- 24 unchanged lines hidden (view full) --- 415system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 416system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed 417system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed 418system.cpu.dtb_walker_cache.writebacks::writebacks 2556 # number of writebacks 419system.cpu.dtb_walker_cache.writebacks::total 2556 # number of writebacks 420system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate 421system.cpu.dcache.replacements 1621135 # number of replacements 422system.cpu.dcache.tagsinuse 511.999456 # Cycle average of tags in use | 383system.cpu.dtb_walker_cache.occ_blocks::cpu.dtb.walker 5.013746 # Average occupied blocks per requestor 384system.cpu.dtb_walker_cache.occ_percent::cpu.dtb.walker 0.313359 # Average percentage of cache occupancy 385system.cpu.dtb_walker_cache.occ_percent::total 0.313359 # Average percentage of cache occupancy 386system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 13017 # number of ReadReq hits 387system.cpu.dtb_walker_cache.ReadReq_hits::total 13017 # number of ReadReq hits 388system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 13017 # number of demand (read+write) hits 389system.cpu.dtb_walker_cache.demand_hits::total 13017 # number of demand (read+write) hits 390system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 13017 # number of overall hits --- 24 unchanged lines hidden (view full) --- 415system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 416system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed 417system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed 418system.cpu.dtb_walker_cache.writebacks::writebacks 2556 # number of writebacks 419system.cpu.dtb_walker_cache.writebacks::total 2556 # number of writebacks 420system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate 421system.cpu.dcache.replacements 1621135 # number of replacements 422system.cpu.dcache.tagsinuse 511.999456 # Cycle average of tags in use |
| 423system.cpu.dcache.total_refs 20140429 # Total number of references to valid blocks. | 423system.cpu.dcache.total_refs 20140431 # Total number of references to valid blocks. |
| 424system.cpu.dcache.sampled_refs 1621647 # Sample count of references to valid blocks. | 424system.cpu.dcache.sampled_refs 1621647 # Sample count of references to valid blocks. |
| 425system.cpu.dcache.avg_refs 12.419737 # Average number of references to valid blocks. | 425system.cpu.dcache.avg_refs 12.419738 # Average number of references to valid blocks. |
| 426system.cpu.dcache.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. 427system.cpu.dcache.occ_blocks::cpu.data 511.999456 # Average occupied blocks per requestor 428system.cpu.dcache.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy 429system.cpu.dcache.occ_percent::total 0.999999 # Average percentage of cache occupancy 430system.cpu.dcache.ReadReq_hits::cpu.data 12055941 # number of ReadReq hits 431system.cpu.dcache.ReadReq_hits::total 12055941 # number of ReadReq hits | 426system.cpu.dcache.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. 427system.cpu.dcache.occ_blocks::cpu.data 511.999456 # Average occupied blocks per requestor 428system.cpu.dcache.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy 429system.cpu.dcache.occ_percent::total 0.999999 # Average percentage of cache occupancy 430system.cpu.dcache.ReadReq_hits::cpu.data 12055941 # number of ReadReq hits 431system.cpu.dcache.ReadReq_hits::total 12055941 # number of ReadReq hits |
| 432system.cpu.dcache.WriteReq_hits::cpu.data 8082226 # number of WriteReq hits 433system.cpu.dcache.WriteReq_hits::total 8082226 # number of WriteReq hits 434system.cpu.dcache.demand_hits::cpu.data 20138167 # number of demand (read+write) hits 435system.cpu.dcache.demand_hits::total 20138167 # number of demand (read+write) hits 436system.cpu.dcache.overall_hits::cpu.data 20138167 # number of overall hits 437system.cpu.dcache.overall_hits::total 20138167 # number of overall hits | 432system.cpu.dcache.WriteReq_hits::cpu.data 8082228 # number of WriteReq hits 433system.cpu.dcache.WriteReq_hits::total 8082228 # number of WriteReq hits 434system.cpu.dcache.demand_hits::cpu.data 20138169 # number of demand (read+write) hits 435system.cpu.dcache.demand_hits::total 20138169 # number of demand (read+write) hits 436system.cpu.dcache.overall_hits::cpu.data 20138169 # number of overall hits 437system.cpu.dcache.overall_hits::total 20138169 # number of overall hits |
| 438system.cpu.dcache.ReadReq_misses::cpu.data 1308091 # number of ReadReq misses 439system.cpu.dcache.ReadReq_misses::total 1308091 # number of ReadReq misses 440system.cpu.dcache.WriteReq_misses::cpu.data 315828 # number of WriteReq misses 441system.cpu.dcache.WriteReq_misses::total 315828 # number of WriteReq misses 442system.cpu.dcache.demand_misses::cpu.data 1623919 # number of demand (read+write) misses 443system.cpu.dcache.demand_misses::total 1623919 # number of demand (read+write) misses 444system.cpu.dcache.overall_misses::cpu.data 1623919 # number of overall misses 445system.cpu.dcache.overall_misses::total 1623919 # number of overall misses 446system.cpu.dcache.ReadReq_accesses::cpu.data 13364032 # number of ReadReq accesses(hits+misses) 447system.cpu.dcache.ReadReq_accesses::total 13364032 # number of ReadReq accesses(hits+misses) | 438system.cpu.dcache.ReadReq_misses::cpu.data 1308091 # number of ReadReq misses 439system.cpu.dcache.ReadReq_misses::total 1308091 # number of ReadReq misses 440system.cpu.dcache.WriteReq_misses::cpu.data 315828 # number of WriteReq misses 441system.cpu.dcache.WriteReq_misses::total 315828 # number of WriteReq misses 442system.cpu.dcache.demand_misses::cpu.data 1623919 # number of demand (read+write) misses 443system.cpu.dcache.demand_misses::total 1623919 # number of demand (read+write) misses 444system.cpu.dcache.overall_misses::cpu.data 1623919 # number of overall misses 445system.cpu.dcache.overall_misses::total 1623919 # number of overall misses 446system.cpu.dcache.ReadReq_accesses::cpu.data 13364032 # number of ReadReq accesses(hits+misses) 447system.cpu.dcache.ReadReq_accesses::total 13364032 # number of ReadReq accesses(hits+misses) |
| 448system.cpu.dcache.WriteReq_accesses::cpu.data 8398054 # number of WriteReq accesses(hits+misses) 449system.cpu.dcache.WriteReq_accesses::total 8398054 # number of WriteReq accesses(hits+misses) 450system.cpu.dcache.demand_accesses::cpu.data 21762086 # number of demand (read+write) accesses 451system.cpu.dcache.demand_accesses::total 21762086 # number of demand (read+write) accesses 452system.cpu.dcache.overall_accesses::cpu.data 21762086 # number of overall (read+write) accesses 453system.cpu.dcache.overall_accesses::total 21762086 # number of overall (read+write) accesses | 448system.cpu.dcache.WriteReq_accesses::cpu.data 8398056 # number of WriteReq accesses(hits+misses) 449system.cpu.dcache.WriteReq_accesses::total 8398056 # number of WriteReq accesses(hits+misses) 450system.cpu.dcache.demand_accesses::cpu.data 21762088 # number of demand (read+write) accesses 451system.cpu.dcache.demand_accesses::total 21762088 # number of demand (read+write) accesses 452system.cpu.dcache.overall_accesses::cpu.data 21762088 # number of overall (read+write) accesses 453system.cpu.dcache.overall_accesses::total 21762088 # number of overall (read+write) accesses |
| 454system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.097881 # miss rate for ReadReq accesses 455system.cpu.dcache.ReadReq_miss_rate::total 0.097881 # miss rate for ReadReq accesses 456system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037607 # miss rate for WriteReq accesses 457system.cpu.dcache.WriteReq_miss_rate::total 0.037607 # miss rate for WriteReq accesses 458system.cpu.dcache.demand_miss_rate::cpu.data 0.074621 # miss rate for demand accesses 459system.cpu.dcache.demand_miss_rate::total 0.074621 # miss rate for demand accesses 460system.cpu.dcache.overall_miss_rate::cpu.data 0.074621 # miss rate for overall accesses 461system.cpu.dcache.overall_miss_rate::total 0.074621 # miss rate for overall accesses --- 4 unchanged lines hidden (view full) --- 466system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 467system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 468system.cpu.dcache.fast_writes 0 # number of fast writes performed 469system.cpu.dcache.cache_copies 0 # number of cache copies performed 470system.cpu.dcache.writebacks::writebacks 1534848 # number of writebacks 471system.cpu.dcache.writebacks::total 1534848 # number of writebacks 472system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 473system.cpu.l2cache.replacements 106558 # number of replacements | 454system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.097881 # miss rate for ReadReq accesses 455system.cpu.dcache.ReadReq_miss_rate::total 0.097881 # miss rate for ReadReq accesses 456system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037607 # miss rate for WriteReq accesses 457system.cpu.dcache.WriteReq_miss_rate::total 0.037607 # miss rate for WriteReq accesses 458system.cpu.dcache.demand_miss_rate::cpu.data 0.074621 # miss rate for demand accesses 459system.cpu.dcache.demand_miss_rate::total 0.074621 # miss rate for demand accesses 460system.cpu.dcache.overall_miss_rate::cpu.data 0.074621 # miss rate for overall accesses 461system.cpu.dcache.overall_miss_rate::total 0.074621 # miss rate for overall accesses --- 4 unchanged lines hidden (view full) --- 466system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 467system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 468system.cpu.dcache.fast_writes 0 # number of fast writes performed 469system.cpu.dcache.cache_copies 0 # number of cache copies performed 470system.cpu.dcache.writebacks::writebacks 1534848 # number of writebacks 471system.cpu.dcache.writebacks::total 1534848 # number of writebacks 472system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 473system.cpu.l2cache.replacements 106558 # number of replacements |
| 474system.cpu.l2cache.tagsinuse 64822.149247 # Cycle average of tags in use | 474system.cpu.l2cache.tagsinuse 64822.149219 # Cycle average of tags in use |
| 475system.cpu.l2cache.total_refs 3456224 # Total number of references to valid blocks. 476system.cpu.l2cache.sampled_refs 170677 # Sample count of references to valid blocks. 477system.cpu.l2cache.avg_refs 20.250086 # Average number of references to valid blocks. 478system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit. | 475system.cpu.l2cache.total_refs 3456224 # Total number of references to valid blocks. 476system.cpu.l2cache.sampled_refs 170677 # Sample count of references to valid blocks. 477system.cpu.l2cache.avg_refs 20.250086 # Average number of references to valid blocks. 478system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit. |
| 479system.cpu.l2cache.occ_blocks::writebacks 51981.453140 # Average occupied blocks per requestor | 479system.cpu.l2cache.occ_blocks::writebacks 51981.453118 # Average occupied blocks per requestor |
| 480system.cpu.l2cache.occ_blocks::cpu.dtb.walker 0.004954 # Average occupied blocks per requestor 481system.cpu.l2cache.occ_blocks::cpu.itb.walker 0.132114 # Average occupied blocks per requestor | 480system.cpu.l2cache.occ_blocks::cpu.dtb.walker 0.004954 # Average occupied blocks per requestor 481system.cpu.l2cache.occ_blocks::cpu.itb.walker 0.132114 # Average occupied blocks per requestor |
| 482system.cpu.l2cache.occ_blocks::cpu.inst 2434.994083 # Average occupied blocks per requestor 483system.cpu.l2cache.occ_blocks::cpu.data 10405.564957 # Average occupied blocks per requestor | 482system.cpu.l2cache.occ_blocks::cpu.inst 2434.994082 # Average occupied blocks per requestor 483system.cpu.l2cache.occ_blocks::cpu.data 10405.564951 # Average occupied blocks per requestor |
| 484system.cpu.l2cache.occ_percent::writebacks 0.793174 # Average percentage of cache occupancy 485system.cpu.l2cache.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 486system.cpu.l2cache.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy 487system.cpu.l2cache.occ_percent::cpu.inst 0.037155 # Average percentage of cache occupancy 488system.cpu.l2cache.occ_percent::cpu.data 0.158776 # Average percentage of cache occupancy 489system.cpu.l2cache.occ_percent::total 0.989108 # Average percentage of cache occupancy 490system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6578 # number of ReadReq hits 491system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2700 # number of ReadReq hits --- 91 unchanged lines hidden --- | 484system.cpu.l2cache.occ_percent::writebacks 0.793174 # Average percentage of cache occupancy 485system.cpu.l2cache.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 486system.cpu.l2cache.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy 487system.cpu.l2cache.occ_percent::cpu.inst 0.037155 # Average percentage of cache occupancy 488system.cpu.l2cache.occ_percent::cpu.data 0.158776 # Average percentage of cache occupancy 489system.cpu.l2cache.occ_percent::total 0.989108 # Average percentage of cache occupancy 490system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6578 # number of ReadReq hits 491system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2700 # number of ReadReq hits --- 91 unchanged lines hidden --- |