| stats.txt (9125:65423863d963) | stats.txt (9134:275232ad377d) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112043 # Number of seconds simulated 4sim_ticks 5112043255000 # Number of ticks simulated 5final_tick 5112043255000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112043 # Number of seconds simulated 4sim_ticks 5112043255000 # Number of ticks simulated 5final_tick 5112043255000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1067695 # Simulator instruction rate (inst/s) 8host_op_rate 2186181 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 27315912254 # Simulator tick rate (ticks/s) 10host_mem_usage 409548 # Number of bytes of host memory used 11host_seconds 187.15 # Real time elapsed on the host | 7host_inst_rate 1419112 # Simulator instruction rate (inst/s) 8host_op_rate 2905734 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 36306590178 # Simulator tick rate (ticks/s) 10host_mem_usage 362152 # Number of bytes of host memory used 11host_seconds 140.80 # Real time elapsed on the host |
| 12sim_insts 199813914 # Number of instructions simulated 13sim_ops 409133298 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::pc.south_bridge.ide 2464768 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 128 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 853824 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 10600192 # Number of bytes read from this memory 19system.physmem.bytes_read::total 13919232 # Number of bytes read from this memory --- 23 unchanged lines hidden (view full) --- 43system.physmem.bw_total::pc.south_bridge.ide 482149 # Total bandwidth to/from this memory (bytes/s) 44system.physmem.bw_total::cpu.dtb.walker 25 # Total bandwidth to/from this memory (bytes/s) 45system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::cpu.inst 167022 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu.data 2073572 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::total 4540656 # Total bandwidth to/from this memory (bytes/s) 49system.l2c.replacements 106561 # number of replacements 50system.l2c.tagsinuse 64822.143261 # Cycle average of tags in use | 12sim_insts 199813914 # Number of instructions simulated 13sim_ops 409133298 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::pc.south_bridge.ide 2464768 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 128 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 853824 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 10600192 # Number of bytes read from this memory 19system.physmem.bytes_read::total 13919232 # Number of bytes read from this memory --- 23 unchanged lines hidden (view full) --- 43system.physmem.bw_total::pc.south_bridge.ide 482149 # Total bandwidth to/from this memory (bytes/s) 44system.physmem.bw_total::cpu.dtb.walker 25 # Total bandwidth to/from this memory (bytes/s) 45system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::cpu.inst 167022 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu.data 2073572 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::total 4540656 # Total bandwidth to/from this memory (bytes/s) 49system.l2c.replacements 106561 # number of replacements 50system.l2c.tagsinuse 64822.143261 # Cycle average of tags in use |
| 51system.l2c.total_refs 3457342 # Total number of references to valid blocks. | 51system.l2c.total_refs 3456533 # Total number of references to valid blocks. |
| 52system.l2c.sampled_refs 170680 # Sample count of references to valid blocks. | 52system.l2c.sampled_refs 170680 # Sample count of references to valid blocks. |
| 53system.l2c.avg_refs 20.256281 # Average number of references to valid blocks. | 53system.l2c.avg_refs 20.251541 # Average number of references to valid blocks. |
| 54system.l2c.warmup_cycle 0 # Cycle when the warmup percentage was hit. 55system.l2c.occ_blocks::writebacks 51981.461987 # Average occupied blocks per requestor 56system.l2c.occ_blocks::cpu.dtb.walker 0.004954 # Average occupied blocks per requestor 57system.l2c.occ_blocks::cpu.itb.walker 0.132110 # Average occupied blocks per requestor 58system.l2c.occ_blocks::cpu.inst 2434.983596 # Average occupied blocks per requestor 59system.l2c.occ_blocks::cpu.data 10405.560614 # Average occupied blocks per requestor 60system.l2c.occ_percent::writebacks 0.793174 # Average percentage of cache occupancy 61system.l2c.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 62system.l2c.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy 63system.l2c.occ_percent::cpu.inst 0.037155 # Average percentage of cache occupancy 64system.l2c.occ_percent::cpu.data 0.158776 # Average percentage of cache occupancy 65system.l2c.occ_percent::total 0.989107 # Average percentage of cache occupancy 66system.l2c.ReadReq_hits::cpu.dtb.walker 6578 # number of ReadReq hits 67system.l2c.ReadReq_hits::cpu.itb.walker 2700 # number of ReadReq hits 68system.l2c.ReadReq_hits::cpu.inst 777957 # number of ReadReq hits 69system.l2c.ReadReq_hits::cpu.data 1275395 # number of ReadReq hits 70system.l2c.ReadReq_hits::total 2062630 # number of ReadReq hits | 54system.l2c.warmup_cycle 0 # Cycle when the warmup percentage was hit. 55system.l2c.occ_blocks::writebacks 51981.461987 # Average occupied blocks per requestor 56system.l2c.occ_blocks::cpu.dtb.walker 0.004954 # Average occupied blocks per requestor 57system.l2c.occ_blocks::cpu.itb.walker 0.132110 # Average occupied blocks per requestor 58system.l2c.occ_blocks::cpu.inst 2434.983596 # Average occupied blocks per requestor 59system.l2c.occ_blocks::cpu.data 10405.560614 # Average occupied blocks per requestor 60system.l2c.occ_percent::writebacks 0.793174 # Average percentage of cache occupancy 61system.l2c.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 62system.l2c.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy 63system.l2c.occ_percent::cpu.inst 0.037155 # Average percentage of cache occupancy 64system.l2c.occ_percent::cpu.data 0.158776 # Average percentage of cache occupancy 65system.l2c.occ_percent::total 0.989107 # Average percentage of cache occupancy 66system.l2c.ReadReq_hits::cpu.dtb.walker 6578 # number of ReadReq hits 67system.l2c.ReadReq_hits::cpu.itb.walker 2700 # number of ReadReq hits 68system.l2c.ReadReq_hits::cpu.inst 777957 # number of ReadReq hits 69system.l2c.ReadReq_hits::cpu.data 1275395 # number of ReadReq hits 70system.l2c.ReadReq_hits::total 2062630 # number of ReadReq hits |
| 71system.l2c.Writeback_hits::writebacks 1538939 # number of Writeback hits 72system.l2c.Writeback_hits::total 1538939 # number of Writeback hits | 71system.l2c.Writeback_hits::writebacks 1538130 # number of Writeback hits 72system.l2c.Writeback_hits::total 1538130 # number of Writeback hits |
| 73system.l2c.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits 74system.l2c.UpgradeReq_hits::total 28 # number of UpgradeReq hits 75system.l2c.ReadExReq_hits::cpu.data 179208 # number of ReadExReq hits 76system.l2c.ReadExReq_hits::total 179208 # number of ReadExReq hits 77system.l2c.demand_hits::cpu.dtb.walker 6578 # number of demand (read+write) hits 78system.l2c.demand_hits::cpu.itb.walker 2700 # number of demand (read+write) hits 79system.l2c.demand_hits::cpu.inst 777957 # number of demand (read+write) hits 80system.l2c.demand_hits::cpu.data 1454603 # number of demand (read+write) hits --- 22 unchanged lines hidden (view full) --- 103system.l2c.overall_misses::cpu.inst 13342 # number of overall misses 104system.l2c.overall_misses::cpu.data 166561 # number of overall misses 105system.l2c.overall_misses::total 179910 # number of overall misses 106system.l2c.ReadReq_accesses::cpu.dtb.walker 6580 # number of ReadReq accesses(hits+misses) 107system.l2c.ReadReq_accesses::cpu.itb.walker 2705 # number of ReadReq accesses(hits+misses) 108system.l2c.ReadReq_accesses::cpu.inst 791299 # number of ReadReq accesses(hits+misses) 109system.l2c.ReadReq_accesses::cpu.data 1307579 # number of ReadReq accesses(hits+misses) 110system.l2c.ReadReq_accesses::total 2108163 # number of ReadReq accesses(hits+misses) | 73system.l2c.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits 74system.l2c.UpgradeReq_hits::total 28 # number of UpgradeReq hits 75system.l2c.ReadExReq_hits::cpu.data 179208 # number of ReadExReq hits 76system.l2c.ReadExReq_hits::total 179208 # number of ReadExReq hits 77system.l2c.demand_hits::cpu.dtb.walker 6578 # number of demand (read+write) hits 78system.l2c.demand_hits::cpu.itb.walker 2700 # number of demand (read+write) hits 79system.l2c.demand_hits::cpu.inst 777957 # number of demand (read+write) hits 80system.l2c.demand_hits::cpu.data 1454603 # number of demand (read+write) hits --- 22 unchanged lines hidden (view full) --- 103system.l2c.overall_misses::cpu.inst 13342 # number of overall misses 104system.l2c.overall_misses::cpu.data 166561 # number of overall misses 105system.l2c.overall_misses::total 179910 # number of overall misses 106system.l2c.ReadReq_accesses::cpu.dtb.walker 6580 # number of ReadReq accesses(hits+misses) 107system.l2c.ReadReq_accesses::cpu.itb.walker 2705 # number of ReadReq accesses(hits+misses) 108system.l2c.ReadReq_accesses::cpu.inst 791299 # number of ReadReq accesses(hits+misses) 109system.l2c.ReadReq_accesses::cpu.data 1307579 # number of ReadReq accesses(hits+misses) 110system.l2c.ReadReq_accesses::total 2108163 # number of ReadReq accesses(hits+misses) |
| 111system.l2c.Writeback_accesses::writebacks 1538939 # number of Writeback accesses(hits+misses) 112system.l2c.Writeback_accesses::total 1538939 # number of Writeback accesses(hits+misses) | 111system.l2c.Writeback_accesses::writebacks 1538130 # number of Writeback accesses(hits+misses) 112system.l2c.Writeback_accesses::total 1538130 # number of Writeback accesses(hits+misses) |
| 113system.l2c.UpgradeReq_accesses::cpu.data 1824 # number of UpgradeReq accesses(hits+misses) 114system.l2c.UpgradeReq_accesses::total 1824 # number of UpgradeReq accesses(hits+misses) 115system.l2c.ReadExReq_accesses::cpu.data 313585 # number of ReadExReq accesses(hits+misses) 116system.l2c.ReadExReq_accesses::total 313585 # number of ReadExReq accesses(hits+misses) 117system.l2c.demand_accesses::cpu.dtb.walker 6580 # number of demand (read+write) accesses 118system.l2c.demand_accesses::cpu.itb.walker 2705 # number of demand (read+write) accesses 119system.l2c.demand_accesses::cpu.inst 791299 # number of demand (read+write) accesses 120system.l2c.demand_accesses::cpu.data 1621164 # number of demand (read+write) accesses --- 149 unchanged lines hidden (view full) --- 270system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 271system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 272system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 273system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 274system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 275system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 276system.cpu.icache.fast_writes 0 # number of fast writes performed 277system.cpu.icache.cache_copies 0 # number of cache copies performed | 113system.l2c.UpgradeReq_accesses::cpu.data 1824 # number of UpgradeReq accesses(hits+misses) 114system.l2c.UpgradeReq_accesses::total 1824 # number of UpgradeReq accesses(hits+misses) 115system.l2c.ReadExReq_accesses::cpu.data 313585 # number of ReadExReq accesses(hits+misses) 116system.l2c.ReadExReq_accesses::total 313585 # number of ReadExReq accesses(hits+misses) 117system.l2c.demand_accesses::cpu.dtb.walker 6580 # number of demand (read+write) accesses 118system.l2c.demand_accesses::cpu.itb.walker 2705 # number of demand (read+write) accesses 119system.l2c.demand_accesses::cpu.inst 791299 # number of demand (read+write) accesses 120system.l2c.demand_accesses::cpu.data 1621164 # number of demand (read+write) accesses --- 149 unchanged lines hidden (view full) --- 270system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 271system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 272system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 273system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 274system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 275system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 276system.cpu.icache.fast_writes 0 # number of fast writes performed 277system.cpu.icache.cache_copies 0 # number of cache copies performed |
| 278system.cpu.icache.writebacks::writebacks 809 # number of writebacks 279system.cpu.icache.writebacks::total 809 # number of writebacks | |
| 280system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 281system.cpu.itb_walker_cache.replacements 3335 # number of replacements 282system.cpu.itb_walker_cache.tagsinuse 3.026444 # Cycle average of tags in use 283system.cpu.itb_walker_cache.total_refs 8029 # Total number of references to valid blocks. 284system.cpu.itb_walker_cache.sampled_refs 3346 # Sample count of references to valid blocks. 285system.cpu.itb_walker_cache.avg_refs 2.399582 # Average number of references to valid blocks. 286system.cpu.itb_walker_cache.warmup_cycle 5102048603500 # Cycle when the warmup percentage was hit. 287system.cpu.itb_walker_cache.occ_blocks::cpu.itb.walker 3.026444 # Average occupied blocks per requestor --- 139 unchanged lines hidden --- | 278system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 279system.cpu.itb_walker_cache.replacements 3335 # number of replacements 280system.cpu.itb_walker_cache.tagsinuse 3.026444 # Cycle average of tags in use 281system.cpu.itb_walker_cache.total_refs 8029 # Total number of references to valid blocks. 282system.cpu.itb_walker_cache.sampled_refs 3346 # Sample count of references to valid blocks. 283system.cpu.itb_walker_cache.avg_refs 2.399582 # Average number of references to valid blocks. 284system.cpu.itb_walker_cache.warmup_cycle 5102048603500 # Cycle when the warmup percentage was hit. 285system.cpu.itb_walker_cache.occ_blocks::cpu.itb.walker 3.026444 # Average occupied blocks per requestor --- 139 unchanged lines hidden --- |