| stats.txt (10645:cd95d4d51659) | stats.txt (10827:7f5467f2f8b8) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112152 # Number of seconds simulated 4sim_ticks 5112152301500 # Number of ticks simulated 5final_tick 5112152301500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112152 # Number of seconds simulated 4sim_ticks 5112152301500 # Number of ticks simulated 5final_tick 5112152301500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1049184 # Simulator instruction rate (inst/s) 8host_op_rate 2147909 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 26808985343 # Simulator tick rate (ticks/s) 10host_mem_usage 640900 # Number of bytes of host memory used 11host_seconds 190.69 # Real time elapsed on the host | 7host_inst_rate 1219492 # Simulator instruction rate (inst/s) 8host_op_rate 2496566 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 31160731508 # Simulator tick rate (ticks/s) 10host_mem_usage 598628 # Number of bytes of host memory used 11host_seconds 164.06 # Real time elapsed on the host |
| 12sim_insts 200066731 # Number of instructions simulated 13sim_ops 409580371 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.inst 854656 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10616192 # Number of bytes read from this memory --- 343 unchanged lines hidden (view full) --- 363system.cpu.l2cache.tags.data_accesses 32212786 # Number of data accesses 364system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6656 # number of ReadReq hits 365system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2896 # number of ReadReq hits 366system.cpu.l2cache.ReadReq_hits::cpu.inst 779367 # number of ReadReq hits 367system.cpu.l2cache.ReadReq_hits::cpu.data 1275199 # number of ReadReq hits 368system.cpu.l2cache.ReadReq_hits::total 2064118 # number of ReadReq hits 369system.cpu.l2cache.Writeback_hits::writebacks 1538781 # number of Writeback hits 370system.cpu.l2cache.Writeback_hits::total 1538781 # number of Writeback hits | 12sim_insts 200066731 # Number of instructions simulated 13sim_ops 409580371 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.inst 854656 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10616192 # Number of bytes read from this memory --- 343 unchanged lines hidden (view full) --- 363system.cpu.l2cache.tags.data_accesses 32212786 # Number of data accesses 364system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6656 # number of ReadReq hits 365system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2896 # number of ReadReq hits 366system.cpu.l2cache.ReadReq_hits::cpu.inst 779367 # number of ReadReq hits 367system.cpu.l2cache.ReadReq_hits::cpu.data 1275199 # number of ReadReq hits 368system.cpu.l2cache.ReadReq_hits::total 2064118 # number of ReadReq hits 369system.cpu.l2cache.Writeback_hits::writebacks 1538781 # number of Writeback hits 370system.cpu.l2cache.Writeback_hits::total 1538781 # number of Writeback hits |
| 371system.cpu.l2cache.UpgradeReq_hits::cpu.data 22 # number of UpgradeReq hits 372system.cpu.l2cache.UpgradeReq_hits::total 22 # number of UpgradeReq hits | 371system.cpu.l2cache.UpgradeReq_hits::cpu.data 21 # number of UpgradeReq hits 372system.cpu.l2cache.UpgradeReq_hits::total 21 # number of UpgradeReq hits |
| 373system.cpu.l2cache.ReadExReq_hits::cpu.data 179771 # number of ReadExReq hits 374system.cpu.l2cache.ReadExReq_hits::total 179771 # number of ReadExReq hits 375system.cpu.l2cache.demand_hits::cpu.dtb.walker 6656 # number of demand (read+write) hits 376system.cpu.l2cache.demand_hits::cpu.itb.walker 2896 # number of demand (read+write) hits 377system.cpu.l2cache.demand_hits::cpu.inst 779367 # number of demand (read+write) hits 378system.cpu.l2cache.demand_hits::cpu.data 1454970 # number of demand (read+write) hits 379system.cpu.l2cache.demand_hits::total 2243889 # number of demand (read+write) hits 380system.cpu.l2cache.overall_hits::cpu.dtb.walker 6656 # number of overall hits 381system.cpu.l2cache.overall_hits::cpu.itb.walker 2896 # number of overall hits 382system.cpu.l2cache.overall_hits::cpu.inst 779367 # number of overall hits 383system.cpu.l2cache.overall_hits::cpu.data 1454970 # number of overall hits 384system.cpu.l2cache.overall_hits::total 2243889 # number of overall hits 385system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 1 # number of ReadReq misses 386system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 5 # number of ReadReq misses 387system.cpu.l2cache.ReadReq_misses::cpu.inst 13355 # number of ReadReq misses 388system.cpu.l2cache.ReadReq_misses::cpu.data 32163 # number of ReadReq misses 389system.cpu.l2cache.ReadReq_misses::total 45524 # number of ReadReq misses | 373system.cpu.l2cache.ReadExReq_hits::cpu.data 179771 # number of ReadExReq hits 374system.cpu.l2cache.ReadExReq_hits::total 179771 # number of ReadExReq hits 375system.cpu.l2cache.demand_hits::cpu.dtb.walker 6656 # number of demand (read+write) hits 376system.cpu.l2cache.demand_hits::cpu.itb.walker 2896 # number of demand (read+write) hits 377system.cpu.l2cache.demand_hits::cpu.inst 779367 # number of demand (read+write) hits 378system.cpu.l2cache.demand_hits::cpu.data 1454970 # number of demand (read+write) hits 379system.cpu.l2cache.demand_hits::total 2243889 # number of demand (read+write) hits 380system.cpu.l2cache.overall_hits::cpu.dtb.walker 6656 # number of overall hits 381system.cpu.l2cache.overall_hits::cpu.itb.walker 2896 # number of overall hits 382system.cpu.l2cache.overall_hits::cpu.inst 779367 # number of overall hits 383system.cpu.l2cache.overall_hits::cpu.data 1454970 # number of overall hits 384system.cpu.l2cache.overall_hits::total 2243889 # number of overall hits 385system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 1 # number of ReadReq misses 386system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 5 # number of ReadReq misses 387system.cpu.l2cache.ReadReq_misses::cpu.inst 13355 # number of ReadReq misses 388system.cpu.l2cache.ReadReq_misses::cpu.data 32163 # number of ReadReq misses 389system.cpu.l2cache.ReadReq_misses::total 45524 # number of ReadReq misses |
| 390system.cpu.l2cache.UpgradeReq_misses::cpu.data 1807 # number of UpgradeReq misses 391system.cpu.l2cache.UpgradeReq_misses::total 1807 # number of UpgradeReq misses | 390system.cpu.l2cache.UpgradeReq_misses::cpu.data 1808 # number of UpgradeReq misses 391system.cpu.l2cache.UpgradeReq_misses::total 1808 # number of UpgradeReq misses |
| 392system.cpu.l2cache.ReadExReq_misses::cpu.data 134650 # number of ReadExReq misses 393system.cpu.l2cache.ReadExReq_misses::total 134650 # number of ReadExReq misses 394system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses 395system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses 396system.cpu.l2cache.demand_misses::cpu.inst 13355 # number of demand (read+write) misses 397system.cpu.l2cache.demand_misses::cpu.data 166813 # number of demand (read+write) misses 398system.cpu.l2cache.demand_misses::total 180174 # number of demand (read+write) misses 399system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses --- 22 unchanged lines hidden (view full) --- 422system.cpu.l2cache.overall_accesses::cpu.inst 792722 # number of overall (read+write) accesses 423system.cpu.l2cache.overall_accesses::cpu.data 1621783 # number of overall (read+write) accesses 424system.cpu.l2cache.overall_accesses::total 2424063 # number of overall (read+write) accesses 425system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000150 # miss rate for ReadReq accesses 426system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.001724 # miss rate for ReadReq accesses 427system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.016847 # miss rate for ReadReq accesses 428system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.024601 # miss rate for ReadReq accesses 429system.cpu.l2cache.ReadReq_miss_rate::total 0.021579 # miss rate for ReadReq accesses | 392system.cpu.l2cache.ReadExReq_misses::cpu.data 134650 # number of ReadExReq misses 393system.cpu.l2cache.ReadExReq_misses::total 134650 # number of ReadExReq misses 394system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses 395system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses 396system.cpu.l2cache.demand_misses::cpu.inst 13355 # number of demand (read+write) misses 397system.cpu.l2cache.demand_misses::cpu.data 166813 # number of demand (read+write) misses 398system.cpu.l2cache.demand_misses::total 180174 # number of demand (read+write) misses 399system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses --- 22 unchanged lines hidden (view full) --- 422system.cpu.l2cache.overall_accesses::cpu.inst 792722 # number of overall (read+write) accesses 423system.cpu.l2cache.overall_accesses::cpu.data 1621783 # number of overall (read+write) accesses 424system.cpu.l2cache.overall_accesses::total 2424063 # number of overall (read+write) accesses 425system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000150 # miss rate for ReadReq accesses 426system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.001724 # miss rate for ReadReq accesses 427system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.016847 # miss rate for ReadReq accesses 428system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.024601 # miss rate for ReadReq accesses 429system.cpu.l2cache.ReadReq_miss_rate::total 0.021579 # miss rate for ReadReq accesses |
| 430system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.987972 # miss rate for UpgradeReq accesses 431system.cpu.l2cache.UpgradeReq_miss_rate::total 0.987972 # miss rate for UpgradeReq accesses | 430system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.988518 # miss rate for UpgradeReq accesses 431system.cpu.l2cache.UpgradeReq_miss_rate::total 0.988518 # miss rate for UpgradeReq accesses |
| 432system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428247 # miss rate for ReadExReq accesses 433system.cpu.l2cache.ReadExReq_miss_rate::total 0.428247 # miss rate for ReadExReq accesses 434system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000150 # miss rate for demand accesses 435system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001724 # miss rate for demand accesses 436system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016847 # miss rate for demand accesses 437system.cpu.l2cache.demand_miss_rate::cpu.data 0.102858 # miss rate for demand accesses 438system.cpu.l2cache.demand_miss_rate::total 0.074327 # miss rate for demand accesses 439system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000150 # miss rate for overall accesses --- 26 unchanged lines hidden (view full) --- 466system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 9455 # Packet count per connected master and slave (bytes) 467system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 20367 # Packet count per connected master and slave (bytes) 468system.cpu.toL2Bus.pkt_count::total 34143061 # Packet count per connected master and slave (bytes) 469system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 50735040 # Cumulative packet size per connected master and slave (bytes) 470system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227550521 # Cumulative packet size per connected master and slave (bytes) 471system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 320000 # Cumulative packet size per connected master and slave (bytes) 472system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 730240 # Cumulative packet size per connected master and slave (bytes) 473system.cpu.toL2Bus.pkt_size::total 279335801 # Cumulative packet size per connected master and slave (bytes) | 432system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428247 # miss rate for ReadExReq accesses 433system.cpu.l2cache.ReadExReq_miss_rate::total 0.428247 # miss rate for ReadExReq accesses 434system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000150 # miss rate for demand accesses 435system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001724 # miss rate for demand accesses 436system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016847 # miss rate for demand accesses 437system.cpu.l2cache.demand_miss_rate::cpu.data 0.102858 # miss rate for demand accesses 438system.cpu.l2cache.demand_miss_rate::total 0.074327 # miss rate for demand accesses 439system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000150 # miss rate for overall accesses --- 26 unchanged lines hidden (view full) --- 466system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 9455 # Packet count per connected master and slave (bytes) 467system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 20367 # Packet count per connected master and slave (bytes) 468system.cpu.toL2Bus.pkt_count::total 34143061 # Packet count per connected master and slave (bytes) 469system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 50735040 # Cumulative packet size per connected master and slave (bytes) 470system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227550521 # Cumulative packet size per connected master and slave (bytes) 471system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 320000 # Cumulative packet size per connected master and slave (bytes) 472system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 730240 # Cumulative packet size per connected master and slave (bytes) 473system.cpu.toL2Bus.pkt_size::total 279335801 # Cumulative packet size per connected master and slave (bytes) |
| 474system.cpu.toL2Bus.snoops 48002 # Total snoops (count) 475system.cpu.toL2Bus.snoop_fanout::samples 4017264 # Request fanout histogram 476system.cpu.toL2Bus.snoop_fanout::mean 3.011855 # Request fanout histogram 477system.cpu.toL2Bus.snoop_fanout::stdev 0.108231 # Request fanout histogram | 474system.cpu.toL2Bus.snoops 49698 # Total snoops (count) 475system.cpu.toL2Bus.snoop_fanout::samples 17890240 # Request fanout histogram 476system.cpu.toL2Bus.snoop_fanout::mean 3.002757 # Request fanout histogram 477system.cpu.toL2Bus.snoop_fanout::stdev 0.052432 # Request fanout histogram |
| 478system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 479system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 480system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 481system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram | 478system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 479system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 480system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 481system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram |
| 482system.cpu.toL2Bus.snoop_fanout::3 3969641 98.81% 98.81% # Request fanout histogram 483system.cpu.toL2Bus.snoop_fanout::4 47623 1.19% 100.00% # Request fanout histogram | 482system.cpu.toL2Bus.snoop_fanout::3 17840921 99.72% 99.72% # Request fanout histogram 483system.cpu.toL2Bus.snoop_fanout::4 49319 0.28% 100.00% # Request fanout histogram |
| 484system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 485system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::max_value 4 # Request fanout histogram | 484system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 485system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::max_value 4 # Request fanout histogram |
| 487system.cpu.toL2Bus.snoop_fanout::total 4017264 # Request fanout histogram | 487system.cpu.toL2Bus.snoop_fanout::total 17890240 # Request fanout histogram |
| 488system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution 489system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution 490system.iobus.trans_dist::WriteReq 57724 # Transaction distribution 491system.iobus.trans_dist::WriteResp 11004 # Transaction distribution 492system.iobus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution 493system.iobus.trans_dist::MessageReq 1696 # Transaction distribution 494system.iobus.trans_dist::MessageResp 1696 # Transaction distribution 495system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes) --- 95 unchanged lines hidden (view full) --- 591system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 592system.membus.trans_dist::ReadReq 13903764 # Transaction distribution 593system.membus.trans_dist::ReadResp 13903764 # Transaction distribution 594system.membus.trans_dist::WriteReq 13943 # Transaction distribution 595system.membus.trans_dist::WriteResp 13943 # Transaction distribution 596system.membus.trans_dist::Writeback 144777 # Transaction distribution 597system.membus.trans_dist::WriteInvalidateReq 46720 # Transaction distribution 598system.membus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution | 488system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution 489system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution 490system.iobus.trans_dist::WriteReq 57724 # Transaction distribution 491system.iobus.trans_dist::WriteResp 11004 # Transaction distribution 492system.iobus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution 493system.iobus.trans_dist::MessageReq 1696 # Transaction distribution 494system.iobus.trans_dist::MessageResp 1696 # Transaction distribution 495system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes) --- 95 unchanged lines hidden (view full) --- 591system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 592system.membus.trans_dist::ReadReq 13903764 # Transaction distribution 593system.membus.trans_dist::ReadResp 13903764 # Transaction distribution 594system.membus.trans_dist::WriteReq 13943 # Transaction distribution 595system.membus.trans_dist::WriteResp 13943 # Transaction distribution 596system.membus.trans_dist::Writeback 144777 # Transaction distribution 597system.membus.trans_dist::WriteInvalidateReq 46720 # Transaction distribution 598system.membus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution |
| 599system.membus.trans_dist::UpgradeReq 2545 # Transaction distribution 600system.membus.trans_dist::UpgradeResp 2093 # Transaction distribution | 599system.membus.trans_dist::UpgradeReq 2546 # Transaction distribution 600system.membus.trans_dist::UpgradeResp 2094 # Transaction distribution |
| 601system.membus.trans_dist::ReadExReq 134369 # Transaction distribution 602system.membus.trans_dist::ReadExResp 134364 # Transaction distribution 603system.membus.trans_dist::MessageReq 1696 # Transaction distribution 604system.membus.trans_dist::MessageResp 1696 # Transaction distribution 605system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes) 606system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) 607system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes) 608system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) | 601system.membus.trans_dist::ReadExReq 134369 # Transaction distribution 602system.membus.trans_dist::ReadExResp 134364 # Transaction distribution 603system.membus.trans_dist::MessageReq 1696 # Transaction distribution 604system.membus.trans_dist::MessageResp 1696 # Transaction distribution 605system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes) 606system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) 607system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes) 608system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) |
| 609system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 462529 # Packet count per connected master and slave (bytes) 610system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28205089 # Packet count per connected master and slave (bytes) | 609system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 462531 # Packet count per connected master and slave (bytes) 610system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28205091 # Packet count per connected master and slave (bytes) |
| 611system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 141913 # Packet count per connected master and slave (bytes) 612system.membus.pkt_count_system.iocache.mem_side::total 141913 # Packet count per connected master and slave (bytes) | 611system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 141913 # Packet count per connected master and slave (bytes) 612system.membus.pkt_count_system.iocache.mem_side::total 141913 # Packet count per connected master and slave (bytes) |
| 613system.membus.pkt_count::total 28350394 # Packet count per connected master and slave (bytes) | 613system.membus.pkt_count::total 28350396 # Packet count per connected master and slave (bytes) |
| 614system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) 615system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) 616system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes) 617system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) 618system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17791872 # Cumulative packet size per connected master and slave (bytes) 619system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43216633 # Cumulative packet size per connected master and slave (bytes) 620system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 6034560 # Cumulative packet size per connected master and slave (bytes) 621system.membus.pkt_size_system.iocache.mem_side::total 6034560 # Cumulative packet size per connected master and slave (bytes) 622system.membus.pkt_size::total 49257977 # Cumulative packet size per connected master and slave (bytes) 623system.membus.snoops 0 # Total snoops (count) | 614system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) 615system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) 616system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes) 617system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) 618system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17791872 # Cumulative packet size per connected master and slave (bytes) 619system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43216633 # Cumulative packet size per connected master and slave (bytes) 620system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 6034560 # Cumulative packet size per connected master and slave (bytes) 621system.membus.pkt_size_system.iocache.mem_side::total 6034560 # Cumulative packet size per connected master and slave (bytes) 622system.membus.pkt_size::total 49257977 # Cumulative packet size per connected master and slave (bytes) 623system.membus.snoops 0 # Total snoops (count) |
| 624system.membus.snoop_fanout::samples 374838 # Request fanout histogram 625system.membus.snoop_fanout::mean 1 # Request fanout histogram 626system.membus.snoop_fanout::stdev 0 # Request fanout histogram | 624system.membus.snoop_fanout::samples 14247815 # Request fanout histogram 625system.membus.snoop_fanout::mean 1.000119 # Request fanout histogram 626system.membus.snoop_fanout::stdev 0.010910 # Request fanout histogram |
| 627system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 628system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram | 627system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 628system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram |
| 629system.membus.snoop_fanout::1 374838 100.00% 100.00% # Request fanout histogram 630system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram | 629system.membus.snoop_fanout::1 14246119 99.99% 99.99% # Request fanout histogram 630system.membus.snoop_fanout::2 1696 0.01% 100.00% # Request fanout histogram |
| 631system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 632system.membus.snoop_fanout::min_value 1 # Request fanout histogram | 631system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 632system.membus.snoop_fanout::min_value 1 # Request fanout histogram |
| 633system.membus.snoop_fanout::max_value 1 # Request fanout histogram 634system.membus.snoop_fanout::total 374838 # Request fanout histogram | 633system.membus.snoop_fanout::max_value 2 # Request fanout histogram 634system.membus.snoop_fanout::total 14247815 # Request fanout histogram |
| 635system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 636system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). 637system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). 638system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 639system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 640system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 641system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 642system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 643system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 644system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 645system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 646system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 647 648---------- End Simulation Statistics ---------- | 635system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 636system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). 637system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). 638system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 639system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 640system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 641system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 642system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 643system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 644system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 645system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 646system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 647 648---------- End Simulation Statistics ---------- |