| stats.txt (10585:1c9d5d9417b3) | stats.txt (10639:469cf1ea40f5) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- | 1 2---------- Begin Simulation Statistics ---------- |
| 3sim_seconds 5.112156 # Number of seconds simulated 4sim_ticks 5112155738500 # Number of ticks simulated 5final_tick 5112155738500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) | 3sim_seconds 5.112152 # Number of seconds simulated 4sim_ticks 5112152263500 # Number of ticks simulated 5final_tick 5112152263500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) |
| 6sim_freq 1000000000000 # Frequency of simulated ticks | 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1511003 # Simulator instruction rate (inst/s) 8host_op_rate 3093560 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 38615908446 # Simulator tick rate (ticks/s) 10host_mem_usage 595640 # Number of bytes of host memory used 11host_seconds 132.38 # Real time elapsed on the host 12sim_insts 200033669 # Number of instructions simulated 13sim_ops 409539941 # Number of ops (including micro ops) simulated | 7host_inst_rate 1496341 # Simulator instruction rate (inst/s) 8host_op_rate 3063337 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 38234881791 # Simulator tick rate (ticks/s) 10host_mem_usage 596704 # Number of bytes of host memory used 11host_seconds 133.70 # Real time elapsed on the host 12sim_insts 200066624 # Number of instructions simulated 13sim_ops 409580050 # Number of ops (including micro ops) simulated |
| 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory | 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory |
| 18system.physmem.bytes_read::cpu.inst 852224 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10636736 # Number of bytes read from this memory | 18system.physmem.bytes_read::cpu.inst 854656 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10616192 # Number of bytes read from this memory |
| 20system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory | 20system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory |
| 21system.physmem.bytes_read::total 11517696 # Number of bytes read from this memory 22system.physmem.bytes_inst_read::cpu.inst 852224 # Number of instructions bytes read from this memory 23system.physmem.bytes_inst_read::total 852224 # Number of instructions bytes read from this memory 24system.physmem.bytes_written::writebacks 9281152 # Number of bytes written to this memory 25system.physmem.bytes_written::total 9281152 # Number of bytes written to this memory | 21system.physmem.bytes_read::total 11499584 # Number of bytes read from this memory 22system.physmem.bytes_inst_read::cpu.inst 854656 # Number of instructions bytes read from this memory 23system.physmem.bytes_inst_read::total 854656 # Number of instructions bytes read from this memory 24system.physmem.bytes_written::writebacks 9265728 # Number of bytes written to this memory 25system.physmem.bytes_written::total 9265728 # Number of bytes written to this memory |
| 26system.physmem.num_reads::cpu.dtb.walker 1 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory | 26system.physmem.num_reads::cpu.dtb.walker 1 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory |
| 28system.physmem.num_reads::cpu.inst 13316 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 166199 # Number of read requests responded to by this memory | 28system.physmem.num_reads::cpu.inst 13354 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 165878 # Number of read requests responded to by this memory |
| 30system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory | 30system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory |
| 31system.physmem.num_reads::total 179964 # Number of read requests responded to by this memory 32system.physmem.num_writes::writebacks 145018 # Number of write requests responded to by this memory 33system.physmem.num_writes::total 145018 # Number of write requests responded to by this memory | 31system.physmem.num_reads::total 179681 # Number of read requests responded to by this memory 32system.physmem.num_writes::writebacks 144777 # Number of write requests responded to by this memory 33system.physmem.num_writes::total 144777 # Number of write requests responded to by this memory |
| 34system.physmem.bw_read::cpu.dtb.walker 13 # Total read bandwidth from this memory (bytes/s) 35system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s) | 34system.physmem.bw_read::cpu.dtb.walker 13 # Total read bandwidth from this memory (bytes/s) 35system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s) |
| 36system.physmem.bw_read::cpu.inst 166705 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu.data 2080675 # Total read bandwidth from this memory (bytes/s) | 36system.physmem.bw_read::cpu.inst 167181 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu.data 2076658 # Total read bandwidth from this memory (bytes/s) |
| 38system.physmem.bw_read::pc.south_bridge.ide 5546 # Total read bandwidth from this memory (bytes/s) | 38system.physmem.bw_read::pc.south_bridge.ide 5546 # Total read bandwidth from this memory (bytes/s) |
| 39system.physmem.bw_read::total 2253002 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 166705 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 166705 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1815507 # Write bandwidth from this memory (bytes/s) 43system.physmem.bw_write::total 1815507 # Write bandwidth from this memory (bytes/s) 44system.physmem.bw_total::writebacks 1815507 # Total bandwidth to/from this memory (bytes/s) | 39system.physmem.bw_read::total 2249460 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 167181 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 167181 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1812491 # Write bandwidth from this memory (bytes/s) 43system.physmem.bw_write::total 1812491 # Write bandwidth from this memory (bytes/s) 44system.physmem.bw_total::writebacks 1812491 # Total bandwidth to/from this memory (bytes/s) |
| 45system.physmem.bw_total::cpu.dtb.walker 13 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) | 45system.physmem.bw_total::cpu.dtb.walker 13 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) |
| 47system.physmem.bw_total::cpu.inst 166705 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.data 2080675 # Total bandwidth to/from this memory (bytes/s) | 47system.physmem.bw_total::cpu.inst 167181 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.data 2076658 # Total bandwidth to/from this memory (bytes/s) |
| 49system.physmem.bw_total::pc.south_bridge.ide 5546 # Total bandwidth to/from this memory (bytes/s) | 49system.physmem.bw_total::pc.south_bridge.ide 5546 # Total bandwidth to/from this memory (bytes/s) |
| 50system.physmem.bw_total::total 4068508 # Total bandwidth to/from this memory (bytes/s) | 50system.physmem.bw_total::total 4061951 # Total bandwidth to/from this memory (bytes/s) |
| 51system.cpu_clk_domain.clock 500 # Clock period in ticks 52system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks | 51system.cpu_clk_domain.clock 500 # Clock period in ticks 52system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks |
| 53system.cpu.numCycles 10224315447 # number of cpu cycles simulated | 53system.cpu.numCycles 10224308491 # number of cpu cycles simulated |
| 54system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 55system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed | 54system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 55system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed |
| 56system.cpu.committedInsts 200033669 # Number of instructions committed 57system.cpu.committedOps 409539941 # Number of ops (including micro ops) committed 58system.cpu.num_int_alu_accesses 374549395 # Number of integer alu accesses | 56system.cpu.committedInsts 200066624 # Number of instructions committed 57system.cpu.committedOps 409580050 # Number of ops (including micro ops) committed 58system.cpu.num_int_alu_accesses 374583182 # Number of integer alu accesses |
| 59system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses | 59system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses |
| 60system.cpu.num_func_calls 2308749 # number of times a function call or return occured 61system.cpu.num_conditional_control_insts 39994798 # number of instructions that are conditional controls 62system.cpu.num_int_insts 374549395 # number of integer instructions | 60system.cpu.num_func_calls 2308871 # number of times a function call or return occured 61system.cpu.num_conditional_control_insts 40001057 # number of instructions that are conditional controls 62system.cpu.num_int_insts 374583182 # number of integer instructions |
| 63system.cpu.num_fp_insts 0 # number of float instructions | 63system.cpu.num_fp_insts 0 # number of float instructions |
| 64system.cpu.num_int_register_reads 682628451 # number of times the integer registers were read 65system.cpu.num_int_register_writes 323525110 # number of times the integer registers were written | 64system.cpu.num_int_register_reads 682688853 # number of times the integer registers were read 65system.cpu.num_int_register_writes 323557399 # number of times the integer registers were written |
| 66system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 67system.cpu.num_fp_register_writes 0 # number of times the floating registers were written | 66system.cpu.num_fp_register_reads 0 # number of times the floating registers were read 67system.cpu.num_fp_register_writes 0 # number of times the floating registers were written |
| 68system.cpu.num_cc_register_reads 233820400 # number of times the CC registers were read 69system.cpu.num_cc_register_writes 157313425 # number of times the CC registers were written 70system.cpu.num_mem_refs 35680406 # number of memory refs 71system.cpu.num_load_insts 27249300 # Number of load instructions 72system.cpu.num_store_insts 8431106 # Number of store instructions 73system.cpu.num_idle_cycles 9770368815.449127 # Number of idle cycles 74system.cpu.num_busy_cycles 453946631.550873 # Number of busy cycles 75system.cpu.not_idle_fraction 0.044399 # Percentage of non-idle cycles 76system.cpu.idle_fraction 0.955601 # Percentage of idle cycles 77system.cpu.Branches 43145649 # Number of branches fetched 78system.cpu.op_class::No_OpClass 175370 0.04% 0.04% # Class of executed instruction 79system.cpu.op_class::IntAlu 373417675 91.18% 91.22% # Class of executed instruction 80system.cpu.op_class::IntMult 144551 0.04% 91.26% # Class of executed instruction 81system.cpu.op_class::IntDiv 122974 0.03% 91.29% # Class of executed instruction | 68system.cpu.num_cc_register_reads 233837170 # number of times the CC registers were read 69system.cpu.num_cc_register_writes 157316360 # number of times the CC registers were written 70system.cpu.num_mem_refs 35666925 # number of memory refs 71system.cpu.num_load_insts 27243229 # Number of load instructions 72system.cpu.num_store_insts 8423696 # Number of store instructions 73system.cpu.num_idle_cycles 9770324986.701103 # Number of idle cycles 74system.cpu.num_busy_cycles 453983504.298896 # Number of busy cycles 75system.cpu.not_idle_fraction 0.044402 # Percentage of non-idle cycles 76system.cpu.idle_fraction 0.955598 # Percentage of idle cycles 77system.cpu.Branches 43152131 # Number of branches fetched 78system.cpu.op_class::No_OpClass 172748 0.04% 0.04% # Class of executed instruction 79system.cpu.op_class::IntAlu 373476362 91.18% 91.23% # Class of executed instruction 80system.cpu.op_class::IntMult 144577 0.04% 91.26% # Class of executed instruction 81system.cpu.op_class::IntDiv 123058 0.03% 91.29% # Class of executed instruction |
| 82system.cpu.op_class::FloatAdd 0 0.00% 91.29% # Class of executed instruction 83system.cpu.op_class::FloatCmp 0 0.00% 91.29% # Class of executed instruction 84system.cpu.op_class::FloatCvt 0 0.00% 91.29% # Class of executed instruction 85system.cpu.op_class::FloatMult 0 0.00% 91.29% # Class of executed instruction 86system.cpu.op_class::FloatDiv 0 0.00% 91.29% # Class of executed instruction 87system.cpu.op_class::FloatSqrt 0 0.00% 91.29% # Class of executed instruction 88system.cpu.op_class::SimdAdd 0 0.00% 91.29% # Class of executed instruction 89system.cpu.op_class::SimdAddAcc 0 0.00% 91.29% # Class of executed instruction --- 10 unchanged lines hidden (view full) --- 100system.cpu.op_class::SimdFloatAlu 0 0.00% 91.29% # Class of executed instruction 101system.cpu.op_class::SimdFloatCmp 0 0.00% 91.29% # Class of executed instruction 102system.cpu.op_class::SimdFloatCvt 0 0.00% 91.29% # Class of executed instruction 103system.cpu.op_class::SimdFloatDiv 0 0.00% 91.29% # Class of executed instruction 104system.cpu.op_class::SimdFloatMisc 0 0.00% 91.29% # Class of executed instruction 105system.cpu.op_class::SimdFloatMult 0 0.00% 91.29% # Class of executed instruction 106system.cpu.op_class::SimdFloatMultAcc 0 0.00% 91.29% # Class of executed instruction 107system.cpu.op_class::SimdFloatSqrt 0 0.00% 91.29% # Class of executed instruction | 82system.cpu.op_class::FloatAdd 0 0.00% 91.29% # Class of executed instruction 83system.cpu.op_class::FloatCmp 0 0.00% 91.29% # Class of executed instruction 84system.cpu.op_class::FloatCvt 0 0.00% 91.29% # Class of executed instruction 85system.cpu.op_class::FloatMult 0 0.00% 91.29% # Class of executed instruction 86system.cpu.op_class::FloatDiv 0 0.00% 91.29% # Class of executed instruction 87system.cpu.op_class::FloatSqrt 0 0.00% 91.29% # Class of executed instruction 88system.cpu.op_class::SimdAdd 0 0.00% 91.29% # Class of executed instruction 89system.cpu.op_class::SimdAddAcc 0 0.00% 91.29% # Class of executed instruction --- 10 unchanged lines hidden (view full) --- 100system.cpu.op_class::SimdFloatAlu 0 0.00% 91.29% # Class of executed instruction 101system.cpu.op_class::SimdFloatCmp 0 0.00% 91.29% # Class of executed instruction 102system.cpu.op_class::SimdFloatCvt 0 0.00% 91.29% # Class of executed instruction 103system.cpu.op_class::SimdFloatDiv 0 0.00% 91.29% # Class of executed instruction 104system.cpu.op_class::SimdFloatMisc 0 0.00% 91.29% # Class of executed instruction 105system.cpu.op_class::SimdFloatMult 0 0.00% 91.29% # Class of executed instruction 106system.cpu.op_class::SimdFloatMultAcc 0 0.00% 91.29% # Class of executed instruction 107system.cpu.op_class::SimdFloatSqrt 0 0.00% 91.29% # Class of executed instruction |
| 108system.cpu.op_class::MemRead 27249300 6.65% 97.94% # Class of executed instruction 109system.cpu.op_class::MemWrite 8431106 2.06% 100.00% # Class of executed instruction | 108system.cpu.op_class::MemRead 27240640 6.65% 97.94% # Class of executed instruction 109system.cpu.op_class::MemWrite 8423696 2.06% 100.00% # Class of executed instruction |
| 110system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 111system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction | 110system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 111system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction |
| 112system.cpu.op_class::total 409540976 # Class of executed instruction | 112system.cpu.op_class::total 409581081 # Class of executed instruction |
| 113system.cpu.kern.inst.arm 0 # number of arm instructions executed 114system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed | 113system.cpu.kern.inst.arm 0 # number of arm instructions executed 114system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed |
| 115system.cpu.dcache.tags.replacements 1623460 # number of replacements 116system.cpu.dcache.tags.tagsinuse 511.999462 # Cycle average of tags in use 117system.cpu.dcache.tags.total_refs 20193083 # Total number of references to valid blocks. 118system.cpu.dcache.tags.sampled_refs 1623972 # Sample count of references to valid blocks. 119system.cpu.dcache.tags.avg_refs 12.434379 # Average number of references to valid blocks. | 115system.cpu.dcache.tags.replacements 1621913 # number of replacements 116system.cpu.dcache.tags.tagsinuse 511.999425 # Cycle average of tags in use 117system.cpu.dcache.tags.total_refs 20181070 # Total number of references to valid blocks. 118system.cpu.dcache.tags.sampled_refs 1622425 # Sample count of references to valid blocks. 119system.cpu.dcache.tags.avg_refs 12.438831 # Average number of references to valid blocks. |
| 120system.cpu.dcache.tags.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. | 120system.cpu.dcache.tags.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. |
| 121system.cpu.dcache.tags.occ_blocks::cpu.data 511.999462 # Average occupied blocks per requestor | 121system.cpu.dcache.tags.occ_blocks::cpu.data 511.999425 # Average occupied blocks per requestor |
| 122system.cpu.dcache.tags.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy 123system.cpu.dcache.tags.occ_percent::total 0.999999 # Average percentage of cache occupancy 124system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id | 122system.cpu.dcache.tags.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy 123system.cpu.dcache.tags.occ_percent::total 0.999999 # Average percentage of cache occupancy 124system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id |
| 125system.cpu.dcache.tags.age_task_id_blocks_1024::0 233 # Occupied blocks per task id 126system.cpu.dcache.tags.age_task_id_blocks_1024::1 251 # Occupied blocks per task id | 125system.cpu.dcache.tags.age_task_id_blocks_1024::0 282 # Occupied blocks per task id 126system.cpu.dcache.tags.age_task_id_blocks_1024::1 202 # Occupied blocks per task id |
| 127system.cpu.dcache.tags.age_task_id_blocks_1024::2 28 # Occupied blocks per task id 128system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id | 127system.cpu.dcache.tags.age_task_id_blocks_1024::2 28 # Occupied blocks per task id 128system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id |
| 129system.cpu.dcache.tags.tag_accesses 88892257 # Number of tag accesses 130system.cpu.dcache.tags.data_accesses 88892257 # Number of data accesses 131system.cpu.dcache.ReadReq_hits::cpu.data 12028370 # number of ReadReq hits 132system.cpu.dcache.ReadReq_hits::total 12028370 # number of ReadReq hits 133system.cpu.dcache.WriteReq_hits::cpu.data 8103548 # number of WriteReq hits 134system.cpu.dcache.WriteReq_hits::total 8103548 # number of WriteReq hits 135system.cpu.dcache.SoftPFReq_hits::cpu.data 58901 # number of SoftPFReq hits 136system.cpu.dcache.SoftPFReq_hits::total 58901 # number of SoftPFReq hits 137system.cpu.dcache.demand_hits::cpu.data 20131918 # number of demand (read+write) hits 138system.cpu.dcache.demand_hits::total 20131918 # number of demand (read+write) hits 139system.cpu.dcache.overall_hits::cpu.data 20190819 # number of overall hits 140system.cpu.dcache.overall_hits::total 20190819 # number of overall hits 141system.cpu.dcache.ReadReq_misses::cpu.data 906001 # number of ReadReq misses 142system.cpu.dcache.ReadReq_misses::total 906001 # number of ReadReq misses 143system.cpu.dcache.WriteReq_misses::cpu.data 317188 # number of WriteReq misses 144system.cpu.dcache.WriteReq_misses::total 317188 # number of WriteReq misses 145system.cpu.dcache.SoftPFReq_misses::cpu.data 403060 # number of SoftPFReq misses 146system.cpu.dcache.SoftPFReq_misses::total 403060 # number of SoftPFReq misses 147system.cpu.dcache.demand_misses::cpu.data 1223189 # number of demand (read+write) misses 148system.cpu.dcache.demand_misses::total 1223189 # number of demand (read+write) misses 149system.cpu.dcache.overall_misses::cpu.data 1626249 # number of overall misses 150system.cpu.dcache.overall_misses::total 1626249 # number of overall misses 151system.cpu.dcache.ReadReq_accesses::cpu.data 12934371 # number of ReadReq accesses(hits+misses) 152system.cpu.dcache.ReadReq_accesses::total 12934371 # number of ReadReq accesses(hits+misses) 153system.cpu.dcache.WriteReq_accesses::cpu.data 8420736 # number of WriteReq accesses(hits+misses) 154system.cpu.dcache.WriteReq_accesses::total 8420736 # number of WriteReq accesses(hits+misses) 155system.cpu.dcache.SoftPFReq_accesses::cpu.data 461961 # number of SoftPFReq accesses(hits+misses) 156system.cpu.dcache.SoftPFReq_accesses::total 461961 # number of SoftPFReq accesses(hits+misses) 157system.cpu.dcache.demand_accesses::cpu.data 21355107 # number of demand (read+write) accesses 158system.cpu.dcache.demand_accesses::total 21355107 # number of demand (read+write) accesses 159system.cpu.dcache.overall_accesses::cpu.data 21817068 # number of overall (read+write) accesses 160system.cpu.dcache.overall_accesses::total 21817068 # number of overall (read+write) accesses 161system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070046 # miss rate for ReadReq accesses 162system.cpu.dcache.ReadReq_miss_rate::total 0.070046 # miss rate for ReadReq accesses 163system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037667 # miss rate for WriteReq accesses 164system.cpu.dcache.WriteReq_miss_rate::total 0.037667 # miss rate for WriteReq accesses 165system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872498 # miss rate for SoftPFReq accesses 166system.cpu.dcache.SoftPFReq_miss_rate::total 0.872498 # miss rate for SoftPFReq accesses 167system.cpu.dcache.demand_miss_rate::cpu.data 0.057279 # miss rate for demand accesses 168system.cpu.dcache.demand_miss_rate::total 0.057279 # miss rate for demand accesses 169system.cpu.dcache.overall_miss_rate::cpu.data 0.074540 # miss rate for overall accesses 170system.cpu.dcache.overall_miss_rate::total 0.074540 # miss rate for overall accesses | 129system.cpu.dcache.tags.tag_accesses 88836495 # Number of tag accesses 130system.cpu.dcache.tags.data_accesses 88836495 # Number of data accesses 131system.cpu.dcache.ReadReq_hits::cpu.data 12023306 # number of ReadReq hits 132system.cpu.dcache.ReadReq_hits::total 12023306 # number of ReadReq hits 133system.cpu.dcache.WriteReq_hits::cpu.data 8096585 # number of WriteReq hits 134system.cpu.dcache.WriteReq_hits::total 8096585 # number of WriteReq hits 135system.cpu.dcache.SoftPFReq_hits::cpu.data 58898 # number of SoftPFReq hits 136system.cpu.dcache.SoftPFReq_hits::total 58898 # number of SoftPFReq hits 137system.cpu.dcache.demand_hits::cpu.data 20119891 # number of demand (read+write) hits 138system.cpu.dcache.demand_hits::total 20119891 # number of demand (read+write) hits 139system.cpu.dcache.overall_hits::cpu.data 20178789 # number of overall hits 140system.cpu.dcache.overall_hits::total 20178789 # number of overall hits 141system.cpu.dcache.ReadReq_misses::cpu.data 905254 # number of ReadReq misses 142system.cpu.dcache.ReadReq_misses::total 905254 # number of ReadReq misses 143system.cpu.dcache.WriteReq_misses::cpu.data 316711 # number of WriteReq misses 144system.cpu.dcache.WriteReq_misses::total 316711 # number of WriteReq misses 145system.cpu.dcache.SoftPFReq_misses::cpu.data 402759 # number of SoftPFReq misses 146system.cpu.dcache.SoftPFReq_misses::total 402759 # number of SoftPFReq misses 147system.cpu.dcache.demand_misses::cpu.data 1221965 # number of demand (read+write) misses 148system.cpu.dcache.demand_misses::total 1221965 # number of demand (read+write) misses 149system.cpu.dcache.overall_misses::cpu.data 1624724 # number of overall misses 150system.cpu.dcache.overall_misses::total 1624724 # number of overall misses 151system.cpu.dcache.ReadReq_accesses::cpu.data 12928560 # number of ReadReq accesses(hits+misses) 152system.cpu.dcache.ReadReq_accesses::total 12928560 # number of ReadReq accesses(hits+misses) 153system.cpu.dcache.WriteReq_accesses::cpu.data 8413296 # number of WriteReq accesses(hits+misses) 154system.cpu.dcache.WriteReq_accesses::total 8413296 # number of WriteReq accesses(hits+misses) 155system.cpu.dcache.SoftPFReq_accesses::cpu.data 461657 # number of SoftPFReq accesses(hits+misses) 156system.cpu.dcache.SoftPFReq_accesses::total 461657 # number of SoftPFReq accesses(hits+misses) 157system.cpu.dcache.demand_accesses::cpu.data 21341856 # number of demand (read+write) accesses 158system.cpu.dcache.demand_accesses::total 21341856 # number of demand (read+write) accesses 159system.cpu.dcache.overall_accesses::cpu.data 21803513 # number of overall (read+write) accesses 160system.cpu.dcache.overall_accesses::total 21803513 # number of overall (read+write) accesses 161system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070020 # miss rate for ReadReq accesses 162system.cpu.dcache.ReadReq_miss_rate::total 0.070020 # miss rate for ReadReq accesses 163system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037644 # miss rate for WriteReq accesses 164system.cpu.dcache.WriteReq_miss_rate::total 0.037644 # miss rate for WriteReq accesses 165system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872420 # miss rate for SoftPFReq accesses 166system.cpu.dcache.SoftPFReq_miss_rate::total 0.872420 # miss rate for SoftPFReq accesses 167system.cpu.dcache.demand_miss_rate::cpu.data 0.057257 # miss rate for demand accesses 168system.cpu.dcache.demand_miss_rate::total 0.057257 # miss rate for demand accesses 169system.cpu.dcache.overall_miss_rate::cpu.data 0.074517 # miss rate for overall accesses 170system.cpu.dcache.overall_miss_rate::total 0.074517 # miss rate for overall accesses |
| 171system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 172system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 173system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 174system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 175system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 176system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 177system.cpu.dcache.fast_writes 0 # number of fast writes performed 178system.cpu.dcache.cache_copies 0 # number of cache copies performed | 171system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 172system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 173system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 174system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 175system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 176system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 177system.cpu.dcache.fast_writes 0 # number of fast writes performed 178system.cpu.dcache.cache_copies 0 # number of cache copies performed |
| 179system.cpu.dcache.writebacks::writebacks 1536867 # number of writebacks 180system.cpu.dcache.writebacks::total 1536867 # number of writebacks | 179system.cpu.dcache.writebacks::writebacks 1535795 # number of writebacks 180system.cpu.dcache.writebacks::total 1535795 # number of writebacks |
| 181system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 181system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 182system.cpu.dtb_walker_cache.tags.replacements 8174 # number of replacements 183system.cpu.dtb_walker_cache.tags.tagsinuse 5.013943 # Cycle average of tags in use 184system.cpu.dtb_walker_cache.tags.total_refs 12520 # Total number of references to valid blocks. 185system.cpu.dtb_walker_cache.tags.sampled_refs 8188 # Sample count of references to valid blocks. 186system.cpu.dtb_walker_cache.tags.avg_refs 1.529067 # Average number of references to valid blocks. 187system.cpu.dtb_walker_cache.tags.warmup_cycle 5101318572500 # Cycle when the warmup percentage was hit. 188system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.013943 # Average occupied blocks per requestor 189system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker 0.313371 # Average percentage of cache occupancy 190system.cpu.dtb_walker_cache.tags.occ_percent::total 0.313371 # Average percentage of cache occupancy | 182system.cpu.dtb_walker_cache.tags.replacements 7755 # number of replacements 183system.cpu.dtb_walker_cache.tags.tagsinuse 5.014024 # Cycle average of tags in use 184system.cpu.dtb_walker_cache.tags.total_refs 12942 # Total number of references to valid blocks. 185system.cpu.dtb_walker_cache.tags.sampled_refs 7769 # Sample count of references to valid blocks. 186system.cpu.dtb_walker_cache.tags.avg_refs 1.665851 # Average number of references to valid blocks. 187system.cpu.dtb_walker_cache.tags.warmup_cycle 5100454103000 # Cycle when the warmup percentage was hit. 188system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.014024 # Average occupied blocks per requestor 189system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker 0.313376 # Average percentage of cache occupancy 190system.cpu.dtb_walker_cache.tags.occ_percent::total 0.313376 # Average percentage of cache occupancy |
| 191system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024 14 # Occupied blocks per task id | 191system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024 14 # Occupied blocks per task id |
| 192system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0 6 # Occupied blocks per task id | 192system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0 5 # Occupied blocks per task id |
| 193system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1 5 # Occupied blocks per task id | 193system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1 5 # Occupied blocks per task id |
| 194system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2 3 # Occupied blocks per task id | 194system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id |
| 195system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024 0.875000 # Percentage of cache occupancy per task id | 195system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024 0.875000 # Percentage of cache occupancy per task id |
| 196system.cpu.dtb_walker_cache.tags.tag_accesses 53161 # Number of tag accesses 197system.cpu.dtb_walker_cache.tags.data_accesses 53161 # Number of data accesses 198system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12521 # number of ReadReq hits 199system.cpu.dtb_walker_cache.ReadReq_hits::total 12521 # number of ReadReq hits 200system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12521 # number of demand (read+write) hits 201system.cpu.dtb_walker_cache.demand_hits::total 12521 # number of demand (read+write) hits 202system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12521 # number of overall hits 203system.cpu.dtb_walker_cache.overall_hits::total 12521 # number of overall hits 204system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 9373 # number of ReadReq misses 205system.cpu.dtb_walker_cache.ReadReq_misses::total 9373 # number of ReadReq misses 206system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 9373 # number of demand (read+write) misses 207system.cpu.dtb_walker_cache.demand_misses::total 9373 # number of demand (read+write) misses 208system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 9373 # number of overall misses 209system.cpu.dtb_walker_cache.overall_misses::total 9373 # number of overall misses 210system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21894 # number of ReadReq accesses(hits+misses) 211system.cpu.dtb_walker_cache.ReadReq_accesses::total 21894 # number of ReadReq accesses(hits+misses) 212system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21894 # number of demand (read+write) accesses 213system.cpu.dtb_walker_cache.demand_accesses::total 21894 # number of demand (read+write) accesses 214system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21894 # number of overall (read+write) accesses 215system.cpu.dtb_walker_cache.overall_accesses::total 21894 # number of overall (read+write) accesses 216system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.428108 # miss rate for ReadReq accesses 217system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.428108 # miss rate for ReadReq accesses 218system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.428108 # miss rate for demand accesses 219system.cpu.dtb_walker_cache.demand_miss_rate::total 0.428108 # miss rate for demand accesses 220system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.428108 # miss rate for overall accesses 221system.cpu.dtb_walker_cache.overall_miss_rate::total 0.428108 # miss rate for overall accesses | 196system.cpu.dtb_walker_cache.tags.tag_accesses 52772 # Number of tag accesses 197system.cpu.dtb_walker_cache.tags.data_accesses 52772 # Number of data accesses 198system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12943 # number of ReadReq hits 199system.cpu.dtb_walker_cache.ReadReq_hits::total 12943 # number of ReadReq hits 200system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12943 # number of demand (read+write) hits 201system.cpu.dtb_walker_cache.demand_hits::total 12943 # number of demand (read+write) hits 202system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12943 # number of overall hits 203system.cpu.dtb_walker_cache.overall_hits::total 12943 # number of overall hits 204system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8962 # number of ReadReq misses 205system.cpu.dtb_walker_cache.ReadReq_misses::total 8962 # number of ReadReq misses 206system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8962 # number of demand (read+write) misses 207system.cpu.dtb_walker_cache.demand_misses::total 8962 # number of demand (read+write) misses 208system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8962 # number of overall misses 209system.cpu.dtb_walker_cache.overall_misses::total 8962 # number of overall misses 210system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21905 # number of ReadReq accesses(hits+misses) 211system.cpu.dtb_walker_cache.ReadReq_accesses::total 21905 # number of ReadReq accesses(hits+misses) 212system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21905 # number of demand (read+write) accesses 213system.cpu.dtb_walker_cache.demand_accesses::total 21905 # number of demand (read+write) accesses 214system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21905 # number of overall (read+write) accesses 215system.cpu.dtb_walker_cache.overall_accesses::total 21905 # number of overall (read+write) accesses 216system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.409130 # miss rate for ReadReq accesses 217system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.409130 # miss rate for ReadReq accesses 218system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.409130 # miss rate for demand accesses 219system.cpu.dtb_walker_cache.demand_miss_rate::total 0.409130 # miss rate for demand accesses 220system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.409130 # miss rate for overall accesses 221system.cpu.dtb_walker_cache.overall_miss_rate::total 0.409130 # miss rate for overall accesses |
| 222system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 223system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 224system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 225system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 226system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 227system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 228system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed 229system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed | 222system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 223system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 224system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 225system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 226system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 227system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 228system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed 229system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed |
| 230system.cpu.dtb_walker_cache.writebacks::writebacks 2794 # number of writebacks 231system.cpu.dtb_walker_cache.writebacks::total 2794 # number of writebacks | 230system.cpu.dtb_walker_cache.writebacks::writebacks 2457 # number of writebacks 231system.cpu.dtb_walker_cache.writebacks::total 2457 # number of writebacks |
| 232system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate | 232system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 233system.cpu.icache.tags.replacements 791846 # number of replacements 234system.cpu.icache.tags.tagsinuse 510.663108 # Cycle average of tags in use 235system.cpu.icache.tags.total_refs 243645674 # Total number of references to valid blocks. 236system.cpu.icache.tags.sampled_refs 792358 # Sample count of references to valid blocks. 237system.cpu.icache.tags.avg_refs 307.494433 # Average number of references to valid blocks. 238system.cpu.icache.tags.warmup_cycle 148876575500 # Cycle when the warmup percentage was hit. 239system.cpu.icache.tags.occ_blocks::cpu.inst 510.663108 # Average occupied blocks per requestor | 233system.cpu.icache.tags.replacements 792213 # number of replacements 234system.cpu.icache.tags.tagsinuse 510.662957 # Cycle average of tags in use 235system.cpu.icache.tags.total_refs 243675024 # Total number of references to valid blocks. 236system.cpu.icache.tags.sampled_refs 792725 # Sample count of references to valid blocks. 237system.cpu.icache.tags.avg_refs 307.389100 # Average number of references to valid blocks. 238system.cpu.icache.tags.warmup_cycle 148913080500 # Cycle when the warmup percentage was hit. 239system.cpu.icache.tags.occ_blocks::cpu.inst 510.662957 # Average occupied blocks per requestor |
| 240system.cpu.icache.tags.occ_percent::cpu.inst 0.997389 # Average percentage of cache occupancy 241system.cpu.icache.tags.occ_percent::total 0.997389 # Average percentage of cache occupancy 242system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id | 240system.cpu.icache.tags.occ_percent::cpu.inst 0.997389 # Average percentage of cache occupancy 241system.cpu.icache.tags.occ_percent::total 0.997389 # Average percentage of cache occupancy 242system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id |
| 243system.cpu.icache.tags.age_task_id_blocks_1024::0 87 # Occupied blocks per task id 244system.cpu.icache.tags.age_task_id_blocks_1024::1 134 # Occupied blocks per task id 245system.cpu.icache.tags.age_task_id_blocks_1024::2 289 # Occupied blocks per task id 246system.cpu.icache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id | 243system.cpu.icache.tags.age_task_id_blocks_1024::0 90 # Occupied blocks per task id 244system.cpu.icache.tags.age_task_id_blocks_1024::1 130 # Occupied blocks per task id 245system.cpu.icache.tags.age_task_id_blocks_1024::2 291 # Occupied blocks per task id 246system.cpu.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id |
| 247system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id | 247system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id |
| 248system.cpu.icache.tags.tag_accesses 245230404 # Number of tag accesses 249system.cpu.icache.tags.data_accesses 245230404 # Number of data accesses 250system.cpu.icache.ReadReq_hits::cpu.inst 243645674 # number of ReadReq hits 251system.cpu.icache.ReadReq_hits::total 243645674 # number of ReadReq hits 252system.cpu.icache.demand_hits::cpu.inst 243645674 # number of demand (read+write) hits 253system.cpu.icache.demand_hits::total 243645674 # number of demand (read+write) hits 254system.cpu.icache.overall_hits::cpu.inst 243645674 # number of overall hits 255system.cpu.icache.overall_hits::total 243645674 # number of overall hits 256system.cpu.icache.ReadReq_misses::cpu.inst 792365 # number of ReadReq misses 257system.cpu.icache.ReadReq_misses::total 792365 # number of ReadReq misses 258system.cpu.icache.demand_misses::cpu.inst 792365 # number of demand (read+write) misses 259system.cpu.icache.demand_misses::total 792365 # number of demand (read+write) misses 260system.cpu.icache.overall_misses::cpu.inst 792365 # number of overall misses 261system.cpu.icache.overall_misses::total 792365 # number of overall misses 262system.cpu.icache.ReadReq_accesses::cpu.inst 244438039 # number of ReadReq accesses(hits+misses) 263system.cpu.icache.ReadReq_accesses::total 244438039 # number of ReadReq accesses(hits+misses) 264system.cpu.icache.demand_accesses::cpu.inst 244438039 # number of demand (read+write) accesses 265system.cpu.icache.demand_accesses::total 244438039 # number of demand (read+write) accesses 266system.cpu.icache.overall_accesses::cpu.inst 244438039 # number of overall (read+write) accesses 267system.cpu.icache.overall_accesses::total 244438039 # number of overall (read+write) accesses 268system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003242 # miss rate for ReadReq accesses 269system.cpu.icache.ReadReq_miss_rate::total 0.003242 # miss rate for ReadReq accesses 270system.cpu.icache.demand_miss_rate::cpu.inst 0.003242 # miss rate for demand accesses 271system.cpu.icache.demand_miss_rate::total 0.003242 # miss rate for demand accesses 272system.cpu.icache.overall_miss_rate::cpu.inst 0.003242 # miss rate for overall accesses 273system.cpu.icache.overall_miss_rate::total 0.003242 # miss rate for overall accesses | 248system.cpu.icache.tags.tag_accesses 245260488 # Number of tag accesses 249system.cpu.icache.tags.data_accesses 245260488 # Number of data accesses 250system.cpu.icache.ReadReq_hits::cpu.inst 243675024 # number of ReadReq hits 251system.cpu.icache.ReadReq_hits::total 243675024 # number of ReadReq hits 252system.cpu.icache.demand_hits::cpu.inst 243675024 # number of demand (read+write) hits 253system.cpu.icache.demand_hits::total 243675024 # number of demand (read+write) hits 254system.cpu.icache.overall_hits::cpu.inst 243675024 # number of overall hits 255system.cpu.icache.overall_hits::total 243675024 # number of overall hits 256system.cpu.icache.ReadReq_misses::cpu.inst 792732 # number of ReadReq misses 257system.cpu.icache.ReadReq_misses::total 792732 # number of ReadReq misses 258system.cpu.icache.demand_misses::cpu.inst 792732 # number of demand (read+write) misses 259system.cpu.icache.demand_misses::total 792732 # number of demand (read+write) misses 260system.cpu.icache.overall_misses::cpu.inst 792732 # number of overall misses 261system.cpu.icache.overall_misses::total 792732 # number of overall misses 262system.cpu.icache.ReadReq_accesses::cpu.inst 244467756 # number of ReadReq accesses(hits+misses) 263system.cpu.icache.ReadReq_accesses::total 244467756 # number of ReadReq accesses(hits+misses) 264system.cpu.icache.demand_accesses::cpu.inst 244467756 # number of demand (read+write) accesses 265system.cpu.icache.demand_accesses::total 244467756 # number of demand (read+write) accesses 266system.cpu.icache.overall_accesses::cpu.inst 244467756 # number of overall (read+write) accesses 267system.cpu.icache.overall_accesses::total 244467756 # number of overall (read+write) accesses 268system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003243 # miss rate for ReadReq accesses 269system.cpu.icache.ReadReq_miss_rate::total 0.003243 # miss rate for ReadReq accesses 270system.cpu.icache.demand_miss_rate::cpu.inst 0.003243 # miss rate for demand accesses 271system.cpu.icache.demand_miss_rate::total 0.003243 # miss rate for demand accesses 272system.cpu.icache.overall_miss_rate::cpu.inst 0.003243 # miss rate for overall accesses 273system.cpu.icache.overall_miss_rate::total 0.003243 # miss rate for overall accesses |
| 274system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 275system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 276system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 277system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 278system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 279system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 280system.cpu.icache.fast_writes 0 # number of fast writes performed 281system.cpu.icache.cache_copies 0 # number of cache copies performed 282system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 274system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 275system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 276system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 277system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 278system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 279system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 280system.cpu.icache.fast_writes 0 # number of fast writes performed 281system.cpu.icache.cache_copies 0 # number of cache copies performed 282system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 283system.cpu.itb_walker_cache.tags.replacements 3702 # number of replacements 284system.cpu.itb_walker_cache.tags.tagsinuse 3.026443 # Cycle average of tags in use 285system.cpu.itb_walker_cache.tags.total_refs 7640 # Total number of references to valid blocks. 286system.cpu.itb_walker_cache.tags.sampled_refs 3715 # Sample count of references to valid blocks. 287system.cpu.itb_walker_cache.tags.avg_refs 2.056528 # Average number of references to valid blocks. 288system.cpu.itb_walker_cache.tags.warmup_cycle 5102148365500 # Cycle when the warmup percentage was hit. 289system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026443 # Average occupied blocks per requestor 290system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189153 # Average percentage of cache occupancy 291system.cpu.itb_walker_cache.tags.occ_percent::total 0.189153 # Average percentage of cache occupancy 292system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024 13 # Occupied blocks per task id 293system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0 5 # Occupied blocks per task id 294system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::1 1 # Occupied blocks per task id 295system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2 6 # Occupied blocks per task id | 283system.cpu.itb_walker_cache.tags.replacements 3586 # number of replacements 284system.cpu.itb_walker_cache.tags.tagsinuse 3.026546 # Cycle average of tags in use 285system.cpu.itb_walker_cache.tags.total_refs 7763 # Total number of references to valid blocks. 286system.cpu.itb_walker_cache.tags.sampled_refs 3597 # Sample count of references to valid blocks. 287system.cpu.itb_walker_cache.tags.avg_refs 2.158187 # Average number of references to valid blocks. 288system.cpu.itb_walker_cache.tags.warmup_cycle 5102144858000 # Cycle when the warmup percentage was hit. 289system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026546 # Average occupied blocks per requestor 290system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189159 # Average percentage of cache occupancy 291system.cpu.itb_walker_cache.tags.occ_percent::total 0.189159 # Average percentage of cache occupancy 292system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024 11 # Occupied blocks per task id 293system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0 6 # Occupied blocks per task id 294system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id |
| 296system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id | 295system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id |
| 297system.cpu.itb_walker_cache.tags.occ_task_id_percent::1024 0.812500 # Percentage of cache occupancy per task id 298system.cpu.itb_walker_cache.tags.tag_accesses 29024 # Number of tag accesses 299system.cpu.itb_walker_cache.tags.data_accesses 29024 # Number of data accesses 300system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 7640 # number of ReadReq hits 301system.cpu.itb_walker_cache.ReadReq_hits::total 7640 # number of ReadReq hits | 296system.cpu.itb_walker_cache.tags.occ_task_id_percent::1024 0.687500 # Percentage of cache occupancy per task id 297system.cpu.itb_walker_cache.tags.tag_accesses 28899 # Number of tag accesses 298system.cpu.itb_walker_cache.tags.data_accesses 28899 # Number of data accesses 299system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 7765 # number of ReadReq hits 300system.cpu.itb_walker_cache.ReadReq_hits::total 7765 # number of ReadReq hits |
| 302system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits 303system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits | 301system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits 302system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits |
| 304system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 7642 # number of demand (read+write) hits 305system.cpu.itb_walker_cache.demand_hits::total 7642 # number of demand (read+write) hits 306system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 7642 # number of overall hits 307system.cpu.itb_walker_cache.overall_hits::total 7642 # number of overall hits 308system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4580 # number of ReadReq misses 309system.cpu.itb_walker_cache.ReadReq_misses::total 4580 # number of ReadReq misses 310system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4580 # number of demand (read+write) misses 311system.cpu.itb_walker_cache.demand_misses::total 4580 # number of demand (read+write) misses 312system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4580 # number of overall misses 313system.cpu.itb_walker_cache.overall_misses::total 4580 # number of overall misses | 303system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 7767 # number of demand (read+write) hits 304system.cpu.itb_walker_cache.demand_hits::total 7767 # number of demand (read+write) hits 305system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 7767 # number of overall hits 306system.cpu.itb_walker_cache.overall_hits::total 7767 # number of overall hits 307system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4455 # number of ReadReq misses 308system.cpu.itb_walker_cache.ReadReq_misses::total 4455 # number of ReadReq misses 309system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4455 # number of demand (read+write) misses 310system.cpu.itb_walker_cache.demand_misses::total 4455 # number of demand (read+write) misses 311system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4455 # number of overall misses 312system.cpu.itb_walker_cache.overall_misses::total 4455 # number of overall misses |
| 314system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12220 # number of ReadReq accesses(hits+misses) 315system.cpu.itb_walker_cache.ReadReq_accesses::total 12220 # number of ReadReq accesses(hits+misses) 316system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses) 317system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses) 318system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12222 # number of demand (read+write) accesses 319system.cpu.itb_walker_cache.demand_accesses::total 12222 # number of demand (read+write) accesses 320system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12222 # number of overall (read+write) accesses 321system.cpu.itb_walker_cache.overall_accesses::total 12222 # number of overall (read+write) accesses | 313system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12220 # number of ReadReq accesses(hits+misses) 314system.cpu.itb_walker_cache.ReadReq_accesses::total 12220 # number of ReadReq accesses(hits+misses) 315system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses) 316system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses) 317system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12222 # number of demand (read+write) accesses 318system.cpu.itb_walker_cache.demand_accesses::total 12222 # number of demand (read+write) accesses 319system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12222 # number of overall (read+write) accesses 320system.cpu.itb_walker_cache.overall_accesses::total 12222 # number of overall (read+write) accesses |
| 322system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.374795 # miss rate for ReadReq accesses 323system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.374795 # miss rate for ReadReq accesses 324system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.374734 # miss rate for demand accesses 325system.cpu.itb_walker_cache.demand_miss_rate::total 0.374734 # miss rate for demand accesses 326system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.374734 # miss rate for overall accesses 327system.cpu.itb_walker_cache.overall_miss_rate::total 0.374734 # miss rate for overall accesses | 321system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.364566 # miss rate for ReadReq accesses 322system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.364566 # miss rate for ReadReq accesses 323system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.364507 # miss rate for demand accesses 324system.cpu.itb_walker_cache.demand_miss_rate::total 0.364507 # miss rate for demand accesses 325system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.364507 # miss rate for overall accesses 326system.cpu.itb_walker_cache.overall_miss_rate::total 0.364507 # miss rate for overall accesses |
| 328system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 329system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 330system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 331system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 332system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 333system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 334system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed 335system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed | 327system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 328system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 329system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 330system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 331system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 332system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 333system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed 334system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed |
| 336system.cpu.itb_walker_cache.writebacks::writebacks 802 # number of writebacks 337system.cpu.itb_walker_cache.writebacks::total 802 # number of writebacks | 335system.cpu.itb_walker_cache.writebacks::writebacks 545 # number of writebacks 336system.cpu.itb_walker_cache.writebacks::total 545 # number of writebacks |
| 338system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate | 337system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 339system.cpu.l2cache.tags.replacements 106199 # number of replacements 340system.cpu.l2cache.tags.tagsinuse 64825.456332 # Cycle average of tags in use 341system.cpu.l2cache.tags.total_refs 3461789 # Total number of references to valid blocks. 342system.cpu.l2cache.tags.sampled_refs 170310 # Sample count of references to valid blocks. 343system.cpu.l2cache.tags.avg_refs 20.326399 # Average number of references to valid blocks. | 338system.cpu.l2cache.tags.replacements 106219 # number of replacements 339system.cpu.l2cache.tags.tagsinuse 64823.931621 # Cycle average of tags in use 340system.cpu.l2cache.tags.total_refs 3459892 # Total number of references to valid blocks. 341system.cpu.l2cache.tags.sampled_refs 170177 # Sample count of references to valid blocks. 342system.cpu.l2cache.tags.avg_refs 20.331138 # Average number of references to valid blocks. |
| 344system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. | 343system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. |
| 345system.cpu.l2cache.tags.occ_blocks::writebacks 51911.006068 # Average occupied blocks per requestor 346system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 0.002479 # Average occupied blocks per requestor 347system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.132276 # Average occupied blocks per requestor 348system.cpu.l2cache.tags.occ_blocks::cpu.inst 2490.288805 # Average occupied blocks per requestor 349system.cpu.l2cache.tags.occ_blocks::cpu.data 10424.026704 # Average occupied blocks per requestor 350system.cpu.l2cache.tags.occ_percent::writebacks 0.792099 # Average percentage of cache occupancy | 344system.cpu.l2cache.tags.occ_blocks::writebacks 51929.109660 # Average occupied blocks per requestor 345system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 0.002478 # Average occupied blocks per requestor 346system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.132289 # Average occupied blocks per requestor 347system.cpu.l2cache.tags.occ_blocks::cpu.inst 2455.813692 # Average occupied blocks per requestor 348system.cpu.l2cache.tags.occ_blocks::cpu.data 10438.873502 # Average occupied blocks per requestor 349system.cpu.l2cache.tags.occ_percent::writebacks 0.792375 # Average percentage of cache occupancy |
| 351system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 352system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy | 350system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 351system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy |
| 353system.cpu.l2cache.tags.occ_percent::cpu.inst 0.037999 # Average percentage of cache occupancy 354system.cpu.l2cache.tags.occ_percent::cpu.data 0.159058 # Average percentage of cache occupancy 355system.cpu.l2cache.tags.occ_percent::total 0.989158 # Average percentage of cache occupancy 356system.cpu.l2cache.tags.occ_task_id_blocks::1024 64111 # Occupied blocks per task id 357system.cpu.l2cache.tags.age_task_id_blocks_1024::0 54 # Occupied blocks per task id 358system.cpu.l2cache.tags.age_task_id_blocks_1024::1 261 # Occupied blocks per task id 359system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3498 # Occupied blocks per task id 360system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20721 # Occupied blocks per task id 361system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39577 # Occupied blocks per task id 362system.cpu.l2cache.tags.occ_task_id_percent::1024 0.978256 # Percentage of cache occupancy per task id 363system.cpu.l2cache.tags.tag_accesses 32245523 # Number of tag accesses 364system.cpu.l2cache.tags.data_accesses 32245523 # Number of data accesses 365system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 7331 # number of ReadReq hits 366system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3337 # number of ReadReq hits 367system.cpu.l2cache.ReadReq_hits::cpu.inst 779035 # number of ReadReq hits 368system.cpu.l2cache.ReadReq_hits::cpu.data 1276188 # number of ReadReq hits 369system.cpu.l2cache.ReadReq_hits::total 2065891 # number of ReadReq hits 370system.cpu.l2cache.Writeback_hits::writebacks 1540463 # number of Writeback hits 371system.cpu.l2cache.Writeback_hits::total 1540463 # number of Writeback hits | 352system.cpu.l2cache.tags.occ_percent::cpu.inst 0.037473 # Average percentage of cache occupancy 353system.cpu.l2cache.tags.occ_percent::cpu.data 0.159285 # Average percentage of cache occupancy 354system.cpu.l2cache.tags.occ_percent::total 0.989135 # Average percentage of cache occupancy 355system.cpu.l2cache.tags.occ_task_id_blocks::1024 63958 # Occupied blocks per task id 356system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id 357system.cpu.l2cache.tags.age_task_id_blocks_1024::1 233 # Occupied blocks per task id 358system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3349 # Occupied blocks per task id 359system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20908 # Occupied blocks per task id 360system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39411 # Occupied blocks per task id 361system.cpu.l2cache.tags.occ_task_id_percent::1024 0.975922 # Percentage of cache occupancy per task id 362system.cpu.l2cache.tags.tag_accesses 32213022 # Number of tag accesses 363system.cpu.l2cache.tags.data_accesses 32213022 # Number of data accesses 364system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6661 # number of ReadReq hits 365system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2896 # number of ReadReq hits 366system.cpu.l2cache.ReadReq_hits::cpu.inst 779364 # number of ReadReq hits 367system.cpu.l2cache.ReadReq_hits::cpu.data 1275206 # number of ReadReq hits 368system.cpu.l2cache.ReadReq_hits::total 2064127 # number of ReadReq hits 369system.cpu.l2cache.Writeback_hits::writebacks 1538797 # number of Writeback hits 370system.cpu.l2cache.Writeback_hits::total 1538797 # number of Writeback hits |
| 372system.cpu.l2cache.UpgradeReq_hits::cpu.data 22 # number of UpgradeReq hits 373system.cpu.l2cache.UpgradeReq_hits::total 22 # number of UpgradeReq hits | 371system.cpu.l2cache.UpgradeReq_hits::cpu.data 22 # number of UpgradeReq hits 372system.cpu.l2cache.UpgradeReq_hits::total 22 # number of UpgradeReq hits |
| 374system.cpu.l2cache.ReadExReq_hits::cpu.data 180020 # number of ReadExReq hits 375system.cpu.l2cache.ReadExReq_hits::total 180020 # number of ReadExReq hits 376system.cpu.l2cache.demand_hits::cpu.dtb.walker 7331 # number of demand (read+write) hits 377system.cpu.l2cache.demand_hits::cpu.itb.walker 3337 # number of demand (read+write) hits 378system.cpu.l2cache.demand_hits::cpu.inst 779035 # number of demand (read+write) hits 379system.cpu.l2cache.demand_hits::cpu.data 1456208 # number of demand (read+write) hits 380system.cpu.l2cache.demand_hits::total 2245911 # number of demand (read+write) hits 381system.cpu.l2cache.overall_hits::cpu.dtb.walker 7331 # number of overall hits 382system.cpu.l2cache.overall_hits::cpu.itb.walker 3337 # number of overall hits 383system.cpu.l2cache.overall_hits::cpu.inst 779035 # number of overall hits 384system.cpu.l2cache.overall_hits::cpu.data 1456208 # number of overall hits 385system.cpu.l2cache.overall_hits::total 2245911 # number of overall hits | 373system.cpu.l2cache.ReadExReq_hits::cpu.data 179775 # number of ReadExReq hits 374system.cpu.l2cache.ReadExReq_hits::total 179775 # number of ReadExReq hits 375system.cpu.l2cache.demand_hits::cpu.dtb.walker 6661 # number of demand (read+write) hits 376system.cpu.l2cache.demand_hits::cpu.itb.walker 2896 # number of demand (read+write) hits 377system.cpu.l2cache.demand_hits::cpu.inst 779364 # number of demand (read+write) hits 378system.cpu.l2cache.demand_hits::cpu.data 1454981 # number of demand (read+write) hits 379system.cpu.l2cache.demand_hits::total 2243902 # number of demand (read+write) hits 380system.cpu.l2cache.overall_hits::cpu.dtb.walker 6661 # number of overall hits 381system.cpu.l2cache.overall_hits::cpu.itb.walker 2896 # number of overall hits 382system.cpu.l2cache.overall_hits::cpu.inst 779364 # number of overall hits 383system.cpu.l2cache.overall_hits::cpu.data 1454981 # number of overall hits 384system.cpu.l2cache.overall_hits::total 2243902 # number of overall hits |
| 386system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 1 # number of ReadReq misses 387system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 5 # number of ReadReq misses | 385system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 1 # number of ReadReq misses 386system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 5 # number of ReadReq misses |
| 388system.cpu.l2cache.ReadReq_misses::cpu.inst 13317 # number of ReadReq misses 389system.cpu.l2cache.ReadReq_misses::cpu.data 32232 # number of ReadReq misses 390system.cpu.l2cache.ReadReq_misses::total 45555 # number of ReadReq misses 391system.cpu.l2cache.UpgradeReq_misses::cpu.data 1813 # number of UpgradeReq misses 392system.cpu.l2cache.UpgradeReq_misses::total 1813 # number of UpgradeReq misses 393system.cpu.l2cache.ReadExReq_misses::cpu.data 134899 # number of ReadExReq misses 394system.cpu.l2cache.ReadExReq_misses::total 134899 # number of ReadExReq misses | 387system.cpu.l2cache.ReadReq_misses::cpu.inst 13355 # number of ReadReq misses 388system.cpu.l2cache.ReadReq_misses::cpu.data 32163 # number of ReadReq misses 389system.cpu.l2cache.ReadReq_misses::total 45524 # number of ReadReq misses 390system.cpu.l2cache.UpgradeReq_misses::cpu.data 1807 # number of UpgradeReq misses 391system.cpu.l2cache.UpgradeReq_misses::total 1807 # number of UpgradeReq misses 392system.cpu.l2cache.ReadExReq_misses::cpu.data 134650 # number of ReadExReq misses 393system.cpu.l2cache.ReadExReq_misses::total 134650 # number of ReadExReq misses |
| 395system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses 396system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses | 394system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses 395system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses |
| 397system.cpu.l2cache.demand_misses::cpu.inst 13317 # number of demand (read+write) misses 398system.cpu.l2cache.demand_misses::cpu.data 167131 # number of demand (read+write) misses 399system.cpu.l2cache.demand_misses::total 180454 # number of demand (read+write) misses | 396system.cpu.l2cache.demand_misses::cpu.inst 13355 # number of demand (read+write) misses 397system.cpu.l2cache.demand_misses::cpu.data 166813 # number of demand (read+write) misses 398system.cpu.l2cache.demand_misses::total 180174 # number of demand (read+write) misses |
| 400system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses 401system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses | 399system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses 400system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses |
| 402system.cpu.l2cache.overall_misses::cpu.inst 13317 # number of overall misses 403system.cpu.l2cache.overall_misses::cpu.data 167131 # number of overall misses 404system.cpu.l2cache.overall_misses::total 180454 # number of overall misses 405system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 7332 # number of ReadReq accesses(hits+misses) 406system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 3342 # number of ReadReq accesses(hits+misses) 407system.cpu.l2cache.ReadReq_accesses::cpu.inst 792352 # number of ReadReq accesses(hits+misses) 408system.cpu.l2cache.ReadReq_accesses::cpu.data 1308420 # number of ReadReq accesses(hits+misses) 409system.cpu.l2cache.ReadReq_accesses::total 2111446 # number of ReadReq accesses(hits+misses) 410system.cpu.l2cache.Writeback_accesses::writebacks 1540463 # number of Writeback accesses(hits+misses) 411system.cpu.l2cache.Writeback_accesses::total 1540463 # number of Writeback accesses(hits+misses) 412system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1835 # number of UpgradeReq accesses(hits+misses) 413system.cpu.l2cache.UpgradeReq_accesses::total 1835 # number of UpgradeReq accesses(hits+misses) 414system.cpu.l2cache.ReadExReq_accesses::cpu.data 314919 # number of ReadExReq accesses(hits+misses) 415system.cpu.l2cache.ReadExReq_accesses::total 314919 # number of ReadExReq accesses(hits+misses) 416system.cpu.l2cache.demand_accesses::cpu.dtb.walker 7332 # number of demand (read+write) accesses 417system.cpu.l2cache.demand_accesses::cpu.itb.walker 3342 # number of demand (read+write) accesses 418system.cpu.l2cache.demand_accesses::cpu.inst 792352 # number of demand (read+write) accesses 419system.cpu.l2cache.demand_accesses::cpu.data 1623339 # number of demand (read+write) accesses 420system.cpu.l2cache.demand_accesses::total 2426365 # number of demand (read+write) accesses 421system.cpu.l2cache.overall_accesses::cpu.dtb.walker 7332 # number of overall (read+write) accesses 422system.cpu.l2cache.overall_accesses::cpu.itb.walker 3342 # number of overall (read+write) accesses 423system.cpu.l2cache.overall_accesses::cpu.inst 792352 # number of overall (read+write) accesses 424system.cpu.l2cache.overall_accesses::cpu.data 1623339 # number of overall (read+write) accesses 425system.cpu.l2cache.overall_accesses::total 2426365 # number of overall (read+write) accesses 426system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000136 # miss rate for ReadReq accesses 427system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.001496 # miss rate for ReadReq accesses 428system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.016807 # miss rate for ReadReq accesses 429system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.024634 # miss rate for ReadReq accesses 430system.cpu.l2cache.ReadReq_miss_rate::total 0.021575 # miss rate for ReadReq accesses 431system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.988011 # miss rate for UpgradeReq accesses 432system.cpu.l2cache.UpgradeReq_miss_rate::total 0.988011 # miss rate for UpgradeReq accesses 433system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428361 # miss rate for ReadExReq accesses 434system.cpu.l2cache.ReadExReq_miss_rate::total 0.428361 # miss rate for ReadExReq accesses 435system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000136 # miss rate for demand accesses 436system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001496 # miss rate for demand accesses 437system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016807 # miss rate for demand accesses 438system.cpu.l2cache.demand_miss_rate::cpu.data 0.102955 # miss rate for demand accesses 439system.cpu.l2cache.demand_miss_rate::total 0.074372 # miss rate for demand accesses 440system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000136 # miss rate for overall accesses 441system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001496 # miss rate for overall accesses 442system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016807 # miss rate for overall accesses 443system.cpu.l2cache.overall_miss_rate::cpu.data 0.102955 # miss rate for overall accesses 444system.cpu.l2cache.overall_miss_rate::total 0.074372 # miss rate for overall accesses | 401system.cpu.l2cache.overall_misses::cpu.inst 13355 # number of overall misses 402system.cpu.l2cache.overall_misses::cpu.data 166813 # number of overall misses 403system.cpu.l2cache.overall_misses::total 180174 # number of overall misses 404system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 6662 # number of ReadReq accesses(hits+misses) 405system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 2901 # number of ReadReq accesses(hits+misses) 406system.cpu.l2cache.ReadReq_accesses::cpu.inst 792719 # number of ReadReq accesses(hits+misses) 407system.cpu.l2cache.ReadReq_accesses::cpu.data 1307369 # number of ReadReq accesses(hits+misses) 408system.cpu.l2cache.ReadReq_accesses::total 2109651 # number of ReadReq accesses(hits+misses) 409system.cpu.l2cache.Writeback_accesses::writebacks 1538797 # number of Writeback accesses(hits+misses) 410system.cpu.l2cache.Writeback_accesses::total 1538797 # number of Writeback accesses(hits+misses) 411system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1829 # number of UpgradeReq accesses(hits+misses) 412system.cpu.l2cache.UpgradeReq_accesses::total 1829 # number of UpgradeReq accesses(hits+misses) 413system.cpu.l2cache.ReadExReq_accesses::cpu.data 314425 # number of ReadExReq accesses(hits+misses) 414system.cpu.l2cache.ReadExReq_accesses::total 314425 # number of ReadExReq accesses(hits+misses) 415system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6662 # number of demand (read+write) accesses 416system.cpu.l2cache.demand_accesses::cpu.itb.walker 2901 # number of demand (read+write) accesses 417system.cpu.l2cache.demand_accesses::cpu.inst 792719 # number of demand (read+write) accesses 418system.cpu.l2cache.demand_accesses::cpu.data 1621794 # number of demand (read+write) accesses 419system.cpu.l2cache.demand_accesses::total 2424076 # number of demand (read+write) accesses 420system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6662 # number of overall (read+write) accesses 421system.cpu.l2cache.overall_accesses::cpu.itb.walker 2901 # number of overall (read+write) accesses 422system.cpu.l2cache.overall_accesses::cpu.inst 792719 # number of overall (read+write) accesses 423system.cpu.l2cache.overall_accesses::cpu.data 1621794 # number of overall (read+write) accesses 424system.cpu.l2cache.overall_accesses::total 2424076 # number of overall (read+write) accesses 425system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000150 # miss rate for ReadReq accesses 426system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.001724 # miss rate for ReadReq accesses 427system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.016847 # miss rate for ReadReq accesses 428system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.024601 # miss rate for ReadReq accesses 429system.cpu.l2cache.ReadReq_miss_rate::total 0.021579 # miss rate for ReadReq accesses 430system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.987972 # miss rate for UpgradeReq accesses 431system.cpu.l2cache.UpgradeReq_miss_rate::total 0.987972 # miss rate for UpgradeReq accesses 432system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428242 # miss rate for ReadExReq accesses 433system.cpu.l2cache.ReadExReq_miss_rate::total 0.428242 # miss rate for ReadExReq accesses 434system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000150 # miss rate for demand accesses 435system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001724 # miss rate for demand accesses 436system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016847 # miss rate for demand accesses 437system.cpu.l2cache.demand_miss_rate::cpu.data 0.102857 # miss rate for demand accesses 438system.cpu.l2cache.demand_miss_rate::total 0.074327 # miss rate for demand accesses 439system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000150 # miss rate for overall accesses 440system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001724 # miss rate for overall accesses 441system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016847 # miss rate for overall accesses 442system.cpu.l2cache.overall_miss_rate::cpu.data 0.102857 # miss rate for overall accesses 443system.cpu.l2cache.overall_miss_rate::total 0.074327 # miss rate for overall accesses |
| 445system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 446system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 447system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 448system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 449system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 450system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 451system.cpu.l2cache.fast_writes 0 # number of fast writes performed 452system.cpu.l2cache.cache_copies 0 # number of cache copies performed | 444system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 445system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 446system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 447system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 448system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 449system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 450system.cpu.l2cache.fast_writes 0 # number of fast writes performed 451system.cpu.l2cache.cache_copies 0 # number of cache copies performed |
| 453system.cpu.l2cache.writebacks::writebacks 98351 # number of writebacks 454system.cpu.l2cache.writebacks::total 98351 # number of writebacks | 452system.cpu.l2cache.writebacks::writebacks 98110 # number of writebacks 453system.cpu.l2cache.writebacks::total 98110 # number of writebacks |
| 455system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 454system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 456system.cpu.toL2Bus.trans_dist::ReadReq 15972684 # Transaction distribution 457system.cpu.toL2Bus.trans_dist::ReadResp 15972684 # Transaction distribution 458system.cpu.toL2Bus.trans_dist::WriteReq 13911 # Transaction distribution 459system.cpu.toL2Bus.trans_dist::WriteResp 13911 # Transaction distribution 460system.cpu.toL2Bus.trans_dist::Writeback 1540463 # Transaction distribution 461system.cpu.toL2Bus.trans_dist::UpgradeReq 2264 # Transaction distribution 462system.cpu.toL2Bus.trans_dist::UpgradeResp 2264 # Transaction distribution 463system.cpu.toL2Bus.trans_dist::ReadExReq 314924 # Transaction distribution 464system.cpu.toL2Bus.trans_dist::ReadExResp 314924 # Transaction distribution 465system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1584730 # Packet count per connected master and slave (bytes) 466system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32531797 # Packet count per connected master and slave (bytes) 467system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 9962 # Packet count per connected master and slave (bytes) 468system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 21540 # Packet count per connected master and slave (bytes) 469system.cpu.toL2Bus.pkt_count::total 34148029 # Packet count per connected master and slave (bytes) 470system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 50711360 # Cumulative packet size per connected master and slave (bytes) 471system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227719225 # Cumulative packet size per connected master and slave (bytes) 472system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 344448 # Cumulative packet size per connected master and slave (bytes) 473system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 778688 # Cumulative packet size per connected master and slave (bytes) 474system.cpu.toL2Bus.pkt_size::total 279553721 # Cumulative packet size per connected master and slave (bytes) 475system.cpu.toL2Bus.snoops 48008 # Total snoops (count) 476system.cpu.toL2Bus.snoop_fanout::samples 4020658 # Request fanout histogram 477system.cpu.toL2Bus.snoop_fanout::mean 3.011846 # Request fanout histogram 478system.cpu.toL2Bus.snoop_fanout::stdev 0.108192 # Request fanout histogram | 455system.cpu.toL2Bus.trans_dist::ReadReq 15971499 # Transaction distribution 456system.cpu.toL2Bus.trans_dist::ReadResp 15971499 # Transaction distribution 457system.cpu.toL2Bus.trans_dist::WriteReq 13943 # Transaction distribution 458system.cpu.toL2Bus.trans_dist::WriteResp 13943 # Transaction distribution 459system.cpu.toL2Bus.trans_dist::Writeback 1538797 # Transaction distribution 460system.cpu.toL2Bus.trans_dist::UpgradeReq 2281 # Transaction distribution 461system.cpu.toL2Bus.trans_dist::UpgradeResp 2281 # Transaction distribution 462system.cpu.toL2Bus.trans_dist::ReadExReq 314430 # Transaction distribution 463system.cpu.toL2Bus.trans_dist::ReadExResp 314430 # Transaction distribution 464system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1585464 # Packet count per connected master and slave (bytes) 465system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32527803 # Packet count per connected master and slave (bytes) 466system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 9455 # Packet count per connected master and slave (bytes) 467system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 20381 # Packet count per connected master and slave (bytes) 468system.cpu.toL2Bus.pkt_count::total 34143103 # Packet count per connected master and slave (bytes) 469system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 50734848 # Cumulative packet size per connected master and slave (bytes) 470system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227551993 # Cumulative packet size per connected master and slave (bytes) 471system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 320000 # Cumulative packet size per connected master and slave (bytes) 472system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 730816 # Cumulative packet size per connected master and slave (bytes) 473system.cpu.toL2Bus.pkt_size::total 279337657 # Cumulative packet size per connected master and slave (bytes) 474system.cpu.toL2Bus.snoops 48002 # Total snoops (count) 475system.cpu.toL2Bus.snoop_fanout::samples 4017293 # Request fanout histogram 476system.cpu.toL2Bus.snoop_fanout::mean 3.011855 # Request fanout histogram 477system.cpu.toL2Bus.snoop_fanout::stdev 0.108231 # Request fanout histogram |
| 479system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 480system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 481system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 482system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram | 478system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 479system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 480system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram 481system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram |
| 483system.cpu.toL2Bus.snoop_fanout::3 3973030 98.82% 98.82% # Request fanout histogram 484system.cpu.toL2Bus.snoop_fanout::4 47628 1.18% 100.00% # Request fanout histogram | 482system.cpu.toL2Bus.snoop_fanout::3 3969670 98.81% 98.81% # Request fanout histogram 483system.cpu.toL2Bus.snoop_fanout::4 47623 1.19% 100.00% # Request fanout histogram |
| 485system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram 487system.cpu.toL2Bus.snoop_fanout::max_value 4 # Request fanout histogram | 484system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 485system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::max_value 4 # Request fanout histogram |
| 488system.cpu.toL2Bus.snoop_fanout::total 4020658 # Request fanout histogram 489system.iobus.trans_dist::ReadReq 10012030 # Transaction distribution 490system.iobus.trans_dist::ReadResp 10012030 # Transaction distribution 491system.iobus.trans_dist::WriteReq 57692 # Transaction distribution 492system.iobus.trans_dist::WriteResp 10972 # Transaction distribution | 487system.cpu.toL2Bus.snoop_fanout::total 4017293 # Request fanout histogram 488system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution 489system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution 490system.iobus.trans_dist::WriteReq 57724 # Transaction distribution 491system.iobus.trans_dist::WriteResp 11004 # Transaction distribution |
| 493system.iobus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution 494system.iobus.trans_dist::MessageReq 1696 # Transaction distribution 495system.iobus.trans_dist::MessageResp 1696 # Transaction distribution 496system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes) 497system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) 498system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide.pio 11180 # Packet count per connected master and slave (bytes) 499system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide-pciconf 180 # Packet count per connected master and slave (bytes) 500system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.keyboard.pio 1364 # Packet count per connected master and slave (bytes) 501system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic1.pio 86 # Packet count per connected master and slave (bytes) 502system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic2.pio 54 # Packet count per connected master and slave (bytes) 503system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes) 504system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.speaker.pio 19999988 # Packet count per connected master and slave (bytes) 505system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.io_apic.pio 1098 # Packet count per connected master and slave (bytes) 506system.iobus.pkt_count_system.bridge.master::system.pc.i_dont_exist1.pio 170 # Packet count per connected master and slave (bytes) 507system.iobus.pkt_count_system.bridge.master::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) | 492system.iobus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution 493system.iobus.trans_dist::MessageReq 1696 # Transaction distribution 494system.iobus.trans_dist::MessageResp 1696 # Transaction distribution 495system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes) 496system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) 497system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide.pio 11180 # Packet count per connected master and slave (bytes) 498system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide-pciconf 180 # Packet count per connected master and slave (bytes) 499system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.keyboard.pio 1364 # Packet count per connected master and slave (bytes) 500system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic1.pio 86 # Packet count per connected master and slave (bytes) 501system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic2.pio 54 # Packet count per connected master and slave (bytes) 502system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes) 503system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.speaker.pio 19999988 # Packet count per connected master and slave (bytes) 504system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.io_apic.pio 1098 # Packet count per connected master and slave (bytes) 505system.iobus.pkt_count_system.bridge.master::system.pc.i_dont_exist1.pio 170 # Packet count per connected master and slave (bytes) 506system.iobus.pkt_count_system.bridge.master::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) |
| 508system.iobus.pkt_count_system.bridge.master::system.pc.com_1.pio 27812 # Packet count per connected master and slave (bytes) | 507system.iobus.pkt_count_system.bridge.master::system.pc.com_1.pio 27940 # Packet count per connected master and slave (bytes) |
| 509system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes) 510system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) 511system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) 512system.iobus.pkt_count_system.bridge.master::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) 513system.iobus.pkt_count_system.bridge.master::system.pc.pciconfig.pio 2128 # Packet count per connected master and slave (bytes) | 508system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes) 509system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) 510system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) 511system.iobus.pkt_count_system.bridge.master::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) 512system.iobus.pkt_count_system.bridge.master::system.pc.pciconfig.pio 2128 # Packet count per connected master and slave (bytes) |
| 514system.iobus.pkt_count_system.bridge.master::total 20044188 # Packet count per connected master and slave (bytes) 515system.iobus.pkt_count_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 95256 # Packet count per connected master and slave (bytes) 516system.iobus.pkt_count_system.pc.south_bridge.ide.dma::total 95256 # Packet count per connected master and slave (bytes) | 513system.iobus.pkt_count_system.bridge.master::total 20044316 # Packet count per connected master and slave (bytes) 514system.iobus.pkt_count_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 95246 # Packet count per connected master and slave (bytes) 515system.iobus.pkt_count_system.pc.south_bridge.ide.dma::total 95246 # Packet count per connected master and slave (bytes) |
| 517system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 3392 # Packet count per connected master and slave (bytes) 518system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3392 # Packet count per connected master and slave (bytes) | 516system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 3392 # Packet count per connected master and slave (bytes) 517system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3392 # Packet count per connected master and slave (bytes) |
| 519system.iobus.pkt_count::total 20142836 # Packet count per connected master and slave (bytes) | 518system.iobus.pkt_count::total 20142954 # Packet count per connected master and slave (bytes) |
| 520system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.cmos.pio 22 # Cumulative packet size per connected master and slave (bytes) 521system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) 522system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide.pio 6738 # Cumulative packet size per connected master and slave (bytes) 523system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide-pciconf 221 # Cumulative packet size per connected master and slave (bytes) 524system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.keyboard.pio 682 # Cumulative packet size per connected master and slave (bytes) 525system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic1.pio 43 # Cumulative packet size per connected master and slave (bytes) 526system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic2.pio 27 # Cumulative packet size per connected master and slave (bytes) 527system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes) 528system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.speaker.pio 9999994 # Cumulative packet size per connected master and slave (bytes) 529system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.io_apic.pio 2196 # Cumulative packet size per connected master and slave (bytes) 530system.iobus.pkt_size_system.bridge.master::system.pc.i_dont_exist1.pio 85 # Cumulative packet size per connected master and slave (bytes) 531system.iobus.pkt_size_system.bridge.master::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) | 519system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.cmos.pio 22 # Cumulative packet size per connected master and slave (bytes) 520system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) 521system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide.pio 6738 # Cumulative packet size per connected master and slave (bytes) 522system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide-pciconf 221 # Cumulative packet size per connected master and slave (bytes) 523system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.keyboard.pio 682 # Cumulative packet size per connected master and slave (bytes) 524system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic1.pio 43 # Cumulative packet size per connected master and slave (bytes) 525system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic2.pio 27 # Cumulative packet size per connected master and slave (bytes) 526system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes) 527system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.speaker.pio 9999994 # Cumulative packet size per connected master and slave (bytes) 528system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.io_apic.pio 2196 # Cumulative packet size per connected master and slave (bytes) 529system.iobus.pkt_size_system.bridge.master::system.pc.i_dont_exist1.pio 85 # Cumulative packet size per connected master and slave (bytes) 530system.iobus.pkt_size_system.bridge.master::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) |
| 532system.iobus.pkt_size_system.bridge.master::system.pc.com_1.pio 13906 # Cumulative packet size per connected master and slave (bytes) | 531system.iobus.pkt_size_system.bridge.master::system.pc.com_1.pio 13970 # Cumulative packet size per connected master and slave (bytes) |
| 533system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes) 534system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) 535system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) 536system.iobus.pkt_size_system.bridge.master::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) 537system.iobus.pkt_size_system.bridge.master::system.pc.pciconfig.pio 4256 # Cumulative packet size per connected master and slave (bytes) | 532system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes) 533system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) 534system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) 535system.iobus.pkt_size_system.bridge.master::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) 536system.iobus.pkt_size_system.bridge.master::system.pc.pciconfig.pio 4256 # Cumulative packet size per connected master and slave (bytes) |
| 538system.iobus.pkt_size_system.bridge.master::total 10028212 # Cumulative packet size per connected master and slave (bytes) 539system.iobus.pkt_size_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 3027808 # Cumulative packet size per connected master and slave (bytes) 540system.iobus.pkt_size_system.pc.south_bridge.ide.dma::total 3027808 # Cumulative packet size per connected master and slave (bytes) | 537system.iobus.pkt_size_system.bridge.master::total 10028276 # Cumulative packet size per connected master and slave (bytes) 538system.iobus.pkt_size_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 3027768 # Cumulative packet size per connected master and slave (bytes) 539system.iobus.pkt_size_system.pc.south_bridge.ide.dma::total 3027768 # Cumulative packet size per connected master and slave (bytes) |
| 541system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6784 # Cumulative packet size per connected master and slave (bytes) 542system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6784 # Cumulative packet size per connected master and slave (bytes) | 540system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6784 # Cumulative packet size per connected master and slave (bytes) 541system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6784 # Cumulative packet size per connected master and slave (bytes) |
| 543system.iobus.pkt_size::total 13062804 # Cumulative packet size per connected master and slave (bytes) 544system.iocache.tags.replacements 47573 # number of replacements 545system.iocache.tags.tagsinuse 0.042450 # Cycle average of tags in use | 542system.iobus.pkt_size::total 13062828 # Cumulative packet size per connected master and slave (bytes) 543system.iocache.tags.replacements 47568 # number of replacements 544system.iocache.tags.tagsinuse 0.042441 # Cycle average of tags in use |
| 546system.iocache.tags.total_refs 0 # Total number of references to valid blocks. | 545system.iocache.tags.total_refs 0 # Total number of references to valid blocks. |
| 547system.iocache.tags.sampled_refs 47589 # Sample count of references to valid blocks. | 546system.iocache.tags.sampled_refs 47584 # Sample count of references to valid blocks. |
| 548system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. | 547system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. |
| 549system.iocache.tags.warmup_cycle 4994875221009 # Cycle when the warmup percentage was hit. 550system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042450 # Average occupied blocks per requestor | 548system.iocache.tags.warmup_cycle 4994875215009 # Cycle when the warmup percentage was hit. 549system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042441 # Average occupied blocks per requestor |
| 551system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002653 # Average percentage of cache occupancy 552system.iocache.tags.occ_percent::total 0.002653 # Average percentage of cache occupancy 553system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 554system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 555system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id | 550system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002653 # Average percentage of cache occupancy 551system.iocache.tags.occ_percent::total 0.002653 # Average percentage of cache occupancy 552system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 553system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 554system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id |
| 556system.iocache.tags.tag_accesses 428652 # Number of tag accesses 557system.iocache.tags.data_accesses 428652 # Number of data accesses 558system.iocache.ReadReq_misses::pc.south_bridge.ide 908 # number of ReadReq misses 559system.iocache.ReadReq_misses::total 908 # number of ReadReq misses | 555system.iocache.tags.tag_accesses 428607 # Number of tag accesses 556system.iocache.tags.data_accesses 428607 # Number of data accesses 557system.iocache.ReadReq_misses::pc.south_bridge.ide 903 # number of ReadReq misses 558system.iocache.ReadReq_misses::total 903 # number of ReadReq misses |
| 560system.iocache.WriteInvalidateReq_misses::pc.south_bridge.ide 46720 # number of WriteInvalidateReq misses 561system.iocache.WriteInvalidateReq_misses::total 46720 # number of WriteInvalidateReq misses | 559system.iocache.WriteInvalidateReq_misses::pc.south_bridge.ide 46720 # number of WriteInvalidateReq misses 560system.iocache.WriteInvalidateReq_misses::total 46720 # number of WriteInvalidateReq misses |
| 562system.iocache.demand_misses::pc.south_bridge.ide 908 # number of demand (read+write) misses 563system.iocache.demand_misses::total 908 # number of demand (read+write) misses 564system.iocache.overall_misses::pc.south_bridge.ide 908 # number of overall misses 565system.iocache.overall_misses::total 908 # number of overall misses 566system.iocache.ReadReq_accesses::pc.south_bridge.ide 908 # number of ReadReq accesses(hits+misses) 567system.iocache.ReadReq_accesses::total 908 # number of ReadReq accesses(hits+misses) | 561system.iocache.demand_misses::pc.south_bridge.ide 903 # number of demand (read+write) misses 562system.iocache.demand_misses::total 903 # number of demand (read+write) misses 563system.iocache.overall_misses::pc.south_bridge.ide 903 # number of overall misses 564system.iocache.overall_misses::total 903 # number of overall misses 565system.iocache.ReadReq_accesses::pc.south_bridge.ide 903 # number of ReadReq accesses(hits+misses) 566system.iocache.ReadReq_accesses::total 903 # number of ReadReq accesses(hits+misses) |
| 568system.iocache.WriteInvalidateReq_accesses::pc.south_bridge.ide 46720 # number of WriteInvalidateReq accesses(hits+misses) 569system.iocache.WriteInvalidateReq_accesses::total 46720 # number of WriteInvalidateReq accesses(hits+misses) | 567system.iocache.WriteInvalidateReq_accesses::pc.south_bridge.ide 46720 # number of WriteInvalidateReq accesses(hits+misses) 568system.iocache.WriteInvalidateReq_accesses::total 46720 # number of WriteInvalidateReq accesses(hits+misses) |
| 570system.iocache.demand_accesses::pc.south_bridge.ide 908 # number of demand (read+write) accesses 571system.iocache.demand_accesses::total 908 # number of demand (read+write) accesses 572system.iocache.overall_accesses::pc.south_bridge.ide 908 # number of overall (read+write) accesses 573system.iocache.overall_accesses::total 908 # number of overall (read+write) accesses | 569system.iocache.demand_accesses::pc.south_bridge.ide 903 # number of demand (read+write) accesses 570system.iocache.demand_accesses::total 903 # number of demand (read+write) accesses 571system.iocache.overall_accesses::pc.south_bridge.ide 903 # number of overall (read+write) accesses 572system.iocache.overall_accesses::total 903 # number of overall (read+write) accesses |
| 574system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses 575system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 576system.iocache.WriteInvalidateReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteInvalidateReq accesses 577system.iocache.WriteInvalidateReq_miss_rate::total 1 # miss rate for WriteInvalidateReq accesses 578system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses 579system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 580system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses 581system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 582system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 583system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 584system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 585system.iocache.blocked::no_targets 0 # number of cycles access was blocked 586system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 587system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 588system.iocache.fast_writes 0 # number of fast writes performed 589system.iocache.cache_copies 0 # number of cache copies performed 590system.iocache.writebacks::writebacks 46667 # number of writebacks 591system.iocache.writebacks::total 46667 # number of writebacks 592system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate | 573system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses 574system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 575system.iocache.WriteInvalidateReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteInvalidateReq accesses 576system.iocache.WriteInvalidateReq_miss_rate::total 1 # miss rate for WriteInvalidateReq accesses 577system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses 578system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 579system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses 580system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 581system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 582system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 583system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 584system.iocache.blocked::no_targets 0 # number of cycles access was blocked 585system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 586system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 587system.iocache.fast_writes 0 # number of fast writes performed 588system.iocache.cache_copies 0 # number of cache copies performed 589system.iocache.writebacks::writebacks 46667 # number of writebacks 590system.iocache.writebacks::total 46667 # number of writebacks 591system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 593system.membus.trans_dist::ReadReq 13903768 # Transaction distribution 594system.membus.trans_dist::ReadResp 13903768 # Transaction distribution 595system.membus.trans_dist::WriteReq 13911 # Transaction distribution 596system.membus.trans_dist::WriteResp 13911 # Transaction distribution 597system.membus.trans_dist::Writeback 145018 # Transaction distribution | 592system.membus.trans_dist::ReadReq 13903764 # Transaction distribution 593system.membus.trans_dist::ReadResp 13903764 # Transaction distribution 594system.membus.trans_dist::WriteReq 13943 # Transaction distribution 595system.membus.trans_dist::WriteResp 13943 # Transaction distribution 596system.membus.trans_dist::Writeback 144777 # Transaction distribution |
| 598system.membus.trans_dist::WriteInvalidateReq 46720 # Transaction distribution 599system.membus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution | 597system.membus.trans_dist::WriteInvalidateReq 46720 # Transaction distribution 598system.membus.trans_dist::WriteInvalidateResp 46720 # Transaction distribution |
| 600system.membus.trans_dist::UpgradeReq 2525 # Transaction distribution 601system.membus.trans_dist::UpgradeResp 2096 # Transaction distribution 602system.membus.trans_dist::ReadExReq 134621 # Transaction distribution 603system.membus.trans_dist::ReadExResp 134616 # Transaction distribution | 599system.membus.trans_dist::UpgradeReq 2545 # Transaction distribution 600system.membus.trans_dist::UpgradeResp 2093 # Transaction distribution 601system.membus.trans_dist::ReadExReq 134369 # Transaction distribution 602system.membus.trans_dist::ReadExResp 134364 # Transaction distribution |
| 604system.membus.trans_dist::MessageReq 1696 # Transaction distribution 605system.membus.trans_dist::MessageResp 1696 # Transaction distribution 606system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes) 607system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) | 603system.membus.trans_dist::MessageReq 1696 # Transaction distribution 604system.membus.trans_dist::MessageResp 1696 # Transaction distribution 605system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes) 606system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) |
| 608system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044188 # Packet count per connected master and slave (bytes) | 607system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes) |
| 609system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) | 608system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) |
| 610system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 463319 # Packet count per connected master and slave (bytes) 611system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28205751 # Packet count per connected master and slave (bytes) 612system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 141923 # Packet count per connected master and slave (bytes) 613system.membus.pkt_count_system.iocache.mem_side::total 141923 # Packet count per connected master and slave (bytes) 614system.membus.pkt_count::total 28351066 # Packet count per connected master and slave (bytes) | 609system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 462529 # Packet count per connected master and slave (bytes) 610system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28205089 # Packet count per connected master and slave (bytes) 611system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 141913 # Packet count per connected master and slave (bytes) 612system.membus.pkt_count_system.iocache.mem_side::total 141913 # Packet count per connected master and slave (bytes) 613system.membus.pkt_count::total 28350394 # Packet count per connected master and slave (bytes) |
| 615system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) 616system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) | 614system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) 615system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) |
| 617system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028212 # Cumulative packet size per connected master and slave (bytes) | 616system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes) |
| 618system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) | 617system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) |
| 619system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17825408 # Cumulative packet size per connected master and slave (bytes) 620system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43250105 # Cumulative packet size per connected master and slave (bytes) 621system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 6034880 # Cumulative packet size per connected master and slave (bytes) 622system.membus.pkt_size_system.iocache.mem_side::total 6034880 # Cumulative packet size per connected master and slave (bytes) 623system.membus.pkt_size::total 49291769 # Cumulative packet size per connected master and slave (bytes) | 618system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17791872 # Cumulative packet size per connected master and slave (bytes) 619system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43216633 # Cumulative packet size per connected master and slave (bytes) 620system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 6034560 # Cumulative packet size per connected master and slave (bytes) 621system.membus.pkt_size_system.iocache.mem_side::total 6034560 # Cumulative packet size per connected master and slave (bytes) 622system.membus.pkt_size::total 49257977 # Cumulative packet size per connected master and slave (bytes) |
| 624system.membus.snoops 0 # Total snoops (count) | 623system.membus.snoops 0 # Total snoops (count) |
| 625system.membus.snoop_fanout::samples 375347 # Request fanout histogram | 624system.membus.snoop_fanout::samples 374838 # Request fanout histogram |
| 626system.membus.snoop_fanout::mean 1 # Request fanout histogram 627system.membus.snoop_fanout::stdev 0 # Request fanout histogram 628system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 629system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram | 625system.membus.snoop_fanout::mean 1 # Request fanout histogram 626system.membus.snoop_fanout::stdev 0 # Request fanout histogram 627system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 628system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram |
| 630system.membus.snoop_fanout::1 375347 100.00% 100.00% # Request fanout histogram | 629system.membus.snoop_fanout::1 374838 100.00% 100.00% # Request fanout histogram |
| 631system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 632system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 633system.membus.snoop_fanout::min_value 1 # Request fanout histogram 634system.membus.snoop_fanout::max_value 1 # Request fanout histogram | 630system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 631system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 632system.membus.snoop_fanout::min_value 1 # Request fanout histogram 633system.membus.snoop_fanout::max_value 1 # Request fanout histogram |
| 635system.membus.snoop_fanout::total 375347 # Request fanout histogram | 634system.membus.snoop_fanout::total 374838 # Request fanout histogram |
| 636system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 637system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). 638system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). 639system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 640system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 641system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 642system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 643system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 644system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 645system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 646system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 647system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 648 649---------- End Simulation Statistics ---------- | 635system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 636system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). 637system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). 638system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 639system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 640system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 641system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 642system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 643system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 644system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 645system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 646system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 647 648---------- End Simulation Statistics ---------- |