1
2---------- Begin Simulation Statistics ----------
3sim_seconds 5.112041 # Number of seconds simulated
| 1
2---------- Begin Simulation Statistics ----------
3sim_seconds 5.112041 # Number of seconds simulated
|
4sim_ticks 5112040968500 # Number of ticks simulated
5final_tick 5112040968500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
| 4sim_ticks 5112040970500 # Number of ticks simulated
5final_tick 5112040970500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
|
6sim_freq 1000000000000 # Frequency of simulated ticks
| 6sim_freq 1000000000000 # Frequency of simulated ticks
|
7host_inst_rate 468346 # Simulator instruction rate (inst/s)
8host_op_rate 958973 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 11982395829 # Simulator tick rate (ticks/s)
10host_mem_usage 354180 # Number of bytes of host memory used
11host_seconds 426.63 # Real time elapsed on the host
12sim_insts 199810236 # Number of instructions simulated
13sim_ops 409125920 # Number of ops (including micro ops) simulated
| 7host_inst_rate 1661898 # Simulator instruction rate (inst/s)
8host_op_rate 3402855 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 42518772648 # Simulator tick rate (ticks/s)
10host_mem_usage 621064 # Number of bytes of host memory used
11host_seconds 120.23 # Real time elapsed on the host
12sim_insts 199810242 # Number of instructions simulated
13sim_ops 409125923 # Number of ops (including micro ops) simulated
|
14system.physmem.bytes_read::pc.south_bridge.ide 2464640 # Number of bytes read from this memory
15system.physmem.bytes_read::cpu.dtb.walker 128 # Number of bytes read from this memory
16system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.inst 853824 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu.data 10600128 # Number of bytes read from this memory
19system.physmem.bytes_read::total 13919040 # Number of bytes read from this memory
20system.physmem.bytes_inst_read::cpu.inst 853824 # Number of instructions bytes read from this memory
21system.physmem.bytes_inst_read::total 853824 # Number of instructions bytes read from this memory
22system.physmem.bytes_written::writebacks 9292608 # Number of bytes written to this memory
23system.physmem.bytes_written::total 9292608 # Number of bytes written to this memory
24system.physmem.num_reads::pc.south_bridge.ide 38510 # Number of read requests responded to by this memory
25system.physmem.num_reads::cpu.dtb.walker 2 # Number of read requests responded to by this memory
26system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory
27system.physmem.num_reads::cpu.inst 13341 # Number of read requests responded to by this memory
28system.physmem.num_reads::cpu.data 165627 # Number of read requests responded to by this memory
29system.physmem.num_reads::total 217485 # Number of read requests responded to by this memory
30system.physmem.num_writes::writebacks 145197 # Number of write requests responded to by this memory
31system.physmem.num_writes::total 145197 # Number of write requests responded to by this memory
32system.physmem.bw_read::pc.south_bridge.ide 482124 # Total read bandwidth from this memory (bytes/s)
33system.physmem.bw_read::cpu.dtb.walker 25 # Total read bandwidth from this memory (bytes/s)
34system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s)
35system.physmem.bw_read::cpu.inst 167022 # Total read bandwidth from this memory (bytes/s)
36system.physmem.bw_read::cpu.data 2073561 # Total read bandwidth from this memory (bytes/s)
37system.physmem.bw_read::total 2722795 # Total read bandwidth from this memory (bytes/s)
38system.physmem.bw_inst_read::cpu.inst 167022 # Instruction read bandwidth from this memory (bytes/s)
39system.physmem.bw_inst_read::total 167022 # Instruction read bandwidth from this memory (bytes/s)
40system.physmem.bw_write::writebacks 1817788 # Write bandwidth from this memory (bytes/s)
41system.physmem.bw_write::total 1817788 # Write bandwidth from this memory (bytes/s)
42system.physmem.bw_total::writebacks 1817788 # Total bandwidth to/from this memory (bytes/s)
43system.physmem.bw_total::pc.south_bridge.ide 482124 # Total bandwidth to/from this memory (bytes/s)
44system.physmem.bw_total::cpu.dtb.walker 25 # Total bandwidth to/from this memory (bytes/s)
45system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s)
46system.physmem.bw_total::cpu.inst 167022 # Total bandwidth to/from this memory (bytes/s)
47system.physmem.bw_total::cpu.data 2073561 # Total bandwidth to/from this memory (bytes/s)
48system.physmem.bw_total::total 4540583 # Total bandwidth to/from this memory (bytes/s)
49system.physmem.readReqs 0 # Total number of read requests seen
50system.physmem.writeReqs 0 # Total number of write requests seen
51system.physmem.cpureqs 0 # Reqs generatd by CPU via cache - shady
52system.physmem.bytesRead 0 # Total number of bytes read from memory
53system.physmem.bytesWritten 0 # Total number of bytes written to memory
54system.physmem.bytesConsumedRd 0 # bytesRead derated as per pkt->getSize()
55system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
56system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
57system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
58system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis
59system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis
60system.physmem.perBankRdReqs::2 0 # Track reads on a per bank basis
61system.physmem.perBankRdReqs::3 0 # Track reads on a per bank basis
62system.physmem.perBankRdReqs::4 0 # Track reads on a per bank basis
63system.physmem.perBankRdReqs::5 0 # Track reads on a per bank basis
64system.physmem.perBankRdReqs::6 0 # Track reads on a per bank basis
65system.physmem.perBankRdReqs::7 0 # Track reads on a per bank basis
66system.physmem.perBankRdReqs::8 0 # Track reads on a per bank basis
67system.physmem.perBankRdReqs::9 0 # Track reads on a per bank basis
68system.physmem.perBankRdReqs::10 0 # Track reads on a per bank basis
69system.physmem.perBankRdReqs::11 0 # Track reads on a per bank basis
70system.physmem.perBankRdReqs::12 0 # Track reads on a per bank basis
71system.physmem.perBankRdReqs::13 0 # Track reads on a per bank basis
72system.physmem.perBankRdReqs::14 0 # Track reads on a per bank basis
73system.physmem.perBankRdReqs::15 0 # Track reads on a per bank basis
74system.physmem.perBankWrReqs::0 0 # Track writes on a per bank basis
75system.physmem.perBankWrReqs::1 0 # Track writes on a per bank basis
76system.physmem.perBankWrReqs::2 0 # Track writes on a per bank basis
77system.physmem.perBankWrReqs::3 0 # Track writes on a per bank basis
78system.physmem.perBankWrReqs::4 0 # Track writes on a per bank basis
79system.physmem.perBankWrReqs::5 0 # Track writes on a per bank basis
80system.physmem.perBankWrReqs::6 0 # Track writes on a per bank basis
81system.physmem.perBankWrReqs::7 0 # Track writes on a per bank basis
82system.physmem.perBankWrReqs::8 0 # Track writes on a per bank basis
83system.physmem.perBankWrReqs::9 0 # Track writes on a per bank basis
84system.physmem.perBankWrReqs::10 0 # Track writes on a per bank basis
85system.physmem.perBankWrReqs::11 0 # Track writes on a per bank basis
86system.physmem.perBankWrReqs::12 0 # Track writes on a per bank basis
87system.physmem.perBankWrReqs::13 0 # Track writes on a per bank basis
88system.physmem.perBankWrReqs::14 0 # Track writes on a per bank basis
89system.physmem.perBankWrReqs::15 0 # Track writes on a per bank basis
90system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry
91system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry
92system.physmem.totGap 0 # Total gap between requests
93system.physmem.readPktSize::0 0 # Categorize read packet sizes
94system.physmem.readPktSize::1 0 # Categorize read packet sizes
95system.physmem.readPktSize::2 0 # Categorize read packet sizes
96system.physmem.readPktSize::3 0 # Categorize read packet sizes
97system.physmem.readPktSize::4 0 # Categorize read packet sizes
98system.physmem.readPktSize::5 0 # Categorize read packet sizes
99system.physmem.readPktSize::6 0 # Categorize read packet sizes
100system.physmem.readPktSize::7 0 # Categorize read packet sizes
101system.physmem.readPktSize::8 0 # Categorize read packet sizes
102system.physmem.writePktSize::0 0 # categorize write packet sizes
103system.physmem.writePktSize::1 0 # categorize write packet sizes
104system.physmem.writePktSize::2 0 # categorize write packet sizes
105system.physmem.writePktSize::3 0 # categorize write packet sizes
106system.physmem.writePktSize::4 0 # categorize write packet sizes
107system.physmem.writePktSize::5 0 # categorize write packet sizes
108system.physmem.writePktSize::6 0 # categorize write packet sizes
109system.physmem.writePktSize::7 0 # categorize write packet sizes
110system.physmem.writePktSize::8 0 # categorize write packet sizes
111system.physmem.neitherpktsize::0 0 # categorize neither packet sizes
112system.physmem.neitherpktsize::1 0 # categorize neither packet sizes
113system.physmem.neitherpktsize::2 0 # categorize neither packet sizes
114system.physmem.neitherpktsize::3 0 # categorize neither packet sizes
115system.physmem.neitherpktsize::4 0 # categorize neither packet sizes
116system.physmem.neitherpktsize::5 0 # categorize neither packet sizes
117system.physmem.neitherpktsize::6 0 # categorize neither packet sizes
118system.physmem.neitherpktsize::7 0 # categorize neither packet sizes
119system.physmem.neitherpktsize::8 0 # categorize neither packet sizes
120system.physmem.rdQLenPdf::0 0 # What read queue length does an incoming req see
121system.physmem.rdQLenPdf::1 0 # What read queue length does an incoming req see
122system.physmem.rdQLenPdf::2 0 # What read queue length does an incoming req see
123system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see
124system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see
125system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see
126system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
127system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see
128system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see
129system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see
130system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see
131system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see
132system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see
133system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see
134system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see
135system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see
136system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see
137system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see
138system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see
139system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see
140system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see
141system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see
142system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see
143system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see
144system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see
145system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see
146system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see
147system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see
148system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see
149system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see
150system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see
151system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see
152system.physmem.rdQLenPdf::32 0 # What read queue length does an incoming req see
153system.physmem.wrQLenPdf::0 0 # What write queue length does an incoming req see
154system.physmem.wrQLenPdf::1 0 # What write queue length does an incoming req see
155system.physmem.wrQLenPdf::2 0 # What write queue length does an incoming req see
156system.physmem.wrQLenPdf::3 0 # What write queue length does an incoming req see
157system.physmem.wrQLenPdf::4 0 # What write queue length does an incoming req see
158system.physmem.wrQLenPdf::5 0 # What write queue length does an incoming req see
159system.physmem.wrQLenPdf::6 0 # What write queue length does an incoming req see
160system.physmem.wrQLenPdf::7 0 # What write queue length does an incoming req see
161system.physmem.wrQLenPdf::8 0 # What write queue length does an incoming req see
162system.physmem.wrQLenPdf::9 0 # What write queue length does an incoming req see
163system.physmem.wrQLenPdf::10 0 # What write queue length does an incoming req see
164system.physmem.wrQLenPdf::11 0 # What write queue length does an incoming req see
165system.physmem.wrQLenPdf::12 0 # What write queue length does an incoming req see
166system.physmem.wrQLenPdf::13 0 # What write queue length does an incoming req see
167system.physmem.wrQLenPdf::14 0 # What write queue length does an incoming req see
168system.physmem.wrQLenPdf::15 0 # What write queue length does an incoming req see
169system.physmem.wrQLenPdf::16 0 # What write queue length does an incoming req see
170system.physmem.wrQLenPdf::17 0 # What write queue length does an incoming req see
171system.physmem.wrQLenPdf::18 0 # What write queue length does an incoming req see
172system.physmem.wrQLenPdf::19 0 # What write queue length does an incoming req see
173system.physmem.wrQLenPdf::20 0 # What write queue length does an incoming req see
174system.physmem.wrQLenPdf::21 0 # What write queue length does an incoming req see
175system.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see
176system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see
177system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see
178system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see
179system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see
180system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see
181system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see
182system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see
183system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see
184system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see
185system.physmem.wrQLenPdf::32 0 # What write queue length does an incoming req see
186system.physmem.totQLat 0 # Total cycles spent in queuing delays
187system.physmem.totMemAccLat 0 # Sum of mem lat for all requests
188system.physmem.totBusLat 0 # Total cycles spent in databus access
189system.physmem.totBankLat 0 # Total cycles spent in bank access
190system.physmem.avgQLat nan # Average queueing delay per request
191system.physmem.avgBankLat nan # Average bank access latency per request
192system.physmem.avgBusLat nan # Average bus latency per request
193system.physmem.avgMemAccLat nan # Average memory access latency
194system.physmem.avgRdBW 0.00 # Average achieved read bandwidth in MB/s
195system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MB/s
196system.physmem.avgConsumedRdBW 0.00 # Average consumed read bandwidth in MB/s
197system.physmem.avgConsumedWrBW 0.00 # Average consumed write bandwidth in MB/s
198system.physmem.peakBW 16000.00 # Theoretical peak bandwidth in MB/s
199system.physmem.busUtil 0.00 # Data bus utilization in percentage
200system.physmem.avgRdQLen 0.00 # Average read queue length over time
201system.physmem.avgWrQLen 0.00 # Average write queue length over time
202system.physmem.readRowHits 0 # Number of row buffer hits during reads
203system.physmem.writeRowHits 0 # Number of row buffer hits during writes
204system.physmem.readRowHitRate nan # Row buffer hit rate for reads
205system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
206system.physmem.avgGap nan # Average gap between requests
207system.iocache.replacements 47569 # number of replacements
208system.iocache.tagsinuse 0.042402 # Cycle average of tags in use
209system.iocache.total_refs 0 # Total number of references to valid blocks.
210system.iocache.sampled_refs 47585 # Sample count of references to valid blocks.
211system.iocache.avg_refs 0 # Average number of references to valid blocks.
| 14system.physmem.bytes_read::pc.south_bridge.ide 2464640 # Number of bytes read from this memory
15system.physmem.bytes_read::cpu.dtb.walker 128 # Number of bytes read from this memory
16system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.inst 853824 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu.data 10600128 # Number of bytes read from this memory
19system.physmem.bytes_read::total 13919040 # Number of bytes read from this memory
20system.physmem.bytes_inst_read::cpu.inst 853824 # Number of instructions bytes read from this memory
21system.physmem.bytes_inst_read::total 853824 # Number of instructions bytes read from this memory
22system.physmem.bytes_written::writebacks 9292608 # Number of bytes written to this memory
23system.physmem.bytes_written::total 9292608 # Number of bytes written to this memory
24system.physmem.num_reads::pc.south_bridge.ide 38510 # Number of read requests responded to by this memory
25system.physmem.num_reads::cpu.dtb.walker 2 # Number of read requests responded to by this memory
26system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory
27system.physmem.num_reads::cpu.inst 13341 # Number of read requests responded to by this memory
28system.physmem.num_reads::cpu.data 165627 # Number of read requests responded to by this memory
29system.physmem.num_reads::total 217485 # Number of read requests responded to by this memory
30system.physmem.num_writes::writebacks 145197 # Number of write requests responded to by this memory
31system.physmem.num_writes::total 145197 # Number of write requests responded to by this memory
32system.physmem.bw_read::pc.south_bridge.ide 482124 # Total read bandwidth from this memory (bytes/s)
33system.physmem.bw_read::cpu.dtb.walker 25 # Total read bandwidth from this memory (bytes/s)
34system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s)
35system.physmem.bw_read::cpu.inst 167022 # Total read bandwidth from this memory (bytes/s)
36system.physmem.bw_read::cpu.data 2073561 # Total read bandwidth from this memory (bytes/s)
37system.physmem.bw_read::total 2722795 # Total read bandwidth from this memory (bytes/s)
38system.physmem.bw_inst_read::cpu.inst 167022 # Instruction read bandwidth from this memory (bytes/s)
39system.physmem.bw_inst_read::total 167022 # Instruction read bandwidth from this memory (bytes/s)
40system.physmem.bw_write::writebacks 1817788 # Write bandwidth from this memory (bytes/s)
41system.physmem.bw_write::total 1817788 # Write bandwidth from this memory (bytes/s)
42system.physmem.bw_total::writebacks 1817788 # Total bandwidth to/from this memory (bytes/s)
43system.physmem.bw_total::pc.south_bridge.ide 482124 # Total bandwidth to/from this memory (bytes/s)
44system.physmem.bw_total::cpu.dtb.walker 25 # Total bandwidth to/from this memory (bytes/s)
45system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s)
46system.physmem.bw_total::cpu.inst 167022 # Total bandwidth to/from this memory (bytes/s)
47system.physmem.bw_total::cpu.data 2073561 # Total bandwidth to/from this memory (bytes/s)
48system.physmem.bw_total::total 4540583 # Total bandwidth to/from this memory (bytes/s)
49system.physmem.readReqs 0 # Total number of read requests seen
50system.physmem.writeReqs 0 # Total number of write requests seen
51system.physmem.cpureqs 0 # Reqs generatd by CPU via cache - shady
52system.physmem.bytesRead 0 # Total number of bytes read from memory
53system.physmem.bytesWritten 0 # Total number of bytes written to memory
54system.physmem.bytesConsumedRd 0 # bytesRead derated as per pkt->getSize()
55system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize()
56system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
57system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed
58system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis
59system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis
60system.physmem.perBankRdReqs::2 0 # Track reads on a per bank basis
61system.physmem.perBankRdReqs::3 0 # Track reads on a per bank basis
62system.physmem.perBankRdReqs::4 0 # Track reads on a per bank basis
63system.physmem.perBankRdReqs::5 0 # Track reads on a per bank basis
64system.physmem.perBankRdReqs::6 0 # Track reads on a per bank basis
65system.physmem.perBankRdReqs::7 0 # Track reads on a per bank basis
66system.physmem.perBankRdReqs::8 0 # Track reads on a per bank basis
67system.physmem.perBankRdReqs::9 0 # Track reads on a per bank basis
68system.physmem.perBankRdReqs::10 0 # Track reads on a per bank basis
69system.physmem.perBankRdReqs::11 0 # Track reads on a per bank basis
70system.physmem.perBankRdReqs::12 0 # Track reads on a per bank basis
71system.physmem.perBankRdReqs::13 0 # Track reads on a per bank basis
72system.physmem.perBankRdReqs::14 0 # Track reads on a per bank basis
73system.physmem.perBankRdReqs::15 0 # Track reads on a per bank basis
74system.physmem.perBankWrReqs::0 0 # Track writes on a per bank basis
75system.physmem.perBankWrReqs::1 0 # Track writes on a per bank basis
76system.physmem.perBankWrReqs::2 0 # Track writes on a per bank basis
77system.physmem.perBankWrReqs::3 0 # Track writes on a per bank basis
78system.physmem.perBankWrReqs::4 0 # Track writes on a per bank basis
79system.physmem.perBankWrReqs::5 0 # Track writes on a per bank basis
80system.physmem.perBankWrReqs::6 0 # Track writes on a per bank basis
81system.physmem.perBankWrReqs::7 0 # Track writes on a per bank basis
82system.physmem.perBankWrReqs::8 0 # Track writes on a per bank basis
83system.physmem.perBankWrReqs::9 0 # Track writes on a per bank basis
84system.physmem.perBankWrReqs::10 0 # Track writes on a per bank basis
85system.physmem.perBankWrReqs::11 0 # Track writes on a per bank basis
86system.physmem.perBankWrReqs::12 0 # Track writes on a per bank basis
87system.physmem.perBankWrReqs::13 0 # Track writes on a per bank basis
88system.physmem.perBankWrReqs::14 0 # Track writes on a per bank basis
89system.physmem.perBankWrReqs::15 0 # Track writes on a per bank basis
90system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry
91system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry
92system.physmem.totGap 0 # Total gap between requests
93system.physmem.readPktSize::0 0 # Categorize read packet sizes
94system.physmem.readPktSize::1 0 # Categorize read packet sizes
95system.physmem.readPktSize::2 0 # Categorize read packet sizes
96system.physmem.readPktSize::3 0 # Categorize read packet sizes
97system.physmem.readPktSize::4 0 # Categorize read packet sizes
98system.physmem.readPktSize::5 0 # Categorize read packet sizes
99system.physmem.readPktSize::6 0 # Categorize read packet sizes
100system.physmem.readPktSize::7 0 # Categorize read packet sizes
101system.physmem.readPktSize::8 0 # Categorize read packet sizes
102system.physmem.writePktSize::0 0 # categorize write packet sizes
103system.physmem.writePktSize::1 0 # categorize write packet sizes
104system.physmem.writePktSize::2 0 # categorize write packet sizes
105system.physmem.writePktSize::3 0 # categorize write packet sizes
106system.physmem.writePktSize::4 0 # categorize write packet sizes
107system.physmem.writePktSize::5 0 # categorize write packet sizes
108system.physmem.writePktSize::6 0 # categorize write packet sizes
109system.physmem.writePktSize::7 0 # categorize write packet sizes
110system.physmem.writePktSize::8 0 # categorize write packet sizes
111system.physmem.neitherpktsize::0 0 # categorize neither packet sizes
112system.physmem.neitherpktsize::1 0 # categorize neither packet sizes
113system.physmem.neitherpktsize::2 0 # categorize neither packet sizes
114system.physmem.neitherpktsize::3 0 # categorize neither packet sizes
115system.physmem.neitherpktsize::4 0 # categorize neither packet sizes
116system.physmem.neitherpktsize::5 0 # categorize neither packet sizes
117system.physmem.neitherpktsize::6 0 # categorize neither packet sizes
118system.physmem.neitherpktsize::7 0 # categorize neither packet sizes
119system.physmem.neitherpktsize::8 0 # categorize neither packet sizes
120system.physmem.rdQLenPdf::0 0 # What read queue length does an incoming req see
121system.physmem.rdQLenPdf::1 0 # What read queue length does an incoming req see
122system.physmem.rdQLenPdf::2 0 # What read queue length does an incoming req see
123system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see
124system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see
125system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see
126system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see
127system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see
128system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see
129system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see
130system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see
131system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see
132system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see
133system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see
134system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see
135system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see
136system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see
137system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see
138system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see
139system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see
140system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see
141system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see
142system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see
143system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see
144system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see
145system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see
146system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see
147system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see
148system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see
149system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see
150system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see
151system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see
152system.physmem.rdQLenPdf::32 0 # What read queue length does an incoming req see
153system.physmem.wrQLenPdf::0 0 # What write queue length does an incoming req see
154system.physmem.wrQLenPdf::1 0 # What write queue length does an incoming req see
155system.physmem.wrQLenPdf::2 0 # What write queue length does an incoming req see
156system.physmem.wrQLenPdf::3 0 # What write queue length does an incoming req see
157system.physmem.wrQLenPdf::4 0 # What write queue length does an incoming req see
158system.physmem.wrQLenPdf::5 0 # What write queue length does an incoming req see
159system.physmem.wrQLenPdf::6 0 # What write queue length does an incoming req see
160system.physmem.wrQLenPdf::7 0 # What write queue length does an incoming req see
161system.physmem.wrQLenPdf::8 0 # What write queue length does an incoming req see
162system.physmem.wrQLenPdf::9 0 # What write queue length does an incoming req see
163system.physmem.wrQLenPdf::10 0 # What write queue length does an incoming req see
164system.physmem.wrQLenPdf::11 0 # What write queue length does an incoming req see
165system.physmem.wrQLenPdf::12 0 # What write queue length does an incoming req see
166system.physmem.wrQLenPdf::13 0 # What write queue length does an incoming req see
167system.physmem.wrQLenPdf::14 0 # What write queue length does an incoming req see
168system.physmem.wrQLenPdf::15 0 # What write queue length does an incoming req see
169system.physmem.wrQLenPdf::16 0 # What write queue length does an incoming req see
170system.physmem.wrQLenPdf::17 0 # What write queue length does an incoming req see
171system.physmem.wrQLenPdf::18 0 # What write queue length does an incoming req see
172system.physmem.wrQLenPdf::19 0 # What write queue length does an incoming req see
173system.physmem.wrQLenPdf::20 0 # What write queue length does an incoming req see
174system.physmem.wrQLenPdf::21 0 # What write queue length does an incoming req see
175system.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see
176system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see
177system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see
178system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see
179system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see
180system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see
181system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see
182system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see
183system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see
184system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see
185system.physmem.wrQLenPdf::32 0 # What write queue length does an incoming req see
186system.physmem.totQLat 0 # Total cycles spent in queuing delays
187system.physmem.totMemAccLat 0 # Sum of mem lat for all requests
188system.physmem.totBusLat 0 # Total cycles spent in databus access
189system.physmem.totBankLat 0 # Total cycles spent in bank access
190system.physmem.avgQLat nan # Average queueing delay per request
191system.physmem.avgBankLat nan # Average bank access latency per request
192system.physmem.avgBusLat nan # Average bus latency per request
193system.physmem.avgMemAccLat nan # Average memory access latency
194system.physmem.avgRdBW 0.00 # Average achieved read bandwidth in MB/s
195system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MB/s
196system.physmem.avgConsumedRdBW 0.00 # Average consumed read bandwidth in MB/s
197system.physmem.avgConsumedWrBW 0.00 # Average consumed write bandwidth in MB/s
198system.physmem.peakBW 16000.00 # Theoretical peak bandwidth in MB/s
199system.physmem.busUtil 0.00 # Data bus utilization in percentage
200system.physmem.avgRdQLen 0.00 # Average read queue length over time
201system.physmem.avgWrQLen 0.00 # Average write queue length over time
202system.physmem.readRowHits 0 # Number of row buffer hits during reads
203system.physmem.writeRowHits 0 # Number of row buffer hits during writes
204system.physmem.readRowHitRate nan # Row buffer hit rate for reads
205system.physmem.writeRowHitRate nan # Row buffer hit rate for writes
206system.physmem.avgGap nan # Average gap between requests
207system.iocache.replacements 47569 # number of replacements
208system.iocache.tagsinuse 0.042402 # Cycle average of tags in use
209system.iocache.total_refs 0 # Total number of references to valid blocks.
210system.iocache.sampled_refs 47585 # Sample count of references to valid blocks.
211system.iocache.avg_refs 0 # Average number of references to valid blocks.
|
212system.iocache.warmup_cycle 4994776680059 # Cycle when the warmup percentage was hit.
| 212system.iocache.warmup_cycle 4994776682059 # Cycle when the warmup percentage was hit.
|
213system.iocache.occ_blocks::pc.south_bridge.ide 0.042402 # Average occupied blocks per requestor
214system.iocache.occ_percent::pc.south_bridge.ide 0.002650 # Average percentage of cache occupancy
215system.iocache.occ_percent::total 0.002650 # Average percentage of cache occupancy
216system.iocache.ReadReq_misses::pc.south_bridge.ide 904 # number of ReadReq misses
217system.iocache.ReadReq_misses::total 904 # number of ReadReq misses
218system.iocache.WriteReq_misses::pc.south_bridge.ide 46720 # number of WriteReq misses
219system.iocache.WriteReq_misses::total 46720 # number of WriteReq misses
220system.iocache.demand_misses::pc.south_bridge.ide 47624 # number of demand (read+write) misses
221system.iocache.demand_misses::total 47624 # number of demand (read+write) misses
222system.iocache.overall_misses::pc.south_bridge.ide 47624 # number of overall misses
223system.iocache.overall_misses::total 47624 # number of overall misses
224system.iocache.ReadReq_accesses::pc.south_bridge.ide 904 # number of ReadReq accesses(hits+misses)
225system.iocache.ReadReq_accesses::total 904 # number of ReadReq accesses(hits+misses)
226system.iocache.WriteReq_accesses::pc.south_bridge.ide 46720 # number of WriteReq accesses(hits+misses)
227system.iocache.WriteReq_accesses::total 46720 # number of WriteReq accesses(hits+misses)
228system.iocache.demand_accesses::pc.south_bridge.ide 47624 # number of demand (read+write) accesses
229system.iocache.demand_accesses::total 47624 # number of demand (read+write) accesses
230system.iocache.overall_accesses::pc.south_bridge.ide 47624 # number of overall (read+write) accesses
231system.iocache.overall_accesses::total 47624 # number of overall (read+write) accesses
232system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses
233system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses
234system.iocache.WriteReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteReq accesses
235system.iocache.WriteReq_miss_rate::total 1 # miss rate for WriteReq accesses
236system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses
237system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses
238system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses
239system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses
240system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
241system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
242system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
243system.iocache.blocked::no_targets 0 # number of cycles access was blocked
244system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
245system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
246system.iocache.fast_writes 0 # number of fast writes performed
247system.iocache.cache_copies 0 # number of cache copies performed
248system.iocache.writebacks::writebacks 46667 # number of writebacks
249system.iocache.writebacks::total 46667 # number of writebacks
250system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
251system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
252system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD).
253system.pc.south_bridge.ide.disks0.dma_read_txs 31 # Number of DMA read transactions (not PRD).
254system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes.
255system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes.
256system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions.
257system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
258system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
259system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD).
260system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes.
261system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes.
262system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions.
| 213system.iocache.occ_blocks::pc.south_bridge.ide 0.042402 # Average occupied blocks per requestor
214system.iocache.occ_percent::pc.south_bridge.ide 0.002650 # Average percentage of cache occupancy
215system.iocache.occ_percent::total 0.002650 # Average percentage of cache occupancy
216system.iocache.ReadReq_misses::pc.south_bridge.ide 904 # number of ReadReq misses
217system.iocache.ReadReq_misses::total 904 # number of ReadReq misses
218system.iocache.WriteReq_misses::pc.south_bridge.ide 46720 # number of WriteReq misses
219system.iocache.WriteReq_misses::total 46720 # number of WriteReq misses
220system.iocache.demand_misses::pc.south_bridge.ide 47624 # number of demand (read+write) misses
221system.iocache.demand_misses::total 47624 # number of demand (read+write) misses
222system.iocache.overall_misses::pc.south_bridge.ide 47624 # number of overall misses
223system.iocache.overall_misses::total 47624 # number of overall misses
224system.iocache.ReadReq_accesses::pc.south_bridge.ide 904 # number of ReadReq accesses(hits+misses)
225system.iocache.ReadReq_accesses::total 904 # number of ReadReq accesses(hits+misses)
226system.iocache.WriteReq_accesses::pc.south_bridge.ide 46720 # number of WriteReq accesses(hits+misses)
227system.iocache.WriteReq_accesses::total 46720 # number of WriteReq accesses(hits+misses)
228system.iocache.demand_accesses::pc.south_bridge.ide 47624 # number of demand (read+write) accesses
229system.iocache.demand_accesses::total 47624 # number of demand (read+write) accesses
230system.iocache.overall_accesses::pc.south_bridge.ide 47624 # number of overall (read+write) accesses
231system.iocache.overall_accesses::total 47624 # number of overall (read+write) accesses
232system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses
233system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses
234system.iocache.WriteReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteReq accesses
235system.iocache.WriteReq_miss_rate::total 1 # miss rate for WriteReq accesses
236system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses
237system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses
238system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses
239system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses
240system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
241system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
242system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
243system.iocache.blocked::no_targets 0 # number of cycles access was blocked
244system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
245system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
246system.iocache.fast_writes 0 # number of fast writes performed
247system.iocache.cache_copies 0 # number of cache copies performed
248system.iocache.writebacks::writebacks 46667 # number of writebacks
249system.iocache.writebacks::total 46667 # number of writebacks
250system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
251system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
252system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD).
253system.pc.south_bridge.ide.disks0.dma_read_txs 31 # Number of DMA read transactions (not PRD).
254system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes.
255system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes.
256system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions.
257system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
258system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
259system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD).
260system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes.
261system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes.
262system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions.
|
263system.cpu.numCycles 10224081960 # number of cpu cycles simulated
| 263system.cpu.numCycles 10224081964 # number of cpu cycles simulated
|
264system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
265system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
| 264system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
265system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
|
266system.cpu.committedInsts 199810236 # Number of instructions committed
267system.cpu.committedOps 409125920 # Number of ops (including micro ops) committed
268system.cpu.num_int_alu_accesses 374289911 # Number of integer alu accesses
| 266system.cpu.committedInsts 199810242 # Number of instructions committed
267system.cpu.committedOps 409125923 # Number of ops (including micro ops) committed
268system.cpu.num_int_alu_accesses 374289914 # Number of integer alu accesses
|
269system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
270system.cpu.num_func_calls 0 # number of times a function call or return occured
| 269system.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
270system.cpu.num_func_calls 0 # number of times a function call or return occured
|
271system.cpu.num_conditional_control_insts 39954536 # number of instructions that are conditional controls
272system.cpu.num_int_insts 374289911 # number of integer instructions
| 271system.cpu.num_conditional_control_insts 39954535 # number of instructions that are conditional controls
272system.cpu.num_int_insts 374289914 # number of integer instructions
|
273system.cpu.num_fp_insts 0 # number of float instructions
| 273system.cpu.num_fp_insts 0 # number of float instructions
|
274system.cpu.num_int_register_reads 915450709 # number of times the integer registers were read
275system.cpu.num_int_register_writes 480322748 # number of times the integer registers were written
| 274system.cpu.num_int_register_reads 915450706 # number of times the integer registers were read
275system.cpu.num_int_register_writes 480322745 # number of times the integer registers were written
|
276system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
277system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
| 276system.cpu.num_fp_register_reads 0 # number of times the floating registers were read
277system.cpu.num_fp_register_writes 0 # number of times the floating registers were written
|
278system.cpu.num_mem_refs 35624588 # number of memory refs
| 278system.cpu.num_mem_refs 35624590 # number of memory refs
|
279system.cpu.num_load_insts 27216588 # Number of load instructions
| 279system.cpu.num_load_insts 27216588 # Number of load instructions
|
280system.cpu.num_store_insts 8408000 # Number of store instructions
281system.cpu.num_idle_cycles 9770609595.971962 # Number of idle cycles
282system.cpu.num_busy_cycles 453472364.028039 # Number of busy cycles
| 280system.cpu.num_store_insts 8408002 # Number of store instructions
281system.cpu.num_idle_cycles 9770609597.971960 # Number of idle cycles
282system.cpu.num_busy_cycles 453472366.028039 # Number of busy cycles
|
283system.cpu.not_idle_fraction 0.044353 # Percentage of non-idle cycles
284system.cpu.idle_fraction 0.955647 # Percentage of idle cycles
285system.cpu.kern.inst.arm 0 # number of arm instructions executed
286system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
287system.cpu.icache.replacements 790732 # number of replacements
| 283system.cpu.not_idle_fraction 0.044353 # Percentage of non-idle cycles
284system.cpu.idle_fraction 0.955647 # Percentage of idle cycles
285system.cpu.kern.inst.arm 0 # number of arm instructions executed
286system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
287system.cpu.icache.replacements 790732 # number of replacements
|
288system.cpu.icache.tagsinuse 510.627676 # Cycle average of tags in use
289system.cpu.icache.total_refs 243360722 # Total number of references to valid blocks.
| 288system.cpu.icache.tagsinuse 510.627675 # Cycle average of tags in use
289system.cpu.icache.total_refs 243360727 # Total number of references to valid blocks.
|
290system.cpu.icache.sampled_refs 791244 # Sample count of references to valid blocks.
| 290system.cpu.icache.sampled_refs 791244 # Sample count of references to valid blocks.
|
291system.cpu.icache.avg_refs 307.567226 # Average number of references to valid blocks.
292system.cpu.icache.warmup_cycle 148763110500 # Cycle when the warmup percentage was hit.
293system.cpu.icache.occ_blocks::cpu.inst 510.627676 # Average occupied blocks per requestor
| 291system.cpu.icache.avg_refs 307.567232 # Average number of references to valid blocks.
292system.cpu.icache.warmup_cycle 148763114500 # Cycle when the warmup percentage was hit.
293system.cpu.icache.occ_blocks::cpu.inst 510.627675 # Average occupied blocks per requestor
|
294system.cpu.icache.occ_percent::cpu.inst 0.997320 # Average percentage of cache occupancy
295system.cpu.icache.occ_percent::total 0.997320 # Average percentage of cache occupancy
| 294system.cpu.icache.occ_percent::cpu.inst 0.997320 # Average percentage of cache occupancy
295system.cpu.icache.occ_percent::total 0.997320 # Average percentage of cache occupancy
|
296system.cpu.icache.ReadReq_hits::cpu.inst 243360722 # number of ReadReq hits
297system.cpu.icache.ReadReq_hits::total 243360722 # number of ReadReq hits
298system.cpu.icache.demand_hits::cpu.inst 243360722 # number of demand (read+write) hits
299system.cpu.icache.demand_hits::total 243360722 # number of demand (read+write) hits
300system.cpu.icache.overall_hits::cpu.inst 243360722 # number of overall hits
301system.cpu.icache.overall_hits::total 243360722 # number of overall hits
| 296system.cpu.icache.ReadReq_hits::cpu.inst 243360727 # number of ReadReq hits
297system.cpu.icache.ReadReq_hits::total 243360727 # number of ReadReq hits
298system.cpu.icache.demand_hits::cpu.inst 243360727 # number of demand (read+write) hits
299system.cpu.icache.demand_hits::total 243360727 # number of demand (read+write) hits
300system.cpu.icache.overall_hits::cpu.inst 243360727 # number of overall hits
301system.cpu.icache.overall_hits::total 243360727 # number of overall hits
|
302system.cpu.icache.ReadReq_misses::cpu.inst 791251 # number of ReadReq misses
303system.cpu.icache.ReadReq_misses::total 791251 # number of ReadReq misses
304system.cpu.icache.demand_misses::cpu.inst 791251 # number of demand (read+write) misses
305system.cpu.icache.demand_misses::total 791251 # number of demand (read+write) misses
306system.cpu.icache.overall_misses::cpu.inst 791251 # number of overall misses
307system.cpu.icache.overall_misses::total 791251 # number of overall misses
| 302system.cpu.icache.ReadReq_misses::cpu.inst 791251 # number of ReadReq misses
303system.cpu.icache.ReadReq_misses::total 791251 # number of ReadReq misses
304system.cpu.icache.demand_misses::cpu.inst 791251 # number of demand (read+write) misses
305system.cpu.icache.demand_misses::total 791251 # number of demand (read+write) misses
306system.cpu.icache.overall_misses::cpu.inst 791251 # number of overall misses
307system.cpu.icache.overall_misses::total 791251 # number of overall misses
|
308system.cpu.icache.ReadReq_accesses::cpu.inst 244151973 # number of ReadReq accesses(hits+misses)
309system.cpu.icache.ReadReq_accesses::total 244151973 # number of ReadReq accesses(hits+misses)
310system.cpu.icache.demand_accesses::cpu.inst 244151973 # number of demand (read+write) accesses
311system.cpu.icache.demand_accesses::total 244151973 # number of demand (read+write) accesses
312system.cpu.icache.overall_accesses::cpu.inst 244151973 # number of overall (read+write) accesses
313system.cpu.icache.overall_accesses::total 244151973 # number of overall (read+write) accesses
| 308system.cpu.icache.ReadReq_accesses::cpu.inst 244151978 # number of ReadReq accesses(hits+misses)
309system.cpu.icache.ReadReq_accesses::total 244151978 # number of ReadReq accesses(hits+misses)
310system.cpu.icache.demand_accesses::cpu.inst 244151978 # number of demand (read+write) accesses
311system.cpu.icache.demand_accesses::total 244151978 # number of demand (read+write) accesses
312system.cpu.icache.overall_accesses::cpu.inst 244151978 # number of overall (read+write) accesses
313system.cpu.icache.overall_accesses::total 244151978 # number of overall (read+write) accesses
|
314system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003241 # miss rate for ReadReq accesses
315system.cpu.icache.ReadReq_miss_rate::total 0.003241 # miss rate for ReadReq accesses
316system.cpu.icache.demand_miss_rate::cpu.inst 0.003241 # miss rate for demand accesses
317system.cpu.icache.demand_miss_rate::total 0.003241 # miss rate for demand accesses
318system.cpu.icache.overall_miss_rate::cpu.inst 0.003241 # miss rate for overall accesses
319system.cpu.icache.overall_miss_rate::total 0.003241 # miss rate for overall accesses
320system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
321system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
322system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
323system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
324system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
325system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
326system.cpu.icache.fast_writes 0 # number of fast writes performed
327system.cpu.icache.cache_copies 0 # number of cache copies performed
328system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
329system.cpu.itb_walker_cache.replacements 3335 # number of replacements
330system.cpu.itb_walker_cache.tagsinuse 3.026483 # Cycle average of tags in use
331system.cpu.itb_walker_cache.total_refs 8029 # Total number of references to valid blocks.
332system.cpu.itb_walker_cache.sampled_refs 3346 # Sample count of references to valid blocks.
333system.cpu.itb_walker_cache.avg_refs 2.399582 # Average number of references to valid blocks.
| 314system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003241 # miss rate for ReadReq accesses
315system.cpu.icache.ReadReq_miss_rate::total 0.003241 # miss rate for ReadReq accesses
316system.cpu.icache.demand_miss_rate::cpu.inst 0.003241 # miss rate for demand accesses
317system.cpu.icache.demand_miss_rate::total 0.003241 # miss rate for demand accesses
318system.cpu.icache.overall_miss_rate::cpu.inst 0.003241 # miss rate for overall accesses
319system.cpu.icache.overall_miss_rate::total 0.003241 # miss rate for overall accesses
320system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
321system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
322system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
323system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
324system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
325system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
326system.cpu.icache.fast_writes 0 # number of fast writes performed
327system.cpu.icache.cache_copies 0 # number of cache copies performed
328system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
329system.cpu.itb_walker_cache.replacements 3335 # number of replacements
330system.cpu.itb_walker_cache.tagsinuse 3.026483 # Cycle average of tags in use
331system.cpu.itb_walker_cache.total_refs 8029 # Total number of references to valid blocks.
332system.cpu.itb_walker_cache.sampled_refs 3346 # Sample count of references to valid blocks.
333system.cpu.itb_walker_cache.avg_refs 2.399582 # Average number of references to valid blocks.
|
334system.cpu.itb_walker_cache.warmup_cycle 5102019608500 # Cycle when the warmup percentage was hit.
| 334system.cpu.itb_walker_cache.warmup_cycle 5102019610500 # Cycle when the warmup percentage was hit.
|
335system.cpu.itb_walker_cache.occ_blocks::cpu.itb.walker 3.026483 # Average occupied blocks per requestor
336system.cpu.itb_walker_cache.occ_percent::cpu.itb.walker 0.189155 # Average percentage of cache occupancy
337system.cpu.itb_walker_cache.occ_percent::total 0.189155 # Average percentage of cache occupancy
338system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 8031 # number of ReadReq hits
339system.cpu.itb_walker_cache.ReadReq_hits::total 8031 # number of ReadReq hits
340system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits
341system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits
342system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 8033 # number of demand (read+write) hits
343system.cpu.itb_walker_cache.demand_hits::total 8033 # number of demand (read+write) hits
344system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 8033 # number of overall hits
345system.cpu.itb_walker_cache.overall_hits::total 8033 # number of overall hits
346system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4194 # number of ReadReq misses
347system.cpu.itb_walker_cache.ReadReq_misses::total 4194 # number of ReadReq misses
348system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4194 # number of demand (read+write) misses
349system.cpu.itb_walker_cache.demand_misses::total 4194 # number of demand (read+write) misses
350system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4194 # number of overall misses
351system.cpu.itb_walker_cache.overall_misses::total 4194 # number of overall misses
352system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12225 # number of ReadReq accesses(hits+misses)
353system.cpu.itb_walker_cache.ReadReq_accesses::total 12225 # number of ReadReq accesses(hits+misses)
354system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses)
355system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses)
356system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12227 # number of demand (read+write) accesses
357system.cpu.itb_walker_cache.demand_accesses::total 12227 # number of demand (read+write) accesses
358system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12227 # number of overall (read+write) accesses
359system.cpu.itb_walker_cache.overall_accesses::total 12227 # number of overall (read+write) accesses
360system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.343067 # miss rate for ReadReq accesses
361system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.343067 # miss rate for ReadReq accesses
362system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.343011 # miss rate for demand accesses
363system.cpu.itb_walker_cache.demand_miss_rate::total 0.343011 # miss rate for demand accesses
364system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.343011 # miss rate for overall accesses
365system.cpu.itb_walker_cache.overall_miss_rate::total 0.343011 # miss rate for overall accesses
366system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
367system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
368system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked
369system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked
370system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
371system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
372system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed
373system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed
374system.cpu.itb_walker_cache.writebacks::writebacks 593 # number of writebacks
375system.cpu.itb_walker_cache.writebacks::total 593 # number of writebacks
376system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
377system.cpu.dtb_walker_cache.replacements 7597 # number of replacements
378system.cpu.dtb_walker_cache.tagsinuse 5.013746 # Cycle average of tags in use
379system.cpu.dtb_walker_cache.total_refs 13015 # Total number of references to valid blocks.
380system.cpu.dtb_walker_cache.sampled_refs 7611 # Sample count of references to valid blocks.
381system.cpu.dtb_walker_cache.avg_refs 1.710025 # Average number of references to valid blocks.
| 335system.cpu.itb_walker_cache.occ_blocks::cpu.itb.walker 3.026483 # Average occupied blocks per requestor
336system.cpu.itb_walker_cache.occ_percent::cpu.itb.walker 0.189155 # Average percentage of cache occupancy
337system.cpu.itb_walker_cache.occ_percent::total 0.189155 # Average percentage of cache occupancy
338system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 8031 # number of ReadReq hits
339system.cpu.itb_walker_cache.ReadReq_hits::total 8031 # number of ReadReq hits
340system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits
341system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits
342system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 8033 # number of demand (read+write) hits
343system.cpu.itb_walker_cache.demand_hits::total 8033 # number of demand (read+write) hits
344system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 8033 # number of overall hits
345system.cpu.itb_walker_cache.overall_hits::total 8033 # number of overall hits
346system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4194 # number of ReadReq misses
347system.cpu.itb_walker_cache.ReadReq_misses::total 4194 # number of ReadReq misses
348system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4194 # number of demand (read+write) misses
349system.cpu.itb_walker_cache.demand_misses::total 4194 # number of demand (read+write) misses
350system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4194 # number of overall misses
351system.cpu.itb_walker_cache.overall_misses::total 4194 # number of overall misses
352system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12225 # number of ReadReq accesses(hits+misses)
353system.cpu.itb_walker_cache.ReadReq_accesses::total 12225 # number of ReadReq accesses(hits+misses)
354system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses)
355system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses)
356system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12227 # number of demand (read+write) accesses
357system.cpu.itb_walker_cache.demand_accesses::total 12227 # number of demand (read+write) accesses
358system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12227 # number of overall (read+write) accesses
359system.cpu.itb_walker_cache.overall_accesses::total 12227 # number of overall (read+write) accesses
360system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.343067 # miss rate for ReadReq accesses
361system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.343067 # miss rate for ReadReq accesses
362system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.343011 # miss rate for demand accesses
363system.cpu.itb_walker_cache.demand_miss_rate::total 0.343011 # miss rate for demand accesses
364system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.343011 # miss rate for overall accesses
365system.cpu.itb_walker_cache.overall_miss_rate::total 0.343011 # miss rate for overall accesses
366system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
367system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
368system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked
369system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked
370system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
371system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
372system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed
373system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed
374system.cpu.itb_walker_cache.writebacks::writebacks 593 # number of writebacks
375system.cpu.itb_walker_cache.writebacks::total 593 # number of writebacks
376system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
377system.cpu.dtb_walker_cache.replacements 7597 # number of replacements
378system.cpu.dtb_walker_cache.tagsinuse 5.013746 # Cycle average of tags in use
379system.cpu.dtb_walker_cache.total_refs 13015 # Total number of references to valid blocks.
380system.cpu.dtb_walker_cache.sampled_refs 7611 # Sample count of references to valid blocks.
381system.cpu.dtb_walker_cache.avg_refs 1.710025 # Average number of references to valid blocks.
|
382system.cpu.dtb_walker_cache.warmup_cycle 5101206384000 # Cycle when the warmup percentage was hit.
| 382system.cpu.dtb_walker_cache.warmup_cycle 5101206386000 # Cycle when the warmup percentage was hit.
|
383system.cpu.dtb_walker_cache.occ_blocks::cpu.dtb.walker 5.013746 # Average occupied blocks per requestor
384system.cpu.dtb_walker_cache.occ_percent::cpu.dtb.walker 0.313359 # Average percentage of cache occupancy
385system.cpu.dtb_walker_cache.occ_percent::total 0.313359 # Average percentage of cache occupancy
386system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 13017 # number of ReadReq hits
387system.cpu.dtb_walker_cache.ReadReq_hits::total 13017 # number of ReadReq hits
388system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 13017 # number of demand (read+write) hits
389system.cpu.dtb_walker_cache.demand_hits::total 13017 # number of demand (read+write) hits
390system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 13017 # number of overall hits
391system.cpu.dtb_walker_cache.overall_hits::total 13017 # number of overall hits
392system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8791 # number of ReadReq misses
393system.cpu.dtb_walker_cache.ReadReq_misses::total 8791 # number of ReadReq misses
394system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8791 # number of demand (read+write) misses
395system.cpu.dtb_walker_cache.demand_misses::total 8791 # number of demand (read+write) misses
396system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8791 # number of overall misses
397system.cpu.dtb_walker_cache.overall_misses::total 8791 # number of overall misses
398system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21808 # number of ReadReq accesses(hits+misses)
399system.cpu.dtb_walker_cache.ReadReq_accesses::total 21808 # number of ReadReq accesses(hits+misses)
400system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21808 # number of demand (read+write) accesses
401system.cpu.dtb_walker_cache.demand_accesses::total 21808 # number of demand (read+write) accesses
402system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21808 # number of overall (read+write) accesses
403system.cpu.dtb_walker_cache.overall_accesses::total 21808 # number of overall (read+write) accesses
404system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.403109 # miss rate for ReadReq accesses
405system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.403109 # miss rate for ReadReq accesses
406system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.403109 # miss rate for demand accesses
407system.cpu.dtb_walker_cache.demand_miss_rate::total 0.403109 # miss rate for demand accesses
408system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.403109 # miss rate for overall accesses
409system.cpu.dtb_walker_cache.overall_miss_rate::total 0.403109 # miss rate for overall accesses
410system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
411system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
412system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked
413system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked
414system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
415system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
416system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed
417system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed
418system.cpu.dtb_walker_cache.writebacks::writebacks 2556 # number of writebacks
419system.cpu.dtb_walker_cache.writebacks::total 2556 # number of writebacks
420system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
421system.cpu.dcache.replacements 1621135 # number of replacements
422system.cpu.dcache.tagsinuse 511.999456 # Cycle average of tags in use
| 383system.cpu.dtb_walker_cache.occ_blocks::cpu.dtb.walker 5.013746 # Average occupied blocks per requestor
384system.cpu.dtb_walker_cache.occ_percent::cpu.dtb.walker 0.313359 # Average percentage of cache occupancy
385system.cpu.dtb_walker_cache.occ_percent::total 0.313359 # Average percentage of cache occupancy
386system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 13017 # number of ReadReq hits
387system.cpu.dtb_walker_cache.ReadReq_hits::total 13017 # number of ReadReq hits
388system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 13017 # number of demand (read+write) hits
389system.cpu.dtb_walker_cache.demand_hits::total 13017 # number of demand (read+write) hits
390system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 13017 # number of overall hits
391system.cpu.dtb_walker_cache.overall_hits::total 13017 # number of overall hits
392system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8791 # number of ReadReq misses
393system.cpu.dtb_walker_cache.ReadReq_misses::total 8791 # number of ReadReq misses
394system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8791 # number of demand (read+write) misses
395system.cpu.dtb_walker_cache.demand_misses::total 8791 # number of demand (read+write) misses
396system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8791 # number of overall misses
397system.cpu.dtb_walker_cache.overall_misses::total 8791 # number of overall misses
398system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21808 # number of ReadReq accesses(hits+misses)
399system.cpu.dtb_walker_cache.ReadReq_accesses::total 21808 # number of ReadReq accesses(hits+misses)
400system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21808 # number of demand (read+write) accesses
401system.cpu.dtb_walker_cache.demand_accesses::total 21808 # number of demand (read+write) accesses
402system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21808 # number of overall (read+write) accesses
403system.cpu.dtb_walker_cache.overall_accesses::total 21808 # number of overall (read+write) accesses
404system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.403109 # miss rate for ReadReq accesses
405system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.403109 # miss rate for ReadReq accesses
406system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.403109 # miss rate for demand accesses
407system.cpu.dtb_walker_cache.demand_miss_rate::total 0.403109 # miss rate for demand accesses
408system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.403109 # miss rate for overall accesses
409system.cpu.dtb_walker_cache.overall_miss_rate::total 0.403109 # miss rate for overall accesses
410system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
411system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
412system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked
413system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked
414system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
415system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
416system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed
417system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed
418system.cpu.dtb_walker_cache.writebacks::writebacks 2556 # number of writebacks
419system.cpu.dtb_walker_cache.writebacks::total 2556 # number of writebacks
420system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
421system.cpu.dcache.replacements 1621135 # number of replacements
422system.cpu.dcache.tagsinuse 511.999456 # Cycle average of tags in use
|
423system.cpu.dcache.total_refs 20140429 # Total number of references to valid blocks.
| 423system.cpu.dcache.total_refs 20140431 # Total number of references to valid blocks.
|
424system.cpu.dcache.sampled_refs 1621647 # Sample count of references to valid blocks.
| 424system.cpu.dcache.sampled_refs 1621647 # Sample count of references to valid blocks.
|
425system.cpu.dcache.avg_refs 12.419737 # Average number of references to valid blocks.
| 425system.cpu.dcache.avg_refs 12.419738 # Average number of references to valid blocks.
|
426system.cpu.dcache.warmup_cycle 7549500 # Cycle when the warmup percentage was hit.
427system.cpu.dcache.occ_blocks::cpu.data 511.999456 # Average occupied blocks per requestor
428system.cpu.dcache.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy
429system.cpu.dcache.occ_percent::total 0.999999 # Average percentage of cache occupancy
430system.cpu.dcache.ReadReq_hits::cpu.data 12055941 # number of ReadReq hits
431system.cpu.dcache.ReadReq_hits::total 12055941 # number of ReadReq hits
| 426system.cpu.dcache.warmup_cycle 7549500 # Cycle when the warmup percentage was hit.
427system.cpu.dcache.occ_blocks::cpu.data 511.999456 # Average occupied blocks per requestor
428system.cpu.dcache.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy
429system.cpu.dcache.occ_percent::total 0.999999 # Average percentage of cache occupancy
430system.cpu.dcache.ReadReq_hits::cpu.data 12055941 # number of ReadReq hits
431system.cpu.dcache.ReadReq_hits::total 12055941 # number of ReadReq hits
|
432system.cpu.dcache.WriteReq_hits::cpu.data 8082226 # number of WriteReq hits
433system.cpu.dcache.WriteReq_hits::total 8082226 # number of WriteReq hits
434system.cpu.dcache.demand_hits::cpu.data 20138167 # number of demand (read+write) hits
435system.cpu.dcache.demand_hits::total 20138167 # number of demand (read+write) hits
436system.cpu.dcache.overall_hits::cpu.data 20138167 # number of overall hits
437system.cpu.dcache.overall_hits::total 20138167 # number of overall hits
| 432system.cpu.dcache.WriteReq_hits::cpu.data 8082228 # number of WriteReq hits
433system.cpu.dcache.WriteReq_hits::total 8082228 # number of WriteReq hits
434system.cpu.dcache.demand_hits::cpu.data 20138169 # number of demand (read+write) hits
435system.cpu.dcache.demand_hits::total 20138169 # number of demand (read+write) hits
436system.cpu.dcache.overall_hits::cpu.data 20138169 # number of overall hits
437system.cpu.dcache.overall_hits::total 20138169 # number of overall hits
|
438system.cpu.dcache.ReadReq_misses::cpu.data 1308091 # number of ReadReq misses
439system.cpu.dcache.ReadReq_misses::total 1308091 # number of ReadReq misses
440system.cpu.dcache.WriteReq_misses::cpu.data 315828 # number of WriteReq misses
441system.cpu.dcache.WriteReq_misses::total 315828 # number of WriteReq misses
442system.cpu.dcache.demand_misses::cpu.data 1623919 # number of demand (read+write) misses
443system.cpu.dcache.demand_misses::total 1623919 # number of demand (read+write) misses
444system.cpu.dcache.overall_misses::cpu.data 1623919 # number of overall misses
445system.cpu.dcache.overall_misses::total 1623919 # number of overall misses
446system.cpu.dcache.ReadReq_accesses::cpu.data 13364032 # number of ReadReq accesses(hits+misses)
447system.cpu.dcache.ReadReq_accesses::total 13364032 # number of ReadReq accesses(hits+misses)
| 438system.cpu.dcache.ReadReq_misses::cpu.data 1308091 # number of ReadReq misses
439system.cpu.dcache.ReadReq_misses::total 1308091 # number of ReadReq misses
440system.cpu.dcache.WriteReq_misses::cpu.data 315828 # number of WriteReq misses
441system.cpu.dcache.WriteReq_misses::total 315828 # number of WriteReq misses
442system.cpu.dcache.demand_misses::cpu.data 1623919 # number of demand (read+write) misses
443system.cpu.dcache.demand_misses::total 1623919 # number of demand (read+write) misses
444system.cpu.dcache.overall_misses::cpu.data 1623919 # number of overall misses
445system.cpu.dcache.overall_misses::total 1623919 # number of overall misses
446system.cpu.dcache.ReadReq_accesses::cpu.data 13364032 # number of ReadReq accesses(hits+misses)
447system.cpu.dcache.ReadReq_accesses::total 13364032 # number of ReadReq accesses(hits+misses)
|
448system.cpu.dcache.WriteReq_accesses::cpu.data 8398054 # number of WriteReq accesses(hits+misses)
449system.cpu.dcache.WriteReq_accesses::total 8398054 # number of WriteReq accesses(hits+misses)
450system.cpu.dcache.demand_accesses::cpu.data 21762086 # number of demand (read+write) accesses
451system.cpu.dcache.demand_accesses::total 21762086 # number of demand (read+write) accesses
452system.cpu.dcache.overall_accesses::cpu.data 21762086 # number of overall (read+write) accesses
453system.cpu.dcache.overall_accesses::total 21762086 # number of overall (read+write) accesses
| 448system.cpu.dcache.WriteReq_accesses::cpu.data 8398056 # number of WriteReq accesses(hits+misses)
449system.cpu.dcache.WriteReq_accesses::total 8398056 # number of WriteReq accesses(hits+misses)
450system.cpu.dcache.demand_accesses::cpu.data 21762088 # number of demand (read+write) accesses
451system.cpu.dcache.demand_accesses::total 21762088 # number of demand (read+write) accesses
452system.cpu.dcache.overall_accesses::cpu.data 21762088 # number of overall (read+write) accesses
453system.cpu.dcache.overall_accesses::total 21762088 # number of overall (read+write) accesses
|
454system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.097881 # miss rate for ReadReq accesses
455system.cpu.dcache.ReadReq_miss_rate::total 0.097881 # miss rate for ReadReq accesses
456system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037607 # miss rate for WriteReq accesses
457system.cpu.dcache.WriteReq_miss_rate::total 0.037607 # miss rate for WriteReq accesses
458system.cpu.dcache.demand_miss_rate::cpu.data 0.074621 # miss rate for demand accesses
459system.cpu.dcache.demand_miss_rate::total 0.074621 # miss rate for demand accesses
460system.cpu.dcache.overall_miss_rate::cpu.data 0.074621 # miss rate for overall accesses
461system.cpu.dcache.overall_miss_rate::total 0.074621 # miss rate for overall accesses
462system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
463system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
464system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
465system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
466system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
467system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
468system.cpu.dcache.fast_writes 0 # number of fast writes performed
469system.cpu.dcache.cache_copies 0 # number of cache copies performed
470system.cpu.dcache.writebacks::writebacks 1534848 # number of writebacks
471system.cpu.dcache.writebacks::total 1534848 # number of writebacks
472system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
473system.cpu.l2cache.replacements 106558 # number of replacements
| 454system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.097881 # miss rate for ReadReq accesses
455system.cpu.dcache.ReadReq_miss_rate::total 0.097881 # miss rate for ReadReq accesses
456system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037607 # miss rate for WriteReq accesses
457system.cpu.dcache.WriteReq_miss_rate::total 0.037607 # miss rate for WriteReq accesses
458system.cpu.dcache.demand_miss_rate::cpu.data 0.074621 # miss rate for demand accesses
459system.cpu.dcache.demand_miss_rate::total 0.074621 # miss rate for demand accesses
460system.cpu.dcache.overall_miss_rate::cpu.data 0.074621 # miss rate for overall accesses
461system.cpu.dcache.overall_miss_rate::total 0.074621 # miss rate for overall accesses
462system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
463system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
464system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
465system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
466system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
467system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
468system.cpu.dcache.fast_writes 0 # number of fast writes performed
469system.cpu.dcache.cache_copies 0 # number of cache copies performed
470system.cpu.dcache.writebacks::writebacks 1534848 # number of writebacks
471system.cpu.dcache.writebacks::total 1534848 # number of writebacks
472system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
473system.cpu.l2cache.replacements 106558 # number of replacements
|
474system.cpu.l2cache.tagsinuse 64822.149247 # Cycle average of tags in use
| 474system.cpu.l2cache.tagsinuse 64822.149219 # Cycle average of tags in use
|
475system.cpu.l2cache.total_refs 3456224 # Total number of references to valid blocks.
476system.cpu.l2cache.sampled_refs 170677 # Sample count of references to valid blocks.
477system.cpu.l2cache.avg_refs 20.250086 # Average number of references to valid blocks.
478system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
| 475system.cpu.l2cache.total_refs 3456224 # Total number of references to valid blocks.
476system.cpu.l2cache.sampled_refs 170677 # Sample count of references to valid blocks.
477system.cpu.l2cache.avg_refs 20.250086 # Average number of references to valid blocks.
478system.cpu.l2cache.warmup_cycle 0 # Cycle when the warmup percentage was hit.
|
479system.cpu.l2cache.occ_blocks::writebacks 51981.453140 # Average occupied blocks per requestor
| 479system.cpu.l2cache.occ_blocks::writebacks 51981.453118 # Average occupied blocks per requestor
|
480system.cpu.l2cache.occ_blocks::cpu.dtb.walker 0.004954 # Average occupied blocks per requestor
481system.cpu.l2cache.occ_blocks::cpu.itb.walker 0.132114 # Average occupied blocks per requestor
| 480system.cpu.l2cache.occ_blocks::cpu.dtb.walker 0.004954 # Average occupied blocks per requestor
481system.cpu.l2cache.occ_blocks::cpu.itb.walker 0.132114 # Average occupied blocks per requestor
|
482system.cpu.l2cache.occ_blocks::cpu.inst 2434.994083 # Average occupied blocks per requestor
483system.cpu.l2cache.occ_blocks::cpu.data 10405.564957 # Average occupied blocks per requestor
| 482system.cpu.l2cache.occ_blocks::cpu.inst 2434.994082 # Average occupied blocks per requestor
483system.cpu.l2cache.occ_blocks::cpu.data 10405.564951 # Average occupied blocks per requestor
|
484system.cpu.l2cache.occ_percent::writebacks 0.793174 # Average percentage of cache occupancy
485system.cpu.l2cache.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy
486system.cpu.l2cache.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy
487system.cpu.l2cache.occ_percent::cpu.inst 0.037155 # Average percentage of cache occupancy
488system.cpu.l2cache.occ_percent::cpu.data 0.158776 # Average percentage of cache occupancy
489system.cpu.l2cache.occ_percent::total 0.989108 # Average percentage of cache occupancy
490system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6578 # number of ReadReq hits
491system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2700 # number of ReadReq hits
492system.cpu.l2cache.ReadReq_hits::cpu.inst 777896 # number of ReadReq hits
493system.cpu.l2cache.ReadReq_hits::cpu.data 1275281 # number of ReadReq hits
494system.cpu.l2cache.ReadReq_hits::total 2062455 # number of ReadReq hits
495system.cpu.l2cache.Writeback_hits::writebacks 1537997 # number of Writeback hits
496system.cpu.l2cache.Writeback_hits::total 1537997 # number of Writeback hits
497system.cpu.l2cache.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits
498system.cpu.l2cache.UpgradeReq_hits::total 28 # number of UpgradeReq hits
499system.cpu.l2cache.ReadExReq_hits::cpu.data 179183 # number of ReadExReq hits
500system.cpu.l2cache.ReadExReq_hits::total 179183 # number of ReadExReq hits
501system.cpu.l2cache.demand_hits::cpu.dtb.walker 6578 # number of demand (read+write) hits
502system.cpu.l2cache.demand_hits::cpu.itb.walker 2700 # number of demand (read+write) hits
503system.cpu.l2cache.demand_hits::cpu.inst 777896 # number of demand (read+write) hits
504system.cpu.l2cache.demand_hits::cpu.data 1454464 # number of demand (read+write) hits
505system.cpu.l2cache.demand_hits::total 2241638 # number of demand (read+write) hits
506system.cpu.l2cache.overall_hits::cpu.dtb.walker 6578 # number of overall hits
507system.cpu.l2cache.overall_hits::cpu.itb.walker 2700 # number of overall hits
508system.cpu.l2cache.overall_hits::cpu.inst 777896 # number of overall hits
509system.cpu.l2cache.overall_hits::cpu.data 1454464 # number of overall hits
510system.cpu.l2cache.overall_hits::total 2241638 # number of overall hits
511system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 2 # number of ReadReq misses
512system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 5 # number of ReadReq misses
513system.cpu.l2cache.ReadReq_misses::cpu.inst 13342 # number of ReadReq misses
514system.cpu.l2cache.ReadReq_misses::cpu.data 32182 # number of ReadReq misses
515system.cpu.l2cache.ReadReq_misses::total 45531 # number of ReadReq misses
516system.cpu.l2cache.UpgradeReq_misses::cpu.data 1796 # number of UpgradeReq misses
517system.cpu.l2cache.UpgradeReq_misses::total 1796 # number of UpgradeReq misses
518system.cpu.l2cache.ReadExReq_misses::cpu.data 134378 # number of ReadExReq misses
519system.cpu.l2cache.ReadExReq_misses::total 134378 # number of ReadExReq misses
520system.cpu.l2cache.demand_misses::cpu.dtb.walker 2 # number of demand (read+write) misses
521system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses
522system.cpu.l2cache.demand_misses::cpu.inst 13342 # number of demand (read+write) misses
523system.cpu.l2cache.demand_misses::cpu.data 166560 # number of demand (read+write) misses
524system.cpu.l2cache.demand_misses::total 179909 # number of demand (read+write) misses
525system.cpu.l2cache.overall_misses::cpu.dtb.walker 2 # number of overall misses
526system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses
527system.cpu.l2cache.overall_misses::cpu.inst 13342 # number of overall misses
528system.cpu.l2cache.overall_misses::cpu.data 166560 # number of overall misses
529system.cpu.l2cache.overall_misses::total 179909 # number of overall misses
530system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 6580 # number of ReadReq accesses(hits+misses)
531system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 2705 # number of ReadReq accesses(hits+misses)
532system.cpu.l2cache.ReadReq_accesses::cpu.inst 791238 # number of ReadReq accesses(hits+misses)
533system.cpu.l2cache.ReadReq_accesses::cpu.data 1307463 # number of ReadReq accesses(hits+misses)
534system.cpu.l2cache.ReadReq_accesses::total 2107986 # number of ReadReq accesses(hits+misses)
535system.cpu.l2cache.Writeback_accesses::writebacks 1537997 # number of Writeback accesses(hits+misses)
536system.cpu.l2cache.Writeback_accesses::total 1537997 # number of Writeback accesses(hits+misses)
537system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1824 # number of UpgradeReq accesses(hits+misses)
538system.cpu.l2cache.UpgradeReq_accesses::total 1824 # number of UpgradeReq accesses(hits+misses)
539system.cpu.l2cache.ReadExReq_accesses::cpu.data 313561 # number of ReadExReq accesses(hits+misses)
540system.cpu.l2cache.ReadExReq_accesses::total 313561 # number of ReadExReq accesses(hits+misses)
541system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6580 # number of demand (read+write) accesses
542system.cpu.l2cache.demand_accesses::cpu.itb.walker 2705 # number of demand (read+write) accesses
543system.cpu.l2cache.demand_accesses::cpu.inst 791238 # number of demand (read+write) accesses
544system.cpu.l2cache.demand_accesses::cpu.data 1621024 # number of demand (read+write) accesses
545system.cpu.l2cache.demand_accesses::total 2421547 # number of demand (read+write) accesses
546system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6580 # number of overall (read+write) accesses
547system.cpu.l2cache.overall_accesses::cpu.itb.walker 2705 # number of overall (read+write) accesses
548system.cpu.l2cache.overall_accesses::cpu.inst 791238 # number of overall (read+write) accesses
549system.cpu.l2cache.overall_accesses::cpu.data 1621024 # number of overall (read+write) accesses
550system.cpu.l2cache.overall_accesses::total 2421547 # number of overall (read+write) accesses
551system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000304 # miss rate for ReadReq accesses
552system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.001848 # miss rate for ReadReq accesses
553system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.016862 # miss rate for ReadReq accesses
554system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.024614 # miss rate for ReadReq accesses
555system.cpu.l2cache.ReadReq_miss_rate::total 0.021599 # miss rate for ReadReq accesses
556system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.984649 # miss rate for UpgradeReq accesses
557system.cpu.l2cache.UpgradeReq_miss_rate::total 0.984649 # miss rate for UpgradeReq accesses
558system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428555 # miss rate for ReadExReq accesses
559system.cpu.l2cache.ReadExReq_miss_rate::total 0.428555 # miss rate for ReadExReq accesses
560system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000304 # miss rate for demand accesses
561system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001848 # miss rate for demand accesses
562system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016862 # miss rate for demand accesses
563system.cpu.l2cache.demand_miss_rate::cpu.data 0.102750 # miss rate for demand accesses
564system.cpu.l2cache.demand_miss_rate::total 0.074295 # miss rate for demand accesses
565system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000304 # miss rate for overall accesses
566system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001848 # miss rate for overall accesses
567system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016862 # miss rate for overall accesses
568system.cpu.l2cache.overall_miss_rate::cpu.data 0.102750 # miss rate for overall accesses
569system.cpu.l2cache.overall_miss_rate::total 0.074295 # miss rate for overall accesses
570system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
571system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
572system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
573system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
574system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
575system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
576system.cpu.l2cache.fast_writes 0 # number of fast writes performed
577system.cpu.l2cache.cache_copies 0 # number of cache copies performed
578system.cpu.l2cache.writebacks::writebacks 98530 # number of writebacks
579system.cpu.l2cache.writebacks::total 98530 # number of writebacks
580system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
581
582---------- End Simulation Statistics ----------
| 484system.cpu.l2cache.occ_percent::writebacks 0.793174 # Average percentage of cache occupancy
485system.cpu.l2cache.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy
486system.cpu.l2cache.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy
487system.cpu.l2cache.occ_percent::cpu.inst 0.037155 # Average percentage of cache occupancy
488system.cpu.l2cache.occ_percent::cpu.data 0.158776 # Average percentage of cache occupancy
489system.cpu.l2cache.occ_percent::total 0.989108 # Average percentage of cache occupancy
490system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 6578 # number of ReadReq hits
491system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 2700 # number of ReadReq hits
492system.cpu.l2cache.ReadReq_hits::cpu.inst 777896 # number of ReadReq hits
493system.cpu.l2cache.ReadReq_hits::cpu.data 1275281 # number of ReadReq hits
494system.cpu.l2cache.ReadReq_hits::total 2062455 # number of ReadReq hits
495system.cpu.l2cache.Writeback_hits::writebacks 1537997 # number of Writeback hits
496system.cpu.l2cache.Writeback_hits::total 1537997 # number of Writeback hits
497system.cpu.l2cache.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits
498system.cpu.l2cache.UpgradeReq_hits::total 28 # number of UpgradeReq hits
499system.cpu.l2cache.ReadExReq_hits::cpu.data 179183 # number of ReadExReq hits
500system.cpu.l2cache.ReadExReq_hits::total 179183 # number of ReadExReq hits
501system.cpu.l2cache.demand_hits::cpu.dtb.walker 6578 # number of demand (read+write) hits
502system.cpu.l2cache.demand_hits::cpu.itb.walker 2700 # number of demand (read+write) hits
503system.cpu.l2cache.demand_hits::cpu.inst 777896 # number of demand (read+write) hits
504system.cpu.l2cache.demand_hits::cpu.data 1454464 # number of demand (read+write) hits
505system.cpu.l2cache.demand_hits::total 2241638 # number of demand (read+write) hits
506system.cpu.l2cache.overall_hits::cpu.dtb.walker 6578 # number of overall hits
507system.cpu.l2cache.overall_hits::cpu.itb.walker 2700 # number of overall hits
508system.cpu.l2cache.overall_hits::cpu.inst 777896 # number of overall hits
509system.cpu.l2cache.overall_hits::cpu.data 1454464 # number of overall hits
510system.cpu.l2cache.overall_hits::total 2241638 # number of overall hits
511system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 2 # number of ReadReq misses
512system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 5 # number of ReadReq misses
513system.cpu.l2cache.ReadReq_misses::cpu.inst 13342 # number of ReadReq misses
514system.cpu.l2cache.ReadReq_misses::cpu.data 32182 # number of ReadReq misses
515system.cpu.l2cache.ReadReq_misses::total 45531 # number of ReadReq misses
516system.cpu.l2cache.UpgradeReq_misses::cpu.data 1796 # number of UpgradeReq misses
517system.cpu.l2cache.UpgradeReq_misses::total 1796 # number of UpgradeReq misses
518system.cpu.l2cache.ReadExReq_misses::cpu.data 134378 # number of ReadExReq misses
519system.cpu.l2cache.ReadExReq_misses::total 134378 # number of ReadExReq misses
520system.cpu.l2cache.demand_misses::cpu.dtb.walker 2 # number of demand (read+write) misses
521system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses
522system.cpu.l2cache.demand_misses::cpu.inst 13342 # number of demand (read+write) misses
523system.cpu.l2cache.demand_misses::cpu.data 166560 # number of demand (read+write) misses
524system.cpu.l2cache.demand_misses::total 179909 # number of demand (read+write) misses
525system.cpu.l2cache.overall_misses::cpu.dtb.walker 2 # number of overall misses
526system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses
527system.cpu.l2cache.overall_misses::cpu.inst 13342 # number of overall misses
528system.cpu.l2cache.overall_misses::cpu.data 166560 # number of overall misses
529system.cpu.l2cache.overall_misses::total 179909 # number of overall misses
530system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 6580 # number of ReadReq accesses(hits+misses)
531system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 2705 # number of ReadReq accesses(hits+misses)
532system.cpu.l2cache.ReadReq_accesses::cpu.inst 791238 # number of ReadReq accesses(hits+misses)
533system.cpu.l2cache.ReadReq_accesses::cpu.data 1307463 # number of ReadReq accesses(hits+misses)
534system.cpu.l2cache.ReadReq_accesses::total 2107986 # number of ReadReq accesses(hits+misses)
535system.cpu.l2cache.Writeback_accesses::writebacks 1537997 # number of Writeback accesses(hits+misses)
536system.cpu.l2cache.Writeback_accesses::total 1537997 # number of Writeback accesses(hits+misses)
537system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1824 # number of UpgradeReq accesses(hits+misses)
538system.cpu.l2cache.UpgradeReq_accesses::total 1824 # number of UpgradeReq accesses(hits+misses)
539system.cpu.l2cache.ReadExReq_accesses::cpu.data 313561 # number of ReadExReq accesses(hits+misses)
540system.cpu.l2cache.ReadExReq_accesses::total 313561 # number of ReadExReq accesses(hits+misses)
541system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6580 # number of demand (read+write) accesses
542system.cpu.l2cache.demand_accesses::cpu.itb.walker 2705 # number of demand (read+write) accesses
543system.cpu.l2cache.demand_accesses::cpu.inst 791238 # number of demand (read+write) accesses
544system.cpu.l2cache.demand_accesses::cpu.data 1621024 # number of demand (read+write) accesses
545system.cpu.l2cache.demand_accesses::total 2421547 # number of demand (read+write) accesses
546system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6580 # number of overall (read+write) accesses
547system.cpu.l2cache.overall_accesses::cpu.itb.walker 2705 # number of overall (read+write) accesses
548system.cpu.l2cache.overall_accesses::cpu.inst 791238 # number of overall (read+write) accesses
549system.cpu.l2cache.overall_accesses::cpu.data 1621024 # number of overall (read+write) accesses
550system.cpu.l2cache.overall_accesses::total 2421547 # number of overall (read+write) accesses
551system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000304 # miss rate for ReadReq accesses
552system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.001848 # miss rate for ReadReq accesses
553system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.016862 # miss rate for ReadReq accesses
554system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.024614 # miss rate for ReadReq accesses
555system.cpu.l2cache.ReadReq_miss_rate::total 0.021599 # miss rate for ReadReq accesses
556system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.984649 # miss rate for UpgradeReq accesses
557system.cpu.l2cache.UpgradeReq_miss_rate::total 0.984649 # miss rate for UpgradeReq accesses
558system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428555 # miss rate for ReadExReq accesses
559system.cpu.l2cache.ReadExReq_miss_rate::total 0.428555 # miss rate for ReadExReq accesses
560system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000304 # miss rate for demand accesses
561system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001848 # miss rate for demand accesses
562system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016862 # miss rate for demand accesses
563system.cpu.l2cache.demand_miss_rate::cpu.data 0.102750 # miss rate for demand accesses
564system.cpu.l2cache.demand_miss_rate::total 0.074295 # miss rate for demand accesses
565system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000304 # miss rate for overall accesses
566system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001848 # miss rate for overall accesses
567system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016862 # miss rate for overall accesses
568system.cpu.l2cache.overall_miss_rate::cpu.data 0.102750 # miss rate for overall accesses
569system.cpu.l2cache.overall_miss_rate::total 0.074295 # miss rate for overall accesses
570system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
571system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
572system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
573system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
574system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
575system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
576system.cpu.l2cache.fast_writes 0 # number of fast writes performed
577system.cpu.l2cache.cache_copies 0 # number of cache copies performed
578system.cpu.l2cache.writebacks::writebacks 98530 # number of writebacks
579system.cpu.l2cache.writebacks::total 98530 # number of writebacks
580system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
581
582---------- End Simulation Statistics ----------
|