Cross Reference: /gem5/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt

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stats.txt (11336:b318499f676c)	stats.txt (11456:c0fb4435b80f)
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112152 # Number of seconds simulated 4sim_ticks 5112151729000 # Number of ticks simulated 5final_tick 5112151729000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks	1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 5.112152 # Number of seconds simulated 4sim_ticks 5112151729000 # Number of ticks simulated 5final_tick 5112151729000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 1266983 # Simulator instruction rate (inst/s) 8host_op_rate 2593792 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 32374197845 # Simulator tick rate (ticks/s) 10host_mem_usage 659352 # Number of bytes of host memory used 11host_seconds 157.91 # Real time elapsed on the host	7host_inst_rate 1369712 # Simulator instruction rate (inst/s) 8host_op_rate 2804100 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 34999130987 # Simulator tick rate (ticks/s) 10host_mem_usage 614748 # Number of bytes of host memory used 11host_seconds 146.07 # Real time elapsed on the host
12sim_insts 200067055 # Number of instructions simulated 13sim_ops 409581065 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.inst 846912 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10615104 # Number of bytes read from this memory 20system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory 21system.physmem.bytes_read::total 11490752 # Number of bytes read from this memory 22system.physmem.bytes_inst_read::cpu.inst 846912 # Number of instructions bytes read from this memory 23system.physmem.bytes_inst_read::total 846912 # Number of instructions bytes read from this memory 24system.physmem.bytes_written::writebacks 9269888 # Number of bytes written to this memory 25system.physmem.bytes_written::total 9269888 # Number of bytes written to this memory 26system.physmem.num_reads::cpu.dtb.walker 1 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory 28system.physmem.num_reads::cpu.inst 13233 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 165861 # Number of read requests responded to by this memory 30system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory 31system.physmem.num_reads::total 179543 # Number of read requests responded to by this memory 32system.physmem.num_writes::writebacks 144842 # Number of write requests responded to by this memory 33system.physmem.num_writes::total 144842 # Number of write requests responded to by this memory 34system.physmem.bw_read::cpu.dtb.walker 13 # Total read bandwidth from this memory (bytes/s) 35system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu.inst 165666 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu.data 2076445 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::pc.south_bridge.ide 5546 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::total 2247733 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 165666 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 165666 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1813305 # Write bandwidth from this memory (bytes/s) 43system.physmem.bw_write::total 1813305 # Write bandwidth from this memory (bytes/s) 44system.physmem.bw_total::writebacks 1813305 # Total bandwidth to/from this memory (bytes/s) 45system.physmem.bw_total::cpu.dtb.walker 13 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu.inst 165666 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.data 2076445 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::pc.south_bridge.ide 5546 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::total 4061038 # Total bandwidth to/from this memory (bytes/s) 51system.cpu_clk_domain.clock 500 # Clock period in ticks 52system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 53system.cpu.numCycles 10224307424 # number of cpu cycles simulated 54system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 55system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 56system.cpu.kern.inst.arm 0 # number of arm instructions executed 57system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 58system.cpu.committedInsts 200067055 # Number of instructions committed 59system.cpu.committedOps 409581065 # Number of ops (including micro ops) committed 60system.cpu.num_int_alu_accesses 374584177 # Number of integer alu accesses 61system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses 62system.cpu.num_func_calls 2308905 # number of times a function call or return occured 63system.cpu.num_conditional_control_insts 40001120 # number of instructions that are conditional controls 64system.cpu.num_int_insts 374584177 # number of integer instructions 65system.cpu.num_fp_insts 48 # number of float instructions 66system.cpu.num_int_register_reads 682690924 # number of times the integer registers were read 67system.cpu.num_int_register_writes 323558192 # number of times the integer registers were written 68system.cpu.num_fp_register_reads 48 # number of times the floating registers were read 69system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 70system.cpu.num_cc_register_reads 233837631 # number of times the CC registers were read 71system.cpu.num_cc_register_writes 157316591 # number of times the CC registers were written 72system.cpu.num_mem_refs 35667176 # number of memory refs 73system.cpu.num_load_insts 27243343 # Number of load instructions 74system.cpu.num_store_insts 8423833 # Number of store instructions 75system.cpu.num_idle_cycles 9770322790.617842 # Number of idle cycles 76system.cpu.num_busy_cycles 453984633.382158 # Number of busy cycles 77system.cpu.not_idle_fraction 0.044402 # Percentage of non-idle cycles 78system.cpu.idle_fraction 0.955598 # Percentage of idle cycles 79system.cpu.Branches 43152262 # Number of branches fetched 80system.cpu.op_class::No_OpClass 172765 0.04% 0.04% # Class of executed instruction 81system.cpu.op_class::IntAlu 373477070 91.18% 91.23% # Class of executed instruction 82system.cpu.op_class::IntMult 144574 0.04% 91.26% # Class of executed instruction 83system.cpu.op_class::IntDiv 123086 0.03% 91.29% # Class of executed instruction 84system.cpu.op_class::FloatAdd 0 0.00% 91.29% # Class of executed instruction 85system.cpu.op_class::FloatCmp 0 0.00% 91.29% # Class of executed instruction 86system.cpu.op_class::FloatCvt 16 0.00% 91.29% # Class of executed instruction 87system.cpu.op_class::FloatMult 0 0.00% 91.29% # Class of executed instruction 88system.cpu.op_class::FloatDiv 0 0.00% 91.29% # Class of executed instruction 89system.cpu.op_class::FloatSqrt 0 0.00% 91.29% # Class of executed instruction 90system.cpu.op_class::SimdAdd 0 0.00% 91.29% # Class of executed instruction 91system.cpu.op_class::SimdAddAcc 0 0.00% 91.29% # Class of executed instruction 92system.cpu.op_class::SimdAlu 0 0.00% 91.29% # Class of executed instruction 93system.cpu.op_class::SimdCmp 0 0.00% 91.29% # Class of executed instruction 94system.cpu.op_class::SimdCvt 0 0.00% 91.29% # Class of executed instruction 95system.cpu.op_class::SimdMisc 0 0.00% 91.29% # Class of executed instruction 96system.cpu.op_class::SimdMult 0 0.00% 91.29% # Class of executed instruction 97system.cpu.op_class::SimdMultAcc 0 0.00% 91.29% # Class of executed instruction 98system.cpu.op_class::SimdShift 0 0.00% 91.29% # Class of executed instruction 99system.cpu.op_class::SimdShiftAcc 0 0.00% 91.29% # Class of executed instruction 100system.cpu.op_class::SimdSqrt 0 0.00% 91.29% # Class of executed instruction 101system.cpu.op_class::SimdFloatAdd 0 0.00% 91.29% # Class of executed instruction 102system.cpu.op_class::SimdFloatAlu 0 0.00% 91.29% # Class of executed instruction 103system.cpu.op_class::SimdFloatCmp 0 0.00% 91.29% # Class of executed instruction 104system.cpu.op_class::SimdFloatCvt 0 0.00% 91.29% # Class of executed instruction 105system.cpu.op_class::SimdFloatDiv 0 0.00% 91.29% # Class of executed instruction 106system.cpu.op_class::SimdFloatMisc 0 0.00% 91.29% # Class of executed instruction 107system.cpu.op_class::SimdFloatMult 0 0.00% 91.29% # Class of executed instruction 108system.cpu.op_class::SimdFloatMultAcc 0 0.00% 91.29% # Class of executed instruction 109system.cpu.op_class::SimdFloatSqrt 0 0.00% 91.29% # Class of executed instruction 110system.cpu.op_class::MemRead 27240752 6.65% 97.94% # Class of executed instruction 111system.cpu.op_class::MemWrite 8423833 2.06% 100.00% # Class of executed instruction 112system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 113system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 114system.cpu.op_class::total 409582096 # Class of executed instruction 115system.cpu.dcache.tags.replacements 1621909 # number of replacements 116system.cpu.dcache.tags.tagsinuse 511.999425 # Cycle average of tags in use 117system.cpu.dcache.tags.total_refs 20181333 # Total number of references to valid blocks. 118system.cpu.dcache.tags.sampled_refs 1622421 # Sample count of references to valid blocks. 119system.cpu.dcache.tags.avg_refs 12.439024 # Average number of references to valid blocks. 120system.cpu.dcache.tags.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. 121system.cpu.dcache.tags.occ_blocks::cpu.data 511.999425 # Average occupied blocks per requestor 122system.cpu.dcache.tags.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy 123system.cpu.dcache.tags.occ_percent::total 0.999999 # Average percentage of cache occupancy 124system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 125system.cpu.dcache.tags.age_task_id_blocks_1024::0 282 # Occupied blocks per task id 126system.cpu.dcache.tags.age_task_id_blocks_1024::1 202 # Occupied blocks per task id 127system.cpu.dcache.tags.age_task_id_blocks_1024::2 28 # Occupied blocks per task id 128system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 129system.cpu.dcache.tags.tag_accesses 88837527 # Number of tag accesses 130system.cpu.dcache.tags.data_accesses 88837527 # Number of data accesses 131system.cpu.dcache.ReadReq_hits::cpu.data 12023410 # number of ReadReq hits 132system.cpu.dcache.ReadReq_hits::total 12023410 # number of ReadReq hits 133system.cpu.dcache.WriteReq_hits::cpu.data 8096819 # number of WriteReq hits 134system.cpu.dcache.WriteReq_hits::total 8096819 # number of WriteReq hits 135system.cpu.dcache.SoftPFReq_hits::cpu.data 58904 # number of SoftPFReq hits 136system.cpu.dcache.SoftPFReq_hits::total 58904 # number of SoftPFReq hits 137system.cpu.dcache.demand_hits::cpu.data 20120229 # number of demand (read+write) hits 138system.cpu.dcache.demand_hits::total 20120229 # number of demand (read+write) hits 139system.cpu.dcache.overall_hits::cpu.data 20179133 # number of overall hits 140system.cpu.dcache.overall_hits::total 20179133 # number of overall hits 141system.cpu.dcache.ReadReq_misses::cpu.data 905268 # number of ReadReq misses 142system.cpu.dcache.ReadReq_misses::total 905268 # number of ReadReq misses 143system.cpu.dcache.WriteReq_misses::cpu.data 316618 # number of WriteReq misses 144system.cpu.dcache.WriteReq_misses::total 316618 # number of WriteReq misses 145system.cpu.dcache.SoftPFReq_misses::cpu.data 402753 # number of SoftPFReq misses 146system.cpu.dcache.SoftPFReq_misses::total 402753 # number of SoftPFReq misses 147system.cpu.dcache.demand_misses::cpu.data 1221886 # number of demand (read+write) misses 148system.cpu.dcache.demand_misses::total 1221886 # number of demand (read+write) misses 149system.cpu.dcache.overall_misses::cpu.data 1624639 # number of overall misses 150system.cpu.dcache.overall_misses::total 1624639 # number of overall misses 151system.cpu.dcache.ReadReq_accesses::cpu.data 12928678 # number of ReadReq accesses(hits+misses) 152system.cpu.dcache.ReadReq_accesses::total 12928678 # number of ReadReq accesses(hits+misses) 153system.cpu.dcache.WriteReq_accesses::cpu.data 8413437 # number of WriteReq accesses(hits+misses) 154system.cpu.dcache.WriteReq_accesses::total 8413437 # number of WriteReq accesses(hits+misses) 155system.cpu.dcache.SoftPFReq_accesses::cpu.data 461657 # number of SoftPFReq accesses(hits+misses) 156system.cpu.dcache.SoftPFReq_accesses::total 461657 # number of SoftPFReq accesses(hits+misses) 157system.cpu.dcache.demand_accesses::cpu.data 21342115 # number of demand (read+write) accesses 158system.cpu.dcache.demand_accesses::total 21342115 # number of demand (read+write) accesses 159system.cpu.dcache.overall_accesses::cpu.data 21803772 # number of overall (read+write) accesses 160system.cpu.dcache.overall_accesses::total 21803772 # number of overall (read+write) accesses 161system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070020 # miss rate for ReadReq accesses 162system.cpu.dcache.ReadReq_miss_rate::total 0.070020 # miss rate for ReadReq accesses 163system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037632 # miss rate for WriteReq accesses 164system.cpu.dcache.WriteReq_miss_rate::total 0.037632 # miss rate for WriteReq accesses 165system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872407 # miss rate for SoftPFReq accesses 166system.cpu.dcache.SoftPFReq_miss_rate::total 0.872407 # miss rate for SoftPFReq accesses 167system.cpu.dcache.demand_miss_rate::cpu.data 0.057252 # miss rate for demand accesses 168system.cpu.dcache.demand_miss_rate::total 0.057252 # miss rate for demand accesses 169system.cpu.dcache.overall_miss_rate::cpu.data 0.074512 # miss rate for overall accesses 170system.cpu.dcache.overall_miss_rate::total 0.074512 # miss rate for overall accesses 171system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 172system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 173system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 174system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 175system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 176system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked	12sim_insts 200067055 # Number of instructions simulated 13sim_ops 409581065 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 320 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.inst 846912 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10615104 # Number of bytes read from this memory 20system.physmem.bytes_read::pc.south_bridge.ide 28352 # Number of bytes read from this memory 21system.physmem.bytes_read::total 11490752 # Number of bytes read from this memory 22system.physmem.bytes_inst_read::cpu.inst 846912 # Number of instructions bytes read from this memory 23system.physmem.bytes_inst_read::total 846912 # Number of instructions bytes read from this memory 24system.physmem.bytes_written::writebacks 9269888 # Number of bytes written to this memory 25system.physmem.bytes_written::total 9269888 # Number of bytes written to this memory 26system.physmem.num_reads::cpu.dtb.walker 1 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory 28system.physmem.num_reads::cpu.inst 13233 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 165861 # Number of read requests responded to by this memory 30system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory 31system.physmem.num_reads::total 179543 # Number of read requests responded to by this memory 32system.physmem.num_writes::writebacks 144842 # Number of write requests responded to by this memory 33system.physmem.num_writes::total 144842 # Number of write requests responded to by this memory 34system.physmem.bw_read::cpu.dtb.walker 13 # Total read bandwidth from this memory (bytes/s) 35system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu.inst 165666 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu.data 2076445 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::pc.south_bridge.ide 5546 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::total 2247733 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 165666 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 165666 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1813305 # Write bandwidth from this memory (bytes/s) 43system.physmem.bw_write::total 1813305 # Write bandwidth from this memory (bytes/s) 44system.physmem.bw_total::writebacks 1813305 # Total bandwidth to/from this memory (bytes/s) 45system.physmem.bw_total::cpu.dtb.walker 13 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu.inst 165666 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.data 2076445 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::pc.south_bridge.ide 5546 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::total 4061038 # Total bandwidth to/from this memory (bytes/s) 51system.cpu_clk_domain.clock 500 # Clock period in ticks 52system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks 53system.cpu.numCycles 10224307424 # number of cpu cycles simulated 54system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 55system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 56system.cpu.kern.inst.arm 0 # number of arm instructions executed 57system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed 58system.cpu.committedInsts 200067055 # Number of instructions committed 59system.cpu.committedOps 409581065 # Number of ops (including micro ops) committed 60system.cpu.num_int_alu_accesses 374584177 # Number of integer alu accesses 61system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses 62system.cpu.num_func_calls 2308905 # number of times a function call or return occured 63system.cpu.num_conditional_control_insts 40001120 # number of instructions that are conditional controls 64system.cpu.num_int_insts 374584177 # number of integer instructions 65system.cpu.num_fp_insts 48 # number of float instructions 66system.cpu.num_int_register_reads 682690924 # number of times the integer registers were read 67system.cpu.num_int_register_writes 323558192 # number of times the integer registers were written 68system.cpu.num_fp_register_reads 48 # number of times the floating registers were read 69system.cpu.num_fp_register_writes 0 # number of times the floating registers were written 70system.cpu.num_cc_register_reads 233837631 # number of times the CC registers were read 71system.cpu.num_cc_register_writes 157316591 # number of times the CC registers were written 72system.cpu.num_mem_refs 35667176 # number of memory refs 73system.cpu.num_load_insts 27243343 # Number of load instructions 74system.cpu.num_store_insts 8423833 # Number of store instructions 75system.cpu.num_idle_cycles 9770322790.617842 # Number of idle cycles 76system.cpu.num_busy_cycles 453984633.382158 # Number of busy cycles 77system.cpu.not_idle_fraction 0.044402 # Percentage of non-idle cycles 78system.cpu.idle_fraction 0.955598 # Percentage of idle cycles 79system.cpu.Branches 43152262 # Number of branches fetched 80system.cpu.op_class::No_OpClass 172765 0.04% 0.04% # Class of executed instruction 81system.cpu.op_class::IntAlu 373477070 91.18% 91.23% # Class of executed instruction 82system.cpu.op_class::IntMult 144574 0.04% 91.26% # Class of executed instruction 83system.cpu.op_class::IntDiv 123086 0.03% 91.29% # Class of executed instruction 84system.cpu.op_class::FloatAdd 0 0.00% 91.29% # Class of executed instruction 85system.cpu.op_class::FloatCmp 0 0.00% 91.29% # Class of executed instruction 86system.cpu.op_class::FloatCvt 16 0.00% 91.29% # Class of executed instruction 87system.cpu.op_class::FloatMult 0 0.00% 91.29% # Class of executed instruction 88system.cpu.op_class::FloatDiv 0 0.00% 91.29% # Class of executed instruction 89system.cpu.op_class::FloatSqrt 0 0.00% 91.29% # Class of executed instruction 90system.cpu.op_class::SimdAdd 0 0.00% 91.29% # Class of executed instruction 91system.cpu.op_class::SimdAddAcc 0 0.00% 91.29% # Class of executed instruction 92system.cpu.op_class::SimdAlu 0 0.00% 91.29% # Class of executed instruction 93system.cpu.op_class::SimdCmp 0 0.00% 91.29% # Class of executed instruction 94system.cpu.op_class::SimdCvt 0 0.00% 91.29% # Class of executed instruction 95system.cpu.op_class::SimdMisc 0 0.00% 91.29% # Class of executed instruction 96system.cpu.op_class::SimdMult 0 0.00% 91.29% # Class of executed instruction 97system.cpu.op_class::SimdMultAcc 0 0.00% 91.29% # Class of executed instruction 98system.cpu.op_class::SimdShift 0 0.00% 91.29% # Class of executed instruction 99system.cpu.op_class::SimdShiftAcc 0 0.00% 91.29% # Class of executed instruction 100system.cpu.op_class::SimdSqrt 0 0.00% 91.29% # Class of executed instruction 101system.cpu.op_class::SimdFloatAdd 0 0.00% 91.29% # Class of executed instruction 102system.cpu.op_class::SimdFloatAlu 0 0.00% 91.29% # Class of executed instruction 103system.cpu.op_class::SimdFloatCmp 0 0.00% 91.29% # Class of executed instruction 104system.cpu.op_class::SimdFloatCvt 0 0.00% 91.29% # Class of executed instruction 105system.cpu.op_class::SimdFloatDiv 0 0.00% 91.29% # Class of executed instruction 106system.cpu.op_class::SimdFloatMisc 0 0.00% 91.29% # Class of executed instruction 107system.cpu.op_class::SimdFloatMult 0 0.00% 91.29% # Class of executed instruction 108system.cpu.op_class::SimdFloatMultAcc 0 0.00% 91.29% # Class of executed instruction 109system.cpu.op_class::SimdFloatSqrt 0 0.00% 91.29% # Class of executed instruction 110system.cpu.op_class::MemRead 27240752 6.65% 97.94% # Class of executed instruction 111system.cpu.op_class::MemWrite 8423833 2.06% 100.00% # Class of executed instruction 112system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 113system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 114system.cpu.op_class::total 409582096 # Class of executed instruction 115system.cpu.dcache.tags.replacements 1621909 # number of replacements 116system.cpu.dcache.tags.tagsinuse 511.999425 # Cycle average of tags in use 117system.cpu.dcache.tags.total_refs 20181333 # Total number of references to valid blocks. 118system.cpu.dcache.tags.sampled_refs 1622421 # Sample count of references to valid blocks. 119system.cpu.dcache.tags.avg_refs 12.439024 # Average number of references to valid blocks. 120system.cpu.dcache.tags.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. 121system.cpu.dcache.tags.occ_blocks::cpu.data 511.999425 # Average occupied blocks per requestor 122system.cpu.dcache.tags.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy 123system.cpu.dcache.tags.occ_percent::total 0.999999 # Average percentage of cache occupancy 124system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 125system.cpu.dcache.tags.age_task_id_blocks_1024::0 282 # Occupied blocks per task id 126system.cpu.dcache.tags.age_task_id_blocks_1024::1 202 # Occupied blocks per task id 127system.cpu.dcache.tags.age_task_id_blocks_1024::2 28 # Occupied blocks per task id 128system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 129system.cpu.dcache.tags.tag_accesses 88837527 # Number of tag accesses 130system.cpu.dcache.tags.data_accesses 88837527 # Number of data accesses 131system.cpu.dcache.ReadReq_hits::cpu.data 12023410 # number of ReadReq hits 132system.cpu.dcache.ReadReq_hits::total 12023410 # number of ReadReq hits 133system.cpu.dcache.WriteReq_hits::cpu.data 8096819 # number of WriteReq hits 134system.cpu.dcache.WriteReq_hits::total 8096819 # number of WriteReq hits 135system.cpu.dcache.SoftPFReq_hits::cpu.data 58904 # number of SoftPFReq hits 136system.cpu.dcache.SoftPFReq_hits::total 58904 # number of SoftPFReq hits 137system.cpu.dcache.demand_hits::cpu.data 20120229 # number of demand (read+write) hits 138system.cpu.dcache.demand_hits::total 20120229 # number of demand (read+write) hits 139system.cpu.dcache.overall_hits::cpu.data 20179133 # number of overall hits 140system.cpu.dcache.overall_hits::total 20179133 # number of overall hits 141system.cpu.dcache.ReadReq_misses::cpu.data 905268 # number of ReadReq misses 142system.cpu.dcache.ReadReq_misses::total 905268 # number of ReadReq misses 143system.cpu.dcache.WriteReq_misses::cpu.data 316618 # number of WriteReq misses 144system.cpu.dcache.WriteReq_misses::total 316618 # number of WriteReq misses 145system.cpu.dcache.SoftPFReq_misses::cpu.data 402753 # number of SoftPFReq misses 146system.cpu.dcache.SoftPFReq_misses::total 402753 # number of SoftPFReq misses 147system.cpu.dcache.demand_misses::cpu.data 1221886 # number of demand (read+write) misses 148system.cpu.dcache.demand_misses::total 1221886 # number of demand (read+write) misses 149system.cpu.dcache.overall_misses::cpu.data 1624639 # number of overall misses 150system.cpu.dcache.overall_misses::total 1624639 # number of overall misses 151system.cpu.dcache.ReadReq_accesses::cpu.data 12928678 # number of ReadReq accesses(hits+misses) 152system.cpu.dcache.ReadReq_accesses::total 12928678 # number of ReadReq accesses(hits+misses) 153system.cpu.dcache.WriteReq_accesses::cpu.data 8413437 # number of WriteReq accesses(hits+misses) 154system.cpu.dcache.WriteReq_accesses::total 8413437 # number of WriteReq accesses(hits+misses) 155system.cpu.dcache.SoftPFReq_accesses::cpu.data 461657 # number of SoftPFReq accesses(hits+misses) 156system.cpu.dcache.SoftPFReq_accesses::total 461657 # number of SoftPFReq accesses(hits+misses) 157system.cpu.dcache.demand_accesses::cpu.data 21342115 # number of demand (read+write) accesses 158system.cpu.dcache.demand_accesses::total 21342115 # number of demand (read+write) accesses 159system.cpu.dcache.overall_accesses::cpu.data 21803772 # number of overall (read+write) accesses 160system.cpu.dcache.overall_accesses::total 21803772 # number of overall (read+write) accesses 161system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070020 # miss rate for ReadReq accesses 162system.cpu.dcache.ReadReq_miss_rate::total 0.070020 # miss rate for ReadReq accesses 163system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037632 # miss rate for WriteReq accesses 164system.cpu.dcache.WriteReq_miss_rate::total 0.037632 # miss rate for WriteReq accesses 165system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872407 # miss rate for SoftPFReq accesses 166system.cpu.dcache.SoftPFReq_miss_rate::total 0.872407 # miss rate for SoftPFReq accesses 167system.cpu.dcache.demand_miss_rate::cpu.data 0.057252 # miss rate for demand accesses 168system.cpu.dcache.demand_miss_rate::total 0.057252 # miss rate for demand accesses 169system.cpu.dcache.overall_miss_rate::cpu.data 0.074512 # miss rate for overall accesses 170system.cpu.dcache.overall_miss_rate::total 0.074512 # miss rate for overall accesses 171system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 172system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 173system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 174system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 175system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 176system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
177system.cpu.dcache.fast_writes 0 # number of fast writes performed 178system.cpu.dcache.cache_copies 0 # number of cache copies performed
179system.cpu.dcache.writebacks::writebacks 1535790 # number of writebacks 180system.cpu.dcache.writebacks::total 1535790 # number of writebacks	177system.cpu.dcache.writebacks::writebacks 1535790 # number of writebacks 178system.cpu.dcache.writebacks::total 1535790 # number of writebacks
181system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
182system.cpu.dtb_walker_cache.tags.replacements 7749 # number of replacements 183system.cpu.dtb_walker_cache.tags.tagsinuse 5.014001 # Cycle average of tags in use 184system.cpu.dtb_walker_cache.tags.total_refs 12936 # Total number of references to valid blocks. 185system.cpu.dtb_walker_cache.tags.sampled_refs 7763 # Sample count of references to valid blocks. 186system.cpu.dtb_walker_cache.tags.avg_refs 1.666366 # Average number of references to valid blocks. 187system.cpu.dtb_walker_cache.tags.warmup_cycle 5100450626500 # Cycle when the warmup percentage was hit. 188system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.014001 # Average occupied blocks per requestor 189system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker 0.313375 # Average percentage of cache occupancy 190system.cpu.dtb_walker_cache.tags.occ_percent::total 0.313375 # Average percentage of cache occupancy 191system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024 14 # Occupied blocks per task id 192system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0 5 # Occupied blocks per task id 193system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1 5 # Occupied blocks per task id 194system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 195system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024 0.875000 # Percentage of cache occupancy per task id 196system.cpu.dtb_walker_cache.tags.tag_accesses 52745 # Number of tag accesses 197system.cpu.dtb_walker_cache.tags.data_accesses 52745 # Number of data accesses 198system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12937 # number of ReadReq hits 199system.cpu.dtb_walker_cache.ReadReq_hits::total 12937 # number of ReadReq hits 200system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12937 # number of demand (read+write) hits 201system.cpu.dtb_walker_cache.demand_hits::total 12937 # number of demand (read+write) hits 202system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12937 # number of overall hits 203system.cpu.dtb_walker_cache.overall_hits::total 12937 # number of overall hits 204system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8957 # number of ReadReq misses 205system.cpu.dtb_walker_cache.ReadReq_misses::total 8957 # number of ReadReq misses 206system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8957 # number of demand (read+write) misses 207system.cpu.dtb_walker_cache.demand_misses::total 8957 # number of demand (read+write) misses 208system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8957 # number of overall misses 209system.cpu.dtb_walker_cache.overall_misses::total 8957 # number of overall misses 210system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21894 # number of ReadReq accesses(hits+misses) 211system.cpu.dtb_walker_cache.ReadReq_accesses::total 21894 # number of ReadReq accesses(hits+misses) 212system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21894 # number of demand (read+write) accesses 213system.cpu.dtb_walker_cache.demand_accesses::total 21894 # number of demand (read+write) accesses 214system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21894 # number of overall (read+write) accesses 215system.cpu.dtb_walker_cache.overall_accesses::total 21894 # number of overall (read+write) accesses 216system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.409108 # miss rate for ReadReq accesses 217system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.409108 # miss rate for ReadReq accesses 218system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.409108 # miss rate for demand accesses 219system.cpu.dtb_walker_cache.demand_miss_rate::total 0.409108 # miss rate for demand accesses 220system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.409108 # miss rate for overall accesses 221system.cpu.dtb_walker_cache.overall_miss_rate::total 0.409108 # miss rate for overall accesses 222system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 223system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 224system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 225system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 226system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 227system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked	179system.cpu.dtb_walker_cache.tags.replacements 7749 # number of replacements 180system.cpu.dtb_walker_cache.tags.tagsinuse 5.014001 # Cycle average of tags in use 181system.cpu.dtb_walker_cache.tags.total_refs 12936 # Total number of references to valid blocks. 182system.cpu.dtb_walker_cache.tags.sampled_refs 7763 # Sample count of references to valid blocks. 183system.cpu.dtb_walker_cache.tags.avg_refs 1.666366 # Average number of references to valid blocks. 184system.cpu.dtb_walker_cache.tags.warmup_cycle 5100450626500 # Cycle when the warmup percentage was hit. 185system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.014001 # Average occupied blocks per requestor 186system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker 0.313375 # Average percentage of cache occupancy 187system.cpu.dtb_walker_cache.tags.occ_percent::total 0.313375 # Average percentage of cache occupancy 188system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024 14 # Occupied blocks per task id 189system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0 5 # Occupied blocks per task id 190system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1 5 # Occupied blocks per task id 191system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 192system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024 0.875000 # Percentage of cache occupancy per task id 193system.cpu.dtb_walker_cache.tags.tag_accesses 52745 # Number of tag accesses 194system.cpu.dtb_walker_cache.tags.data_accesses 52745 # Number of data accesses 195system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12937 # number of ReadReq hits 196system.cpu.dtb_walker_cache.ReadReq_hits::total 12937 # number of ReadReq hits 197system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12937 # number of demand (read+write) hits 198system.cpu.dtb_walker_cache.demand_hits::total 12937 # number of demand (read+write) hits 199system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12937 # number of overall hits 200system.cpu.dtb_walker_cache.overall_hits::total 12937 # number of overall hits 201system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8957 # number of ReadReq misses 202system.cpu.dtb_walker_cache.ReadReq_misses::total 8957 # number of ReadReq misses 203system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8957 # number of demand (read+write) misses 204system.cpu.dtb_walker_cache.demand_misses::total 8957 # number of demand (read+write) misses 205system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8957 # number of overall misses 206system.cpu.dtb_walker_cache.overall_misses::total 8957 # number of overall misses 207system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21894 # number of ReadReq accesses(hits+misses) 208system.cpu.dtb_walker_cache.ReadReq_accesses::total 21894 # number of ReadReq accesses(hits+misses) 209system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21894 # number of demand (read+write) accesses 210system.cpu.dtb_walker_cache.demand_accesses::total 21894 # number of demand (read+write) accesses 211system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21894 # number of overall (read+write) accesses 212system.cpu.dtb_walker_cache.overall_accesses::total 21894 # number of overall (read+write) accesses 213system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.409108 # miss rate for ReadReq accesses 214system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.409108 # miss rate for ReadReq accesses 215system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.409108 # miss rate for demand accesses 216system.cpu.dtb_walker_cache.demand_miss_rate::total 0.409108 # miss rate for demand accesses 217system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.409108 # miss rate for overall accesses 218system.cpu.dtb_walker_cache.overall_miss_rate::total 0.409108 # miss rate for overall accesses 219system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 220system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 221system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 222system.cpu.dtb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 223system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 224system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
228system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed 229system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed
230system.cpu.dtb_walker_cache.writebacks::writebacks 2897 # number of writebacks 231system.cpu.dtb_walker_cache.writebacks::total 2897 # number of writebacks	225system.cpu.dtb_walker_cache.writebacks::writebacks 2897 # number of writebacks 226system.cpu.dtb_walker_cache.writebacks::total 2897 # number of writebacks
232system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
233system.cpu.icache.tags.replacements 792340 # number of replacements 234system.cpu.icache.tags.tagsinuse 510.662956 # Cycle average of tags in use 235system.cpu.icache.tags.total_refs 243675443 # Total number of references to valid blocks. 236system.cpu.icache.tags.sampled_refs 792852 # Sample count of references to valid blocks. 237system.cpu.icache.tags.avg_refs 307.340390 # Average number of references to valid blocks. 238system.cpu.icache.tags.warmup_cycle 148913118500 # Cycle when the warmup percentage was hit. 239system.cpu.icache.tags.occ_blocks::cpu.inst 510.662956 # Average occupied blocks per requestor 240system.cpu.icache.tags.occ_percent::cpu.inst 0.997389 # Average percentage of cache occupancy 241system.cpu.icache.tags.occ_percent::total 0.997389 # Average percentage of cache occupancy 242system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 243system.cpu.icache.tags.age_task_id_blocks_1024::0 90 # Occupied blocks per task id 244system.cpu.icache.tags.age_task_id_blocks_1024::1 130 # Occupied blocks per task id 245system.cpu.icache.tags.age_task_id_blocks_1024::2 291 # Occupied blocks per task id 246system.cpu.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id 247system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 248system.cpu.icache.tags.tag_accesses 245261161 # Number of tag accesses 249system.cpu.icache.tags.data_accesses 245261161 # Number of data accesses 250system.cpu.icache.ReadReq_hits::cpu.inst 243675443 # number of ReadReq hits 251system.cpu.icache.ReadReq_hits::total 243675443 # number of ReadReq hits 252system.cpu.icache.demand_hits::cpu.inst 243675443 # number of demand (read+write) hits 253system.cpu.icache.demand_hits::total 243675443 # number of demand (read+write) hits 254system.cpu.icache.overall_hits::cpu.inst 243675443 # number of overall hits 255system.cpu.icache.overall_hits::total 243675443 # number of overall hits 256system.cpu.icache.ReadReq_misses::cpu.inst 792859 # number of ReadReq misses 257system.cpu.icache.ReadReq_misses::total 792859 # number of ReadReq misses 258system.cpu.icache.demand_misses::cpu.inst 792859 # number of demand (read+write) misses 259system.cpu.icache.demand_misses::total 792859 # number of demand (read+write) misses 260system.cpu.icache.overall_misses::cpu.inst 792859 # number of overall misses 261system.cpu.icache.overall_misses::total 792859 # number of overall misses 262system.cpu.icache.ReadReq_accesses::cpu.inst 244468302 # number of ReadReq accesses(hits+misses) 263system.cpu.icache.ReadReq_accesses::total 244468302 # number of ReadReq accesses(hits+misses) 264system.cpu.icache.demand_accesses::cpu.inst 244468302 # number of demand (read+write) accesses 265system.cpu.icache.demand_accesses::total 244468302 # number of demand (read+write) accesses 266system.cpu.icache.overall_accesses::cpu.inst 244468302 # number of overall (read+write) accesses 267system.cpu.icache.overall_accesses::total 244468302 # number of overall (read+write) accesses 268system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003243 # miss rate for ReadReq accesses 269system.cpu.icache.ReadReq_miss_rate::total 0.003243 # miss rate for ReadReq accesses 270system.cpu.icache.demand_miss_rate::cpu.inst 0.003243 # miss rate for demand accesses 271system.cpu.icache.demand_miss_rate::total 0.003243 # miss rate for demand accesses 272system.cpu.icache.overall_miss_rate::cpu.inst 0.003243 # miss rate for overall accesses 273system.cpu.icache.overall_miss_rate::total 0.003243 # miss rate for overall accesses 274system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 275system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 276system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 277system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 278system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 279system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked	227system.cpu.icache.tags.replacements 792340 # number of replacements 228system.cpu.icache.tags.tagsinuse 510.662956 # Cycle average of tags in use 229system.cpu.icache.tags.total_refs 243675443 # Total number of references to valid blocks. 230system.cpu.icache.tags.sampled_refs 792852 # Sample count of references to valid blocks. 231system.cpu.icache.tags.avg_refs 307.340390 # Average number of references to valid blocks. 232system.cpu.icache.tags.warmup_cycle 148913118500 # Cycle when the warmup percentage was hit. 233system.cpu.icache.tags.occ_blocks::cpu.inst 510.662956 # Average occupied blocks per requestor 234system.cpu.icache.tags.occ_percent::cpu.inst 0.997389 # Average percentage of cache occupancy 235system.cpu.icache.tags.occ_percent::total 0.997389 # Average percentage of cache occupancy 236system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 237system.cpu.icache.tags.age_task_id_blocks_1024::0 90 # Occupied blocks per task id 238system.cpu.icache.tags.age_task_id_blocks_1024::1 130 # Occupied blocks per task id 239system.cpu.icache.tags.age_task_id_blocks_1024::2 291 # Occupied blocks per task id 240system.cpu.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id 241system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 242system.cpu.icache.tags.tag_accesses 245261161 # Number of tag accesses 243system.cpu.icache.tags.data_accesses 245261161 # Number of data accesses 244system.cpu.icache.ReadReq_hits::cpu.inst 243675443 # number of ReadReq hits 245system.cpu.icache.ReadReq_hits::total 243675443 # number of ReadReq hits 246system.cpu.icache.demand_hits::cpu.inst 243675443 # number of demand (read+write) hits 247system.cpu.icache.demand_hits::total 243675443 # number of demand (read+write) hits 248system.cpu.icache.overall_hits::cpu.inst 243675443 # number of overall hits 249system.cpu.icache.overall_hits::total 243675443 # number of overall hits 250system.cpu.icache.ReadReq_misses::cpu.inst 792859 # number of ReadReq misses 251system.cpu.icache.ReadReq_misses::total 792859 # number of ReadReq misses 252system.cpu.icache.demand_misses::cpu.inst 792859 # number of demand (read+write) misses 253system.cpu.icache.demand_misses::total 792859 # number of demand (read+write) misses 254system.cpu.icache.overall_misses::cpu.inst 792859 # number of overall misses 255system.cpu.icache.overall_misses::total 792859 # number of overall misses 256system.cpu.icache.ReadReq_accesses::cpu.inst 244468302 # number of ReadReq accesses(hits+misses) 257system.cpu.icache.ReadReq_accesses::total 244468302 # number of ReadReq accesses(hits+misses) 258system.cpu.icache.demand_accesses::cpu.inst 244468302 # number of demand (read+write) accesses 259system.cpu.icache.demand_accesses::total 244468302 # number of demand (read+write) accesses 260system.cpu.icache.overall_accesses::cpu.inst 244468302 # number of overall (read+write) accesses 261system.cpu.icache.overall_accesses::total 244468302 # number of overall (read+write) accesses 262system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003243 # miss rate for ReadReq accesses 263system.cpu.icache.ReadReq_miss_rate::total 0.003243 # miss rate for ReadReq accesses 264system.cpu.icache.demand_miss_rate::cpu.inst 0.003243 # miss rate for demand accesses 265system.cpu.icache.demand_miss_rate::total 0.003243 # miss rate for demand accesses 266system.cpu.icache.overall_miss_rate::cpu.inst 0.003243 # miss rate for overall accesses 267system.cpu.icache.overall_miss_rate::total 0.003243 # miss rate for overall accesses 268system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 269system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 270system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 271system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 272system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 273system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
280system.cpu.icache.fast_writes 0 # number of fast writes performed 281system.cpu.icache.cache_copies 0 # number of cache copies performed
282system.cpu.icache.writebacks::writebacks 792340 # number of writebacks 283system.cpu.icache.writebacks::total 792340 # number of writebacks	274system.cpu.icache.writebacks::writebacks 792340 # number of writebacks 275system.cpu.icache.writebacks::total 792340 # number of writebacks
284system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate
285system.cpu.itb_walker_cache.tags.replacements 3586 # number of replacements 286system.cpu.itb_walker_cache.tags.tagsinuse 3.026555 # Cycle average of tags in use 287system.cpu.itb_walker_cache.tags.total_refs 7763 # Total number of references to valid blocks. 288system.cpu.itb_walker_cache.tags.sampled_refs 3597 # Sample count of references to valid blocks. 289system.cpu.itb_walker_cache.tags.avg_refs 2.158187 # Average number of references to valid blocks. 290system.cpu.itb_walker_cache.tags.warmup_cycle 5102137159500 # Cycle when the warmup percentage was hit. 291system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026555 # Average occupied blocks per requestor 292system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189160 # Average percentage of cache occupancy 293system.cpu.itb_walker_cache.tags.occ_percent::total 0.189160 # Average percentage of cache occupancy 294system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024 11 # Occupied blocks per task id 295system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0 6 # Occupied blocks per task id 296system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 297system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id 298system.cpu.itb_walker_cache.tags.occ_task_id_percent::1024 0.687500 # Percentage of cache occupancy per task id 299system.cpu.itb_walker_cache.tags.tag_accesses 28899 # Number of tag accesses 300system.cpu.itb_walker_cache.tags.data_accesses 28899 # Number of data accesses 301system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 7765 # number of ReadReq hits 302system.cpu.itb_walker_cache.ReadReq_hits::total 7765 # number of ReadReq hits 303system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits 304system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits 305system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 7767 # number of demand (read+write) hits 306system.cpu.itb_walker_cache.demand_hits::total 7767 # number of demand (read+write) hits 307system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 7767 # number of overall hits 308system.cpu.itb_walker_cache.overall_hits::total 7767 # number of overall hits 309system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4455 # number of ReadReq misses 310system.cpu.itb_walker_cache.ReadReq_misses::total 4455 # number of ReadReq misses 311system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4455 # number of demand (read+write) misses 312system.cpu.itb_walker_cache.demand_misses::total 4455 # number of demand (read+write) misses 313system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4455 # number of overall misses 314system.cpu.itb_walker_cache.overall_misses::total 4455 # number of overall misses 315system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12220 # number of ReadReq accesses(hits+misses) 316system.cpu.itb_walker_cache.ReadReq_accesses::total 12220 # number of ReadReq accesses(hits+misses) 317system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses) 318system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses) 319system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12222 # number of demand (read+write) accesses 320system.cpu.itb_walker_cache.demand_accesses::total 12222 # number of demand (read+write) accesses 321system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12222 # number of overall (read+write) accesses 322system.cpu.itb_walker_cache.overall_accesses::total 12222 # number of overall (read+write) accesses 323system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.364566 # miss rate for ReadReq accesses 324system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.364566 # miss rate for ReadReq accesses 325system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.364507 # miss rate for demand accesses 326system.cpu.itb_walker_cache.demand_miss_rate::total 0.364507 # miss rate for demand accesses 327system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.364507 # miss rate for overall accesses 328system.cpu.itb_walker_cache.overall_miss_rate::total 0.364507 # miss rate for overall accesses 329system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 330system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 331system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 332system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 333system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 334system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked	276system.cpu.itb_walker_cache.tags.replacements 3586 # number of replacements 277system.cpu.itb_walker_cache.tags.tagsinuse 3.026555 # Cycle average of tags in use 278system.cpu.itb_walker_cache.tags.total_refs 7763 # Total number of references to valid blocks. 279system.cpu.itb_walker_cache.tags.sampled_refs 3597 # Sample count of references to valid blocks. 280system.cpu.itb_walker_cache.tags.avg_refs 2.158187 # Average number of references to valid blocks. 281system.cpu.itb_walker_cache.tags.warmup_cycle 5102137159500 # Cycle when the warmup percentage was hit. 282system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026555 # Average occupied blocks per requestor 283system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189160 # Average percentage of cache occupancy 284system.cpu.itb_walker_cache.tags.occ_percent::total 0.189160 # Average percentage of cache occupancy 285system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024 11 # Occupied blocks per task id 286system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0 6 # Occupied blocks per task id 287system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 288system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id 289system.cpu.itb_walker_cache.tags.occ_task_id_percent::1024 0.687500 # Percentage of cache occupancy per task id 290system.cpu.itb_walker_cache.tags.tag_accesses 28899 # Number of tag accesses 291system.cpu.itb_walker_cache.tags.data_accesses 28899 # Number of data accesses 292system.cpu.itb_walker_cache.ReadReq_hits::cpu.itb.walker 7765 # number of ReadReq hits 293system.cpu.itb_walker_cache.ReadReq_hits::total 7765 # number of ReadReq hits 294system.cpu.itb_walker_cache.WriteReq_hits::cpu.itb.walker 2 # number of WriteReq hits 295system.cpu.itb_walker_cache.WriteReq_hits::total 2 # number of WriteReq hits 296system.cpu.itb_walker_cache.demand_hits::cpu.itb.walker 7767 # number of demand (read+write) hits 297system.cpu.itb_walker_cache.demand_hits::total 7767 # number of demand (read+write) hits 298system.cpu.itb_walker_cache.overall_hits::cpu.itb.walker 7767 # number of overall hits 299system.cpu.itb_walker_cache.overall_hits::total 7767 # number of overall hits 300system.cpu.itb_walker_cache.ReadReq_misses::cpu.itb.walker 4455 # number of ReadReq misses 301system.cpu.itb_walker_cache.ReadReq_misses::total 4455 # number of ReadReq misses 302system.cpu.itb_walker_cache.demand_misses::cpu.itb.walker 4455 # number of demand (read+write) misses 303system.cpu.itb_walker_cache.demand_misses::total 4455 # number of demand (read+write) misses 304system.cpu.itb_walker_cache.overall_misses::cpu.itb.walker 4455 # number of overall misses 305system.cpu.itb_walker_cache.overall_misses::total 4455 # number of overall misses 306system.cpu.itb_walker_cache.ReadReq_accesses::cpu.itb.walker 12220 # number of ReadReq accesses(hits+misses) 307system.cpu.itb_walker_cache.ReadReq_accesses::total 12220 # number of ReadReq accesses(hits+misses) 308system.cpu.itb_walker_cache.WriteReq_accesses::cpu.itb.walker 2 # number of WriteReq accesses(hits+misses) 309system.cpu.itb_walker_cache.WriteReq_accesses::total 2 # number of WriteReq accesses(hits+misses) 310system.cpu.itb_walker_cache.demand_accesses::cpu.itb.walker 12222 # number of demand (read+write) accesses 311system.cpu.itb_walker_cache.demand_accesses::total 12222 # number of demand (read+write) accesses 312system.cpu.itb_walker_cache.overall_accesses::cpu.itb.walker 12222 # number of overall (read+write) accesses 313system.cpu.itb_walker_cache.overall_accesses::total 12222 # number of overall (read+write) accesses 314system.cpu.itb_walker_cache.ReadReq_miss_rate::cpu.itb.walker 0.364566 # miss rate for ReadReq accesses 315system.cpu.itb_walker_cache.ReadReq_miss_rate::total 0.364566 # miss rate for ReadReq accesses 316system.cpu.itb_walker_cache.demand_miss_rate::cpu.itb.walker 0.364507 # miss rate for demand accesses 317system.cpu.itb_walker_cache.demand_miss_rate::total 0.364507 # miss rate for demand accesses 318system.cpu.itb_walker_cache.overall_miss_rate::cpu.itb.walker 0.364507 # miss rate for overall accesses 319system.cpu.itb_walker_cache.overall_miss_rate::total 0.364507 # miss rate for overall accesses 320system.cpu.itb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 321system.cpu.itb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 322system.cpu.itb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked 323system.cpu.itb_walker_cache.blocked::no_targets 0 # number of cycles access was blocked 324system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 325system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
335system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed 336system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed
337system.cpu.itb_walker_cache.writebacks::writebacks 700 # number of writebacks 338system.cpu.itb_walker_cache.writebacks::total 700 # number of writebacks	326system.cpu.itb_walker_cache.writebacks::writebacks 700 # number of writebacks 327system.cpu.itb_walker_cache.writebacks::total 700 # number of writebacks
339system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate
340system.cpu.l2cache.tags.replacements 106202 # number of replacements 341system.cpu.l2cache.tags.tagsinuse 64823.935074 # Cycle average of tags in use 342system.cpu.l2cache.tags.total_refs 4340729 # Total number of references to valid blocks. 343system.cpu.l2cache.tags.sampled_refs 170162 # Sample count of references to valid blocks. 344system.cpu.l2cache.tags.avg_refs 25.509391 # Average number of references to valid blocks. 345system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 346system.cpu.l2cache.tags.occ_blocks::writebacks 51928.967732 # Average occupied blocks per requestor 347system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 0.002478 # Average occupied blocks per requestor 348system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.135114 # Average occupied blocks per requestor 349system.cpu.l2cache.tags.occ_blocks::cpu.inst 2458.317021 # Average occupied blocks per requestor 350system.cpu.l2cache.tags.occ_blocks::cpu.data 10436.512729 # Average occupied blocks per requestor 351system.cpu.l2cache.tags.occ_percent::writebacks 0.792373 # Average percentage of cache occupancy 352system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 353system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy 354system.cpu.l2cache.tags.occ_percent::cpu.inst 0.037511 # Average percentage of cache occupancy 355system.cpu.l2cache.tags.occ_percent::cpu.data 0.159249 # Average percentage of cache occupancy 356system.cpu.l2cache.tags.occ_percent::total 0.989135 # Average percentage of cache occupancy 357system.cpu.l2cache.tags.occ_task_id_blocks::1024 63960 # Occupied blocks per task id 358system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id 359system.cpu.l2cache.tags.age_task_id_blocks_1024::1 233 # Occupied blocks per task id 360system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3348 # Occupied blocks per task id 361system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20880 # Occupied blocks per task id 362system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39442 # Occupied blocks per task id 363system.cpu.l2cache.tags.occ_task_id_percent::1024 0.975952 # Percentage of cache occupancy per task id 364system.cpu.l2cache.tags.tag_accesses 39254568 # Number of tag accesses 365system.cpu.l2cache.tags.data_accesses 39254568 # Number of data accesses 366system.cpu.l2cache.WritebackDirty_hits::writebacks 1539387 # number of WritebackDirty hits 367system.cpu.l2cache.WritebackDirty_hits::total 1539387 # number of WritebackDirty hits 368system.cpu.l2cache.WritebackClean_hits::writebacks 792329 # number of WritebackClean hits 369system.cpu.l2cache.WritebackClean_hits::total 792329 # number of WritebackClean hits 370system.cpu.l2cache.UpgradeReq_hits::cpu.data 312 # number of UpgradeReq hits 371system.cpu.l2cache.UpgradeReq_hits::total 312 # number of UpgradeReq hits 372system.cpu.l2cache.ReadExReq_hits::cpu.data 179766 # number of ReadExReq hits 373system.cpu.l2cache.ReadExReq_hits::total 179766 # number of ReadExReq hits 374system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 779612 # number of ReadCleanReq hits 375system.cpu.l2cache.ReadCleanReq_hits::total 779612 # number of ReadCleanReq hits 376system.cpu.l2cache.ReadSharedReq_hits::cpu.dtb.walker 6533 # number of ReadSharedReq hits 377system.cpu.l2cache.ReadSharedReq_hits::cpu.itb.walker 2871 # number of ReadSharedReq hits 378system.cpu.l2cache.ReadSharedReq_hits::cpu.data 1275070 # number of ReadSharedReq hits 379system.cpu.l2cache.ReadSharedReq_hits::total 1284474 # number of ReadSharedReq hits 380system.cpu.l2cache.demand_hits::cpu.dtb.walker 6533 # number of demand (read+write) hits 381system.cpu.l2cache.demand_hits::cpu.itb.walker 2871 # number of demand (read+write) hits 382system.cpu.l2cache.demand_hits::cpu.inst 779612 # number of demand (read+write) hits 383system.cpu.l2cache.demand_hits::cpu.data 1454836 # number of demand (read+write) hits 384system.cpu.l2cache.demand_hits::total 2243852 # number of demand (read+write) hits 385system.cpu.l2cache.overall_hits::cpu.dtb.walker 6533 # number of overall hits 386system.cpu.l2cache.overall_hits::cpu.itb.walker 2871 # number of overall hits 387system.cpu.l2cache.overall_hits::cpu.inst 779612 # number of overall hits 388system.cpu.l2cache.overall_hits::cpu.data 1454836 # number of overall hits 389system.cpu.l2cache.overall_hits::total 2243852 # number of overall hits 390system.cpu.l2cache.UpgradeReq_misses::cpu.data 1349 # number of UpgradeReq misses 391system.cpu.l2cache.UpgradeReq_misses::total 1349 # number of UpgradeReq misses 392system.cpu.l2cache.ReadExReq_misses::cpu.data 134647 # number of ReadExReq misses 393system.cpu.l2cache.ReadExReq_misses::total 134647 # number of ReadExReq misses 394system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13234 # number of ReadCleanReq misses 395system.cpu.l2cache.ReadCleanReq_misses::total 13234 # number of ReadCleanReq misses 396system.cpu.l2cache.ReadSharedReq_misses::cpu.dtb.walker 1 # number of ReadSharedReq misses 397system.cpu.l2cache.ReadSharedReq_misses::cpu.itb.walker 5 # number of ReadSharedReq misses 398system.cpu.l2cache.ReadSharedReq_misses::cpu.data 32164 # number of ReadSharedReq misses 399system.cpu.l2cache.ReadSharedReq_misses::total 32170 # number of ReadSharedReq misses 400system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses 401system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses 402system.cpu.l2cache.demand_misses::cpu.inst 13234 # number of demand (read+write) misses 403system.cpu.l2cache.demand_misses::cpu.data 166811 # number of demand (read+write) misses 404system.cpu.l2cache.demand_misses::total 180051 # number of demand (read+write) misses 405system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses 406system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses 407system.cpu.l2cache.overall_misses::cpu.inst 13234 # number of overall misses 408system.cpu.l2cache.overall_misses::cpu.data 166811 # number of overall misses 409system.cpu.l2cache.overall_misses::total 180051 # number of overall misses 410system.cpu.l2cache.WritebackDirty_accesses::writebacks 1539387 # number of WritebackDirty accesses(hits+misses) 411system.cpu.l2cache.WritebackDirty_accesses::total 1539387 # number of WritebackDirty accesses(hits+misses) 412system.cpu.l2cache.WritebackClean_accesses::writebacks 792329 # number of WritebackClean accesses(hits+misses) 413system.cpu.l2cache.WritebackClean_accesses::total 792329 # number of WritebackClean accesses(hits+misses) 414system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1661 # number of UpgradeReq accesses(hits+misses) 415system.cpu.l2cache.UpgradeReq_accesses::total 1661 # number of UpgradeReq accesses(hits+misses) 416system.cpu.l2cache.ReadExReq_accesses::cpu.data 314413 # number of ReadExReq accesses(hits+misses) 417system.cpu.l2cache.ReadExReq_accesses::total 314413 # number of ReadExReq accesses(hits+misses) 418system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 792846 # number of ReadCleanReq accesses(hits+misses) 419system.cpu.l2cache.ReadCleanReq_accesses::total 792846 # number of ReadCleanReq accesses(hits+misses) 420system.cpu.l2cache.ReadSharedReq_accesses::cpu.dtb.walker 6534 # number of ReadSharedReq accesses(hits+misses) 421system.cpu.l2cache.ReadSharedReq_accesses::cpu.itb.walker 2876 # number of ReadSharedReq accesses(hits+misses) 422system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 1307234 # number of ReadSharedReq accesses(hits+misses) 423system.cpu.l2cache.ReadSharedReq_accesses::total 1316644 # number of ReadSharedReq accesses(hits+misses) 424system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6534 # number of demand (read+write) accesses 425system.cpu.l2cache.demand_accesses::cpu.itb.walker 2876 # number of demand (read+write) accesses 426system.cpu.l2cache.demand_accesses::cpu.inst 792846 # number of demand (read+write) accesses 427system.cpu.l2cache.demand_accesses::cpu.data 1621647 # number of demand (read+write) accesses 428system.cpu.l2cache.demand_accesses::total 2423903 # number of demand (read+write) accesses 429system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6534 # number of overall (read+write) accesses 430system.cpu.l2cache.overall_accesses::cpu.itb.walker 2876 # number of overall (read+write) accesses 431system.cpu.l2cache.overall_accesses::cpu.inst 792846 # number of overall (read+write) accesses 432system.cpu.l2cache.overall_accesses::cpu.data 1621647 # number of overall (read+write) accesses 433system.cpu.l2cache.overall_accesses::total 2423903 # number of overall (read+write) accesses 434system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.812161 # miss rate for UpgradeReq accesses 435system.cpu.l2cache.UpgradeReq_miss_rate::total 0.812161 # miss rate for UpgradeReq accesses 436system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428249 # miss rate for ReadExReq accesses 437system.cpu.l2cache.ReadExReq_miss_rate::total 0.428249 # miss rate for ReadExReq accesses 438system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.016692 # miss rate for ReadCleanReq accesses 439system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.016692 # miss rate for ReadCleanReq accesses 440system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.dtb.walker 0.000153 # miss rate for ReadSharedReq accesses 441system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.itb.walker 0.001739 # miss rate for ReadSharedReq accesses 442system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.024605 # miss rate for ReadSharedReq accesses 443system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.024433 # miss rate for ReadSharedReq accesses 444system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000153 # miss rate for demand accesses 445system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001739 # miss rate for demand accesses 446system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016692 # miss rate for demand accesses 447system.cpu.l2cache.demand_miss_rate::cpu.data 0.102865 # miss rate for demand accesses 448system.cpu.l2cache.demand_miss_rate::total 0.074281 # miss rate for demand accesses 449system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000153 # miss rate for overall accesses 450system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001739 # miss rate for overall accesses 451system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016692 # miss rate for overall accesses 452system.cpu.l2cache.overall_miss_rate::cpu.data 0.102865 # miss rate for overall accesses 453system.cpu.l2cache.overall_miss_rate::total 0.074281 # miss rate for overall accesses 454system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 455system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 456system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 457system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 458system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 459system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked	328system.cpu.l2cache.tags.replacements 106202 # number of replacements 329system.cpu.l2cache.tags.tagsinuse 64823.935074 # Cycle average of tags in use 330system.cpu.l2cache.tags.total_refs 4340729 # Total number of references to valid blocks. 331system.cpu.l2cache.tags.sampled_refs 170162 # Sample count of references to valid blocks. 332system.cpu.l2cache.tags.avg_refs 25.509391 # Average number of references to valid blocks. 333system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 334system.cpu.l2cache.tags.occ_blocks::writebacks 51928.967732 # Average occupied blocks per requestor 335system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 0.002478 # Average occupied blocks per requestor 336system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.135114 # Average occupied blocks per requestor 337system.cpu.l2cache.tags.occ_blocks::cpu.inst 2458.317021 # Average occupied blocks per requestor 338system.cpu.l2cache.tags.occ_blocks::cpu.data 10436.512729 # Average occupied blocks per requestor 339system.cpu.l2cache.tags.occ_percent::writebacks 0.792373 # Average percentage of cache occupancy 340system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy 341system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy 342system.cpu.l2cache.tags.occ_percent::cpu.inst 0.037511 # Average percentage of cache occupancy 343system.cpu.l2cache.tags.occ_percent::cpu.data 0.159249 # Average percentage of cache occupancy 344system.cpu.l2cache.tags.occ_percent::total 0.989135 # Average percentage of cache occupancy 345system.cpu.l2cache.tags.occ_task_id_blocks::1024 63960 # Occupied blocks per task id 346system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id 347system.cpu.l2cache.tags.age_task_id_blocks_1024::1 233 # Occupied blocks per task id 348system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3348 # Occupied blocks per task id 349system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20880 # Occupied blocks per task id 350system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39442 # Occupied blocks per task id 351system.cpu.l2cache.tags.occ_task_id_percent::1024 0.975952 # Percentage of cache occupancy per task id 352system.cpu.l2cache.tags.tag_accesses 39254568 # Number of tag accesses 353system.cpu.l2cache.tags.data_accesses 39254568 # Number of data accesses 354system.cpu.l2cache.WritebackDirty_hits::writebacks 1539387 # number of WritebackDirty hits 355system.cpu.l2cache.WritebackDirty_hits::total 1539387 # number of WritebackDirty hits 356system.cpu.l2cache.WritebackClean_hits::writebacks 792329 # number of WritebackClean hits 357system.cpu.l2cache.WritebackClean_hits::total 792329 # number of WritebackClean hits 358system.cpu.l2cache.UpgradeReq_hits::cpu.data 312 # number of UpgradeReq hits 359system.cpu.l2cache.UpgradeReq_hits::total 312 # number of UpgradeReq hits 360system.cpu.l2cache.ReadExReq_hits::cpu.data 179766 # number of ReadExReq hits 361system.cpu.l2cache.ReadExReq_hits::total 179766 # number of ReadExReq hits 362system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 779612 # number of ReadCleanReq hits 363system.cpu.l2cache.ReadCleanReq_hits::total 779612 # number of ReadCleanReq hits 364system.cpu.l2cache.ReadSharedReq_hits::cpu.dtb.walker 6533 # number of ReadSharedReq hits 365system.cpu.l2cache.ReadSharedReq_hits::cpu.itb.walker 2871 # number of ReadSharedReq hits 366system.cpu.l2cache.ReadSharedReq_hits::cpu.data 1275070 # number of ReadSharedReq hits 367system.cpu.l2cache.ReadSharedReq_hits::total 1284474 # number of ReadSharedReq hits 368system.cpu.l2cache.demand_hits::cpu.dtb.walker 6533 # number of demand (read+write) hits 369system.cpu.l2cache.demand_hits::cpu.itb.walker 2871 # number of demand (read+write) hits 370system.cpu.l2cache.demand_hits::cpu.inst 779612 # number of demand (read+write) hits 371system.cpu.l2cache.demand_hits::cpu.data 1454836 # number of demand (read+write) hits 372system.cpu.l2cache.demand_hits::total 2243852 # number of demand (read+write) hits 373system.cpu.l2cache.overall_hits::cpu.dtb.walker 6533 # number of overall hits 374system.cpu.l2cache.overall_hits::cpu.itb.walker 2871 # number of overall hits 375system.cpu.l2cache.overall_hits::cpu.inst 779612 # number of overall hits 376system.cpu.l2cache.overall_hits::cpu.data 1454836 # number of overall hits 377system.cpu.l2cache.overall_hits::total 2243852 # number of overall hits 378system.cpu.l2cache.UpgradeReq_misses::cpu.data 1349 # number of UpgradeReq misses 379system.cpu.l2cache.UpgradeReq_misses::total 1349 # number of UpgradeReq misses 380system.cpu.l2cache.ReadExReq_misses::cpu.data 134647 # number of ReadExReq misses 381system.cpu.l2cache.ReadExReq_misses::total 134647 # number of ReadExReq misses 382system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13234 # number of ReadCleanReq misses 383system.cpu.l2cache.ReadCleanReq_misses::total 13234 # number of ReadCleanReq misses 384system.cpu.l2cache.ReadSharedReq_misses::cpu.dtb.walker 1 # number of ReadSharedReq misses 385system.cpu.l2cache.ReadSharedReq_misses::cpu.itb.walker 5 # number of ReadSharedReq misses 386system.cpu.l2cache.ReadSharedReq_misses::cpu.data 32164 # number of ReadSharedReq misses 387system.cpu.l2cache.ReadSharedReq_misses::total 32170 # number of ReadSharedReq misses 388system.cpu.l2cache.demand_misses::cpu.dtb.walker 1 # number of demand (read+write) misses 389system.cpu.l2cache.demand_misses::cpu.itb.walker 5 # number of demand (read+write) misses 390system.cpu.l2cache.demand_misses::cpu.inst 13234 # number of demand (read+write) misses 391system.cpu.l2cache.demand_misses::cpu.data 166811 # number of demand (read+write) misses 392system.cpu.l2cache.demand_misses::total 180051 # number of demand (read+write) misses 393system.cpu.l2cache.overall_misses::cpu.dtb.walker 1 # number of overall misses 394system.cpu.l2cache.overall_misses::cpu.itb.walker 5 # number of overall misses 395system.cpu.l2cache.overall_misses::cpu.inst 13234 # number of overall misses 396system.cpu.l2cache.overall_misses::cpu.data 166811 # number of overall misses 397system.cpu.l2cache.overall_misses::total 180051 # number of overall misses 398system.cpu.l2cache.WritebackDirty_accesses::writebacks 1539387 # number of WritebackDirty accesses(hits+misses) 399system.cpu.l2cache.WritebackDirty_accesses::total 1539387 # number of WritebackDirty accesses(hits+misses) 400system.cpu.l2cache.WritebackClean_accesses::writebacks 792329 # number of WritebackClean accesses(hits+misses) 401system.cpu.l2cache.WritebackClean_accesses::total 792329 # number of WritebackClean accesses(hits+misses) 402system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1661 # number of UpgradeReq accesses(hits+misses) 403system.cpu.l2cache.UpgradeReq_accesses::total 1661 # number of UpgradeReq accesses(hits+misses) 404system.cpu.l2cache.ReadExReq_accesses::cpu.data 314413 # number of ReadExReq accesses(hits+misses) 405system.cpu.l2cache.ReadExReq_accesses::total 314413 # number of ReadExReq accesses(hits+misses) 406system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 792846 # number of ReadCleanReq accesses(hits+misses) 407system.cpu.l2cache.ReadCleanReq_accesses::total 792846 # number of ReadCleanReq accesses(hits+misses) 408system.cpu.l2cache.ReadSharedReq_accesses::cpu.dtb.walker 6534 # number of ReadSharedReq accesses(hits+misses) 409system.cpu.l2cache.ReadSharedReq_accesses::cpu.itb.walker 2876 # number of ReadSharedReq accesses(hits+misses) 410system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 1307234 # number of ReadSharedReq accesses(hits+misses) 411system.cpu.l2cache.ReadSharedReq_accesses::total 1316644 # number of ReadSharedReq accesses(hits+misses) 412system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6534 # number of demand (read+write) accesses 413system.cpu.l2cache.demand_accesses::cpu.itb.walker 2876 # number of demand (read+write) accesses 414system.cpu.l2cache.demand_accesses::cpu.inst 792846 # number of demand (read+write) accesses 415system.cpu.l2cache.demand_accesses::cpu.data 1621647 # number of demand (read+write) accesses 416system.cpu.l2cache.demand_accesses::total 2423903 # number of demand (read+write) accesses 417system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6534 # number of overall (read+write) accesses 418system.cpu.l2cache.overall_accesses::cpu.itb.walker 2876 # number of overall (read+write) accesses 419system.cpu.l2cache.overall_accesses::cpu.inst 792846 # number of overall (read+write) accesses 420system.cpu.l2cache.overall_accesses::cpu.data 1621647 # number of overall (read+write) accesses 421system.cpu.l2cache.overall_accesses::total 2423903 # number of overall (read+write) accesses 422system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.812161 # miss rate for UpgradeReq accesses 423system.cpu.l2cache.UpgradeReq_miss_rate::total 0.812161 # miss rate for UpgradeReq accesses 424system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428249 # miss rate for ReadExReq accesses 425system.cpu.l2cache.ReadExReq_miss_rate::total 0.428249 # miss rate for ReadExReq accesses 426system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.016692 # miss rate for ReadCleanReq accesses 427system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.016692 # miss rate for ReadCleanReq accesses 428system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.dtb.walker 0.000153 # miss rate for ReadSharedReq accesses 429system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.itb.walker 0.001739 # miss rate for ReadSharedReq accesses 430system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.024605 # miss rate for ReadSharedReq accesses 431system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.024433 # miss rate for ReadSharedReq accesses 432system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000153 # miss rate for demand accesses 433system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001739 # miss rate for demand accesses 434system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016692 # miss rate for demand accesses 435system.cpu.l2cache.demand_miss_rate::cpu.data 0.102865 # miss rate for demand accesses 436system.cpu.l2cache.demand_miss_rate::total 0.074281 # miss rate for demand accesses 437system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000153 # miss rate for overall accesses 438system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001739 # miss rate for overall accesses 439system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016692 # miss rate for overall accesses 440system.cpu.l2cache.overall_miss_rate::cpu.data 0.102865 # miss rate for overall accesses 441system.cpu.l2cache.overall_miss_rate::total 0.074281 # miss rate for overall accesses 442system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 443system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 444system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 445system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 446system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 447system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
460system.cpu.l2cache.fast_writes 0 # number of fast writes performed 461system.cpu.l2cache.cache_copies 0 # number of cache copies performed
462system.cpu.l2cache.writebacks::writebacks 98175 # number of writebacks 463system.cpu.l2cache.writebacks::total 98175 # number of writebacks	448system.cpu.l2cache.writebacks::writebacks 98175 # number of writebacks 449system.cpu.l2cache.writebacks::total 98175 # number of writebacks
464system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate
465system.cpu.toL2Bus.snoop_filter.tot_requests 4856494 # Total number of requests made to the snoop filter. 466system.cpu.toL2Bus.snoop_filter.hit_single_requests 2425336 # Number of requests hitting in the snoop filter with a single holder of the requested data. 467system.cpu.toL2Bus.snoop_filter.hit_multi_requests 11672 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 468system.cpu.toL2Bus.snoop_filter.tot_snoops 1230 # Total number of snoops made to the snoop filter. 469system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1230 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 470system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 471system.cpu.toL2Bus.trans_dist::ReadReq 13857337 # Transaction distribution 472system.cpu.toL2Bus.trans_dist::ReadResp 15971629 # Transaction distribution 473system.cpu.toL2Bus.trans_dist::WriteReq 13943 # Transaction distribution 474system.cpu.toL2Bus.trans_dist::WriteResp 13943 # Transaction distribution 475system.cpu.toL2Bus.trans_dist::WritebackDirty 1539387 # Transaction distribution 476system.cpu.toL2Bus.trans_dist::WritebackClean 792340 # Transaction distribution 477system.cpu.toL2Bus.trans_dist::CleanEvict 93857 # Transaction distribution 478system.cpu.toL2Bus.trans_dist::UpgradeReq 2200 # Transaction distribution 479system.cpu.toL2Bus.trans_dist::UpgradeResp 2200 # Transaction distribution 480system.cpu.toL2Bus.trans_dist::ReadExReq 314418 # Transaction distribution 481system.cpu.toL2Bus.trans_dist::ReadExResp 314418 # Transaction distribution 482system.cpu.toL2Bus.trans_dist::ReadCleanReq 792859 # Transaction distribution 483system.cpu.toL2Bus.trans_dist::ReadSharedReq 1321433 # Transaction distribution 484system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2378058 # Packet count per connected master and slave (bytes) 485system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32613747 # Packet count per connected master and slave (bytes) 486system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 12496 # Packet count per connected master and slave (bytes) 487system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 25663 # Packet count per connected master and slave (bytes) 488system.cpu.toL2Bus.pkt_count::total 35029964 # Packet count per connected master and slave (bytes) 489system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 101452736 # Cumulative packet size per connected master and slave (bytes) 490system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227551417 # Cumulative packet size per connected master and slave (bytes) 491system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 329920 # Cumulative packet size per connected master and slave (bytes) 492system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 758656 # Cumulative packet size per connected master and slave (bytes) 493system.cpu.toL2Bus.pkt_size::total 330092729 # Cumulative packet size per connected master and slave (bytes) 494system.cpu.toL2Bus.snoops 203468 # Total snoops (count) 495system.cpu.toL2Bus.snoop_fanout::samples 18930863 # Request fanout histogram 496system.cpu.toL2Bus.snoop_fanout::mean 0.001304 # Request fanout histogram 497system.cpu.toL2Bus.snoop_fanout::stdev 0.042949 # Request fanout histogram 498system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 499system.cpu.toL2Bus.snoop_fanout::0 18911304 99.90% 99.90% # Request fanout histogram 500system.cpu.toL2Bus.snoop_fanout::1 14428 0.08% 99.97% # Request fanout histogram 501system.cpu.toL2Bus.snoop_fanout::2 5131 0.03% 100.00% # Request fanout histogram 502system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 100.00% # Request fanout histogram 503system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 504system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 505system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 506system.cpu.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram 507system.cpu.toL2Bus.snoop_fanout::total 18930863 # Request fanout histogram 508system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution 509system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution 510system.iobus.trans_dist::WriteReq 57724 # Transaction distribution 511system.iobus.trans_dist::WriteResp 57724 # Transaction distribution 512system.iobus.trans_dist::MessageReq 1696 # Transaction distribution 513system.iobus.trans_dist::MessageResp 1696 # Transaction distribution 514system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes) 515system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) 516system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide.pio 11180 # Packet count per connected master and slave (bytes) 517system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.keyboard.pio 1364 # Packet count per connected master and slave (bytes) 518system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic1.pio 86 # Packet count per connected master and slave (bytes) 519system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic2.pio 54 # Packet count per connected master and slave (bytes) 520system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes) 521system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.speaker.pio 19999988 # Packet count per connected master and slave (bytes) 522system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.io_apic.pio 1098 # Packet count per connected master and slave (bytes) 523system.iobus.pkt_count_system.bridge.master::system.pc.i_dont_exist1.pio 170 # Packet count per connected master and slave (bytes) 524system.iobus.pkt_count_system.bridge.master::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) 525system.iobus.pkt_count_system.bridge.master::system.pc.com_1.pio 27940 # Packet count per connected master and slave (bytes) 526system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes) 527system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) 528system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) 529system.iobus.pkt_count_system.bridge.master::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) 530system.iobus.pkt_count_system.bridge.master::system.pc.pci_host.pio 2308 # Packet count per connected master and slave (bytes) 531system.iobus.pkt_count_system.bridge.master::total 20044316 # Packet count per connected master and slave (bytes) 532system.iobus.pkt_count_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 95246 # Packet count per connected master and slave (bytes) 533system.iobus.pkt_count_system.pc.south_bridge.ide.dma::total 95246 # Packet count per connected master and slave (bytes) 534system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 3392 # Packet count per connected master and slave (bytes) 535system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3392 # Packet count per connected master and slave (bytes) 536system.iobus.pkt_count::total 20142954 # Packet count per connected master and slave (bytes) 537system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.cmos.pio 22 # Cumulative packet size per connected master and slave (bytes) 538system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) 539system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide.pio 6738 # Cumulative packet size per connected master and slave (bytes) 540system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.keyboard.pio 682 # Cumulative packet size per connected master and slave (bytes) 541system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic1.pio 43 # Cumulative packet size per connected master and slave (bytes) 542system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic2.pio 27 # Cumulative packet size per connected master and slave (bytes) 543system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes) 544system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.speaker.pio 9999994 # Cumulative packet size per connected master and slave (bytes) 545system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.io_apic.pio 2196 # Cumulative packet size per connected master and slave (bytes) 546system.iobus.pkt_size_system.bridge.master::system.pc.i_dont_exist1.pio 85 # Cumulative packet size per connected master and slave (bytes) 547system.iobus.pkt_size_system.bridge.master::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) 548system.iobus.pkt_size_system.bridge.master::system.pc.com_1.pio 13970 # Cumulative packet size per connected master and slave (bytes) 549system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes) 550system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) 551system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) 552system.iobus.pkt_size_system.bridge.master::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) 553system.iobus.pkt_size_system.bridge.master::system.pc.pci_host.pio 4477 # Cumulative packet size per connected master and slave (bytes) 554system.iobus.pkt_size_system.bridge.master::total 10028276 # Cumulative packet size per connected master and slave (bytes) 555system.iobus.pkt_size_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 3027768 # Cumulative packet size per connected master and slave (bytes) 556system.iobus.pkt_size_system.pc.south_bridge.ide.dma::total 3027768 # Cumulative packet size per connected master and slave (bytes) 557system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6784 # Cumulative packet size per connected master and slave (bytes) 558system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6784 # Cumulative packet size per connected master and slave (bytes) 559system.iobus.pkt_size::total 13062828 # Cumulative packet size per connected master and slave (bytes) 560system.iocache.tags.replacements 47568 # number of replacements 561system.iocache.tags.tagsinuse 0.042439 # Cycle average of tags in use 562system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 563system.iocache.tags.sampled_refs 47584 # Sample count of references to valid blocks. 564system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 565system.iocache.tags.warmup_cycle 4994875253009 # Cycle when the warmup percentage was hit. 566system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042439 # Average occupied blocks per requestor 567system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002652 # Average percentage of cache occupancy 568system.iocache.tags.occ_percent::total 0.002652 # Average percentage of cache occupancy 569system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 570system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 571system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 572system.iocache.tags.tag_accesses 428607 # Number of tag accesses 573system.iocache.tags.data_accesses 428607 # Number of data accesses 574system.iocache.ReadReq_misses::pc.south_bridge.ide 903 # number of ReadReq misses 575system.iocache.ReadReq_misses::total 903 # number of ReadReq misses 576system.iocache.WriteLineReq_misses::pc.south_bridge.ide 46720 # number of WriteLineReq misses 577system.iocache.WriteLineReq_misses::total 46720 # number of WriteLineReq misses	450system.cpu.toL2Bus.snoop_filter.tot_requests 4856494 # Total number of requests made to the snoop filter. 451system.cpu.toL2Bus.snoop_filter.hit_single_requests 2425336 # Number of requests hitting in the snoop filter with a single holder of the requested data. 452system.cpu.toL2Bus.snoop_filter.hit_multi_requests 11672 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 453system.cpu.toL2Bus.snoop_filter.tot_snoops 1230 # Total number of snoops made to the snoop filter. 454system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1230 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 455system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 456system.cpu.toL2Bus.trans_dist::ReadReq 13857337 # Transaction distribution 457system.cpu.toL2Bus.trans_dist::ReadResp 15971629 # Transaction distribution 458system.cpu.toL2Bus.trans_dist::WriteReq 13943 # Transaction distribution 459system.cpu.toL2Bus.trans_dist::WriteResp 13943 # Transaction distribution 460system.cpu.toL2Bus.trans_dist::WritebackDirty 1539387 # Transaction distribution 461system.cpu.toL2Bus.trans_dist::WritebackClean 792340 # Transaction distribution 462system.cpu.toL2Bus.trans_dist::CleanEvict 93857 # Transaction distribution 463system.cpu.toL2Bus.trans_dist::UpgradeReq 2200 # Transaction distribution 464system.cpu.toL2Bus.trans_dist::UpgradeResp 2200 # Transaction distribution 465system.cpu.toL2Bus.trans_dist::ReadExReq 314418 # Transaction distribution 466system.cpu.toL2Bus.trans_dist::ReadExResp 314418 # Transaction distribution 467system.cpu.toL2Bus.trans_dist::ReadCleanReq 792859 # Transaction distribution 468system.cpu.toL2Bus.trans_dist::ReadSharedReq 1321433 # Transaction distribution 469system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2378058 # Packet count per connected master and slave (bytes) 470system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32613747 # Packet count per connected master and slave (bytes) 471system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 12496 # Packet count per connected master and slave (bytes) 472system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 25663 # Packet count per connected master and slave (bytes) 473system.cpu.toL2Bus.pkt_count::total 35029964 # Packet count per connected master and slave (bytes) 474system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 101452736 # Cumulative packet size per connected master and slave (bytes) 475system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227551417 # Cumulative packet size per connected master and slave (bytes) 476system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 329920 # Cumulative packet size per connected master and slave (bytes) 477system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 758656 # Cumulative packet size per connected master and slave (bytes) 478system.cpu.toL2Bus.pkt_size::total 330092729 # Cumulative packet size per connected master and slave (bytes) 479system.cpu.toL2Bus.snoops 203468 # Total snoops (count) 480system.cpu.toL2Bus.snoop_fanout::samples 18930863 # Request fanout histogram 481system.cpu.toL2Bus.snoop_fanout::mean 0.001304 # Request fanout histogram 482system.cpu.toL2Bus.snoop_fanout::stdev 0.042949 # Request fanout histogram 483system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 484system.cpu.toL2Bus.snoop_fanout::0 18911304 99.90% 99.90% # Request fanout histogram 485system.cpu.toL2Bus.snoop_fanout::1 14428 0.08% 99.97% # Request fanout histogram 486system.cpu.toL2Bus.snoop_fanout::2 5131 0.03% 100.00% # Request fanout histogram 487system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 100.00% # Request fanout histogram 488system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 489system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 490system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 491system.cpu.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram 492system.cpu.toL2Bus.snoop_fanout::total 18930863 # Request fanout histogram 493system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution 494system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution 495system.iobus.trans_dist::WriteReq 57724 # Transaction distribution 496system.iobus.trans_dist::WriteResp 57724 # Transaction distribution 497system.iobus.trans_dist::MessageReq 1696 # Transaction distribution 498system.iobus.trans_dist::MessageResp 1696 # Transaction distribution 499system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.cmos.pio 44 # Packet count per connected master and slave (bytes) 500system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.dma1.pio 6 # Packet count per connected master and slave (bytes) 501system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.ide.pio 11180 # Packet count per connected master and slave (bytes) 502system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.keyboard.pio 1364 # Packet count per connected master and slave (bytes) 503system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic1.pio 86 # Packet count per connected master and slave (bytes) 504system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pic2.pio 54 # Packet count per connected master and slave (bytes) 505system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.pit.pio 30 # Packet count per connected master and slave (bytes) 506system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.speaker.pio 19999988 # Packet count per connected master and slave (bytes) 507system.iobus.pkt_count_system.bridge.master::system.pc.south_bridge.io_apic.pio 1098 # Packet count per connected master and slave (bytes) 508system.iobus.pkt_count_system.bridge.master::system.pc.i_dont_exist1.pio 170 # Packet count per connected master and slave (bytes) 509system.iobus.pkt_count_system.bridge.master::system.pc.behind_pci.pio 2 # Packet count per connected master and slave (bytes) 510system.iobus.pkt_count_system.bridge.master::system.pc.com_1.pio 27940 # Packet count per connected master and slave (bytes) 511system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_2.pio 12 # Packet count per connected master and slave (bytes) 512system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_3.pio 12 # Packet count per connected master and slave (bytes) 513system.iobus.pkt_count_system.bridge.master::system.pc.fake_com_4.pio 12 # Packet count per connected master and slave (bytes) 514system.iobus.pkt_count_system.bridge.master::system.pc.fake_floppy.pio 10 # Packet count per connected master and slave (bytes) 515system.iobus.pkt_count_system.bridge.master::system.pc.pci_host.pio 2308 # Packet count per connected master and slave (bytes) 516system.iobus.pkt_count_system.bridge.master::total 20044316 # Packet count per connected master and slave (bytes) 517system.iobus.pkt_count_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 95246 # Packet count per connected master and slave (bytes) 518system.iobus.pkt_count_system.pc.south_bridge.ide.dma::total 95246 # Packet count per connected master and slave (bytes) 519system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 3392 # Packet count per connected master and slave (bytes) 520system.iobus.pkt_count_system.pc.south_bridge.io_apic.int_master::total 3392 # Packet count per connected master and slave (bytes) 521system.iobus.pkt_count::total 20142954 # Packet count per connected master and slave (bytes) 522system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.cmos.pio 22 # Cumulative packet size per connected master and slave (bytes) 523system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.dma1.pio 3 # Cumulative packet size per connected master and slave (bytes) 524system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.ide.pio 6738 # Cumulative packet size per connected master and slave (bytes) 525system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.keyboard.pio 682 # Cumulative packet size per connected master and slave (bytes) 526system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic1.pio 43 # Cumulative packet size per connected master and slave (bytes) 527system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pic2.pio 27 # Cumulative packet size per connected master and slave (bytes) 528system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.pit.pio 15 # Cumulative packet size per connected master and slave (bytes) 529system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.speaker.pio 9999994 # Cumulative packet size per connected master and slave (bytes) 530system.iobus.pkt_size_system.bridge.master::system.pc.south_bridge.io_apic.pio 2196 # Cumulative packet size per connected master and slave (bytes) 531system.iobus.pkt_size_system.bridge.master::system.pc.i_dont_exist1.pio 85 # Cumulative packet size per connected master and slave (bytes) 532system.iobus.pkt_size_system.bridge.master::system.pc.behind_pci.pio 1 # Cumulative packet size per connected master and slave (bytes) 533system.iobus.pkt_size_system.bridge.master::system.pc.com_1.pio 13970 # Cumulative packet size per connected master and slave (bytes) 534system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_2.pio 6 # Cumulative packet size per connected master and slave (bytes) 535system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_3.pio 6 # Cumulative packet size per connected master and slave (bytes) 536system.iobus.pkt_size_system.bridge.master::system.pc.fake_com_4.pio 6 # Cumulative packet size per connected master and slave (bytes) 537system.iobus.pkt_size_system.bridge.master::system.pc.fake_floppy.pio 5 # Cumulative packet size per connected master and slave (bytes) 538system.iobus.pkt_size_system.bridge.master::system.pc.pci_host.pio 4477 # Cumulative packet size per connected master and slave (bytes) 539system.iobus.pkt_size_system.bridge.master::total 10028276 # Cumulative packet size per connected master and slave (bytes) 540system.iobus.pkt_size_system.pc.south_bridge.ide.dma::system.iocache.cpu_side 3027768 # Cumulative packet size per connected master and slave (bytes) 541system.iobus.pkt_size_system.pc.south_bridge.ide.dma::total 3027768 # Cumulative packet size per connected master and slave (bytes) 542system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbridge.slave 6784 # Cumulative packet size per connected master and slave (bytes) 543system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6784 # Cumulative packet size per connected master and slave (bytes) 544system.iobus.pkt_size::total 13062828 # Cumulative packet size per connected master and slave (bytes) 545system.iocache.tags.replacements 47568 # number of replacements 546system.iocache.tags.tagsinuse 0.042439 # Cycle average of tags in use 547system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 548system.iocache.tags.sampled_refs 47584 # Sample count of references to valid blocks. 549system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 550system.iocache.tags.warmup_cycle 4994875253009 # Cycle when the warmup percentage was hit. 551system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042439 # Average occupied blocks per requestor 552system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002652 # Average percentage of cache occupancy 553system.iocache.tags.occ_percent::total 0.002652 # Average percentage of cache occupancy 554system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 555system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 556system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 557system.iocache.tags.tag_accesses 428607 # Number of tag accesses 558system.iocache.tags.data_accesses 428607 # Number of data accesses 559system.iocache.ReadReq_misses::pc.south_bridge.ide 903 # number of ReadReq misses 560system.iocache.ReadReq_misses::total 903 # number of ReadReq misses 561system.iocache.WriteLineReq_misses::pc.south_bridge.ide 46720 # number of WriteLineReq misses 562system.iocache.WriteLineReq_misses::total 46720 # number of WriteLineReq misses
578system.iocache.demand_misses::pc.south_bridge.ide 903 # number of demand (read+write) misses 579system.iocache.demand_misses::total 903 # number of demand (read+write) misses 580system.iocache.overall_misses::pc.south_bridge.ide 903 # number of overall misses 581system.iocache.overall_misses::total 903 # number of overall misses	563system.iocache.demand_misses::pc.south_bridge.ide 47623 # number of demand (read+write) misses 564system.iocache.demand_misses::total 47623 # number of demand (read+write) misses 565system.iocache.overall_misses::pc.south_bridge.ide 47623 # number of overall misses 566system.iocache.overall_misses::total 47623 # number of overall misses
582system.iocache.ReadReq_accesses::pc.south_bridge.ide 903 # number of ReadReq accesses(hits+misses) 583system.iocache.ReadReq_accesses::total 903 # number of ReadReq accesses(hits+misses) 584system.iocache.WriteLineReq_accesses::pc.south_bridge.ide 46720 # number of WriteLineReq accesses(hits+misses) 585system.iocache.WriteLineReq_accesses::total 46720 # number of WriteLineReq accesses(hits+misses)	567system.iocache.ReadReq_accesses::pc.south_bridge.ide 903 # number of ReadReq accesses(hits+misses) 568system.iocache.ReadReq_accesses::total 903 # number of ReadReq accesses(hits+misses) 569system.iocache.WriteLineReq_accesses::pc.south_bridge.ide 46720 # number of WriteLineReq accesses(hits+misses) 570system.iocache.WriteLineReq_accesses::total 46720 # number of WriteLineReq accesses(hits+misses)
586system.iocache.demand_accesses::pc.south_bridge.ide 903 # number of demand (read+write) accesses 587system.iocache.demand_accesses::total 903 # number of demand (read+write) accesses 588system.iocache.overall_accesses::pc.south_bridge.ide 903 # number of overall (read+write) accesses 589system.iocache.overall_accesses::total 903 # number of overall (read+write) accesses	571system.iocache.demand_accesses::pc.south_bridge.ide 47623 # number of demand (read+write) accesses 572system.iocache.demand_accesses::total 47623 # number of demand (read+write) accesses 573system.iocache.overall_accesses::pc.south_bridge.ide 47623 # number of overall (read+write) accesses 574system.iocache.overall_accesses::total 47623 # number of overall (read+write) accesses
590system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses 591system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 592system.iocache.WriteLineReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteLineReq accesses 593system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 594system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses 595system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 596system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses 597system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 598system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 599system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 600system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 601system.iocache.blocked::no_targets 0 # number of cycles access was blocked 602system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 603system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked	575system.iocache.ReadReq_miss_rate::pc.south_bridge.ide 1 # miss rate for ReadReq accesses 576system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 577system.iocache.WriteLineReq_miss_rate::pc.south_bridge.ide 1 # miss rate for WriteLineReq accesses 578system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 579system.iocache.demand_miss_rate::pc.south_bridge.ide 1 # miss rate for demand accesses 580system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 581system.iocache.overall_miss_rate::pc.south_bridge.ide 1 # miss rate for overall accesses 582system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 583system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 584system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 585system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 586system.iocache.blocked::no_targets 0 # number of cycles access was blocked 587system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 588system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
604system.iocache.fast_writes 0 # number of fast writes performed 605system.iocache.cache_copies 0 # number of cache copies performed
606system.iocache.writebacks::writebacks 46667 # number of writebacks 607system.iocache.writebacks::total 46667 # number of writebacks	589system.iocache.writebacks::writebacks 46667 # number of writebacks 590system.iocache.writebacks::total 46667 # number of writebacks
608system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
609system.membus.trans_dist::ReadReq 13857337 # Transaction distribution 610system.membus.trans_dist::ReadResp 13903644 # Transaction distribution 611system.membus.trans_dist::WriteReq 13943 # Transaction distribution 612system.membus.trans_dist::WriteResp 13943 # Transaction distribution 613system.membus.trans_dist::WritebackDirty 144842 # Transaction distribution 614system.membus.trans_dist::CleanEvict 8802 # Transaction distribution 615system.membus.trans_dist::UpgradeReq 2189 # Transaction distribution 616system.membus.trans_dist::UpgradeResp 1650 # Transaction distribution 617system.membus.trans_dist::ReadExReq 134346 # Transaction distribution 618system.membus.trans_dist::ReadExResp 134346 # Transaction distribution 619system.membus.trans_dist::ReadSharedReq 46307 # Transaction distribution 620system.membus.trans_dist::MessageReq 1696 # Transaction distribution 621system.membus.trans_dist::MessageResp 1696 # Transaction distribution 622system.membus.trans_dist::InvalidateReq 46720 # Transaction distribution 623system.membus.trans_dist::InvalidateResp 46720 # Transaction distribution 624system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes) 625system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) 626system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes) 627system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) 628system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 469415 # Packet count per connected master and slave (bytes) 629system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28211975 # Packet count per connected master and slave (bytes) 630system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 142814 # Packet count per connected master and slave (bytes) 631system.membus.pkt_count_system.iocache.mem_side::total 142814 # Packet count per connected master and slave (bytes) 632system.membus.pkt_count::total 28358181 # Packet count per connected master and slave (bytes) 633system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) 634system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) 635system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes) 636system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) 637system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17787200 # Cumulative packet size per connected master and slave (bytes) 638system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43211961 # Cumulative packet size per connected master and slave (bytes) 639system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 3044480 # Cumulative packet size per connected master and slave (bytes) 640system.membus.pkt_size_system.iocache.mem_side::total 3044480 # Cumulative packet size per connected master and slave (bytes) 641system.membus.pkt_size::total 46263225 # Cumulative packet size per connected master and slave (bytes) 642system.membus.snoops 0 # Total snoops (count) 643system.membus.snoop_fanout::samples 14256182 # Request fanout histogram 644system.membus.snoop_fanout::mean 1.000119 # Request fanout histogram 645system.membus.snoop_fanout::stdev 0.010907 # Request fanout histogram 646system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 647system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 648system.membus.snoop_fanout::1 14254486 99.99% 99.99% # Request fanout histogram 649system.membus.snoop_fanout::2 1696 0.01% 100.00% # Request fanout histogram 650system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 651system.membus.snoop_fanout::min_value 1 # Request fanout histogram 652system.membus.snoop_fanout::max_value 2 # Request fanout histogram 653system.membus.snoop_fanout::total 14256182 # Request fanout histogram 654system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 655system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). 656system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). 657system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 658system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 659system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 660system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 661system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 662system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 663system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 664system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 665system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 666 667---------- End Simulation Statistics ----------	591system.membus.trans_dist::ReadReq 13857337 # Transaction distribution 592system.membus.trans_dist::ReadResp 13903644 # Transaction distribution 593system.membus.trans_dist::WriteReq 13943 # Transaction distribution 594system.membus.trans_dist::WriteResp 13943 # Transaction distribution 595system.membus.trans_dist::WritebackDirty 144842 # Transaction distribution 596system.membus.trans_dist::CleanEvict 8802 # Transaction distribution 597system.membus.trans_dist::UpgradeReq 2189 # Transaction distribution 598system.membus.trans_dist::UpgradeResp 1650 # Transaction distribution 599system.membus.trans_dist::ReadExReq 134346 # Transaction distribution 600system.membus.trans_dist::ReadExResp 134346 # Transaction distribution 601system.membus.trans_dist::ReadSharedReq 46307 # Transaction distribution 602system.membus.trans_dist::MessageReq 1696 # Transaction distribution 603system.membus.trans_dist::MessageResp 1696 # Transaction distribution 604system.membus.trans_dist::InvalidateReq 46720 # Transaction distribution 605system.membus.trans_dist::InvalidateResp 46720 # Transaction distribution 606system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slave 3392 # Packet count per connected master and slave (bytes) 607system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) 608system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes) 609system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) 610system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 469415 # Packet count per connected master and slave (bytes) 611system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28211975 # Packet count per connected master and slave (bytes) 612system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 142814 # Packet count per connected master and slave (bytes) 613system.membus.pkt_count_system.iocache.mem_side::total 142814 # Packet count per connected master and slave (bytes) 614system.membus.pkt_count::total 28358181 # Packet count per connected master and slave (bytes) 615system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) 616system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) 617system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes) 618system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) 619system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17787200 # Cumulative packet size per connected master and slave (bytes) 620system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43211961 # Cumulative packet size per connected master and slave (bytes) 621system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 3044480 # Cumulative packet size per connected master and slave (bytes) 622system.membus.pkt_size_system.iocache.mem_side::total 3044480 # Cumulative packet size per connected master and slave (bytes) 623system.membus.pkt_size::total 46263225 # Cumulative packet size per connected master and slave (bytes) 624system.membus.snoops 0 # Total snoops (count) 625system.membus.snoop_fanout::samples 14256182 # Request fanout histogram 626system.membus.snoop_fanout::mean 1.000119 # Request fanout histogram 627system.membus.snoop_fanout::stdev 0.010907 # Request fanout histogram 628system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 629system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram 630system.membus.snoop_fanout::1 14254486 99.99% 99.99% # Request fanout histogram 631system.membus.snoop_fanout::2 1696 0.01% 100.00% # Request fanout histogram 632system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 633system.membus.snoop_fanout::min_value 1 # Request fanout histogram 634system.membus.snoop_fanout::max_value 2 # Request fanout histogram 635system.membus.snoop_fanout::total 14256182 # Request fanout histogram 636system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 637system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). 638system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). 639system.pc.south_bridge.ide.disks0.dma_write_full_pages 693 # Number of full page size DMA writes. 640system.pc.south_bridge.ide.disks0.dma_write_bytes 2985984 # Number of bytes transfered via DMA writes. 641system.pc.south_bridge.ide.disks0.dma_write_txs 812 # Number of DMA write transactions. 642system.pc.south_bridge.ide.disks1.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 643system.pc.south_bridge.ide.disks1.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 644system.pc.south_bridge.ide.disks1.dma_read_txs 0 # Number of DMA read transactions (not PRD). 645system.pc.south_bridge.ide.disks1.dma_write_full_pages 1 # Number of full page size DMA writes. 646system.pc.south_bridge.ide.disks1.dma_write_bytes 4096 # Number of bytes transfered via DMA writes. 647system.pc.south_bridge.ide.disks1.dma_write_txs 1 # Number of DMA write transactions. 648 649---------- End Simulation Statistics ----------