| config.ini (9361:5b6087e0750f) | config.ini (9474:23c3e1c0e9e4) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 5 unchanged lines hidden (view full) --- 14clock=1000 15e820_table=system.e820_table 16init_param=0 17intel_mp_pointer=system.intel_mp_pointer 18intel_mp_table=system.intel_mp_table 19kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9 20load_addr_mask=18446744073709551615 21mem_mode=atomic | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 5 unchanged lines hidden (view full) --- 14clock=1000 15e820_table=system.e820_table 16init_param=0 17intel_mp_pointer=system.intel_mp_pointer 18intel_mp_table=system.intel_mp_table 19kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9 20load_addr_mask=18446744073709551615 21mem_mode=atomic |
| 22mem_ranges=0:134217727 |
|
| 22memories=system.physmem 23num_work_ids=16 24readfile=tests/halt.sh 25smbios_table=system.smbios_table 26symbolfile= 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 --- 37 unchanged lines hidden (view full) --- 67ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615 68req_size=16 69resp_size=16 70master=system.iobus.slave[0] 71slave=system.membus.master[1] 72 73[system.cpu] 74type=AtomicSimpleCPU | 23memories=system.physmem 24num_work_ids=16 25readfile=tests/halt.sh 26smbios_table=system.smbios_table 27symbolfile= 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 --- 37 unchanged lines hidden (view full) --- 68ranges=4273995776:4273999871 9223372036854775808:11529215046068469759 13835058055282163712:18446744073709551615 69req_size=16 70resp_size=16 71master=system.iobus.slave[0] 72slave=system.membus.master[1] 73 74[system.cpu] 75type=AtomicSimpleCPU |
| 75children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer | 76children=dcache dtb dtb_walker_cache icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer |
| 76checker=Null 77clock=500 78cpu_id=0 | 77checker=Null 78clock=500 79cpu_id=0 |
| 79defer_registration=false | |
| 80do_checkpoint_insts=true 81do_quiesce=true 82do_statistics_insts=true 83dtb=system.cpu.dtb 84fastmem=false 85function_trace=false 86function_trace_start=0 87interrupts=system.cpu.interrupts | 80do_checkpoint_insts=true 81do_quiesce=true 82do_statistics_insts=true 83dtb=system.cpu.dtb 84fastmem=false 85function_trace=false 86function_trace_start=0 87interrupts=system.cpu.interrupts |
| 88isa=system.cpu.isa |
|
| 88itb=system.cpu.itb 89max_insts_all_threads=0 90max_insts_any_thread=0 91max_loads_all_threads=0 92max_loads_any_thread=0 93numThreads=1 94profile=0 95progress_interval=0 96simulate_data_stalls=false 97simulate_inst_stalls=false | 89itb=system.cpu.itb 90max_insts_all_threads=0 91max_insts_any_thread=0 92max_loads_all_threads=0 93max_loads_any_thread=0 94numThreads=1 95profile=0 96progress_interval=0 97simulate_data_stalls=false 98simulate_inst_stalls=false |
| 99switched_out=false |
|
| 98system=system 99tracer=system.cpu.tracer 100width=1 101workload= 102dcache_port=system.cpu.dcache.cpu_side 103icache_port=system.cpu.icache.cpu_side 104 105[system.cpu.dcache] 106type=BaseCache 107addr_ranges=0:18446744073709551615 108assoc=4 109block_size=64 110clock=500 111forward_snoops=true | 100system=system 101tracer=system.cpu.tracer 102width=1 103workload= 104dcache_port=system.cpu.dcache.cpu_side 105icache_port=system.cpu.icache.cpu_side 106 107[system.cpu.dcache] 108type=BaseCache 109addr_ranges=0:18446744073709551615 110assoc=4 111block_size=64 112clock=500 113forward_snoops=true |
| 112hash_delay=1 | |
| 113hit_latency=2 114is_top_level=true 115max_miss_count=0 116mshrs=4 117prefetch_on_access=false 118prefetcher=Null | 114hit_latency=2 115is_top_level=true 116max_miss_count=0 117mshrs=4 118prefetch_on_access=false 119prefetcher=Null |
| 119prioritizeRequests=false 120repl=Null | |
| 121response_latency=2 122size=32768 | 120response_latency=2 121size=32768 |
| 123subblock_size=0 | |
| 124system=system 125tgts_per_mshr=20 | 122system=system 123tgts_per_mshr=20 |
| 126trace_addr=0 | |
| 127two_queue=false 128write_buffers=8 129cpu_side=system.cpu.dcache_port 130mem_side=system.cpu.toL2Bus.slave[1] 131 132[system.cpu.dtb] 133type=X86TLB 134children=walker --- 8 unchanged lines hidden (view full) --- 143 144[system.cpu.dtb_walker_cache] 145type=BaseCache 146addr_ranges=0:18446744073709551615 147assoc=2 148block_size=64 149clock=500 150forward_snoops=true | 124two_queue=false 125write_buffers=8 126cpu_side=system.cpu.dcache_port 127mem_side=system.cpu.toL2Bus.slave[1] 128 129[system.cpu.dtb] 130type=X86TLB 131children=walker --- 8 unchanged lines hidden (view full) --- 140 141[system.cpu.dtb_walker_cache] 142type=BaseCache 143addr_ranges=0:18446744073709551615 144assoc=2 145block_size=64 146clock=500 147forward_snoops=true |
| 151hash_delay=1 | |
| 152hit_latency=2 153is_top_level=true 154max_miss_count=0 155mshrs=10 156prefetch_on_access=false 157prefetcher=Null | 148hit_latency=2 149is_top_level=true 150max_miss_count=0 151mshrs=10 152prefetch_on_access=false 153prefetcher=Null |
| 158prioritizeRequests=false 159repl=Null | |
| 160response_latency=2 161size=1024 | 154response_latency=2 155size=1024 |
| 162subblock_size=0 | |
| 163system=system 164tgts_per_mshr=12 | 156system=system 157tgts_per_mshr=12 |
| 165trace_addr=0 | |
| 166two_queue=false 167write_buffers=8 168cpu_side=system.cpu.dtb.walker.port 169mem_side=system.cpu.toL2Bus.slave[3] 170 171[system.cpu.icache] 172type=BaseCache 173addr_ranges=0:18446744073709551615 174assoc=1 175block_size=64 176clock=500 177forward_snoops=true | 158two_queue=false 159write_buffers=8 160cpu_side=system.cpu.dtb.walker.port 161mem_side=system.cpu.toL2Bus.slave[3] 162 163[system.cpu.icache] 164type=BaseCache 165addr_ranges=0:18446744073709551615 166assoc=1 167block_size=64 168clock=500 169forward_snoops=true |
| 178hash_delay=1 | |
| 179hit_latency=2 180is_top_level=true 181max_miss_count=0 182mshrs=4 183prefetch_on_access=false 184prefetcher=Null | 170hit_latency=2 171is_top_level=true 172max_miss_count=0 173mshrs=4 174prefetch_on_access=false 175prefetcher=Null |
| 185prioritizeRequests=false 186repl=Null | |
| 187response_latency=2 188size=32768 | 176response_latency=2 177size=32768 |
| 189subblock_size=0 | |
| 190system=system 191tgts_per_mshr=20 | 178system=system 179tgts_per_mshr=20 |
| 192trace_addr=0 | |
| 193two_queue=false 194write_buffers=8 195cpu_side=system.cpu.icache_port 196mem_side=system.cpu.toL2Bus.slave[0] 197 198[system.cpu.interrupts] 199type=X86LocalApic 200clock=500 201int_latency=1000 202pio_addr=2305843009213693952 203pio_latency=100000 204system=system | 180two_queue=false 181write_buffers=8 182cpu_side=system.cpu.icache_port 183mem_side=system.cpu.toL2Bus.slave[0] 184 185[system.cpu.interrupts] 186type=X86LocalApic 187clock=500 188int_latency=1000 189pio_addr=2305843009213693952 190pio_latency=100000 191system=system |
| 205int_master=system.membus.slave[4] | 192int_master=system.membus.slave[3] |
| 206int_slave=system.membus.master[3] 207pio=system.membus.master[2] 208 | 193int_slave=system.membus.master[3] 194pio=system.membus.master[2] 195 |
| 196[system.cpu.isa] 197type=X86ISA 198 |
|
| 209[system.cpu.itb] 210type=X86TLB 211children=walker 212size=64 213walker=system.cpu.itb.walker 214 215[system.cpu.itb.walker] 216type=X86PagetableWalker 217clock=500 218system=system 219port=system.cpu.itb_walker_cache.cpu_side 220 221[system.cpu.itb_walker_cache] 222type=BaseCache 223addr_ranges=0:18446744073709551615 224assoc=2 225block_size=64 226clock=500 227forward_snoops=true | 199[system.cpu.itb] 200type=X86TLB 201children=walker 202size=64 203walker=system.cpu.itb.walker 204 205[system.cpu.itb.walker] 206type=X86PagetableWalker 207clock=500 208system=system 209port=system.cpu.itb_walker_cache.cpu_side 210 211[system.cpu.itb_walker_cache] 212type=BaseCache 213addr_ranges=0:18446744073709551615 214assoc=2 215block_size=64 216clock=500 217forward_snoops=true |
| 228hash_delay=1 | |
| 229hit_latency=2 230is_top_level=true 231max_miss_count=0 232mshrs=10 233prefetch_on_access=false 234prefetcher=Null | 218hit_latency=2 219is_top_level=true 220max_miss_count=0 221mshrs=10 222prefetch_on_access=false 223prefetcher=Null |
| 235prioritizeRequests=false 236repl=Null | |
| 237response_latency=2 238size=1024 | 224response_latency=2 225size=1024 |
| 239subblock_size=0 | |
| 240system=system 241tgts_per_mshr=12 | 226system=system 227tgts_per_mshr=12 |
| 242trace_addr=0 | |
| 243two_queue=false 244write_buffers=8 245cpu_side=system.cpu.itb.walker.port 246mem_side=system.cpu.toL2Bus.slave[2] 247 248[system.cpu.l2cache] 249type=BaseCache 250addr_ranges=0:18446744073709551615 251assoc=8 252block_size=64 253clock=500 254forward_snoops=true | 228two_queue=false 229write_buffers=8 230cpu_side=system.cpu.itb.walker.port 231mem_side=system.cpu.toL2Bus.slave[2] 232 233[system.cpu.l2cache] 234type=BaseCache 235addr_ranges=0:18446744073709551615 236assoc=8 237block_size=64 238clock=500 239forward_snoops=true |
| 255hash_delay=1 | |
| 256hit_latency=20 257is_top_level=false 258max_miss_count=0 259mshrs=20 260prefetch_on_access=false 261prefetcher=Null | 240hit_latency=20 241is_top_level=false 242max_miss_count=0 243mshrs=20 244prefetch_on_access=false 245prefetcher=Null |
| 262prioritizeRequests=false 263repl=Null | |
| 264response_latency=20 265size=4194304 | 246response_latency=20 247size=4194304 |
| 266subblock_size=0 | |
| 267system=system 268tgts_per_mshr=12 | 248system=system 249tgts_per_mshr=12 |
| 269trace_addr=0 | |
| 270two_queue=false 271write_buffers=8 272cpu_side=system.cpu.toL2Bus.master[0] | 250two_queue=false 251write_buffers=8 252cpu_side=system.cpu.toL2Bus.master[0] |
| 273mem_side=system.membus.slave[3] | 253mem_side=system.membus.slave[2] |
| 274 275[system.cpu.toL2Bus] 276type=CoherentBus 277block_size=64 278clock=500 279header_cycles=1 280use_default_range=false 281width=32 --- 379 unchanged lines hidden (view full) --- 661 662[system.iocache] 663type=BaseCache 664addr_ranges=0:134217727 665assoc=8 666block_size=64 667clock=1000 668forward_snoops=false | 254 255[system.cpu.toL2Bus] 256type=CoherentBus 257block_size=64 258clock=500 259header_cycles=1 260use_default_range=false 261width=32 --- 379 unchanged lines hidden (view full) --- 641 642[system.iocache] 643type=BaseCache 644addr_ranges=0:134217727 645assoc=8 646block_size=64 647clock=1000 648forward_snoops=false |
| 669hash_delay=1 | |
| 670hit_latency=50 671is_top_level=true 672max_miss_count=0 673mshrs=20 674prefetch_on_access=false 675prefetcher=Null | 649hit_latency=50 650is_top_level=true 651max_miss_count=0 652mshrs=20 653prefetch_on_access=false 654prefetcher=Null |
| 676prioritizeRequests=false 677repl=Null | |
| 678response_latency=50 679size=1024 | 655response_latency=50 656size=1024 |
| 680subblock_size=0 | |
| 681system=system 682tgts_per_mshr=12 | 657system=system 658tgts_per_mshr=12 |
| 683trace_addr=0 | |
| 684two_queue=false 685write_buffers=8 686cpu_side=system.iobus.master[18] | 659two_queue=false 660write_buffers=8 661cpu_side=system.iobus.master[18] |
| 687mem_side=system.membus.slave[2] | 662mem_side=system.membus.slave[4] |
| 688 689[system.membus] 690type=CoherentBus 691children=badaddr_responder 692block_size=64 693clock=1000 694header_cycles=1 695use_default_range=false 696width=8 697default=system.membus.badaddr_responder.pio 698master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave | 663 664[system.membus] 665type=CoherentBus 666children=badaddr_responder 667block_size=64 668clock=1000 669header_cycles=1 670use_default_range=false 671width=8 672default=system.membus.badaddr_responder.pio 673master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave |
| 699slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master | 674slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side |
| 700 701[system.membus.badaddr_responder] 702type=IsaFake 703clock=1000 704fake_mem=false 705pio_addr=0 706pio_latency=100000 707pio_size=8 --- 491 unchanged lines hidden --- | 675 676[system.membus.badaddr_responder] 677type=IsaFake 678clock=1000 679fake_mem=false 680pio_addr=0 681pio_latency=100000 682pio_size=8 --- 491 unchanged lines hidden --- |