21a22
> mem_ranges=0:134217727
75c76
< children=dcache dtb dtb_walker_cache icache interrupts itb itb_walker_cache l2cache toL2Bus tracer
---
> children=dcache dtb dtb_walker_cache icache interrupts isa itb itb_walker_cache l2cache toL2Bus tracer
79d79
< defer_registration=false
87a88
> isa=system.cpu.isa
97a99
> switched_out=false
112d113
< hash_delay=1
119,120d119
< prioritizeRequests=false
< repl=Null
123d121
< subblock_size=0
126d123
< trace_addr=0
151d147
< hash_delay=1
158,159d153
< prioritizeRequests=false
< repl=Null
162d155
< subblock_size=0
165d157
< trace_addr=0
178d169
< hash_delay=1
185,186d175
< prioritizeRequests=false
< repl=Null
189d177
< subblock_size=0
192d179
< trace_addr=0
205c192
< int_master=system.membus.slave[4]
---
> int_master=system.membus.slave[3]
208a196,198
> [system.cpu.isa]
> type=X86ISA
>
228d217
< hash_delay=1
235,236d223
< prioritizeRequests=false
< repl=Null
239d225
< subblock_size=0
242d227
< trace_addr=0
255d239
< hash_delay=1
262,263d245
< prioritizeRequests=false
< repl=Null
266d247
< subblock_size=0
269d249
< trace_addr=0
273c253
< mem_side=system.membus.slave[3]
---
> mem_side=system.membus.slave[2]
669d648
< hash_delay=1
676,677d654
< prioritizeRequests=false
< repl=Null
680d656
< subblock_size=0
683d658
< trace_addr=0
687c662
< mem_side=system.membus.slave[2]
---
> mem_side=system.membus.slave[4]
699c674
< slave=system.apicbridge.master system.system_port system.iocache.mem_side system.cpu.l2cache.mem_side system.cpu.interrupts.int_master
---
> slave=system.apicbridge.master system.system_port system.cpu.l2cache.mem_side system.cpu.interrupts.int_master system.iocache.mem_side