| stats.txt (9838:43d22d746e7a) | stats.txt (9978:81d7551dd3be) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- | 1 2---------- Begin Simulation Statistics ---------- |
| 3sim_seconds 2.615716 # Number of seconds simulated 4sim_ticks 2615716222000 # Number of ticks simulated 5final_tick 2615716222000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) | 3sim_seconds 2.616536 # Number of seconds simulated 4sim_ticks 2616536483000 # Number of ticks simulated 5final_tick 2616536483000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) |
| 6sim_freq 1000000000000 # Frequency of simulated ticks | 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 250038 # Simulator instruction rate (inst/s) 8host_op_rate 318184 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 10864403710 # Simulator tick rate (ticks/s) 10host_mem_usage 394540 # Number of bytes of host memory used 11host_seconds 240.76 # Real time elapsed on the host 12sim_insts 60199078 # Number of instructions simulated 13sim_ops 76605946 # Number of ops (including micro ops) simulated | 7host_inst_rate 552343 # Simulator instruction rate (inst/s) 8host_op_rate 702879 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 24008008080 # Simulator tick rate (ticks/s) 10host_mem_usage 395660 # Number of bytes of host memory used 11host_seconds 108.99 # Real time elapsed on the host 12sim_insts 60197580 # Number of instructions simulated 13sim_ops 76603973 # Number of ops (including micro ops) simulated |
| 14system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory | 14system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory |
| 17system.physmem.bytes_read::cpu.inst 704928 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 9093712 # Number of bytes read from this memory 19system.physmem.bytes_read::total 132482480 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 704928 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 704928 # Number of instructions bytes read from this memory 22system.physmem.bytes_written::writebacks 3710144 # Number of bytes written to this memory | 17system.physmem.bytes_read::cpu.inst 703904 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 9089744 # Number of bytes read from this memory 19system.physmem.bytes_read::total 132477488 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 703904 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 703904 # Number of instructions bytes read from this memory 22system.physmem.bytes_written::writebacks 3706176 # Number of bytes written to this memory |
| 23system.physmem.bytes_written::cpu.data 3016072 # Number of bytes written to this memory | 23system.physmem.bytes_written::cpu.data 3016072 # Number of bytes written to this memory |
| 24system.physmem.bytes_written::total 6726216 # Number of bytes written to this memory | 24system.physmem.bytes_written::total 6722248 # Number of bytes written to this memory |
| 25system.physmem.num_reads::realview.clcd 15335424 # Number of read requests responded to by this memory 26system.physmem.num_reads::cpu.dtb.walker 5 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 2 # Number of read requests responded to by this memory | 25system.physmem.num_reads::realview.clcd 15335424 # Number of read requests responded to by this memory 26system.physmem.num_reads::cpu.dtb.walker 5 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 2 # Number of read requests responded to by this memory |
| 28system.physmem.num_reads::cpu.inst 17217 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 142123 # Number of read requests responded to by this memory 30system.physmem.num_reads::total 15494771 # Number of read requests responded to by this memory 31system.physmem.num_writes::writebacks 57971 # Number of write requests responded to by this memory | 28system.physmem.num_reads::cpu.inst 17201 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 142061 # Number of read requests responded to by this memory 30system.physmem.num_reads::total 15494693 # Number of read requests responded to by this memory 31system.physmem.num_writes::writebacks 57909 # Number of write requests responded to by this memory |
| 32system.physmem.num_writes::cpu.data 754018 # Number of write requests responded to by this memory | 32system.physmem.num_writes::cpu.data 754018 # Number of write requests responded to by this memory |
| 33system.physmem.num_writes::total 811989 # Number of write requests responded to by this memory 34system.physmem.bw_read::realview.clcd 46902409 # Total read bandwidth from this memory (bytes/s) | 33system.physmem.num_writes::total 811927 # Number of write requests responded to by this memory 34system.physmem.bw_read::realview.clcd 46887705 # Total read bandwidth from this memory (bytes/s) |
| 35system.physmem.bw_read::cpu.dtb.walker 122 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu.itb.walker 49 # Total read bandwidth from this memory (bytes/s) | 35system.physmem.bw_read::cpu.dtb.walker 122 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu.itb.walker 49 # Total read bandwidth from this memory (bytes/s) |
| 37system.physmem.bw_read::cpu.inst 269497 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu.data 3476567 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::total 50648644 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 269497 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 269497 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1418405 # Write bandwidth from this memory (bytes/s) 43system.physmem.bw_write::cpu.data 1153058 # Write bandwidth from this memory (bytes/s) 44system.physmem.bw_write::total 2571462 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_total::writebacks 1418405 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::realview.clcd 46902409 # Total bandwidth to/from this memory (bytes/s) | 37system.physmem.bw_read::cpu.inst 269021 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu.data 3473960 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::total 50630858 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 269021 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 269021 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1416443 # Write bandwidth from this memory (bytes/s) 43system.physmem.bw_write::cpu.data 1152696 # Write bandwidth from this memory (bytes/s) 44system.physmem.bw_write::total 2569140 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_total::writebacks 1416443 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::realview.clcd 46887705 # Total bandwidth to/from this memory (bytes/s) |
| 47system.physmem.bw_total::cpu.dtb.walker 122 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.itb.walker 49 # Total bandwidth to/from this memory (bytes/s) | 47system.physmem.bw_total::cpu.dtb.walker 122 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.itb.walker 49 # Total bandwidth to/from this memory (bytes/s) |
| 49system.physmem.bw_total::cpu.inst 269497 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu.data 4629625 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::total 53220107 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.readReqs 15494771 # Total number of read requests accepted by DRAM controller 53system.physmem.writeReqs 811989 # Total number of write requests accepted by DRAM controller 54system.physmem.readBursts 15494771 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts 55system.physmem.writeBursts 811989 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts 56system.physmem.bytesRead 991665344 # Total number of bytes read from memory 57system.physmem.bytesWritten 51967296 # Total number of bytes written to memory 58system.physmem.bytesConsumedRd 132482480 # bytesRead derated as per pkt->getSize() 59system.physmem.bytesConsumedWr 6726216 # bytesWritten derated as per pkt->getSize() 60system.physmem.servicedByWrQ 1656 # Number of DRAM read bursts serviced by write Q 61system.physmem.neitherReadNorWrite 4515 # Reqs where no action is needed 62system.physmem.perBankRdReqs::0 968108 # Track reads on a per bank basis 63system.physmem.perBankRdReqs::1 967905 # Track reads on a per bank basis 64system.physmem.perBankRdReqs::2 967771 # Track reads on a per bank basis 65system.physmem.perBankRdReqs::3 967944 # Track reads on a per bank basis 66system.physmem.perBankRdReqs::4 974355 # Track reads on a per bank basis 67system.physmem.perBankRdReqs::5 968114 # Track reads on a per bank basis 68system.physmem.perBankRdReqs::6 967591 # Track reads on a per bank basis 69system.physmem.perBankRdReqs::7 967671 # Track reads on a per bank basis 70system.physmem.perBankRdReqs::8 968519 # Track reads on a per bank basis 71system.physmem.perBankRdReqs::9 968300 # Track reads on a per bank basis 72system.physmem.perBankRdReqs::10 967957 # Track reads on a per bank basis 73system.physmem.perBankRdReqs::11 967810 # Track reads on a per bank basis 74system.physmem.perBankRdReqs::12 967935 # Track reads on a per bank basis 75system.physmem.perBankRdReqs::13 967629 # Track reads on a per bank basis 76system.physmem.perBankRdReqs::14 967816 # Track reads on a per bank basis 77system.physmem.perBankRdReqs::15 967690 # Track reads on a per bank basis 78system.physmem.perBankWrReqs::0 6734 # Track writes on a per bank basis 79system.physmem.perBankWrReqs::1 6600 # Track writes on a per bank basis 80system.physmem.perBankWrReqs::2 6526 # Track writes on a per bank basis 81system.physmem.perBankWrReqs::3 6493 # Track writes on a per bank basis 82system.physmem.perBankWrReqs::4 6702 # Track writes on a per bank basis 83system.physmem.perBankWrReqs::5 6993 # Track writes on a per bank basis 84system.physmem.perBankWrReqs::6 6729 # Track writes on a per bank basis 85system.physmem.perBankWrReqs::7 6823 # Track writes on a per bank basis 86system.physmem.perBankWrReqs::8 7180 # Track writes on a per bank basis 87system.physmem.perBankWrReqs::9 6976 # Track writes on a per bank basis 88system.physmem.perBankWrReqs::10 6694 # Track writes on a per bank basis 89system.physmem.perBankWrReqs::11 6614 # Track writes on a per bank basis 90system.physmem.perBankWrReqs::12 6691 # Track writes on a per bank basis 91system.physmem.perBankWrReqs::13 6338 # Track writes on a per bank basis 92system.physmem.perBankWrReqs::14 6636 # Track writes on a per bank basis 93system.physmem.perBankWrReqs::15 6497 # Track writes on a per bank basis 94system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry 95system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry 96system.physmem.totGap 2615711849000 # Total gap between requests 97system.physmem.readPktSize::0 0 # Categorize read packet sizes 98system.physmem.readPktSize::1 0 # Categorize read packet sizes 99system.physmem.readPktSize::2 6652 # Categorize read packet sizes 100system.physmem.readPktSize::3 15335424 # Categorize read packet sizes 101system.physmem.readPktSize::4 0 # Categorize read packet sizes 102system.physmem.readPktSize::5 0 # Categorize read packet sizes 103system.physmem.readPktSize::6 152695 # Categorize read packet sizes 104system.physmem.writePktSize::0 0 # Categorize write packet sizes 105system.physmem.writePktSize::1 0 # Categorize write packet sizes 106system.physmem.writePktSize::2 754018 # Categorize write packet sizes 107system.physmem.writePktSize::3 0 # Categorize write packet sizes 108system.physmem.writePktSize::4 0 # Categorize write packet sizes 109system.physmem.writePktSize::5 0 # Categorize write packet sizes 110system.physmem.writePktSize::6 57971 # Categorize write packet sizes 111system.physmem.rdQLenPdf::0 1137574 # What read queue length does an incoming req see 112system.physmem.rdQLenPdf::1 984079 # What read queue length does an incoming req see 113system.physmem.rdQLenPdf::2 1018155 # What read queue length does an incoming req see 114system.physmem.rdQLenPdf::3 3783404 # What read queue length does an incoming req see 115system.physmem.rdQLenPdf::4 2827794 # What read queue length does an incoming req see 116system.physmem.rdQLenPdf::5 2821787 # What read queue length does an incoming req see 117system.physmem.rdQLenPdf::6 2781992 # What read queue length does an incoming req see 118system.physmem.rdQLenPdf::7 18262 # What read queue length does an incoming req see 119system.physmem.rdQLenPdf::8 15752 # What read queue length does an incoming req see 120system.physmem.rdQLenPdf::9 29208 # What read queue length does an incoming req see 121system.physmem.rdQLenPdf::10 42299 # What read queue length does an incoming req see 122system.physmem.rdQLenPdf::11 28515 # What read queue length does an incoming req see 123system.physmem.rdQLenPdf::12 1143 # What read queue length does an incoming req see 124system.physmem.rdQLenPdf::13 1054 # What read queue length does an incoming req see 125system.physmem.rdQLenPdf::14 1034 # What read queue length does an incoming req see 126system.physmem.rdQLenPdf::15 1015 # What read queue length does an incoming req see 127system.physmem.rdQLenPdf::16 48 # What read queue length does an incoming req see | 49system.physmem.bw_total::cpu.inst 269021 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu.data 4626657 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::total 53199998 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.readReqs 15494693 # Number of read requests accepted 53system.physmem.writeReqs 811927 # Number of write requests accepted 54system.physmem.readBursts 15494693 # Number of DRAM read bursts, including those serviced by the write queue 55system.physmem.writeBursts 811927 # Number of DRAM write bursts, including those merged in the write queue 56system.physmem.bytesReadDRAM 991555264 # Total number of bytes read from DRAM 57system.physmem.bytesReadWrQ 105088 # Total number of bytes read from write queue 58system.physmem.bytesWritten 6843648 # Total number of bytes written to DRAM 59system.physmem.bytesReadSys 132477488 # Total read bytes from the system interface side 60system.physmem.bytesWrittenSys 6722248 # Total written bytes from the system interface side 61system.physmem.servicedByWrQ 1642 # Number of DRAM read bursts serviced by the write queue 62system.physmem.mergedWrBursts 704975 # Number of DRAM write bursts merged with an existing one 63system.physmem.neitherReadNorWriteReqs 4515 # Number of requests that are neither read nor write 64system.physmem.perBankRdBursts::0 967983 # Per bank write bursts 65system.physmem.perBankRdBursts::1 967714 # Per bank write bursts 66system.physmem.perBankRdBursts::2 967672 # Per bank write bursts 67system.physmem.perBankRdBursts::3 967769 # Per bank write bursts 68system.physmem.perBankRdBursts::4 974609 # Per bank write bursts 69system.physmem.perBankRdBursts::5 968229 # Per bank write bursts 70system.physmem.perBankRdBursts::6 967807 # Per bank write bursts 71system.physmem.perBankRdBursts::7 967736 # Per bank write bursts 72system.physmem.perBankRdBursts::8 968546 # Per bank write bursts 73system.physmem.perBankRdBursts::9 968137 # Per bank write bursts 74system.physmem.perBankRdBursts::10 967949 # Per bank write bursts 75system.physmem.perBankRdBursts::11 967746 # Per bank write bursts 76system.physmem.perBankRdBursts::12 967851 # Per bank write bursts 77system.physmem.perBankRdBursts::13 967741 # Per bank write bursts 78system.physmem.perBankRdBursts::14 967766 # Per bank write bursts 79system.physmem.perBankRdBursts::15 967796 # Per bank write bursts 80system.physmem.perBankWrBursts::0 6610 # Per bank write bursts 81system.physmem.perBankWrBursts::1 6410 # Per bank write bursts 82system.physmem.perBankWrBursts::2 6422 # Per bank write bursts 83system.physmem.perBankWrBursts::3 6344 # Per bank write bursts 84system.physmem.perBankWrBursts::4 6906 # Per bank write bursts 85system.physmem.perBankWrBursts::5 7096 # Per bank write bursts 86system.physmem.perBankWrBursts::6 6901 # Per bank write bursts 87system.physmem.perBankWrBursts::7 6892 # Per bank write bursts 88system.physmem.perBankWrBursts::8 7193 # Per bank write bursts 89system.physmem.perBankWrBursts::9 6845 # Per bank write bursts 90system.physmem.perBankWrBursts::10 6667 # Per bank write bursts 91system.physmem.perBankWrBursts::11 6550 # Per bank write bursts 92system.physmem.perBankWrBursts::12 6596 # Per bank write bursts 93system.physmem.perBankWrBursts::13 6392 # Per bank write bursts 94system.physmem.perBankWrBursts::14 6532 # Per bank write bursts 95system.physmem.perBankWrBursts::15 6576 # Per bank write bursts 96system.physmem.numRdRetry 0 # Number of times read queue was full causing retry 97system.physmem.numWrRetry 0 # Number of times write queue was full causing retry 98system.physmem.totGap 2616532122000 # Total gap between requests 99system.physmem.readPktSize::0 0 # Read request sizes (log2) 100system.physmem.readPktSize::1 0 # Read request sizes (log2) 101system.physmem.readPktSize::2 6652 # Read request sizes (log2) 102system.physmem.readPktSize::3 15335424 # Read request sizes (log2) 103system.physmem.readPktSize::4 0 # Read request sizes (log2) 104system.physmem.readPktSize::5 0 # Read request sizes (log2) 105system.physmem.readPktSize::6 152617 # Read request sizes (log2) 106system.physmem.writePktSize::0 0 # Write request sizes (log2) 107system.physmem.writePktSize::1 0 # Write request sizes (log2) 108system.physmem.writePktSize::2 754018 # Write request sizes (log2) 109system.physmem.writePktSize::3 0 # Write request sizes (log2) 110system.physmem.writePktSize::4 0 # Write request sizes (log2) 111system.physmem.writePktSize::5 0 # Write request sizes (log2) 112system.physmem.writePktSize::6 57909 # Write request sizes (log2) 113system.physmem.rdQLenPdf::0 1265330 # What read queue length does an incoming req see 114system.physmem.rdQLenPdf::1 1118297 # What read queue length does an incoming req see 115system.physmem.rdQLenPdf::2 1122310 # What read queue length does an incoming req see 116system.physmem.rdQLenPdf::3 3740106 # What read queue length does an incoming req see 117system.physmem.rdQLenPdf::4 2667387 # What read queue length does an incoming req see 118system.physmem.rdQLenPdf::5 2661184 # What read queue length does an incoming req see 119system.physmem.rdQLenPdf::6 2667924 # What read queue length does an incoming req see 120system.physmem.rdQLenPdf::7 52364 # What read queue length does an incoming req see 121system.physmem.rdQLenPdf::8 54482 # What read queue length does an incoming req see 122system.physmem.rdQLenPdf::9 20799 # What read queue length does an incoming req see 123system.physmem.rdQLenPdf::10 20747 # What read queue length does an incoming req see 124system.physmem.rdQLenPdf::11 20660 # What read queue length does an incoming req see 125system.physmem.rdQLenPdf::12 20420 # What read queue length does an incoming req see 126system.physmem.rdQLenPdf::13 20349 # What read queue length does an incoming req see 127system.physmem.rdQLenPdf::14 20284 # What read queue length does an incoming req see 128system.physmem.rdQLenPdf::15 20256 # What read queue length does an incoming req see 129system.physmem.rdQLenPdf::16 152 # What read queue length does an incoming req see |
| 128system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see 129system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see 130system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see 131system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see 132system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see 133system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see 134system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see 135system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see 136system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see 137system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see 138system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see 139system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see 140system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see 141system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see 142system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see | 130system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see 131system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see 132system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see 133system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see 134system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see 135system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see 136system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see 137system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see 138system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see 139system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see 140system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see 141system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see 142system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see 143system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see 144system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see |
| 143system.physmem.wrQLenPdf::0 4662 # What write queue length does an incoming req see 144system.physmem.wrQLenPdf::1 4662 # What write queue length does an incoming req see 145system.physmem.wrQLenPdf::2 4662 # What write queue length does an incoming req see 146system.physmem.wrQLenPdf::3 4662 # What write queue length does an incoming req see 147system.physmem.wrQLenPdf::4 4662 # What write queue length does an incoming req see 148system.physmem.wrQLenPdf::5 4662 # What write queue length does an incoming req see 149system.physmem.wrQLenPdf::6 4662 # What write queue length does an incoming req see 150system.physmem.wrQLenPdf::7 4662 # What write queue length does an incoming req see 151system.physmem.wrQLenPdf::8 4662 # What write queue length does an incoming req see 152system.physmem.wrQLenPdf::9 4662 # What write queue length does an incoming req see 153system.physmem.wrQLenPdf::10 4662 # What write queue length does an incoming req see 154system.physmem.wrQLenPdf::11 4662 # What write queue length does an incoming req see 155system.physmem.wrQLenPdf::12 4662 # What write queue length does an incoming req see 156system.physmem.wrQLenPdf::13 4662 # What write queue length does an incoming req see 157system.physmem.wrQLenPdf::14 4662 # What write queue length does an incoming req see 158system.physmem.wrQLenPdf::15 4662 # What write queue length does an incoming req see 159system.physmem.wrQLenPdf::16 4662 # What write queue length does an incoming req see 160system.physmem.wrQLenPdf::17 4662 # What write queue length does an incoming req see 161system.physmem.wrQLenPdf::18 4662 # What write queue length does an incoming req see 162system.physmem.wrQLenPdf::19 4662 # What write queue length does an incoming req see 163system.physmem.wrQLenPdf::20 4662 # What write queue length does an incoming req see 164system.physmem.wrQLenPdf::21 4662 # What write queue length does an incoming req see 165system.physmem.wrQLenPdf::22 4662 # What write queue length does an incoming req see | 145system.physmem.wrQLenPdf::0 4861 # What write queue length does an incoming req see 146system.physmem.wrQLenPdf::1 4863 # What write queue length does an incoming req see 147system.physmem.wrQLenPdf::2 4862 # What write queue length does an incoming req see 148system.physmem.wrQLenPdf::3 4862 # What write queue length does an incoming req see 149system.physmem.wrQLenPdf::4 4863 # What write queue length does an incoming req see 150system.physmem.wrQLenPdf::5 4861 # What write queue length does an incoming req see 151system.physmem.wrQLenPdf::6 4862 # What write queue length does an incoming req see 152system.physmem.wrQLenPdf::7 4861 # What write queue length does an incoming req see 153system.physmem.wrQLenPdf::8 4861 # What write queue length does an incoming req see 154system.physmem.wrQLenPdf::9 4861 # What write queue length does an incoming req see 155system.physmem.wrQLenPdf::10 4861 # What write queue length does an incoming req see 156system.physmem.wrQLenPdf::11 4861 # What write queue length does an incoming req see 157system.physmem.wrQLenPdf::12 4862 # What write queue length does an incoming req see 158system.physmem.wrQLenPdf::13 4861 # What write queue length does an incoming req see 159system.physmem.wrQLenPdf::14 4862 # What write queue length does an incoming req see 160system.physmem.wrQLenPdf::15 4861 # What write queue length does an incoming req see 161system.physmem.wrQLenPdf::16 4861 # What write queue length does an incoming req see 162system.physmem.wrQLenPdf::17 4861 # What write queue length does an incoming req see 163system.physmem.wrQLenPdf::18 4861 # What write queue length does an incoming req see 164system.physmem.wrQLenPdf::19 4861 # What write queue length does an incoming req see 165system.physmem.wrQLenPdf::20 4862 # What write queue length does an incoming req see 166system.physmem.wrQLenPdf::21 4861 # What write queue length does an incoming req see 167system.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see |
| 166system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see 167system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see 168system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see 169system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see 170system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see 171system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see 172system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see 173system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see 174system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see | 168system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see 169system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see 170system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see 171system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see 172system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see 173system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see 174system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see 175system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see 176system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see |
| 175system.physmem.bytesPerActivate::samples 38068 # Bytes accessed per row activation 176system.physmem.bytesPerActivate::mean 26227.310287 # Bytes accessed per row activation 177system.physmem.bytesPerActivate::gmean 2428.378300 # Bytes accessed per row activation 178system.physmem.bytesPerActivate::stdev 31656.989485 # Bytes accessed per row activation 179system.physmem.bytesPerActivate::64-127 5540 14.55% 14.55% # Bytes accessed per row activation 180system.physmem.bytesPerActivate::128-191 3323 8.73% 23.28% # Bytes accessed per row activation 181system.physmem.bytesPerActivate::192-255 2175 5.71% 29.00% # Bytes accessed per row activation 182system.physmem.bytesPerActivate::256-319 1668 4.38% 33.38% # Bytes accessed per row activation 183system.physmem.bytesPerActivate::320-383 1160 3.05% 36.42% # Bytes accessed per row activation 184system.physmem.bytesPerActivate::384-447 1060 2.78% 39.21% # Bytes accessed per row activation 185system.physmem.bytesPerActivate::448-511 828 2.18% 41.38% # Bytes accessed per row activation 186system.physmem.bytesPerActivate::512-575 781 2.05% 43.44% # Bytes accessed per row activation 187system.physmem.bytesPerActivate::576-639 514 1.35% 44.79% # Bytes accessed per row activation 188system.physmem.bytesPerActivate::640-703 493 1.30% 46.08% # Bytes accessed per row activation 189system.physmem.bytesPerActivate::704-767 417 1.10% 47.18% # Bytes accessed per row activation 190system.physmem.bytesPerActivate::768-831 450 1.18% 48.36% # Bytes accessed per row activation 191system.physmem.bytesPerActivate::832-895 283 0.74% 49.10% # Bytes accessed per row activation 192system.physmem.bytesPerActivate::896-959 279 0.73% 49.83% # Bytes accessed per row activation 193system.physmem.bytesPerActivate::960-1023 185 0.49% 50.32% # Bytes accessed per row activation 194system.physmem.bytesPerActivate::1024-1087 195 0.51% 50.83% # Bytes accessed per row activation 195system.physmem.bytesPerActivate::1088-1151 134 0.35% 51.18% # Bytes accessed per row activation 196system.physmem.bytesPerActivate::1152-1215 139 0.37% 51.55% # Bytes accessed per row activation 197system.physmem.bytesPerActivate::1216-1279 114 0.30% 51.85% # Bytes accessed per row activation 198system.physmem.bytesPerActivate::1280-1343 94 0.25% 52.10% # Bytes accessed per row activation 199system.physmem.bytesPerActivate::1344-1407 76 0.20% 52.30% # Bytes accessed per row activation 200system.physmem.bytesPerActivate::1408-1471 150 0.39% 52.69% # Bytes accessed per row activation 201system.physmem.bytesPerActivate::1472-1535 792 2.08% 54.77% # Bytes accessed per row activation 202system.physmem.bytesPerActivate::1536-1599 203 0.53% 55.30% # Bytes accessed per row activation 203system.physmem.bytesPerActivate::1600-1663 136 0.36% 55.66% # Bytes accessed per row activation 204system.physmem.bytesPerActivate::1664-1727 113 0.30% 55.96% # Bytes accessed per row activation 205system.physmem.bytesPerActivate::1728-1791 91 0.24% 56.20% # Bytes accessed per row activation 206system.physmem.bytesPerActivate::1792-1855 85 0.22% 56.42% # Bytes accessed per row activation 207system.physmem.bytesPerActivate::1856-1919 60 0.16% 56.58% # Bytes accessed per row activation 208system.physmem.bytesPerActivate::1920-1983 34 0.09% 56.67% # Bytes accessed per row activation 209system.physmem.bytesPerActivate::1984-2047 44 0.12% 56.78% # Bytes accessed per row activation 210system.physmem.bytesPerActivate::2048-2111 48 0.13% 56.91% # Bytes accessed per row activation 211system.physmem.bytesPerActivate::2112-2175 31 0.08% 56.99% # Bytes accessed per row activation 212system.physmem.bytesPerActivate::2176-2239 35 0.09% 57.08% # Bytes accessed per row activation 213system.physmem.bytesPerActivate::2240-2303 24 0.06% 57.15% # Bytes accessed per row activation 214system.physmem.bytesPerActivate::2304-2367 25 0.07% 57.21% # Bytes accessed per row activation 215system.physmem.bytesPerActivate::2368-2431 18 0.05% 57.26% # Bytes accessed per row activation 216system.physmem.bytesPerActivate::2432-2495 18 0.05% 57.31% # Bytes accessed per row activation 217system.physmem.bytesPerActivate::2496-2559 21 0.06% 57.36% # Bytes accessed per row activation 218system.physmem.bytesPerActivate::2560-2623 13 0.03% 57.39% # Bytes accessed per row activation 219system.physmem.bytesPerActivate::2624-2687 5 0.01% 57.41% # Bytes accessed per row activation 220system.physmem.bytesPerActivate::2688-2751 11 0.03% 57.44% # Bytes accessed per row activation 221system.physmem.bytesPerActivate::2752-2815 8 0.02% 57.46% # Bytes accessed per row activation 222system.physmem.bytesPerActivate::2816-2879 15 0.04% 57.50% # Bytes accessed per row activation 223system.physmem.bytesPerActivate::2880-2943 17 0.04% 57.54% # Bytes accessed per row activation 224system.physmem.bytesPerActivate::2944-3007 7 0.02% 57.56% # Bytes accessed per row activation 225system.physmem.bytesPerActivate::3008-3071 7 0.02% 57.58% # Bytes accessed per row activation 226system.physmem.bytesPerActivate::3072-3135 18 0.05% 57.63% # Bytes accessed per row activation 227system.physmem.bytesPerActivate::3136-3199 8 0.02% 57.65% # Bytes accessed per row activation 228system.physmem.bytesPerActivate::3200-3263 8 0.02% 57.67% # Bytes accessed per row activation 229system.physmem.bytesPerActivate::3264-3327 10 0.03% 57.69% # Bytes accessed per row activation 230system.physmem.bytesPerActivate::3328-3391 16 0.04% 57.74% # Bytes accessed per row activation 231system.physmem.bytesPerActivate::3392-3455 6 0.02% 57.75% # Bytes accessed per row activation 232system.physmem.bytesPerActivate::3456-3519 11 0.03% 57.78% # Bytes accessed per row activation 233system.physmem.bytesPerActivate::3520-3583 6 0.02% 57.80% # Bytes accessed per row activation 234system.physmem.bytesPerActivate::3584-3647 5 0.01% 57.81% # Bytes accessed per row activation 235system.physmem.bytesPerActivate::3648-3711 5 0.01% 57.82% # Bytes accessed per row activation 236system.physmem.bytesPerActivate::3712-3775 7 0.02% 57.84% # Bytes accessed per row activation 237system.physmem.bytesPerActivate::3776-3839 6 0.02% 57.86% # Bytes accessed per row activation 238system.physmem.bytesPerActivate::3840-3903 6 0.02% 57.87% # Bytes accessed per row activation 239system.physmem.bytesPerActivate::3904-3967 6 0.02% 57.89% # Bytes accessed per row activation 240system.physmem.bytesPerActivate::3968-4031 9 0.02% 57.91% # Bytes accessed per row activation 241system.physmem.bytesPerActivate::4032-4095 9 0.02% 57.94% # Bytes accessed per row activation 242system.physmem.bytesPerActivate::4096-4159 42 0.11% 58.05% # Bytes accessed per row activation 243system.physmem.bytesPerActivate::4160-4223 2 0.01% 58.05% # Bytes accessed per row activation 244system.physmem.bytesPerActivate::4224-4287 4 0.01% 58.06% # Bytes accessed per row activation 245system.physmem.bytesPerActivate::4288-4351 4 0.01% 58.07% # Bytes accessed per row activation 246system.physmem.bytesPerActivate::4352-4415 8 0.02% 58.09% # Bytes accessed per row activation 247system.physmem.bytesPerActivate::4416-4479 6 0.02% 58.11% # Bytes accessed per row activation 248system.physmem.bytesPerActivate::4480-4543 4 0.01% 58.12% # Bytes accessed per row activation 249system.physmem.bytesPerActivate::4544-4607 5 0.01% 58.13% # Bytes accessed per row activation 250system.physmem.bytesPerActivate::4608-4671 5 0.01% 58.15% # Bytes accessed per row activation 251system.physmem.bytesPerActivate::4672-4735 6 0.02% 58.16% # Bytes accessed per row activation 252system.physmem.bytesPerActivate::4736-4799 2 0.01% 58.17% # Bytes accessed per row activation 253system.physmem.bytesPerActivate::4800-4863 1 0.00% 58.17% # Bytes accessed per row activation 254system.physmem.bytesPerActivate::4864-4927 6 0.02% 58.19% # Bytes accessed per row activation 255system.physmem.bytesPerActivate::4928-4991 1 0.00% 58.19% # Bytes accessed per row activation 256system.physmem.bytesPerActivate::4992-5055 3 0.01% 58.20% # Bytes accessed per row activation 257system.physmem.bytesPerActivate::5056-5119 2 0.01% 58.20% # Bytes accessed per row activation 258system.physmem.bytesPerActivate::5120-5183 10 0.03% 58.23% # Bytes accessed per row activation 259system.physmem.bytesPerActivate::5184-5247 1 0.00% 58.23% # Bytes accessed per row activation 260system.physmem.bytesPerActivate::5248-5311 2 0.01% 58.24% # Bytes accessed per row activation 261system.physmem.bytesPerActivate::5312-5375 5 0.01% 58.25% # Bytes accessed per row activation 262system.physmem.bytesPerActivate::5376-5439 5 0.01% 58.26% # Bytes accessed per row activation 263system.physmem.bytesPerActivate::5440-5503 2 0.01% 58.27% # Bytes accessed per row activation 264system.physmem.bytesPerActivate::5504-5567 3 0.01% 58.27% # Bytes accessed per row activation 265system.physmem.bytesPerActivate::5568-5631 3 0.01% 58.28% # Bytes accessed per row activation 266system.physmem.bytesPerActivate::5696-5759 2 0.01% 58.29% # Bytes accessed per row activation 267system.physmem.bytesPerActivate::5760-5823 3 0.01% 58.30% # Bytes accessed per row activation 268system.physmem.bytesPerActivate::5888-5951 1 0.00% 58.30% # Bytes accessed per row activation 269system.physmem.bytesPerActivate::5952-6015 2 0.01% 58.30% # Bytes accessed per row activation 270system.physmem.bytesPerActivate::6080-6143 2 0.01% 58.31% # Bytes accessed per row activation 271system.physmem.bytesPerActivate::6144-6207 2 0.01% 58.31% # Bytes accessed per row activation 272system.physmem.bytesPerActivate::6272-6335 2 0.01% 58.32% # Bytes accessed per row activation 273system.physmem.bytesPerActivate::6336-6399 1 0.00% 58.32% # Bytes accessed per row activation 274system.physmem.bytesPerActivate::6464-6527 4 0.01% 58.33% # Bytes accessed per row activation 275system.physmem.bytesPerActivate::6528-6591 1 0.00% 58.34% # Bytes accessed per row activation 276system.physmem.bytesPerActivate::6592-6655 1 0.00% 58.34% # Bytes accessed per row activation 277system.physmem.bytesPerActivate::6656-6719 1 0.00% 58.34% # Bytes accessed per row activation 278system.physmem.bytesPerActivate::6720-6783 6 0.02% 58.36% # Bytes accessed per row activation 279system.physmem.bytesPerActivate::6784-6847 16 0.04% 58.40% # Bytes accessed per row activation 280system.physmem.bytesPerActivate::6848-6911 4 0.01% 58.41% # Bytes accessed per row activation 281system.physmem.bytesPerActivate::6976-7039 4 0.01% 58.42% # Bytes accessed per row activation 282system.physmem.bytesPerActivate::7040-7103 4 0.01% 58.43% # Bytes accessed per row activation 283system.physmem.bytesPerActivate::7104-7167 1 0.00% 58.43% # Bytes accessed per row activation 284system.physmem.bytesPerActivate::7168-7231 4 0.01% 58.44% # Bytes accessed per row activation 285system.physmem.bytesPerActivate::7232-7295 2 0.01% 58.45% # Bytes accessed per row activation 286system.physmem.bytesPerActivate::7360-7423 2 0.01% 58.45% # Bytes accessed per row activation 287system.physmem.bytesPerActivate::7424-7487 3 0.01% 58.46% # Bytes accessed per row activation 288system.physmem.bytesPerActivate::7488-7551 2 0.01% 58.47% # Bytes accessed per row activation 289system.physmem.bytesPerActivate::7552-7615 3 0.01% 58.47% # Bytes accessed per row activation 290system.physmem.bytesPerActivate::7616-7679 4 0.01% 58.48% # Bytes accessed per row activation 291system.physmem.bytesPerActivate::7680-7743 5 0.01% 58.50% # Bytes accessed per row activation 292system.physmem.bytesPerActivate::7744-7807 2 0.01% 58.50% # Bytes accessed per row activation 293system.physmem.bytesPerActivate::7808-7871 1 0.00% 58.51% # Bytes accessed per row activation 294system.physmem.bytesPerActivate::7872-7935 6 0.02% 58.52% # Bytes accessed per row activation 295system.physmem.bytesPerActivate::7936-7999 7 0.02% 58.54% # Bytes accessed per row activation 296system.physmem.bytesPerActivate::8000-8063 6 0.02% 58.56% # Bytes accessed per row activation 297system.physmem.bytesPerActivate::8064-8127 8 0.02% 58.58% # Bytes accessed per row activation 298system.physmem.bytesPerActivate::8128-8191 8 0.02% 58.60% # Bytes accessed per row activation 299system.physmem.bytesPerActivate::8192-8255 328 0.86% 59.46% # Bytes accessed per row activation 300system.physmem.bytesPerActivate::8256-8319 1 0.00% 59.46% # Bytes accessed per row activation 301system.physmem.bytesPerActivate::8448-8511 24 0.06% 59.53% # Bytes accessed per row activation 302system.physmem.bytesPerActivate::8512-8575 141 0.37% 59.90% # Bytes accessed per row activation 303system.physmem.bytesPerActivate::8576-8639 169 0.44% 60.34% # Bytes accessed per row activation 304system.physmem.bytesPerActivate::8704-8767 1 0.00% 60.34% # Bytes accessed per row activation 305system.physmem.bytesPerActivate::8768-8831 1 0.00% 60.34% # Bytes accessed per row activation 306system.physmem.bytesPerActivate::8832-8895 2 0.01% 60.35% # Bytes accessed per row activation 307system.physmem.bytesPerActivate::8960-9023 3 0.01% 60.36% # Bytes accessed per row activation 308system.physmem.bytesPerActivate::9216-9279 3 0.01% 60.37% # Bytes accessed per row activation 309system.physmem.bytesPerActivate::9472-9535 1 0.00% 60.37% # Bytes accessed per row activation 310system.physmem.bytesPerActivate::10240-10303 4 0.01% 60.38% # Bytes accessed per row activation 311system.physmem.bytesPerActivate::11520-11583 1 0.00% 60.38% # Bytes accessed per row activation 312system.physmem.bytesPerActivate::11904-11967 1 0.00% 60.38% # Bytes accessed per row activation 313system.physmem.bytesPerActivate::12032-12095 2 0.01% 60.39% # Bytes accessed per row activation 314system.physmem.bytesPerActivate::12928-12991 1 0.00% 60.39% # Bytes accessed per row activation 315system.physmem.bytesPerActivate::13056-13119 4 0.01% 60.40% # Bytes accessed per row activation 316system.physmem.bytesPerActivate::13184-13247 1 0.00% 60.41% # Bytes accessed per row activation 317system.physmem.bytesPerActivate::13312-13375 1 0.00% 60.41% # Bytes accessed per row activation 318system.physmem.bytesPerActivate::13824-13887 1 0.00% 60.41% # Bytes accessed per row activation 319system.physmem.bytesPerActivate::13952-14015 1 0.00% 60.41% # Bytes accessed per row activation 320system.physmem.bytesPerActivate::14336-14399 4 0.01% 60.42% # Bytes accessed per row activation 321system.physmem.bytesPerActivate::14592-14655 1 0.00% 60.43% # Bytes accessed per row activation 322system.physmem.bytesPerActivate::14976-15039 1 0.00% 60.43% # Bytes accessed per row activation 323system.physmem.bytesPerActivate::15872-15935 1 0.00% 60.43% # Bytes accessed per row activation 324system.physmem.bytesPerActivate::16128-16191 2 0.01% 60.44% # Bytes accessed per row activation 325system.physmem.bytesPerActivate::16384-16447 1 0.00% 60.44% # Bytes accessed per row activation 326system.physmem.bytesPerActivate::16640-16703 1 0.00% 60.44% # Bytes accessed per row activation 327system.physmem.bytesPerActivate::17152-17215 1 0.00% 60.44% # Bytes accessed per row activation 328system.physmem.bytesPerActivate::17408-17471 3 0.01% 60.45% # Bytes accessed per row activation 329system.physmem.bytesPerActivate::17664-17727 1 0.00% 60.45% # Bytes accessed per row activation 330system.physmem.bytesPerActivate::18176-18239 2 0.01% 60.46% # Bytes accessed per row activation 331system.physmem.bytesPerActivate::18432-18495 5 0.01% 60.47% # Bytes accessed per row activation 332system.physmem.bytesPerActivate::18624-18687 1 0.00% 60.48% # Bytes accessed per row activation 333system.physmem.bytesPerActivate::19200-19263 1 0.00% 60.48% # Bytes accessed per row activation 334system.physmem.bytesPerActivate::19328-19391 1 0.00% 60.48% # Bytes accessed per row activation 335system.physmem.bytesPerActivate::19456-19519 3 0.01% 60.49% # Bytes accessed per row activation 336system.physmem.bytesPerActivate::20224-20287 1 0.00% 60.49% # Bytes accessed per row activation 337system.physmem.bytesPerActivate::20352-20415 1 0.00% 60.49% # Bytes accessed per row activation 338system.physmem.bytesPerActivate::20480-20543 1 0.00% 60.50% # Bytes accessed per row activation 339system.physmem.bytesPerActivate::21760-21823 1 0.00% 60.50% # Bytes accessed per row activation 340system.physmem.bytesPerActivate::22016-22079 2 0.01% 60.50% # Bytes accessed per row activation 341system.physmem.bytesPerActivate::22144-22207 1 0.00% 60.51% # Bytes accessed per row activation 342system.physmem.bytesPerActivate::22272-22335 1 0.00% 60.51% # Bytes accessed per row activation 343system.physmem.bytesPerActivate::22784-22847 1 0.00% 60.51% # Bytes accessed per row activation 344system.physmem.bytesPerActivate::23040-23103 1 0.00% 60.52% # Bytes accessed per row activation 345system.physmem.bytesPerActivate::23168-23231 1 0.00% 60.52% # Bytes accessed per row activation 346system.physmem.bytesPerActivate::23296-23359 1 0.00% 60.52% # Bytes accessed per row activation 347system.physmem.bytesPerActivate::23552-23615 4 0.01% 60.53% # Bytes accessed per row activation 348system.physmem.bytesPerActivate::24064-24127 1 0.00% 60.53% # Bytes accessed per row activation 349system.physmem.bytesPerActivate::24192-24255 1 0.00% 60.54% # Bytes accessed per row activation 350system.physmem.bytesPerActivate::24320-24383 3 0.01% 60.54% # Bytes accessed per row activation 351system.physmem.bytesPerActivate::24576-24639 1 0.00% 60.55% # Bytes accessed per row activation 352system.physmem.bytesPerActivate::24832-24895 1 0.00% 60.55% # Bytes accessed per row activation 353system.physmem.bytesPerActivate::25088-25151 1 0.00% 60.55% # Bytes accessed per row activation 354system.physmem.bytesPerActivate::25344-25407 1 0.00% 60.55% # Bytes accessed per row activation 355system.physmem.bytesPerActivate::25600-25663 1 0.00% 60.56% # Bytes accessed per row activation 356system.physmem.bytesPerActivate::25728-25791 1 0.00% 60.56% # Bytes accessed per row activation 357system.physmem.bytesPerActivate::26624-26687 1 0.00% 60.56% # Bytes accessed per row activation 358system.physmem.bytesPerActivate::26880-26943 2 0.01% 60.57% # Bytes accessed per row activation 359system.physmem.bytesPerActivate::27392-27455 2 0.01% 60.57% # Bytes accessed per row activation 360system.physmem.bytesPerActivate::27648-27711 4 0.01% 60.58% # Bytes accessed per row activation 361system.physmem.bytesPerActivate::28160-28223 2 0.01% 60.59% # Bytes accessed per row activation 362system.physmem.bytesPerActivate::28416-28479 1 0.00% 60.59% # Bytes accessed per row activation 363system.physmem.bytesPerActivate::28672-28735 2 0.01% 60.60% # Bytes accessed per row activation 364system.physmem.bytesPerActivate::28800-28863 1 0.00% 60.60% # Bytes accessed per row activation 365system.physmem.bytesPerActivate::29184-29247 3 0.01% 60.61% # Bytes accessed per row activation 366system.physmem.bytesPerActivate::29440-29503 1 0.00% 60.61% # Bytes accessed per row activation 367system.physmem.bytesPerActivate::29696-29759 3 0.01% 60.62% # Bytes accessed per row activation 368system.physmem.bytesPerActivate::29952-30015 1 0.00% 60.62% # Bytes accessed per row activation 369system.physmem.bytesPerActivate::30208-30271 1 0.00% 60.62% # Bytes accessed per row activation 370system.physmem.bytesPerActivate::30336-30399 1 0.00% 60.63% # Bytes accessed per row activation 371system.physmem.bytesPerActivate::30720-30783 1 0.00% 60.63% # Bytes accessed per row activation 372system.physmem.bytesPerActivate::30976-31039 1 0.00% 60.63% # Bytes accessed per row activation 373system.physmem.bytesPerActivate::31104-31167 1 0.00% 60.63% # Bytes accessed per row activation 374system.physmem.bytesPerActivate::31168-31231 1 0.00% 60.64% # Bytes accessed per row activation 375system.physmem.bytesPerActivate::31232-31295 2 0.01% 60.64% # Bytes accessed per row activation 376system.physmem.bytesPerActivate::31360-31423 1 0.00% 60.64% # Bytes accessed per row activation 377system.physmem.bytesPerActivate::31488-31551 2 0.01% 60.65% # Bytes accessed per row activation 378system.physmem.bytesPerActivate::31680-31743 1 0.00% 60.65% # Bytes accessed per row activation 379system.physmem.bytesPerActivate::31744-31807 6 0.02% 60.67% # Bytes accessed per row activation 380system.physmem.bytesPerActivate::32000-32063 1 0.00% 60.67% # Bytes accessed per row activation 381system.physmem.bytesPerActivate::32256-32319 1 0.00% 60.67% # Bytes accessed per row activation 382system.physmem.bytesPerActivate::33024-33087 16 0.04% 60.72% # Bytes accessed per row activation 383system.physmem.bytesPerActivate::33152-33215 19 0.05% 60.76% # Bytes accessed per row activation 384system.physmem.bytesPerActivate::33280-33343 23 0.06% 60.83% # Bytes accessed per row activation 385system.physmem.bytesPerActivate::33536-33599 1 0.00% 60.83% # Bytes accessed per row activation 386system.physmem.bytesPerActivate::34816-34879 1 0.00% 60.83% # Bytes accessed per row activation 387system.physmem.bytesPerActivate::35840-35903 1 0.00% 60.83% # Bytes accessed per row activation 388system.physmem.bytesPerActivate::36352-36415 2 0.01% 60.84% # Bytes accessed per row activation 389system.physmem.bytesPerActivate::36864-36927 1 0.00% 60.84% # Bytes accessed per row activation 390system.physmem.bytesPerActivate::37888-37951 1 0.00% 60.84% # Bytes accessed per row activation 391system.physmem.bytesPerActivate::40192-40255 1 0.00% 60.85% # Bytes accessed per row activation 392system.physmem.bytesPerActivate::41216-41279 2 0.01% 60.85% # Bytes accessed per row activation 393system.physmem.bytesPerActivate::41728-41791 1 0.00% 60.85% # Bytes accessed per row activation 394system.physmem.bytesPerActivate::41984-42047 1 0.00% 60.86% # Bytes accessed per row activation 395system.physmem.bytesPerActivate::43264-43327 1 0.00% 60.86% # Bytes accessed per row activation 396system.physmem.bytesPerActivate::46080-46143 1 0.00% 60.86% # Bytes accessed per row activation 397system.physmem.bytesPerActivate::46336-46399 1 0.00% 60.86% # Bytes accessed per row activation 398system.physmem.bytesPerActivate::46528-46591 1 0.00% 60.87% # Bytes accessed per row activation 399system.physmem.bytesPerActivate::47104-47167 3 0.01% 60.88% # Bytes accessed per row activation 400system.physmem.bytesPerActivate::47872-47935 1 0.00% 60.88% # Bytes accessed per row activation 401system.physmem.bytesPerActivate::48128-48191 1 0.00% 60.88% # Bytes accessed per row activation 402system.physmem.bytesPerActivate::48384-48447 1 0.00% 60.88% # Bytes accessed per row activation 403system.physmem.bytesPerActivate::48896-48959 1 0.00% 60.89% # Bytes accessed per row activation 404system.physmem.bytesPerActivate::49664-49727 1 0.00% 60.89% # Bytes accessed per row activation 405system.physmem.bytesPerActivate::51200-51263 2 0.01% 60.89% # Bytes accessed per row activation 406system.physmem.bytesPerActivate::52224-52287 2 0.01% 60.90% # Bytes accessed per row activation 407system.physmem.bytesPerActivate::56320-56383 1 0.00% 60.90% # Bytes accessed per row activation 408system.physmem.bytesPerActivate::56576-56639 1 0.00% 60.90% # Bytes accessed per row activation 409system.physmem.bytesPerActivate::57344-57407 1 0.00% 60.91% # Bytes accessed per row activation 410system.physmem.bytesPerActivate::57600-57663 1 0.00% 60.91% # Bytes accessed per row activation 411system.physmem.bytesPerActivate::58368-58431 2 0.01% 60.91% # Bytes accessed per row activation 412system.physmem.bytesPerActivate::60416-60479 1 0.00% 60.92% # Bytes accessed per row activation 413system.physmem.bytesPerActivate::60672-60735 1 0.00% 60.92% # Bytes accessed per row activation 414system.physmem.bytesPerActivate::61184-61247 1 0.00% 60.92% # Bytes accessed per row activation 415system.physmem.bytesPerActivate::61696-61759 1 0.00% 60.93% # Bytes accessed per row activation 416system.physmem.bytesPerActivate::63488-63551 1 0.00% 60.93% # Bytes accessed per row activation 417system.physmem.bytesPerActivate::65024-65087 190 0.50% 61.43% # Bytes accessed per row activation 418system.physmem.bytesPerActivate::65088-65151 6 0.02% 61.44% # Bytes accessed per row activation 419system.physmem.bytesPerActivate::65216-65279 6 0.02% 61.46% # Bytes accessed per row activation 420system.physmem.bytesPerActivate::65280-65343 1 0.00% 61.46% # Bytes accessed per row activation 421system.physmem.bytesPerActivate::65472-65535 1 0.00% 61.46% # Bytes accessed per row activation 422system.physmem.bytesPerActivate::65536-65599 14664 38.52% 99.98% # Bytes accessed per row activation 423system.physmem.bytesPerActivate::67392-67455 1 0.00% 99.99% # Bytes accessed per row activation 424system.physmem.bytesPerActivate::69760-69823 1 0.00% 99.99% # Bytes accessed per row activation 425system.physmem.bytesPerActivate::71744-71807 2 0.01% 99.99% # Bytes accessed per row activation 426system.physmem.bytesPerActivate::73984-74047 1 0.00% 100.00% # Bytes accessed per row activation 427system.physmem.bytesPerActivate::420352-420415 1 0.00% 100.00% # Bytes accessed per row activation 428system.physmem.bytesPerActivate::total 38068 # Bytes accessed per row activation 429system.physmem.totQLat 296768605750 # Total cycles spent in queuing delays 430system.physmem.totMemAccLat 390592239500 # Sum of mem lat for all requests 431system.physmem.totBusLat 77465575000 # Total cycles spent in databus access 432system.physmem.totBankLat 16358058750 # Total cycles spent in bank access 433system.physmem.avgQLat 19154.87 # Average queueing delay per request 434system.physmem.avgBankLat 1055.83 # Average bank access latency per request 435system.physmem.avgBusLat 5000.00 # Average bus latency per request 436system.physmem.avgMemAccLat 25210.70 # Average memory access latency 437system.physmem.avgRdBW 379.12 # Average achieved read bandwidth in MB/s 438system.physmem.avgWrBW 19.87 # Average achieved write bandwidth in MB/s 439system.physmem.avgConsumedRdBW 50.65 # Average consumed read bandwidth in MB/s 440system.physmem.avgConsumedWrBW 2.57 # Average consumed write bandwidth in MB/s 441system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MB/s 442system.physmem.busUtil 3.12 # Data bus utilization in percentage 443system.physmem.avgRdQLen 0.15 # Average read queue length over time 444system.physmem.avgWrQLen 13.76 # Average write queue length over time 445system.physmem.readRowHits 15468398 # Number of row buffer hits during reads 446system.physmem.writeRowHits 93875 # Number of row buffer hits during writes 447system.physmem.readRowHitRate 99.84 # Row buffer hit rate for reads 448system.physmem.writeRowHitRate 11.56 # Row buffer hit rate for writes 449system.physmem.avgGap 160406.60 # Average gap between requests | 177system.physmem.bytesPerActivate::samples 89727 # Bytes accessed per row activation 178system.physmem.bytesPerActivate::mean 11127.069087 # Bytes accessed per row activation 179system.physmem.bytesPerActivate::gmean 1028.273701 # Bytes accessed per row activation 180system.physmem.bytesPerActivate::stdev 16706.873806 # Bytes accessed per row activation 181system.physmem.bytesPerActivate::64-71 23194 25.85% 25.85% # Bytes accessed per row activation 182system.physmem.bytesPerActivate::128-135 14559 16.23% 42.08% # Bytes accessed per row activation 183system.physmem.bytesPerActivate::192-199 2860 3.19% 45.26% # Bytes accessed per row activation 184system.physmem.bytesPerActivate::256-263 2118 2.36% 47.62% # Bytes accessed per row activation 185system.physmem.bytesPerActivate::320-327 1356 1.51% 49.13% # Bytes accessed per row activation 186system.physmem.bytesPerActivate::384-391 1216 1.36% 50.49% # Bytes accessed per row activation 187system.physmem.bytesPerActivate::448-455 947 1.06% 51.55% # Bytes accessed per row activation 188system.physmem.bytesPerActivate::512-519 1180 1.32% 52.86% # Bytes accessed per row activation 189system.physmem.bytesPerActivate::576-583 650 0.72% 53.58% # Bytes accessed per row activation 190system.physmem.bytesPerActivate::640-647 587 0.65% 54.24% # Bytes accessed per row activation 191system.physmem.bytesPerActivate::704-711 521 0.58% 54.82% # Bytes accessed per row activation 192system.physmem.bytesPerActivate::768-775 703 0.78% 55.60% # Bytes accessed per row activation 193system.physmem.bytesPerActivate::832-839 336 0.37% 55.98% # Bytes accessed per row activation 194system.physmem.bytesPerActivate::896-903 268 0.30% 56.28% # Bytes accessed per row activation 195system.physmem.bytesPerActivate::960-967 216 0.24% 56.52% # Bytes accessed per row activation 196system.physmem.bytesPerActivate::1024-1031 509 0.57% 57.08% # Bytes accessed per row activation 197system.physmem.bytesPerActivate::1088-1095 151 0.17% 57.25% # Bytes accessed per row activation 198system.physmem.bytesPerActivate::1152-1159 159 0.18% 57.43% # Bytes accessed per row activation 199system.physmem.bytesPerActivate::1216-1223 138 0.15% 57.58% # Bytes accessed per row activation 200system.physmem.bytesPerActivate::1280-1287 229 0.26% 57.84% # Bytes accessed per row activation 201system.physmem.bytesPerActivate::1344-1351 105 0.12% 57.96% # Bytes accessed per row activation 202system.physmem.bytesPerActivate::1408-1415 2288 2.55% 60.51% # Bytes accessed per row activation 203system.physmem.bytesPerActivate::1472-1479 101 0.11% 60.62% # Bytes accessed per row activation 204system.physmem.bytesPerActivate::1536-1543 246 0.27% 60.89% # Bytes accessed per row activation 205system.physmem.bytesPerActivate::1600-1607 69 0.08% 60.97% # Bytes accessed per row activation 206system.physmem.bytesPerActivate::1664-1671 53 0.06% 61.03% # Bytes accessed per row activation 207system.physmem.bytesPerActivate::1728-1735 41 0.05% 61.07% # Bytes accessed per row activation 208system.physmem.bytesPerActivate::1792-1799 188 0.21% 61.28% # Bytes accessed per row activation 209system.physmem.bytesPerActivate::1856-1863 32 0.04% 61.32% # Bytes accessed per row activation 210system.physmem.bytesPerActivate::1920-1927 26 0.03% 61.35% # Bytes accessed per row activation 211system.physmem.bytesPerActivate::1984-1991 28 0.03% 61.38% # Bytes accessed per row activation 212system.physmem.bytesPerActivate::2048-2055 180 0.20% 61.58% # Bytes accessed per row activation 213system.physmem.bytesPerActivate::2112-2119 16 0.02% 61.60% # Bytes accessed per row activation 214system.physmem.bytesPerActivate::2176-2183 28 0.03% 61.63% # Bytes accessed per row activation 215system.physmem.bytesPerActivate::2240-2247 12 0.01% 61.64% # Bytes accessed per row activation 216system.physmem.bytesPerActivate::2304-2311 150 0.17% 61.81% # Bytes accessed per row activation 217system.physmem.bytesPerActivate::2368-2375 18 0.02% 61.83% # Bytes accessed per row activation 218system.physmem.bytesPerActivate::2432-2439 17 0.02% 61.85% # Bytes accessed per row activation 219system.physmem.bytesPerActivate::2496-2503 27 0.03% 61.88% # Bytes accessed per row activation 220system.physmem.bytesPerActivate::2560-2567 112 0.12% 62.00% # Bytes accessed per row activation 221system.physmem.bytesPerActivate::2624-2631 10 0.01% 62.01% # Bytes accessed per row activation 222system.physmem.bytesPerActivate::2688-2695 11 0.01% 62.03% # Bytes accessed per row activation 223system.physmem.bytesPerActivate::2752-2759 11 0.01% 62.04% # Bytes accessed per row activation 224system.physmem.bytesPerActivate::2816-2823 157 0.17% 62.21% # Bytes accessed per row activation 225system.physmem.bytesPerActivate::2880-2887 13 0.01% 62.23% # Bytes accessed per row activation 226system.physmem.bytesPerActivate::2944-2951 16 0.02% 62.25% # Bytes accessed per row activation 227system.physmem.bytesPerActivate::3008-3015 13 0.01% 62.26% # Bytes accessed per row activation 228system.physmem.bytesPerActivate::3072-3079 359 0.40% 62.66% # Bytes accessed per row activation 229system.physmem.bytesPerActivate::3136-3143 14 0.02% 62.68% # Bytes accessed per row activation 230system.physmem.bytesPerActivate::3200-3207 18 0.02% 62.70% # Bytes accessed per row activation 231system.physmem.bytesPerActivate::3264-3271 14 0.02% 62.71% # Bytes accessed per row activation 232system.physmem.bytesPerActivate::3328-3335 100 0.11% 62.82% # Bytes accessed per row activation 233system.physmem.bytesPerActivate::3392-3399 13 0.01% 62.84% # Bytes accessed per row activation 234system.physmem.bytesPerActivate::3456-3463 18 0.02% 62.86% # Bytes accessed per row activation 235system.physmem.bytesPerActivate::3520-3527 9 0.01% 62.87% # Bytes accessed per row activation 236system.physmem.bytesPerActivate::3584-3591 89 0.10% 62.97% # Bytes accessed per row activation 237system.physmem.bytesPerActivate::3648-3655 10 0.01% 62.98% # Bytes accessed per row activation 238system.physmem.bytesPerActivate::3712-3719 18 0.02% 63.00% # Bytes accessed per row activation 239system.physmem.bytesPerActivate::3776-3783 39 0.04% 63.04% # Bytes accessed per row activation 240system.physmem.bytesPerActivate::3840-3847 147 0.16% 63.21% # Bytes accessed per row activation 241system.physmem.bytesPerActivate::3904-3911 12 0.01% 63.22% # Bytes accessed per row activation 242system.physmem.bytesPerActivate::3968-3975 13 0.01% 63.23% # Bytes accessed per row activation 243system.physmem.bytesPerActivate::4032-4039 10 0.01% 63.25% # Bytes accessed per row activation 244system.physmem.bytesPerActivate::4096-4103 177 0.20% 63.44% # Bytes accessed per row activation 245system.physmem.bytesPerActivate::4160-4167 8 0.01% 63.45% # Bytes accessed per row activation 246system.physmem.bytesPerActivate::4224-4231 12 0.01% 63.46% # Bytes accessed per row activation 247system.physmem.bytesPerActivate::4288-4295 6 0.01% 63.47% # Bytes accessed per row activation 248system.physmem.bytesPerActivate::4352-4359 149 0.17% 63.64% # Bytes accessed per row activation 249system.physmem.bytesPerActivate::4416-4423 6 0.01% 63.64% # Bytes accessed per row activation 250system.physmem.bytesPerActivate::4480-4487 10 0.01% 63.66% # Bytes accessed per row activation 251system.physmem.bytesPerActivate::4544-4551 9 0.01% 63.67% # Bytes accessed per row activation 252system.physmem.bytesPerActivate::4608-4615 161 0.18% 63.84% # Bytes accessed per row activation 253system.physmem.bytesPerActivate::4672-4679 7 0.01% 63.85% # Bytes accessed per row activation 254system.physmem.bytesPerActivate::4736-4743 6 0.01% 63.86% # Bytes accessed per row activation 255system.physmem.bytesPerActivate::4800-4807 11 0.01% 63.87% # Bytes accessed per row activation 256system.physmem.bytesPerActivate::4864-4871 82 0.09% 63.96% # Bytes accessed per row activation 257system.physmem.bytesPerActivate::4928-4935 7 0.01% 63.97% # Bytes accessed per row activation 258system.physmem.bytesPerActivate::4992-4999 13 0.01% 63.99% # Bytes accessed per row activation 259system.physmem.bytesPerActivate::5056-5063 7 0.01% 63.99% # Bytes accessed per row activation 260system.physmem.bytesPerActivate::5120-5127 497 0.55% 64.55% # Bytes accessed per row activation 261system.physmem.bytesPerActivate::5184-5191 11 0.01% 64.56% # Bytes accessed per row activation 262system.physmem.bytesPerActivate::5248-5255 8 0.01% 64.57% # Bytes accessed per row activation 263system.physmem.bytesPerActivate::5312-5319 7 0.01% 64.58% # Bytes accessed per row activation 264system.physmem.bytesPerActivate::5376-5383 18 0.02% 64.60% # Bytes accessed per row activation 265system.physmem.bytesPerActivate::5440-5447 18 0.02% 64.62% # Bytes accessed per row activation 266system.physmem.bytesPerActivate::5504-5511 64 0.07% 64.69% # Bytes accessed per row activation 267system.physmem.bytesPerActivate::5568-5575 10 0.01% 64.70% # Bytes accessed per row activation 268system.physmem.bytesPerActivate::5632-5639 138 0.15% 64.85% # Bytes accessed per row activation 269system.physmem.bytesPerActivate::5696-5703 1 0.00% 64.85% # Bytes accessed per row activation 270system.physmem.bytesPerActivate::5824-5831 1 0.00% 64.85% # Bytes accessed per row activation 271system.physmem.bytesPerActivate::5888-5895 89 0.10% 64.95% # Bytes accessed per row activation 272system.physmem.bytesPerActivate::5952-5959 1 0.00% 64.95% # Bytes accessed per row activation 273system.physmem.bytesPerActivate::6016-6023 2 0.00% 64.96% # Bytes accessed per row activation 274system.physmem.bytesPerActivate::6144-6151 276 0.31% 65.26% # Bytes accessed per row activation 275system.physmem.bytesPerActivate::6208-6215 1 0.00% 65.27% # Bytes accessed per row activation 276system.physmem.bytesPerActivate::6400-6407 33 0.04% 65.30% # Bytes accessed per row activation 277system.physmem.bytesPerActivate::6528-6535 3 0.00% 65.31% # Bytes accessed per row activation 278system.physmem.bytesPerActivate::6592-6599 1 0.00% 65.31% # Bytes accessed per row activation 279system.physmem.bytesPerActivate::6656-6663 146 0.16% 65.47% # Bytes accessed per row activation 280system.physmem.bytesPerActivate::6720-6727 1 0.00% 65.47% # Bytes accessed per row activation 281system.physmem.bytesPerActivate::6912-6919 83 0.09% 65.56% # Bytes accessed per row activation 282system.physmem.bytesPerActivate::7040-7047 5 0.01% 65.57% # Bytes accessed per row activation 283system.physmem.bytesPerActivate::7168-7175 526 0.59% 66.16% # Bytes accessed per row activation 284system.physmem.bytesPerActivate::7232-7239 1 0.00% 66.16% # Bytes accessed per row activation 285system.physmem.bytesPerActivate::7424-7431 79 0.09% 66.24% # Bytes accessed per row activation 286system.physmem.bytesPerActivate::7552-7559 1 0.00% 66.25% # Bytes accessed per row activation 287system.physmem.bytesPerActivate::7616-7623 1 0.00% 66.25% # Bytes accessed per row activation 288system.physmem.bytesPerActivate::7680-7687 37 0.04% 66.29% # Bytes accessed per row activation 289system.physmem.bytesPerActivate::7872-7879 1 0.00% 66.29% # Bytes accessed per row activation 290system.physmem.bytesPerActivate::7936-7943 10 0.01% 66.30% # Bytes accessed per row activation 291system.physmem.bytesPerActivate::8064-8071 2 0.00% 66.30% # Bytes accessed per row activation 292system.physmem.bytesPerActivate::8192-8199 407 0.45% 66.76% # Bytes accessed per row activation 293system.physmem.bytesPerActivate::8320-8327 1 0.00% 66.76% # Bytes accessed per row activation 294system.physmem.bytesPerActivate::8448-8455 12 0.01% 66.77% # Bytes accessed per row activation 295system.physmem.bytesPerActivate::8704-8711 33 0.04% 66.81% # Bytes accessed per row activation 296system.physmem.bytesPerActivate::8960-8967 77 0.09% 66.89% # Bytes accessed per row activation 297system.physmem.bytesPerActivate::9024-9031 1 0.00% 66.89% # Bytes accessed per row activation 298system.physmem.bytesPerActivate::9088-9095 5 0.01% 66.90% # Bytes accessed per row activation 299system.physmem.bytesPerActivate::9216-9223 527 0.59% 67.49% # Bytes accessed per row activation 300system.physmem.bytesPerActivate::9344-9351 2 0.00% 67.49% # Bytes accessed per row activation 301system.physmem.bytesPerActivate::9472-9479 85 0.09% 67.58% # Bytes accessed per row activation 302system.physmem.bytesPerActivate::9728-9735 150 0.17% 67.75% # Bytes accessed per row activation 303system.physmem.bytesPerActivate::9856-9863 1 0.00% 67.75% # Bytes accessed per row activation 304system.physmem.bytesPerActivate::9920-9927 1 0.00% 67.75% # Bytes accessed per row activation 305system.physmem.bytesPerActivate::9984-9991 29 0.03% 67.79% # Bytes accessed per row activation 306system.physmem.bytesPerActivate::10048-10055 1 0.00% 67.79% # Bytes accessed per row activation 307system.physmem.bytesPerActivate::10112-10119 2 0.00% 67.79% # Bytes accessed per row activation 308system.physmem.bytesPerActivate::10240-10247 279 0.31% 68.10% # Bytes accessed per row activation 309system.physmem.bytesPerActivate::10496-10503 84 0.09% 68.19% # Bytes accessed per row activation 310system.physmem.bytesPerActivate::10752-10759 6 0.01% 68.20% # Bytes accessed per row activation 311system.physmem.bytesPerActivate::11008-11015 13 0.01% 68.21% # Bytes accessed per row activation 312system.physmem.bytesPerActivate::11072-11079 1 0.00% 68.22% # Bytes accessed per row activation 313system.physmem.bytesPerActivate::11136-11143 4 0.00% 68.22% # Bytes accessed per row activation 314system.physmem.bytesPerActivate::11264-11271 496 0.55% 68.77% # Bytes accessed per row activation 315system.physmem.bytesPerActivate::11392-11399 2 0.00% 68.78% # Bytes accessed per row activation 316system.physmem.bytesPerActivate::11520-11527 77 0.09% 68.86% # Bytes accessed per row activation 317system.physmem.bytesPerActivate::11648-11655 4 0.00% 68.87% # Bytes accessed per row activation 318system.physmem.bytesPerActivate::11776-11783 153 0.17% 69.04% # Bytes accessed per row activation 319system.physmem.bytesPerActivate::12032-12039 141 0.16% 69.19% # Bytes accessed per row activation 320system.physmem.bytesPerActivate::12160-12167 1 0.00% 69.19% # Bytes accessed per row activation 321system.physmem.bytesPerActivate::12288-12295 162 0.18% 69.37% # Bytes accessed per row activation 322system.physmem.bytesPerActivate::12352-12359 1 0.00% 69.38% # Bytes accessed per row activation 323system.physmem.bytesPerActivate::12416-12423 1 0.00% 69.38% # Bytes accessed per row activation 324system.physmem.bytesPerActivate::12544-12551 137 0.15% 69.53% # Bytes accessed per row activation 325system.physmem.bytesPerActivate::12800-12807 74 0.08% 69.61% # Bytes accessed per row activation 326system.physmem.bytesPerActivate::12992-12999 1 0.00% 69.61% # Bytes accessed per row activation 327system.physmem.bytesPerActivate::13056-13063 90 0.10% 69.71% # Bytes accessed per row activation 328system.physmem.bytesPerActivate::13184-13191 2 0.00% 69.72% # Bytes accessed per row activation 329system.physmem.bytesPerActivate::13312-13319 343 0.38% 70.10% # Bytes accessed per row activation 330system.physmem.bytesPerActivate::13568-13575 145 0.16% 70.26% # Bytes accessed per row activation 331system.physmem.bytesPerActivate::13696-13703 2 0.00% 70.26% # Bytes accessed per row activation 332system.physmem.bytesPerActivate::13824-13831 90 0.10% 70.36% # Bytes accessed per row activation 333system.physmem.bytesPerActivate::13952-13959 2 0.00% 70.36% # Bytes accessed per row activation 334system.physmem.bytesPerActivate::14080-14087 133 0.15% 70.51% # Bytes accessed per row activation 335system.physmem.bytesPerActivate::14208-14215 1 0.00% 70.51% # Bytes accessed per row activation 336system.physmem.bytesPerActivate::14336-14343 164 0.18% 70.70% # Bytes accessed per row activation 337system.physmem.bytesPerActivate::14464-14471 1 0.00% 70.70% # Bytes accessed per row activation 338system.physmem.bytesPerActivate::14592-14599 153 0.17% 70.87% # Bytes accessed per row activation 339system.physmem.bytesPerActivate::14720-14727 1 0.00% 70.87% # Bytes accessed per row activation 340system.physmem.bytesPerActivate::14848-14855 162 0.18% 71.05% # Bytes accessed per row activation 341system.physmem.bytesPerActivate::14912-14919 1 0.00% 71.05% # Bytes accessed per row activation 342system.physmem.bytesPerActivate::15104-15111 88 0.10% 71.15% # Bytes accessed per row activation 343system.physmem.bytesPerActivate::15168-15175 1 0.00% 71.15% # Bytes accessed per row activation 344system.physmem.bytesPerActivate::15232-15239 1 0.00% 71.15% # Bytes accessed per row activation 345system.physmem.bytesPerActivate::15360-15367 278 0.31% 71.46% # Bytes accessed per row activation 346system.physmem.bytesPerActivate::15488-15495 1 0.00% 71.46% # Bytes accessed per row activation 347system.physmem.bytesPerActivate::15616-15623 83 0.09% 71.55% # Bytes accessed per row activation 348system.physmem.bytesPerActivate::15872-15879 199 0.22% 71.78% # Bytes accessed per row activation 349system.physmem.bytesPerActivate::16000-16007 2 0.00% 71.78% # Bytes accessed per row activation 350system.physmem.bytesPerActivate::16128-16135 139 0.15% 71.93% # Bytes accessed per row activation 351system.physmem.bytesPerActivate::16192-16199 1 0.00% 71.93% # Bytes accessed per row activation 352system.physmem.bytesPerActivate::16256-16263 9 0.01% 71.94% # Bytes accessed per row activation 353system.physmem.bytesPerActivate::16384-16391 416 0.46% 72.41% # Bytes accessed per row activation 354system.physmem.bytesPerActivate::16512-16519 1 0.00% 72.41% # Bytes accessed per row activation 355system.physmem.bytesPerActivate::16640-16647 138 0.15% 72.56% # Bytes accessed per row activation 356system.physmem.bytesPerActivate::16896-16903 203 0.23% 72.79% # Bytes accessed per row activation 357system.physmem.bytesPerActivate::17024-17031 1 0.00% 72.79% # Bytes accessed per row activation 358system.physmem.bytesPerActivate::17152-17159 87 0.10% 72.89% # Bytes accessed per row activation 359system.physmem.bytesPerActivate::17280-17287 1 0.00% 72.89% # Bytes accessed per row activation 360system.physmem.bytesPerActivate::17408-17415 275 0.31% 73.20% # Bytes accessed per row activation 361system.physmem.bytesPerActivate::17664-17671 89 0.10% 73.29% # Bytes accessed per row activation 362system.physmem.bytesPerActivate::17792-17799 3 0.00% 73.30% # Bytes accessed per row activation 363system.physmem.bytesPerActivate::17920-17927 155 0.17% 73.47% # Bytes accessed per row activation 364system.physmem.bytesPerActivate::18048-18055 2 0.00% 73.47% # Bytes accessed per row activation 365system.physmem.bytesPerActivate::18176-18183 155 0.17% 73.65% # Bytes accessed per row activation 366system.physmem.bytesPerActivate::18240-18247 2 0.00% 73.65% # Bytes accessed per row activation 367system.physmem.bytesPerActivate::18432-18439 162 0.18% 73.83% # Bytes accessed per row activation 368system.physmem.bytesPerActivate::18560-18567 2 0.00% 73.83% # Bytes accessed per row activation 369system.physmem.bytesPerActivate::18688-18695 131 0.15% 73.98% # Bytes accessed per row activation 370system.physmem.bytesPerActivate::18816-18823 2 0.00% 73.98% # Bytes accessed per row activation 371system.physmem.bytesPerActivate::18944-18951 93 0.10% 74.08% # Bytes accessed per row activation 372system.physmem.bytesPerActivate::19008-19015 1 0.00% 74.08% # Bytes accessed per row activation 373system.physmem.bytesPerActivate::19200-19207 142 0.16% 74.24% # Bytes accessed per row activation 374system.physmem.bytesPerActivate::19328-19335 3 0.00% 74.25% # Bytes accessed per row activation 375system.physmem.bytesPerActivate::19392-19399 2 0.00% 74.25% # Bytes accessed per row activation 376system.physmem.bytesPerActivate::19456-19463 340 0.38% 74.63% # Bytes accessed per row activation 377system.physmem.bytesPerActivate::19712-19719 81 0.09% 74.72% # Bytes accessed per row activation 378system.physmem.bytesPerActivate::19776-19783 1 0.00% 74.72% # Bytes accessed per row activation 379system.physmem.bytesPerActivate::19968-19975 77 0.09% 74.80% # Bytes accessed per row activation 380system.physmem.bytesPerActivate::20096-20103 2 0.00% 74.81% # Bytes accessed per row activation 381system.physmem.bytesPerActivate::20160-20167 2 0.00% 74.81% # Bytes accessed per row activation 382system.physmem.bytesPerActivate::20224-20231 134 0.15% 74.96% # Bytes accessed per row activation 383system.physmem.bytesPerActivate::20352-20359 3 0.00% 74.96% # Bytes accessed per row activation 384system.physmem.bytesPerActivate::20416-20423 2 0.00% 74.96% # Bytes accessed per row activation 385system.physmem.bytesPerActivate::20480-20487 164 0.18% 75.15% # Bytes accessed per row activation 386system.physmem.bytesPerActivate::20608-20615 1 0.00% 75.15% # Bytes accessed per row activation 387system.physmem.bytesPerActivate::20736-20743 141 0.16% 75.30% # Bytes accessed per row activation 388system.physmem.bytesPerActivate::20864-20871 1 0.00% 75.31% # Bytes accessed per row activation 389system.physmem.bytesPerActivate::20928-20935 1 0.00% 75.31% # Bytes accessed per row activation 390system.physmem.bytesPerActivate::20992-20999 149 0.17% 75.47% # Bytes accessed per row activation 391system.physmem.bytesPerActivate::21120-21127 1 0.00% 75.47% # Bytes accessed per row activation 392system.physmem.bytesPerActivate::21248-21255 80 0.09% 75.56% # Bytes accessed per row activation 393system.physmem.bytesPerActivate::21312-21319 2 0.00% 75.56% # Bytes accessed per row activation 394system.physmem.bytesPerActivate::21376-21383 3 0.00% 75.57% # Bytes accessed per row activation 395system.physmem.bytesPerActivate::21504-21511 482 0.54% 76.11% # Bytes accessed per row activation 396system.physmem.bytesPerActivate::21760-21767 10 0.01% 76.12% # Bytes accessed per row activation 397system.physmem.bytesPerActivate::22016-22023 5 0.01% 76.12% # Bytes accessed per row activation 398system.physmem.bytesPerActivate::22208-22215 1 0.00% 76.12% # Bytes accessed per row activation 399system.physmem.bytesPerActivate::22272-22279 92 0.10% 76.23% # Bytes accessed per row activation 400system.physmem.bytesPerActivate::22336-22343 1 0.00% 76.23% # Bytes accessed per row activation 401system.physmem.bytesPerActivate::22400-22407 5 0.01% 76.23% # Bytes accessed per row activation 402system.physmem.bytesPerActivate::22528-22535 269 0.30% 76.53% # Bytes accessed per row activation 403system.physmem.bytesPerActivate::22784-22791 35 0.04% 76.57% # Bytes accessed per row activation 404system.physmem.bytesPerActivate::23040-23047 146 0.16% 76.73% # Bytes accessed per row activation 405system.physmem.bytesPerActivate::23168-23175 1 0.00% 76.73% # Bytes accessed per row activation 406system.physmem.bytesPerActivate::23296-23303 81 0.09% 76.83% # Bytes accessed per row activation 407system.physmem.bytesPerActivate::23424-23431 4 0.00% 76.83% # Bytes accessed per row activation 408system.physmem.bytesPerActivate::23552-23559 526 0.59% 77.42% # Bytes accessed per row activation 409system.physmem.bytesPerActivate::23808-23815 74 0.08% 77.50% # Bytes accessed per row activation 410system.physmem.bytesPerActivate::24064-24071 36 0.04% 77.54% # Bytes accessed per row activation 411system.physmem.bytesPerActivate::24128-24135 1 0.00% 77.54% # Bytes accessed per row activation 412system.physmem.bytesPerActivate::24256-24263 1 0.00% 77.54% # Bytes accessed per row activation 413system.physmem.bytesPerActivate::24320-24327 12 0.01% 77.55% # Bytes accessed per row activation 414system.physmem.bytesPerActivate::24448-24455 4 0.00% 77.56% # Bytes accessed per row activation 415system.physmem.bytesPerActivate::24512-24519 1 0.00% 77.56% # Bytes accessed per row activation 416system.physmem.bytesPerActivate::24576-24583 404 0.45% 78.01% # Bytes accessed per row activation 417system.physmem.bytesPerActivate::24832-24839 7 0.01% 78.02% # Bytes accessed per row activation 418system.physmem.bytesPerActivate::25088-25095 28 0.03% 78.05% # Bytes accessed per row activation 419system.physmem.bytesPerActivate::25344-25351 84 0.09% 78.14% # Bytes accessed per row activation 420system.physmem.bytesPerActivate::25472-25479 7 0.01% 78.15% # Bytes accessed per row activation 421system.physmem.bytesPerActivate::25600-25607 523 0.58% 78.73% # Bytes accessed per row activation 422system.physmem.bytesPerActivate::25856-25863 80 0.09% 78.82% # Bytes accessed per row activation 423system.physmem.bytesPerActivate::25920-25927 1 0.00% 78.82% # Bytes accessed per row activation 424system.physmem.bytesPerActivate::25984-25991 1 0.00% 78.82% # Bytes accessed per row activation 425system.physmem.bytesPerActivate::26112-26119 152 0.17% 78.99% # Bytes accessed per row activation 426system.physmem.bytesPerActivate::26240-26247 1 0.00% 79.00% # Bytes accessed per row activation 427system.physmem.bytesPerActivate::26304-26311 1 0.00% 79.00% # Bytes accessed per row activation 428system.physmem.bytesPerActivate::26368-26375 32 0.04% 79.03% # Bytes accessed per row activation 429system.physmem.bytesPerActivate::26496-26503 4 0.00% 79.04% # Bytes accessed per row activation 430system.physmem.bytesPerActivate::26624-26631 274 0.31% 79.34% # Bytes accessed per row activation 431system.physmem.bytesPerActivate::26688-26695 1 0.00% 79.34% # Bytes accessed per row activation 432system.physmem.bytesPerActivate::26880-26887 82 0.09% 79.43% # Bytes accessed per row activation 433system.physmem.bytesPerActivate::26944-26951 1 0.00% 79.44% # Bytes accessed per row activation 434system.physmem.bytesPerActivate::27136-27143 3 0.00% 79.44% # Bytes accessed per row activation 435system.physmem.bytesPerActivate::27392-27399 17 0.02% 79.46% # Bytes accessed per row activation 436system.physmem.bytesPerActivate::27520-27527 3 0.00% 79.46% # Bytes accessed per row activation 437system.physmem.bytesPerActivate::27584-27591 1 0.00% 79.46% # Bytes accessed per row activation 438system.physmem.bytesPerActivate::27648-27655 484 0.54% 80.00% # Bytes accessed per row activation 439system.physmem.bytesPerActivate::27712-27719 1 0.00% 80.00% # Bytes accessed per row activation 440system.physmem.bytesPerActivate::27776-27783 1 0.00% 80.00% # Bytes accessed per row activation 441system.physmem.bytesPerActivate::27904-27911 77 0.09% 80.09% # Bytes accessed per row activation 442system.physmem.bytesPerActivate::27968-27975 2 0.00% 80.09% # Bytes accessed per row activation 443system.physmem.bytesPerActivate::28032-28039 1 0.00% 80.09% # Bytes accessed per row activation 444system.physmem.bytesPerActivate::28160-28167 152 0.17% 80.26% # Bytes accessed per row activation 445system.physmem.bytesPerActivate::28224-28231 1 0.00% 80.26% # Bytes accessed per row activation 446system.physmem.bytesPerActivate::28288-28295 1 0.00% 80.26% # Bytes accessed per row activation 447system.physmem.bytesPerActivate::28352-28359 1 0.00% 80.27% # Bytes accessed per row activation 448system.physmem.bytesPerActivate::28416-28423 140 0.16% 80.42% # Bytes accessed per row activation 449system.physmem.bytesPerActivate::28544-28551 1 0.00% 80.42% # Bytes accessed per row activation 450system.physmem.bytesPerActivate::28672-28679 163 0.18% 80.60% # Bytes accessed per row activation 451system.physmem.bytesPerActivate::28800-28807 2 0.00% 80.61% # Bytes accessed per row activation 452system.physmem.bytesPerActivate::28928-28935 130 0.14% 80.75% # Bytes accessed per row activation 453system.physmem.bytesPerActivate::29120-29127 1 0.00% 80.75% # Bytes accessed per row activation 454system.physmem.bytesPerActivate::29184-29191 75 0.08% 80.84% # Bytes accessed per row activation 455system.physmem.bytesPerActivate::29440-29447 86 0.10% 80.93% # Bytes accessed per row activation 456system.physmem.bytesPerActivate::29568-29575 3 0.00% 80.94% # Bytes accessed per row activation 457system.physmem.bytesPerActivate::29696-29703 336 0.37% 81.31% # Bytes accessed per row activation 458system.physmem.bytesPerActivate::29824-29831 1 0.00% 81.31% # Bytes accessed per row activation 459system.physmem.bytesPerActivate::29952-29959 140 0.16% 81.47% # Bytes accessed per row activation 460system.physmem.bytesPerActivate::30080-30087 1 0.00% 81.47% # Bytes accessed per row activation 461system.physmem.bytesPerActivate::30144-30151 2 0.00% 81.47% # Bytes accessed per row activation 462system.physmem.bytesPerActivate::30208-30215 91 0.10% 81.57% # Bytes accessed per row activation 463system.physmem.bytesPerActivate::30336-30343 1 0.00% 81.57% # Bytes accessed per row activation 464system.physmem.bytesPerActivate::30400-30407 1 0.00% 81.57% # Bytes accessed per row activation 465system.physmem.bytesPerActivate::30464-30471 134 0.15% 81.72% # Bytes accessed per row activation 466system.physmem.bytesPerActivate::30592-30599 1 0.00% 81.72% # Bytes accessed per row activation 467system.physmem.bytesPerActivate::30720-30727 156 0.17% 81.90% # Bytes accessed per row activation 468system.physmem.bytesPerActivate::30784-30791 1 0.00% 81.90% # Bytes accessed per row activation 469system.physmem.bytesPerActivate::30912-30919 2 0.00% 81.90% # Bytes accessed per row activation 470system.physmem.bytesPerActivate::30976-30983 152 0.17% 82.07% # Bytes accessed per row activation 471system.physmem.bytesPerActivate::31104-31111 2 0.00% 82.07% # Bytes accessed per row activation 472system.physmem.bytesPerActivate::31232-31239 157 0.17% 82.25% # Bytes accessed per row activation 473system.physmem.bytesPerActivate::31360-31367 2 0.00% 82.25% # Bytes accessed per row activation 474system.physmem.bytesPerActivate::31424-31431 1 0.00% 82.25% # Bytes accessed per row activation 475system.physmem.bytesPerActivate::31488-31495 86 0.10% 82.35% # Bytes accessed per row activation 476system.physmem.bytesPerActivate::31616-31623 2 0.00% 82.35% # Bytes accessed per row activation 477system.physmem.bytesPerActivate::31744-31751 272 0.30% 82.65% # Bytes accessed per row activation 478system.physmem.bytesPerActivate::32000-32007 83 0.09% 82.75% # Bytes accessed per row activation 479system.physmem.bytesPerActivate::32128-32135 2 0.00% 82.75% # Bytes accessed per row activation 480system.physmem.bytesPerActivate::32192-32199 1 0.00% 82.75% # Bytes accessed per row activation 481system.physmem.bytesPerActivate::32256-32263 202 0.23% 82.97% # Bytes accessed per row activation 482system.physmem.bytesPerActivate::32320-32327 1 0.00% 82.98% # Bytes accessed per row activation 483system.physmem.bytesPerActivate::32384-32391 2 0.00% 82.98% # Bytes accessed per row activation 484system.physmem.bytesPerActivate::32512-32519 144 0.16% 83.14% # Bytes accessed per row activation 485system.physmem.bytesPerActivate::32640-32647 2 0.00% 83.14% # Bytes accessed per row activation 486system.physmem.bytesPerActivate::32768-32775 415 0.46% 83.60% # Bytes accessed per row activation 487system.physmem.bytesPerActivate::32896-32903 1 0.00% 83.60% # Bytes accessed per row activation 488system.physmem.bytesPerActivate::33024-33031 148 0.16% 83.77% # Bytes accessed per row activation 489system.physmem.bytesPerActivate::33152-33159 1 0.00% 83.77% # Bytes accessed per row activation 490system.physmem.bytesPerActivate::33280-33287 208 0.23% 84.00% # Bytes accessed per row activation 491system.physmem.bytesPerActivate::33344-33351 1 0.00% 84.00% # Bytes accessed per row activation 492system.physmem.bytesPerActivate::33408-33415 2 0.00% 84.00% # Bytes accessed per row activation 493system.physmem.bytesPerActivate::33536-33543 85 0.09% 84.10% # Bytes accessed per row activation 494system.physmem.bytesPerActivate::33664-33671 2 0.00% 84.10% # Bytes accessed per row activation 495system.physmem.bytesPerActivate::33792-33799 270 0.30% 84.40% # Bytes accessed per row activation 496system.physmem.bytesPerActivate::33920-33927 2 0.00% 84.40% # Bytes accessed per row activation 497system.physmem.bytesPerActivate::34048-34055 85 0.09% 84.50% # Bytes accessed per row activation 498system.physmem.bytesPerActivate::34112-34119 1 0.00% 84.50% # Bytes accessed per row activation 499system.physmem.bytesPerActivate::34304-34311 157 0.17% 84.68% # Bytes accessed per row activation 500system.physmem.bytesPerActivate::34432-34439 1 0.00% 84.68% # Bytes accessed per row activation 501system.physmem.bytesPerActivate::34560-34567 152 0.17% 84.85% # Bytes accessed per row activation 502system.physmem.bytesPerActivate::34624-34631 2 0.00% 84.85% # Bytes accessed per row activation 503system.physmem.bytesPerActivate::34688-34695 1 0.00% 84.85% # Bytes accessed per row activation 504system.physmem.bytesPerActivate::34816-34823 147 0.16% 85.01% # Bytes accessed per row activation 505system.physmem.bytesPerActivate::35072-35079 134 0.15% 85.16% # Bytes accessed per row activation 506system.physmem.bytesPerActivate::35328-35335 90 0.10% 85.26% # Bytes accessed per row activation 507system.physmem.bytesPerActivate::35392-35399 2 0.00% 85.27% # Bytes accessed per row activation 508system.physmem.bytesPerActivate::35456-35463 4 0.00% 85.27% # Bytes accessed per row activation 509system.physmem.bytesPerActivate::35520-35527 1 0.00% 85.27% # Bytes accessed per row activation 510system.physmem.bytesPerActivate::35584-35591 143 0.16% 85.43% # Bytes accessed per row activation 511system.physmem.bytesPerActivate::35840-35847 337 0.38% 85.81% # Bytes accessed per row activation 512system.physmem.bytesPerActivate::35968-35975 1 0.00% 85.81% # Bytes accessed per row activation 513system.physmem.bytesPerActivate::36096-36103 82 0.09% 85.90% # Bytes accessed per row activation 514system.physmem.bytesPerActivate::36224-36231 2 0.00% 85.90% # Bytes accessed per row activation 515system.physmem.bytesPerActivate::36352-36359 76 0.08% 85.99% # Bytes accessed per row activation 516system.physmem.bytesPerActivate::36416-36423 1 0.00% 85.99% # Bytes accessed per row activation 517system.physmem.bytesPerActivate::36608-36615 131 0.15% 86.13% # Bytes accessed per row activation 518system.physmem.bytesPerActivate::36736-36743 1 0.00% 86.13% # Bytes accessed per row activation 519system.physmem.bytesPerActivate::36864-36871 154 0.17% 86.31% # Bytes accessed per row activation 520system.physmem.bytesPerActivate::36992-36999 2 0.00% 86.31% # Bytes accessed per row activation 521system.physmem.bytesPerActivate::37120-37127 139 0.15% 86.46% # Bytes accessed per row activation 522system.physmem.bytesPerActivate::37184-37191 1 0.00% 86.46% # Bytes accessed per row activation 523system.physmem.bytesPerActivate::37312-37319 1 0.00% 86.46% # Bytes accessed per row activation 524system.physmem.bytesPerActivate::37376-37383 153 0.17% 86.64% # Bytes accessed per row activation 525system.physmem.bytesPerActivate::37504-37511 2 0.00% 86.64% # Bytes accessed per row activation 526system.physmem.bytesPerActivate::37568-37575 2 0.00% 86.64% # Bytes accessed per row activation 527system.physmem.bytesPerActivate::37632-37639 81 0.09% 86.73% # Bytes accessed per row activation 528system.physmem.bytesPerActivate::37760-37767 2 0.00% 86.73% # Bytes accessed per row activation 529system.physmem.bytesPerActivate::37824-37831 1 0.00% 86.73% # Bytes accessed per row activation 530system.physmem.bytesPerActivate::37888-37895 483 0.54% 87.27% # Bytes accessed per row activation 531system.physmem.bytesPerActivate::37952-37959 1 0.00% 87.27% # Bytes accessed per row activation 532system.physmem.bytesPerActivate::38144-38151 12 0.01% 87.29% # Bytes accessed per row activation 533system.physmem.bytesPerActivate::38400-38407 2 0.00% 87.29% # Bytes accessed per row activation 534system.physmem.bytesPerActivate::38528-38535 4 0.00% 87.29% # Bytes accessed per row activation 535system.physmem.bytesPerActivate::38592-38599 1 0.00% 87.29% # Bytes accessed per row activation 536system.physmem.bytesPerActivate::38656-38663 84 0.09% 87.39% # Bytes accessed per row activation 537system.physmem.bytesPerActivate::38848-38855 1 0.00% 87.39% # Bytes accessed per row activation 538system.physmem.bytesPerActivate::38912-38919 271 0.30% 87.69% # Bytes accessed per row activation 539system.physmem.bytesPerActivate::39040-39047 1 0.00% 87.69% # Bytes accessed per row activation 540system.physmem.bytesPerActivate::39168-39175 30 0.03% 87.72% # Bytes accessed per row activation 541system.physmem.bytesPerActivate::39232-39239 1 0.00% 87.73% # Bytes accessed per row activation 542system.physmem.bytesPerActivate::39296-39303 1 0.00% 87.73% # Bytes accessed per row activation 543system.physmem.bytesPerActivate::39424-39431 152 0.17% 87.90% # Bytes accessed per row activation 544system.physmem.bytesPerActivate::39552-39559 3 0.00% 87.90% # Bytes accessed per row activation 545system.physmem.bytesPerActivate::39616-39623 1 0.00% 87.90% # Bytes accessed per row activation 546system.physmem.bytesPerActivate::39680-39687 86 0.10% 88.00% # Bytes accessed per row activation 547system.physmem.bytesPerActivate::39808-39815 1 0.00% 88.00% # Bytes accessed per row activation 548system.physmem.bytesPerActivate::39936-39943 521 0.58% 88.58% # Bytes accessed per row activation 549system.physmem.bytesPerActivate::40064-40071 2 0.00% 88.58% # Bytes accessed per row activation 550system.physmem.bytesPerActivate::40192-40199 77 0.09% 88.67% # Bytes accessed per row activation 551system.physmem.bytesPerActivate::40448-40455 28 0.03% 88.70% # Bytes accessed per row activation 552system.physmem.bytesPerActivate::40576-40583 4 0.00% 88.70% # Bytes accessed per row activation 553system.physmem.bytesPerActivate::40704-40711 10 0.01% 88.71% # Bytes accessed per row activation 554system.physmem.bytesPerActivate::40960-40967 402 0.45% 89.16% # Bytes accessed per row activation 555system.physmem.bytesPerActivate::41216-41223 9 0.01% 89.17% # Bytes accessed per row activation 556system.physmem.bytesPerActivate::41280-41287 1 0.00% 89.17% # Bytes accessed per row activation 557system.physmem.bytesPerActivate::41408-41415 1 0.00% 89.17% # Bytes accessed per row activation 558system.physmem.bytesPerActivate::41472-41479 35 0.04% 89.21% # Bytes accessed per row activation 559system.physmem.bytesPerActivate::41600-41607 4 0.00% 89.22% # Bytes accessed per row activation 560system.physmem.bytesPerActivate::41728-41735 79 0.09% 89.31% # Bytes accessed per row activation 561system.physmem.bytesPerActivate::41856-41863 1 0.00% 89.31% # Bytes accessed per row activation 562system.physmem.bytesPerActivate::41984-41991 523 0.58% 89.89% # Bytes accessed per row activation 563system.physmem.bytesPerActivate::42240-42247 79 0.09% 89.98% # Bytes accessed per row activation 564system.physmem.bytesPerActivate::42496-42503 146 0.16% 90.14% # Bytes accessed per row activation 565system.physmem.bytesPerActivate::42624-42631 4 0.00% 90.14% # Bytes accessed per row activation 566system.physmem.bytesPerActivate::42752-42759 34 0.04% 90.18% # Bytes accessed per row activation 567system.physmem.bytesPerActivate::43008-43015 269 0.30% 90.48% # Bytes accessed per row activation 568system.physmem.bytesPerActivate::43136-43143 1 0.00% 90.48% # Bytes accessed per row activation 569system.physmem.bytesPerActivate::43200-43207 1 0.00% 90.48% # Bytes accessed per row activation 570system.physmem.bytesPerActivate::43264-43271 89 0.10% 90.58% # Bytes accessed per row activation 571system.physmem.bytesPerActivate::43328-43335 1 0.00% 90.58% # Bytes accessed per row activation 572system.physmem.bytesPerActivate::43520-43527 3 0.00% 90.59% # Bytes accessed per row activation 573system.physmem.bytesPerActivate::43648-43655 3 0.00% 90.59% # Bytes accessed per row activation 574system.physmem.bytesPerActivate::43712-43719 1 0.00% 90.59% # Bytes accessed per row activation 575system.physmem.bytesPerActivate::43776-43783 13 0.01% 90.61% # Bytes accessed per row activation 576system.physmem.bytesPerActivate::43904-43911 1 0.00% 90.61% # Bytes accessed per row activation 577system.physmem.bytesPerActivate::44032-44039 482 0.54% 91.15% # Bytes accessed per row activation 578system.physmem.bytesPerActivate::44160-44167 1 0.00% 91.15% # Bytes accessed per row activation 579system.physmem.bytesPerActivate::44224-44231 2 0.00% 91.15% # Bytes accessed per row activation 580system.physmem.bytesPerActivate::44288-44295 78 0.09% 91.24% # Bytes accessed per row activation 581system.physmem.bytesPerActivate::44544-44551 151 0.17% 91.40% # Bytes accessed per row activation 582system.physmem.bytesPerActivate::44672-44679 2 0.00% 91.41% # Bytes accessed per row activation 583system.physmem.bytesPerActivate::44800-44807 138 0.15% 91.56% # Bytes accessed per row activation 584system.physmem.bytesPerActivate::44928-44935 3 0.00% 91.56% # Bytes accessed per row activation 585system.physmem.bytesPerActivate::45056-45063 153 0.17% 91.73% # Bytes accessed per row activation 586system.physmem.bytesPerActivate::45120-45127 2 0.00% 91.74% # Bytes accessed per row activation 587system.physmem.bytesPerActivate::45184-45191 1 0.00% 91.74% # Bytes accessed per row activation 588system.physmem.bytesPerActivate::45312-45319 134 0.15% 91.89% # Bytes accessed per row activation 589system.physmem.bytesPerActivate::45568-45575 77 0.09% 91.97% # Bytes accessed per row activation 590system.physmem.bytesPerActivate::45696-45703 2 0.00% 91.97% # Bytes accessed per row activation 591system.physmem.bytesPerActivate::45760-45767 1 0.00% 91.98% # Bytes accessed per row activation 592system.physmem.bytesPerActivate::45824-45831 82 0.09% 92.07% # Bytes accessed per row activation 593system.physmem.bytesPerActivate::46080-46087 341 0.38% 92.45% # Bytes accessed per row activation 594system.physmem.bytesPerActivate::46144-46151 1 0.00% 92.45% # Bytes accessed per row activation 595system.physmem.bytesPerActivate::46208-46215 2 0.00% 92.45% # Bytes accessed per row activation 596system.physmem.bytesPerActivate::46336-46343 140 0.16% 92.61% # Bytes accessed per row activation 597system.physmem.bytesPerActivate::46464-46471 1 0.00% 92.61% # Bytes accessed per row activation 598system.physmem.bytesPerActivate::46592-46599 93 0.10% 92.71% # Bytes accessed per row activation 599system.physmem.bytesPerActivate::46720-46727 1 0.00% 92.71% # Bytes accessed per row activation 600system.physmem.bytesPerActivate::46848-46855 133 0.15% 92.86% # Bytes accessed per row activation 601system.physmem.bytesPerActivate::46976-46983 3 0.00% 92.86% # Bytes accessed per row activation 602system.physmem.bytesPerActivate::47104-47111 149 0.17% 93.03% # Bytes accessed per row activation 603system.physmem.bytesPerActivate::47232-47239 3 0.00% 93.03% # Bytes accessed per row activation 604system.physmem.bytesPerActivate::47360-47367 156 0.17% 93.21% # Bytes accessed per row activation 605system.physmem.bytesPerActivate::47616-47623 157 0.17% 93.38% # Bytes accessed per row activation 606system.physmem.bytesPerActivate::47744-47751 3 0.00% 93.39% # Bytes accessed per row activation 607system.physmem.bytesPerActivate::47872-47879 88 0.10% 93.48% # Bytes accessed per row activation 608system.physmem.bytesPerActivate::47936-47943 1 0.00% 93.48% # Bytes accessed per row activation 609system.physmem.bytesPerActivate::48000-48007 1 0.00% 93.49% # Bytes accessed per row activation 610system.physmem.bytesPerActivate::48128-48135 298 0.33% 93.82% # Bytes accessed per row activation 611system.physmem.bytesPerActivate::48192-48199 4 0.00% 93.82% # Bytes accessed per row activation 612system.physmem.bytesPerActivate::48256-48263 1 0.00% 93.82% # Bytes accessed per row activation 613system.physmem.bytesPerActivate::48320-48327 3 0.00% 93.83% # Bytes accessed per row activation 614system.physmem.bytesPerActivate::48384-48391 110 0.12% 93.95% # Bytes accessed per row activation 615system.physmem.bytesPerActivate::48512-48519 1 0.00% 93.95% # Bytes accessed per row activation 616system.physmem.bytesPerActivate::48640-48647 200 0.22% 94.17% # Bytes accessed per row activation 617system.physmem.bytesPerActivate::48768-48775 70 0.08% 94.25% # Bytes accessed per row activation 618system.physmem.bytesPerActivate::48896-48903 136 0.15% 94.40% # Bytes accessed per row activation 619system.physmem.bytesPerActivate::48960-48967 5 0.01% 94.41% # Bytes accessed per row activation 620system.physmem.bytesPerActivate::49024-49031 9 0.01% 94.42% # Bytes accessed per row activation 621system.physmem.bytesPerActivate::49088-49095 6 0.01% 94.43% # Bytes accessed per row activation 622system.physmem.bytesPerActivate::49152-49159 5002 5.57% 100.00% # Bytes accessed per row activation 623system.physmem.bytesPerActivate::total 89727 # Bytes accessed per row activation 624system.physmem.totQLat 373414318500 # Total ticks spent queuing 625system.physmem.totMemAccLat 469593144750 # Total ticks spent from burst creation until serviced by the DRAM 626system.physmem.totBusLat 77465255000 # Total ticks spent in databus transfers 627system.physmem.totBankLat 18713571250 # Total ticks spent accessing banks 628system.physmem.avgQLat 24102.05 # Average queueing delay per DRAM burst 629system.physmem.avgBankLat 1207.87 # Average bank access latency per DRAM burst 630system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst 631system.physmem.avgMemAccLat 30309.92 # Average memory access latency per DRAM burst 632system.physmem.avgRdBW 378.96 # Average DRAM read bandwidth in MiByte/s 633system.physmem.avgWrBW 2.62 # Average achieved write bandwidth in MiByte/s 634system.physmem.avgRdBWSys 50.63 # Average system read bandwidth in MiByte/s 635system.physmem.avgWrBWSys 2.57 # Average system write bandwidth in MiByte/s 636system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s 637system.physmem.busUtil 2.98 # Data bus utilization in percentage 638system.physmem.busUtilRead 2.96 # Data bus utilization in percentage for reads 639system.physmem.busUtilWrite 0.02 # Data bus utilization in percentage for writes 640system.physmem.avgRdQLen 0.18 # Average read queue length when enqueuing 641system.physmem.avgWrQLen 14.75 # Average write queue length when enqueuing 642system.physmem.readRowHits 15419103 # Number of row buffer hits during reads 643system.physmem.writeRowHits 91153 # Number of row buffer hits during writes 644system.physmem.readRowHitRate 99.52 # Row buffer hit rate for reads 645system.physmem.writeRowHitRate 85.23 # Row buffer hit rate for writes 646system.physmem.avgGap 160458.28 # Average gap between requests 647system.physmem.pageHitRate 99.42 # Row buffer hit rate, read and write combined 648system.physmem.prechargeAllPercent 2.19 # Percentage of time for which DRAM has all the banks in precharge state |
| 450system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 451system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 452system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 453system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 454system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 455system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 456system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s) 457system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s) 458system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s) 459system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s) 460system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s) 461system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s) | 649system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 650system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 651system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 652system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 653system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 654system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 655system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s) 656system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s) 657system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s) 658system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s) 659system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s) 660system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s) |
| 462system.membus.throughput 54136917 # Throughput (bytes/s) 463system.membus.trans_dist::ReadReq 16546596 # Transaction distribution 464system.membus.trans_dist::ReadResp 16546596 # Transaction distribution | 661system.membus.throughput 54116520 # Throughput (bytes/s) 662system.membus.trans_dist::ReadReq 16546551 # Transaction distribution 663system.membus.trans_dist::ReadResp 16546551 # Transaction distribution |
| 465system.membus.trans_dist::WriteReq 763368 # Transaction distribution 466system.membus.trans_dist::WriteResp 763368 # Transaction distribution | 664system.membus.trans_dist::WriteReq 763368 # Transaction distribution 665system.membus.trans_dist::WriteResp 763368 # Transaction distribution |
| 467system.membus.trans_dist::Writeback 57971 # Transaction distribution | 666system.membus.trans_dist::Writeback 57909 # Transaction distribution |
| 468system.membus.trans_dist::UpgradeReq 4515 # Transaction distribution 469system.membus.trans_dist::UpgradeResp 4515 # Transaction distribution | 667system.membus.trans_dist::UpgradeReq 4515 # Transaction distribution 668system.membus.trans_dist::UpgradeResp 4515 # Transaction distribution |
| 470system.membus.trans_dist::ReadExReq 132250 # Transaction distribution 471system.membus.trans_dist::ReadExResp 132250 # Transaction distribution 472system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 2382988 # Packet count per connected master and slave (bytes) | 669system.membus.trans_dist::ReadExReq 132216 # Transaction distribution 670system.membus.trans_dist::ReadExResp 132216 # Transaction distribution 671system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 2382986 # Packet count per connected master and slave (bytes) |
| 473system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes) 474system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 3850 # Packet count per connected master and slave (bytes) 475system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 2 # Packet count per connected master and slave (bytes) | 672system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes) 673system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 3850 # Packet count per connected master and slave (bytes) 674system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 2 # Packet count per connected master and slave (bytes) |
| 476system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1893731 # Packet count per connected master and slave (bytes) 477system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4280581 # Packet count per connected master and slave (bytes) | 675system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1893513 # Packet count per connected master and slave (bytes) 676system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4280361 # Packet count per connected master and slave (bytes) |
| 478system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 30670848 # Packet count per connected master and slave (bytes) 479system.membus.pkt_count_system.iocache.mem_side::total 30670848 # Packet count per connected master and slave (bytes) | 677system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 30670848 # Packet count per connected master and slave (bytes) 678system.membus.pkt_count_system.iocache.mem_side::total 30670848 # Packet count per connected master and slave (bytes) |
| 480system.membus.pkt_count::total 34951429 # Packet count per connected master and slave (bytes) 481system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 2390393 # Cumulative packet size per connected master and slave (bytes) | 679system.membus.pkt_count::total 34951209 # Packet count per connected master and slave (bytes) 680system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 2390389 # Cumulative packet size per connected master and slave (bytes) |
| 482system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 20 # Cumulative packet size per connected master and slave (bytes) 483system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 7700 # Cumulative packet size per connected master and slave (bytes) 484system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 4 # Cumulative packet size per connected master and slave (bytes) | 681system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 20 # Cumulative packet size per connected master and slave (bytes) 682system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 7700 # Cumulative packet size per connected master and slave (bytes) 683system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 4 # Cumulative packet size per connected master and slave (bytes) |
| 485system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 16525304 # Cumulative packet size per connected master and slave (bytes) 486system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 18923421 # Cumulative packet size per connected master and slave (bytes) | 684system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 16516344 # Cumulative packet size per connected master and slave (bytes) 685system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 18914457 # Cumulative packet size per connected master and slave (bytes) |
| 487system.membus.tot_pkt_size_system.iocache.mem_side::system.physmem.port 122683392 # Cumulative packet size per connected master and slave (bytes) 488system.membus.tot_pkt_size_system.iocache.mem_side::total 122683392 # Cumulative packet size per connected master and slave (bytes) | 686system.membus.tot_pkt_size_system.iocache.mem_side::system.physmem.port 122683392 # Cumulative packet size per connected master and slave (bytes) 687system.membus.tot_pkt_size_system.iocache.mem_side::total 122683392 # Cumulative packet size per connected master and slave (bytes) |
| 489system.membus.tot_pkt_size::total 141606813 # Cumulative packet size per connected master and slave (bytes) 490system.membus.data_through_bus 141606813 # Total data (bytes) | 688system.membus.tot_pkt_size::total 141597849 # Cumulative packet size per connected master and slave (bytes) 689system.membus.data_through_bus 141597849 # Total data (bytes) |
| 491system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) | 690system.membus.snoop_data_through_bus 0 # Total snoop data (bytes) |
| 492system.membus.reqLayer0.occupancy 1206151000 # Layer occupancy (ticks) | 691system.membus.reqLayer0.occupancy 1206149500 # Layer occupancy (ticks) |
| 493system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 494system.membus.reqLayer1.occupancy 5000 # Layer occupancy (ticks) 495system.membus.reqLayer1.utilization 0.0 # Layer utilization (%) | 692system.membus.reqLayer0.utilization 0.0 # Layer utilization (%) 693system.membus.reqLayer1.occupancy 5000 # Layer occupancy (ticks) 694system.membus.reqLayer1.utilization 0.0 # Layer utilization (%) |
| 496system.membus.reqLayer2.occupancy 3613000 # Layer occupancy (ticks) | 695system.membus.reqLayer2.occupancy 3614000 # Layer occupancy (ticks) |
| 497system.membus.reqLayer2.utilization 0.0 # Layer utilization (%) 498system.membus.reqLayer4.occupancy 1000 # Layer occupancy (ticks) 499system.membus.reqLayer4.utilization 0.0 # Layer utilization (%) | 696system.membus.reqLayer2.utilization 0.0 # Layer utilization (%) 697system.membus.reqLayer4.occupancy 1000 # Layer occupancy (ticks) 698system.membus.reqLayer4.utilization 0.0 # Layer utilization (%) |
| 500system.membus.reqLayer6.occupancy 17904160000 # Layer occupancy (ticks) | 699system.membus.reqLayer6.occupancy 17910601500 # Layer occupancy (ticks) |
| 501system.membus.reqLayer6.utilization 0.7 # Layer utilization (%) | 700system.membus.reqLayer6.utilization 0.7 # Layer utilization (%) |
| 502system.membus.respLayer1.occupancy 4944878700 # Layer occupancy (ticks) | 701system.membus.respLayer1.occupancy 4950348835 # Layer occupancy (ticks) |
| 503system.membus.respLayer1.utilization 0.2 # Layer utilization (%) | 702system.membus.respLayer1.utilization 0.2 # Layer utilization (%) |
| 504system.membus.respLayer2.occupancy 34615555500 # Layer occupancy (ticks) | 703system.membus.respLayer2.occupancy 34633819250 # Layer occupancy (ticks) |
| 505system.membus.respLayer2.utilization 1.3 # Layer utilization (%) 506system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 507system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 508system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 509system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 510system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 511system.cf0.dma_write_txs 0 # Number of DMA write transactions. | 704system.membus.respLayer2.utilization 1.3 # Layer utilization (%) 705system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 706system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 707system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 708system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 709system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 710system.cf0.dma_write_txs 0 # Number of DMA write transactions. |
| 512system.iobus.throughput 47816267 # Throughput (bytes/s) 513system.iobus.trans_dist::ReadReq 16518752 # Transaction distribution 514system.iobus.trans_dist::ReadResp 16518752 # Transaction distribution | 711system.iobus.throughput 47801275 # Throughput (bytes/s) 712system.iobus.trans_dist::ReadReq 16518751 # Transaction distribution 713system.iobus.trans_dist::ReadResp 16518751 # Transaction distribution |
| 515system.iobus.trans_dist::WriteReq 8166 # Transaction distribution 516system.iobus.trans_dist::WriteResp 8166 # Transaction distribution 517system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 29936 # Packet count per connected master and slave (bytes) | 714system.iobus.trans_dist::WriteReq 8166 # Transaction distribution 715system.iobus.trans_dist::WriteResp 8166 # Transaction distribution 716system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 29936 # Packet count per connected master and slave (bytes) |
| 518system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 7946 # Packet count per connected master and slave (bytes) | 717system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 7944 # Packet count per connected master and slave (bytes) |
| 519system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 534 # Packet count per connected master and slave (bytes) 520system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 1042 # Packet count per connected master and slave (bytes) 521system.iobus.pkt_count_system.bridge.master::system.realview.clcd.pio 36 # Packet count per connected master and slave (bytes) 522system.iobus.pkt_count_system.bridge.master::system.realview.kmi0.pio 124 # Packet count per connected master and slave (bytes) 523system.iobus.pkt_count_system.bridge.master::system.realview.kmi1.pio 746 # Packet count per connected master and slave (bytes) 524system.iobus.pkt_count_system.bridge.master::system.realview.cf_ctrl.pio 2342380 # Packet count per connected master and slave (bytes) 525system.iobus.pkt_count_system.bridge.master::system.realview.dmac_fake.pio 16 # Packet count per connected master and slave (bytes) 526system.iobus.pkt_count_system.bridge.master::system.realview.uart1_fake.pio 16 # Packet count per connected master and slave (bytes) --- 5 unchanged lines hidden (view full) --- 532system.iobus.pkt_count_system.bridge.master::system.realview.gpio0_fake.pio 16 # Packet count per connected master and slave (bytes) 533system.iobus.pkt_count_system.bridge.master::system.realview.gpio1_fake.pio 16 # Packet count per connected master and slave (bytes) 534system.iobus.pkt_count_system.bridge.master::system.realview.gpio2_fake.pio 16 # Packet count per connected master and slave (bytes) 535system.iobus.pkt_count_system.bridge.master::system.realview.ssp_fake.pio 16 # Packet count per connected master and slave (bytes) 536system.iobus.pkt_count_system.bridge.master::system.realview.sci_fake.pio 16 # Packet count per connected master and slave (bytes) 537system.iobus.pkt_count_system.bridge.master::system.realview.aaci_fake.pio 16 # Packet count per connected master and slave (bytes) 538system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio 16 # Packet count per connected master and slave (bytes) 539system.iobus.pkt_count_system.bridge.master::system.realview.rtc.pio 16 # Packet count per connected master and slave (bytes) | 718system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 534 # Packet count per connected master and slave (bytes) 719system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 1042 # Packet count per connected master and slave (bytes) 720system.iobus.pkt_count_system.bridge.master::system.realview.clcd.pio 36 # Packet count per connected master and slave (bytes) 721system.iobus.pkt_count_system.bridge.master::system.realview.kmi0.pio 124 # Packet count per connected master and slave (bytes) 722system.iobus.pkt_count_system.bridge.master::system.realview.kmi1.pio 746 # Packet count per connected master and slave (bytes) 723system.iobus.pkt_count_system.bridge.master::system.realview.cf_ctrl.pio 2342380 # Packet count per connected master and slave (bytes) 724system.iobus.pkt_count_system.bridge.master::system.realview.dmac_fake.pio 16 # Packet count per connected master and slave (bytes) 725system.iobus.pkt_count_system.bridge.master::system.realview.uart1_fake.pio 16 # Packet count per connected master and slave (bytes) --- 5 unchanged lines hidden (view full) --- 731system.iobus.pkt_count_system.bridge.master::system.realview.gpio0_fake.pio 16 # Packet count per connected master and slave (bytes) 732system.iobus.pkt_count_system.bridge.master::system.realview.gpio1_fake.pio 16 # Packet count per connected master and slave (bytes) 733system.iobus.pkt_count_system.bridge.master::system.realview.gpio2_fake.pio 16 # Packet count per connected master and slave (bytes) 734system.iobus.pkt_count_system.bridge.master::system.realview.ssp_fake.pio 16 # Packet count per connected master and slave (bytes) 735system.iobus.pkt_count_system.bridge.master::system.realview.sci_fake.pio 16 # Packet count per connected master and slave (bytes) 736system.iobus.pkt_count_system.bridge.master::system.realview.aaci_fake.pio 16 # Packet count per connected master and slave (bytes) 737system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio 16 # Packet count per connected master and slave (bytes) 738system.iobus.pkt_count_system.bridge.master::system.realview.rtc.pio 16 # Packet count per connected master and slave (bytes) |
| 540system.iobus.pkt_count_system.bridge.master::total 2382988 # Packet count per connected master and slave (bytes) | 739system.iobus.pkt_count_system.bridge.master::total 2382986 # Packet count per connected master and slave (bytes) |
| 541system.iobus.pkt_count_system.realview.clcd.dma::system.iocache.cpu_side 30670848 # Packet count per connected master and slave (bytes) 542system.iobus.pkt_count_system.realview.clcd.dma::total 30670848 # Packet count per connected master and slave (bytes) | 740system.iobus.pkt_count_system.realview.clcd.dma::system.iocache.cpu_side 30670848 # Packet count per connected master and slave (bytes) 741system.iobus.pkt_count_system.realview.clcd.dma::total 30670848 # Packet count per connected master and slave (bytes) |
| 543system.iobus.pkt_count::total 33053836 # Packet count per connected master and slave (bytes) | 742system.iobus.pkt_count::total 33053834 # Packet count per connected master and slave (bytes) |
| 544system.iobus.tot_pkt_size_system.bridge.master::system.realview.uart.pio 39180 # Cumulative packet size per connected master and slave (bytes) | 743system.iobus.tot_pkt_size_system.bridge.master::system.realview.uart.pio 39180 # Cumulative packet size per connected master and slave (bytes) |
| 545system.iobus.tot_pkt_size_system.bridge.master::system.realview.realview_io.pio 15892 # Cumulative packet size per connected master and slave (bytes) | 744system.iobus.tot_pkt_size_system.bridge.master::system.realview.realview_io.pio 15888 # Cumulative packet size per connected master and slave (bytes) |
| 546system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer0.pio 1068 # Cumulative packet size per connected master and slave (bytes) 547system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer1.pio 2084 # Cumulative packet size per connected master and slave (bytes) 548system.iobus.tot_pkt_size_system.bridge.master::system.realview.clcd.pio 72 # Cumulative packet size per connected master and slave (bytes) 549system.iobus.tot_pkt_size_system.bridge.master::system.realview.kmi0.pio 86 # Cumulative packet size per connected master and slave (bytes) 550system.iobus.tot_pkt_size_system.bridge.master::system.realview.kmi1.pio 397 # Cumulative packet size per connected master and slave (bytes) 551system.iobus.tot_pkt_size_system.bridge.master::system.realview.cf_ctrl.pio 2331126 # Cumulative packet size per connected master and slave (bytes) 552system.iobus.tot_pkt_size_system.bridge.master::system.realview.dmac_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 553system.iobus.tot_pkt_size_system.bridge.master::system.realview.uart1_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) --- 5 unchanged lines hidden (view full) --- 559system.iobus.tot_pkt_size_system.bridge.master::system.realview.gpio0_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 560system.iobus.tot_pkt_size_system.bridge.master::system.realview.gpio1_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 561system.iobus.tot_pkt_size_system.bridge.master::system.realview.gpio2_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 562system.iobus.tot_pkt_size_system.bridge.master::system.realview.ssp_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 563system.iobus.tot_pkt_size_system.bridge.master::system.realview.sci_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 564system.iobus.tot_pkt_size_system.bridge.master::system.realview.aaci_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 565system.iobus.tot_pkt_size_system.bridge.master::system.realview.mmc_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 566system.iobus.tot_pkt_size_system.bridge.master::system.realview.rtc.pio 32 # Cumulative packet size per connected master and slave (bytes) | 745system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer0.pio 1068 # Cumulative packet size per connected master and slave (bytes) 746system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer1.pio 2084 # Cumulative packet size per connected master and slave (bytes) 747system.iobus.tot_pkt_size_system.bridge.master::system.realview.clcd.pio 72 # Cumulative packet size per connected master and slave (bytes) 748system.iobus.tot_pkt_size_system.bridge.master::system.realview.kmi0.pio 86 # Cumulative packet size per connected master and slave (bytes) 749system.iobus.tot_pkt_size_system.bridge.master::system.realview.kmi1.pio 397 # Cumulative packet size per connected master and slave (bytes) 750system.iobus.tot_pkt_size_system.bridge.master::system.realview.cf_ctrl.pio 2331126 # Cumulative packet size per connected master and slave (bytes) 751system.iobus.tot_pkt_size_system.bridge.master::system.realview.dmac_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 752system.iobus.tot_pkt_size_system.bridge.master::system.realview.uart1_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) --- 5 unchanged lines hidden (view full) --- 758system.iobus.tot_pkt_size_system.bridge.master::system.realview.gpio0_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 759system.iobus.tot_pkt_size_system.bridge.master::system.realview.gpio1_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 760system.iobus.tot_pkt_size_system.bridge.master::system.realview.gpio2_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 761system.iobus.tot_pkt_size_system.bridge.master::system.realview.ssp_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 762system.iobus.tot_pkt_size_system.bridge.master::system.realview.sci_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 763system.iobus.tot_pkt_size_system.bridge.master::system.realview.aaci_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 764system.iobus.tot_pkt_size_system.bridge.master::system.realview.mmc_fake.pio 32 # Cumulative packet size per connected master and slave (bytes) 765system.iobus.tot_pkt_size_system.bridge.master::system.realview.rtc.pio 32 # Cumulative packet size per connected master and slave (bytes) |
| 567system.iobus.tot_pkt_size_system.bridge.master::total 2390393 # Cumulative packet size per connected master and slave (bytes) | 766system.iobus.tot_pkt_size_system.bridge.master::total 2390389 # Cumulative packet size per connected master and slave (bytes) |
| 568system.iobus.tot_pkt_size_system.realview.clcd.dma::system.iocache.cpu_side 122683392 # Cumulative packet size per connected master and slave (bytes) 569system.iobus.tot_pkt_size_system.realview.clcd.dma::total 122683392 # Cumulative packet size per connected master and slave (bytes) | 767system.iobus.tot_pkt_size_system.realview.clcd.dma::system.iocache.cpu_side 122683392 # Cumulative packet size per connected master and slave (bytes) 768system.iobus.tot_pkt_size_system.realview.clcd.dma::total 122683392 # Cumulative packet size per connected master and slave (bytes) |
| 570system.iobus.tot_pkt_size::total 125073785 # Cumulative packet size per connected master and slave (bytes) 571system.iobus.data_through_bus 125073785 # Total data (bytes) | 769system.iobus.tot_pkt_size::total 125073781 # Cumulative packet size per connected master and slave (bytes) 770system.iobus.data_through_bus 125073781 # Total data (bytes) |
| 572system.iobus.reqLayer0.occupancy 21043000 # Layer occupancy (ticks) 573system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) | 771system.iobus.reqLayer0.occupancy 21043000 # Layer occupancy (ticks) 772system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%) |
| 574system.iobus.reqLayer1.occupancy 3978000 # Layer occupancy (ticks) | 773system.iobus.reqLayer1.occupancy 3977000 # Layer occupancy (ticks) |
| 575system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%) 576system.iobus.reqLayer2.occupancy 534000 # Layer occupancy (ticks) 577system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%) 578system.iobus.reqLayer3.occupancy 527000 # Layer occupancy (ticks) 579system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%) 580system.iobus.reqLayer4.occupancy 27000 # Layer occupancy (ticks) 581system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%) 582system.iobus.reqLayer5.occupancy 74000 # Layer occupancy (ticks) --- 29 unchanged lines hidden (view full) --- 612system.iobus.reqLayer21.occupancy 8000 # Layer occupancy (ticks) 613system.iobus.reqLayer21.utilization 0.0 # Layer utilization (%) 614system.iobus.reqLayer22.occupancy 8000 # Layer occupancy (ticks) 615system.iobus.reqLayer22.utilization 0.0 # Layer utilization (%) 616system.iobus.reqLayer23.occupancy 8000 # Layer occupancy (ticks) 617system.iobus.reqLayer23.utilization 0.0 # Layer utilization (%) 618system.iobus.reqLayer25.occupancy 15335424000 # Layer occupancy (ticks) 619system.iobus.reqLayer25.utilization 0.6 # Layer utilization (%) | 774system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%) 775system.iobus.reqLayer2.occupancy 534000 # Layer occupancy (ticks) 776system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%) 777system.iobus.reqLayer3.occupancy 527000 # Layer occupancy (ticks) 778system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%) 779system.iobus.reqLayer4.occupancy 27000 # Layer occupancy (ticks) 780system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%) 781system.iobus.reqLayer5.occupancy 74000 # Layer occupancy (ticks) --- 29 unchanged lines hidden (view full) --- 811system.iobus.reqLayer21.occupancy 8000 # Layer occupancy (ticks) 812system.iobus.reqLayer21.utilization 0.0 # Layer utilization (%) 813system.iobus.reqLayer22.occupancy 8000 # Layer occupancy (ticks) 814system.iobus.reqLayer22.utilization 0.0 # Layer utilization (%) 815system.iobus.reqLayer23.occupancy 8000 # Layer occupancy (ticks) 816system.iobus.reqLayer23.utilization 0.0 # Layer utilization (%) 817system.iobus.reqLayer25.occupancy 15335424000 # Layer occupancy (ticks) 818system.iobus.reqLayer25.utilization 0.6 # Layer utilization (%) |
| 620system.iobus.respLayer0.occupancy 2374822000 # Layer occupancy (ticks) | 819system.iobus.respLayer0.occupancy 2374820000 # Layer occupancy (ticks) |
| 621system.iobus.respLayer0.utilization 0.1 # Layer utilization (%) | 820system.iobus.respLayer0.utilization 0.1 # Layer utilization (%) |
| 622system.iobus.respLayer1.occupancy 42038784500 # Layer occupancy (ticks) | 821system.iobus.respLayer1.occupancy 42037561750 # Layer occupancy (ticks) |
| 623system.iobus.respLayer1.utilization 1.6 # Layer utilization (%) 624system.cpu.dtb.inst_hits 0 # ITB inst hits 625system.cpu.dtb.inst_misses 0 # ITB inst misses | 822system.iobus.respLayer1.utilization 1.6 # Layer utilization (%) 823system.cpu.dtb.inst_hits 0 # ITB inst hits 824system.cpu.dtb.inst_misses 0 # ITB inst misses |
| 626system.cpu.dtb.read_hits 14996146 # DTB read hits 627system.cpu.dtb.read_misses 7341 # DTB read misses 628system.cpu.dtb.write_hits 11230467 # DTB write hits 629system.cpu.dtb.write_misses 2217 # DTB write misses | 825system.cpu.dtb.read_hits 14995644 # DTB read hits 826system.cpu.dtb.read_misses 7334 # DTB read misses 827system.cpu.dtb.write_hits 11230146 # DTB write hits 828system.cpu.dtb.write_misses 2212 # DTB write misses |
| 630system.cpu.dtb.flush_tlb 2 # Number of times complete TLB was flushed 631system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 632system.cpu.dtb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 633system.cpu.dtb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID | 829system.cpu.dtb.flush_tlb 2 # Number of times complete TLB was flushed 830system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 831system.cpu.dtb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 832system.cpu.dtb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID |
| 634system.cpu.dtb.flush_entries 3506 # Number of entries that have been flushed from TLB | 833system.cpu.dtb.flush_entries 3498 # Number of entries that have been flushed from TLB |
| 635system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions | 834system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions |
| 636system.cpu.dtb.prefetch_faults 197 # Number of TLB faults due to prefetch | 835system.cpu.dtb.prefetch_faults 192 # Number of TLB faults due to prefetch |
| 637system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions 638system.cpu.dtb.perms_faults 452 # Number of TLB faults due to permissions restrictions | 836system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions 837system.cpu.dtb.perms_faults 452 # Number of TLB faults due to permissions restrictions |
| 639system.cpu.dtb.read_accesses 15003487 # DTB read accesses 640system.cpu.dtb.write_accesses 11232684 # DTB write accesses | 838system.cpu.dtb.read_accesses 15002978 # DTB read accesses 839system.cpu.dtb.write_accesses 11232358 # DTB write accesses |
| 641system.cpu.dtb.inst_accesses 0 # ITB inst accesses | 840system.cpu.dtb.inst_accesses 0 # ITB inst accesses |
| 642system.cpu.dtb.hits 26226613 # DTB hits 643system.cpu.dtb.misses 9558 # DTB misses 644system.cpu.dtb.accesses 26236171 # DTB accesses 645system.cpu.itb.inst_hits 61492923 # ITB inst hits | 841system.cpu.dtb.hits 26225790 # DTB hits 842system.cpu.dtb.misses 9546 # DTB misses 843system.cpu.dtb.accesses 26235336 # DTB accesses 844system.cpu.itb.inst_hits 61491413 # ITB inst hits |
| 646system.cpu.itb.inst_misses 4471 # ITB inst misses 647system.cpu.itb.read_hits 0 # DTB read hits 648system.cpu.itb.read_misses 0 # DTB read misses 649system.cpu.itb.write_hits 0 # DTB write hits 650system.cpu.itb.write_misses 0 # DTB write misses 651system.cpu.itb.flush_tlb 2 # Number of times complete TLB was flushed 652system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 653system.cpu.itb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 654system.cpu.itb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID 655system.cpu.itb.flush_entries 2343 # Number of entries that have been flushed from TLB 656system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions 657system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch 658system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 659system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 660system.cpu.itb.read_accesses 0 # DTB read accesses 661system.cpu.itb.write_accesses 0 # DTB write accesses | 845system.cpu.itb.inst_misses 4471 # ITB inst misses 846system.cpu.itb.read_hits 0 # DTB read hits 847system.cpu.itb.read_misses 0 # DTB read misses 848system.cpu.itb.write_hits 0 # DTB write hits 849system.cpu.itb.write_misses 0 # DTB write misses 850system.cpu.itb.flush_tlb 2 # Number of times complete TLB was flushed 851system.cpu.itb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA 852system.cpu.itb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID 853system.cpu.itb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID 854system.cpu.itb.flush_entries 2343 # Number of entries that have been flushed from TLB 855system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions 856system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch 857system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions 858system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions 859system.cpu.itb.read_accesses 0 # DTB read accesses 860system.cpu.itb.write_accesses 0 # DTB write accesses |
| 662system.cpu.itb.inst_accesses 61497394 # ITB inst accesses 663system.cpu.itb.hits 61492923 # DTB hits | 861system.cpu.itb.inst_accesses 61495884 # ITB inst accesses 862system.cpu.itb.hits 61491413 # DTB hits |
| 664system.cpu.itb.misses 4471 # DTB misses | 863system.cpu.itb.misses 4471 # DTB misses |
| 665system.cpu.itb.accesses 61497394 # DTB accesses 666system.cpu.numCycles 5231432444 # number of cpu cycles simulated | 864system.cpu.itb.accesses 61495884 # DTB accesses 865system.cpu.numCycles 5233072966 # number of cpu cycles simulated |
| 667system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 668system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed | 866system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 867system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed |
| 669system.cpu.committedInsts 60199078 # Number of instructions committed 670system.cpu.committedOps 76605946 # Number of ops (including micro ops) committed 671system.cpu.num_int_alu_accesses 68872726 # Number of integer alu accesses | 868system.cpu.committedInsts 60197580 # Number of instructions committed 869system.cpu.committedOps 76603973 # Number of ops (including micro ops) committed 870system.cpu.num_int_alu_accesses 68871033 # Number of integer alu accesses |
| 672system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses | 871system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses |
| 673system.cpu.num_func_calls 2140465 # number of times a function call or return occured 674system.cpu.num_conditional_control_insts 7948429 # number of instructions that are conditional controls 675system.cpu.num_int_insts 68872726 # number of integer instructions | 872system.cpu.num_func_calls 2140403 # number of times a function call or return occured 873system.cpu.num_conditional_control_insts 7948247 # number of instructions that are conditional controls 874system.cpu.num_int_insts 68871033 # number of integer instructions |
| 676system.cpu.num_fp_insts 10269 # number of float instructions | 875system.cpu.num_fp_insts 10269 # number of float instructions |
| 677system.cpu.num_int_register_reads 394779183 # number of times the integer registers were read 678system.cpu.num_int_register_writes 74182470 # number of times the integer registers were written | 876system.cpu.num_int_register_reads 394768801 # number of times the integer registers were read 877system.cpu.num_int_register_writes 74180798 # number of times the integer registers were written |
| 679system.cpu.num_fp_register_reads 7493 # number of times the floating registers were read 680system.cpu.num_fp_register_writes 2780 # number of times the floating registers were written | 878system.cpu.num_fp_register_reads 7493 # number of times the floating registers were read 879system.cpu.num_fp_register_writes 2780 # number of times the floating registers were written |
| 681system.cpu.num_mem_refs 27394080 # number of memory refs 682system.cpu.num_load_insts 15660200 # Number of load instructions 683system.cpu.num_store_insts 11733880 # Number of store instructions 684system.cpu.num_idle_cycles 4581975478.612248 # Number of idle cycles 685system.cpu.num_busy_cycles 649456965.387752 # Number of busy cycles 686system.cpu.not_idle_fraction 0.124145 # Percentage of non-idle cycles 687system.cpu.idle_fraction 0.875855 # Percentage of idle cycles | 880system.cpu.num_mem_refs 27393280 # number of memory refs 881system.cpu.num_load_insts 15659727 # Number of load instructions 882system.cpu.num_store_insts 11733553 # Number of store instructions 883system.cpu.num_idle_cycles 4581527140.608249 # Number of idle cycles 884system.cpu.num_busy_cycles 651545825.391751 # Number of busy cycles 885system.cpu.not_idle_fraction 0.124505 # Percentage of non-idle cycles 886system.cpu.idle_fraction 0.875495 # Percentage of idle cycles |
| 688system.cpu.kern.inst.arm 0 # number of arm instructions executed | 887system.cpu.kern.inst.arm 0 # number of arm instructions executed |
| 689system.cpu.kern.inst.quiesce 83018 # number of quiesce instructions executed 690system.cpu.icache.tags.replacements 856273 # number of replacements 691system.cpu.icache.tags.tagsinuse 510.884220 # Cycle average of tags in use 692system.cpu.icache.tags.total_refs 60636138 # Total number of references to valid blocks. 693system.cpu.icache.tags.sampled_refs 856785 # Sample count of references to valid blocks. 694system.cpu.icache.tags.avg_refs 70.771708 # Average number of references to valid blocks. 695system.cpu.icache.tags.warmup_cycle 19799760250 # Cycle when the warmup percentage was hit. 696system.cpu.icache.tags.occ_blocks::cpu.inst 510.884220 # Average occupied blocks per requestor 697system.cpu.icache.tags.occ_percent::cpu.inst 0.997821 # Average percentage of cache occupancy 698system.cpu.icache.tags.occ_percent::total 0.997821 # Average percentage of cache occupancy 699system.cpu.icache.ReadReq_hits::cpu.inst 60636138 # number of ReadReq hits 700system.cpu.icache.ReadReq_hits::total 60636138 # number of ReadReq hits 701system.cpu.icache.demand_hits::cpu.inst 60636138 # number of demand (read+write) hits 702system.cpu.icache.demand_hits::total 60636138 # number of demand (read+write) hits 703system.cpu.icache.overall_hits::cpu.inst 60636138 # number of overall hits 704system.cpu.icache.overall_hits::total 60636138 # number of overall hits 705system.cpu.icache.ReadReq_misses::cpu.inst 856785 # number of ReadReq misses 706system.cpu.icache.ReadReq_misses::total 856785 # number of ReadReq misses 707system.cpu.icache.demand_misses::cpu.inst 856785 # number of demand (read+write) misses 708system.cpu.icache.demand_misses::total 856785 # number of demand (read+write) misses 709system.cpu.icache.overall_misses::cpu.inst 856785 # number of overall misses 710system.cpu.icache.overall_misses::total 856785 # number of overall misses 711system.cpu.icache.ReadReq_miss_latency::cpu.inst 11770019500 # number of ReadReq miss cycles 712system.cpu.icache.ReadReq_miss_latency::total 11770019500 # number of ReadReq miss cycles 713system.cpu.icache.demand_miss_latency::cpu.inst 11770019500 # number of demand (read+write) miss cycles 714system.cpu.icache.demand_miss_latency::total 11770019500 # number of demand (read+write) miss cycles 715system.cpu.icache.overall_miss_latency::cpu.inst 11770019500 # number of overall miss cycles 716system.cpu.icache.overall_miss_latency::total 11770019500 # number of overall miss cycles 717system.cpu.icache.ReadReq_accesses::cpu.inst 61492923 # number of ReadReq accesses(hits+misses) 718system.cpu.icache.ReadReq_accesses::total 61492923 # number of ReadReq accesses(hits+misses) 719system.cpu.icache.demand_accesses::cpu.inst 61492923 # number of demand (read+write) accesses 720system.cpu.icache.demand_accesses::total 61492923 # number of demand (read+write) accesses 721system.cpu.icache.overall_accesses::cpu.inst 61492923 # number of overall (read+write) accesses 722system.cpu.icache.overall_accesses::total 61492923 # number of overall (read+write) accesses | 888system.cpu.kern.inst.quiesce 83016 # number of quiesce instructions executed 889system.cpu.icache.tags.replacements 856254 # number of replacements 890system.cpu.icache.tags.tagsinuse 510.868538 # Cycle average of tags in use 891system.cpu.icache.tags.total_refs 60634647 # Total number of references to valid blocks. 892system.cpu.icache.tags.sampled_refs 856766 # Sample count of references to valid blocks. 893system.cpu.icache.tags.avg_refs 70.771537 # Average number of references to valid blocks. 894system.cpu.icache.tags.warmup_cycle 19982971250 # Cycle when the warmup percentage was hit. 895system.cpu.icache.tags.occ_blocks::cpu.inst 510.868538 # Average occupied blocks per requestor 896system.cpu.icache.tags.occ_percent::cpu.inst 0.997790 # Average percentage of cache occupancy 897system.cpu.icache.tags.occ_percent::total 0.997790 # Average percentage of cache occupancy 898system.cpu.icache.ReadReq_hits::cpu.inst 60634647 # number of ReadReq hits 899system.cpu.icache.ReadReq_hits::total 60634647 # number of ReadReq hits 900system.cpu.icache.demand_hits::cpu.inst 60634647 # number of demand (read+write) hits 901system.cpu.icache.demand_hits::total 60634647 # number of demand (read+write) hits 902system.cpu.icache.overall_hits::cpu.inst 60634647 # number of overall hits 903system.cpu.icache.overall_hits::total 60634647 # number of overall hits 904system.cpu.icache.ReadReq_misses::cpu.inst 856766 # number of ReadReq misses 905system.cpu.icache.ReadReq_misses::total 856766 # number of ReadReq misses 906system.cpu.icache.demand_misses::cpu.inst 856766 # number of demand (read+write) misses 907system.cpu.icache.demand_misses::total 856766 # number of demand (read+write) misses 908system.cpu.icache.overall_misses::cpu.inst 856766 # number of overall misses 909system.cpu.icache.overall_misses::total 856766 # number of overall misses 910system.cpu.icache.ReadReq_miss_latency::cpu.inst 11773893500 # number of ReadReq miss cycles 911system.cpu.icache.ReadReq_miss_latency::total 11773893500 # number of ReadReq miss cycles 912system.cpu.icache.demand_miss_latency::cpu.inst 11773893500 # number of demand (read+write) miss cycles 913system.cpu.icache.demand_miss_latency::total 11773893500 # number of demand (read+write) miss cycles 914system.cpu.icache.overall_miss_latency::cpu.inst 11773893500 # number of overall miss cycles 915system.cpu.icache.overall_miss_latency::total 11773893500 # number of overall miss cycles 916system.cpu.icache.ReadReq_accesses::cpu.inst 61491413 # number of ReadReq accesses(hits+misses) 917system.cpu.icache.ReadReq_accesses::total 61491413 # number of ReadReq accesses(hits+misses) 918system.cpu.icache.demand_accesses::cpu.inst 61491413 # number of demand (read+write) accesses 919system.cpu.icache.demand_accesses::total 61491413 # number of demand (read+write) accesses 920system.cpu.icache.overall_accesses::cpu.inst 61491413 # number of overall (read+write) accesses 921system.cpu.icache.overall_accesses::total 61491413 # number of overall (read+write) accesses |
| 723system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.013933 # miss rate for ReadReq accesses 724system.cpu.icache.ReadReq_miss_rate::total 0.013933 # miss rate for ReadReq accesses 725system.cpu.icache.demand_miss_rate::cpu.inst 0.013933 # miss rate for demand accesses 726system.cpu.icache.demand_miss_rate::total 0.013933 # miss rate for demand accesses 727system.cpu.icache.overall_miss_rate::cpu.inst 0.013933 # miss rate for overall accesses 728system.cpu.icache.overall_miss_rate::total 0.013933 # miss rate for overall accesses | 922system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.013933 # miss rate for ReadReq accesses 923system.cpu.icache.ReadReq_miss_rate::total 0.013933 # miss rate for ReadReq accesses 924system.cpu.icache.demand_miss_rate::cpu.inst 0.013933 # miss rate for demand accesses 925system.cpu.icache.demand_miss_rate::total 0.013933 # miss rate for demand accesses 926system.cpu.icache.overall_miss_rate::cpu.inst 0.013933 # miss rate for overall accesses 927system.cpu.icache.overall_miss_rate::total 0.013933 # miss rate for overall accesses |
| 729system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 13737.424792 # average ReadReq miss latency 730system.cpu.icache.ReadReq_avg_miss_latency::total 13737.424792 # average ReadReq miss latency 731system.cpu.icache.demand_avg_miss_latency::cpu.inst 13737.424792 # average overall miss latency 732system.cpu.icache.demand_avg_miss_latency::total 13737.424792 # average overall miss latency 733system.cpu.icache.overall_avg_miss_latency::cpu.inst 13737.424792 # average overall miss latency 734system.cpu.icache.overall_avg_miss_latency::total 13737.424792 # average overall miss latency | 928system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 13742.251093 # average ReadReq miss latency 929system.cpu.icache.ReadReq_avg_miss_latency::total 13742.251093 # average ReadReq miss latency 930system.cpu.icache.demand_avg_miss_latency::cpu.inst 13742.251093 # average overall miss latency 931system.cpu.icache.demand_avg_miss_latency::total 13742.251093 # average overall miss latency 932system.cpu.icache.overall_avg_miss_latency::cpu.inst 13742.251093 # average overall miss latency 933system.cpu.icache.overall_avg_miss_latency::total 13742.251093 # average overall miss latency |
| 735system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 736system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 737system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 738system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 739system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 740system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 741system.cpu.icache.fast_writes 0 # number of fast writes performed 742system.cpu.icache.cache_copies 0 # number of cache copies performed | 934system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 935system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 936system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 937system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 938system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 939system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 940system.cpu.icache.fast_writes 0 # number of fast writes performed 941system.cpu.icache.cache_copies 0 # number of cache copies performed |
| 743system.cpu.icache.ReadReq_mshr_misses::cpu.inst 856785 # number of ReadReq MSHR misses 744system.cpu.icache.ReadReq_mshr_misses::total 856785 # number of ReadReq MSHR misses 745system.cpu.icache.demand_mshr_misses::cpu.inst 856785 # number of demand (read+write) MSHR misses 746system.cpu.icache.demand_mshr_misses::total 856785 # number of demand (read+write) MSHR misses 747system.cpu.icache.overall_mshr_misses::cpu.inst 856785 # number of overall MSHR misses 748system.cpu.icache.overall_mshr_misses::total 856785 # number of overall MSHR misses 749system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 10051263500 # number of ReadReq MSHR miss cycles 750system.cpu.icache.ReadReq_mshr_miss_latency::total 10051263500 # number of ReadReq MSHR miss cycles 751system.cpu.icache.demand_mshr_miss_latency::cpu.inst 10051263500 # number of demand (read+write) MSHR miss cycles 752system.cpu.icache.demand_mshr_miss_latency::total 10051263500 # number of demand (read+write) MSHR miss cycles 753system.cpu.icache.overall_mshr_miss_latency::cpu.inst 10051263500 # number of overall MSHR miss cycles 754system.cpu.icache.overall_mshr_miss_latency::total 10051263500 # number of overall MSHR miss cycles 755system.cpu.icache.ReadReq_mshr_uncacheable_latency::cpu.inst 414413750 # number of ReadReq MSHR uncacheable cycles 756system.cpu.icache.ReadReq_mshr_uncacheable_latency::total 414413750 # number of ReadReq MSHR uncacheable cycles 757system.cpu.icache.overall_mshr_uncacheable_latency::cpu.inst 414413750 # number of overall MSHR uncacheable cycles 758system.cpu.icache.overall_mshr_uncacheable_latency::total 414413750 # number of overall MSHR uncacheable cycles | 942system.cpu.icache.ReadReq_mshr_misses::cpu.inst 856766 # number of ReadReq MSHR misses 943system.cpu.icache.ReadReq_mshr_misses::total 856766 # number of ReadReq MSHR misses 944system.cpu.icache.demand_mshr_misses::cpu.inst 856766 # number of demand (read+write) MSHR misses 945system.cpu.icache.demand_mshr_misses::total 856766 # number of demand (read+write) MSHR misses 946system.cpu.icache.overall_mshr_misses::cpu.inst 856766 # number of overall MSHR misses 947system.cpu.icache.overall_mshr_misses::total 856766 # number of overall MSHR misses 948system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 10056315500 # number of ReadReq MSHR miss cycles 949system.cpu.icache.ReadReq_mshr_miss_latency::total 10056315500 # number of ReadReq MSHR miss cycles 950system.cpu.icache.demand_mshr_miss_latency::cpu.inst 10056315500 # number of demand (read+write) MSHR miss cycles 951system.cpu.icache.demand_mshr_miss_latency::total 10056315500 # number of demand (read+write) MSHR miss cycles 952system.cpu.icache.overall_mshr_miss_latency::cpu.inst 10056315500 # number of overall MSHR miss cycles 953system.cpu.icache.overall_mshr_miss_latency::total 10056315500 # number of overall MSHR miss cycles 954system.cpu.icache.ReadReq_mshr_uncacheable_latency::cpu.inst 435321250 # number of ReadReq MSHR uncacheable cycles 955system.cpu.icache.ReadReq_mshr_uncacheable_latency::total 435321250 # number of ReadReq MSHR uncacheable cycles 956system.cpu.icache.overall_mshr_uncacheable_latency::cpu.inst 435321250 # number of overall MSHR uncacheable cycles 957system.cpu.icache.overall_mshr_uncacheable_latency::total 435321250 # number of overall MSHR uncacheable cycles |
| 759system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.013933 # mshr miss rate for ReadReq accesses 760system.cpu.icache.ReadReq_mshr_miss_rate::total 0.013933 # mshr miss rate for ReadReq accesses 761system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.013933 # mshr miss rate for demand accesses 762system.cpu.icache.demand_mshr_miss_rate::total 0.013933 # mshr miss rate for demand accesses 763system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.013933 # mshr miss rate for overall accesses 764system.cpu.icache.overall_mshr_miss_rate::total 0.013933 # mshr miss rate for overall accesses | 958system.cpu.icache.ReadReq_mshr_miss_rate::cpu.inst 0.013933 # mshr miss rate for ReadReq accesses 959system.cpu.icache.ReadReq_mshr_miss_rate::total 0.013933 # mshr miss rate for ReadReq accesses 960system.cpu.icache.demand_mshr_miss_rate::cpu.inst 0.013933 # mshr miss rate for demand accesses 961system.cpu.icache.demand_mshr_miss_rate::total 0.013933 # mshr miss rate for demand accesses 962system.cpu.icache.overall_mshr_miss_rate::cpu.inst 0.013933 # mshr miss rate for overall accesses 963system.cpu.icache.overall_mshr_miss_rate::total 0.013933 # mshr miss rate for overall accesses |
| 765system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 11731.371931 # average ReadReq mshr miss latency 766system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 11731.371931 # average ReadReq mshr miss latency 767system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 11731.371931 # average overall mshr miss latency 768system.cpu.icache.demand_avg_mshr_miss_latency::total 11731.371931 # average overall mshr miss latency 769system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 11731.371931 # average overall mshr miss latency 770system.cpu.icache.overall_avg_mshr_miss_latency::total 11731.371931 # average overall mshr miss latency | 964system.cpu.icache.ReadReq_avg_mshr_miss_latency::cpu.inst 11737.528683 # average ReadReq mshr miss latency 965system.cpu.icache.ReadReq_avg_mshr_miss_latency::total 11737.528683 # average ReadReq mshr miss latency 966system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 11737.528683 # average overall mshr miss latency 967system.cpu.icache.demand_avg_mshr_miss_latency::total 11737.528683 # average overall mshr miss latency 968system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 11737.528683 # average overall mshr miss latency 969system.cpu.icache.overall_avg_mshr_miss_latency::total 11737.528683 # average overall mshr miss latency |
| 771system.cpu.icache.ReadReq_avg_mshr_uncacheable_latency::cpu.inst inf # average ReadReq mshr uncacheable latency 772system.cpu.icache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 773system.cpu.icache.overall_avg_mshr_uncacheable_latency::cpu.inst inf # average overall mshr uncacheable latency 774system.cpu.icache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 775system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | 970system.cpu.icache.ReadReq_avg_mshr_uncacheable_latency::cpu.inst inf # average ReadReq mshr uncacheable latency 971system.cpu.icache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 972system.cpu.icache.overall_avg_mshr_uncacheable_latency::cpu.inst inf # average overall mshr uncacheable latency 973system.cpu.icache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 974system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 776system.cpu.l2cache.tags.replacements 62587 # number of replacements 777system.cpu.l2cache.tags.tagsinuse 50733.810806 # Cycle average of tags in use 778system.cpu.l2cache.tags.total_refs 1683077 # Total number of references to valid blocks. 779system.cpu.l2cache.tags.sampled_refs 127973 # Sample count of references to valid blocks. 780system.cpu.l2cache.tags.avg_refs 13.151813 # Average number of references to valid blocks. 781system.cpu.l2cache.tags.warmup_cycle 2564904211000 # Cycle when the warmup percentage was hit. 782system.cpu.l2cache.tags.occ_blocks::writebacks 37696.862224 # Average occupied blocks per requestor 783system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 3.884576 # Average occupied blocks per requestor 784system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.000692 # Average occupied blocks per requestor 785system.cpu.l2cache.tags.occ_blocks::cpu.inst 6998.396772 # Average occupied blocks per requestor 786system.cpu.l2cache.tags.occ_blocks::cpu.data 6034.666541 # Average occupied blocks per requestor 787system.cpu.l2cache.tags.occ_percent::writebacks 0.575208 # Average percentage of cache occupancy | 975system.cpu.l2cache.tags.replacements 62509 # number of replacements 976system.cpu.l2cache.tags.tagsinuse 50754.670173 # Cycle average of tags in use 977system.cpu.l2cache.tags.total_refs 1682271 # Total number of references to valid blocks. 978system.cpu.l2cache.tags.sampled_refs 127891 # Sample count of references to valid blocks. 979system.cpu.l2cache.tags.avg_refs 13.153944 # Average number of references to valid blocks. 980system.cpu.l2cache.tags.warmup_cycle 2565643785000 # Cycle when the warmup percentage was hit. 981system.cpu.l2cache.tags.occ_blocks::writebacks 37718.408308 # Average occupied blocks per requestor 982system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 3.884371 # Average occupied blocks per requestor 983system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.000703 # Average occupied blocks per requestor 984system.cpu.l2cache.tags.occ_blocks::cpu.inst 6993.399948 # Average occupied blocks per requestor 985system.cpu.l2cache.tags.occ_blocks::cpu.data 6038.976844 # Average occupied blocks per requestor 986system.cpu.l2cache.tags.occ_percent::writebacks 0.575537 # Average percentage of cache occupancy |
| 788system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000059 # Average percentage of cache occupancy 789system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000000 # Average percentage of cache occupancy | 987system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000059 # Average percentage of cache occupancy 988system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000000 # Average percentage of cache occupancy |
| 790system.cpu.l2cache.tags.occ_percent::cpu.inst 0.106787 # Average percentage of cache occupancy 791system.cpu.l2cache.tags.occ_percent::cpu.data 0.092082 # Average percentage of cache occupancy 792system.cpu.l2cache.tags.occ_percent::total 0.774137 # Average percentage of cache occupancy 793system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 8720 # number of ReadReq hits 794system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3535 # number of ReadReq hits 795system.cpu.l2cache.ReadReq_hits::cpu.inst 844543 # number of ReadReq hits 796system.cpu.l2cache.ReadReq_hits::cpu.data 370162 # number of ReadReq hits 797system.cpu.l2cache.ReadReq_hits::total 1226960 # number of ReadReq hits 798system.cpu.l2cache.Writeback_hits::writebacks 595785 # number of Writeback hits 799system.cpu.l2cache.Writeback_hits::total 595785 # number of Writeback hits | 989system.cpu.l2cache.tags.occ_percent::cpu.inst 0.106711 # Average percentage of cache occupancy 990system.cpu.l2cache.tags.occ_percent::cpu.data 0.092147 # Average percentage of cache occupancy 991system.cpu.l2cache.tags.occ_percent::total 0.774455 # Average percentage of cache occupancy 992system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 8705 # number of ReadReq hits 993system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3532 # number of ReadReq hits 994system.cpu.l2cache.ReadReq_hits::cpu.inst 844545 # number of ReadReq hits 995system.cpu.l2cache.ReadReq_hits::cpu.data 369635 # number of ReadReq hits 996system.cpu.l2cache.ReadReq_hits::total 1226417 # number of ReadReq hits 997system.cpu.l2cache.Writeback_hits::writebacks 595234 # number of Writeback hits 998system.cpu.l2cache.Writeback_hits::total 595234 # number of Writeback hits |
| 800system.cpu.l2cache.UpgradeReq_hits::cpu.data 26 # number of UpgradeReq hits 801system.cpu.l2cache.UpgradeReq_hits::total 26 # number of UpgradeReq hits | 999system.cpu.l2cache.UpgradeReq_hits::cpu.data 26 # number of UpgradeReq hits 1000system.cpu.l2cache.UpgradeReq_hits::total 26 # number of UpgradeReq hits |
| 802system.cpu.l2cache.ReadExReq_hits::cpu.data 113425 # number of ReadExReq hits 803system.cpu.l2cache.ReadExReq_hits::total 113425 # number of ReadExReq hits 804system.cpu.l2cache.demand_hits::cpu.dtb.walker 8720 # number of demand (read+write) hits 805system.cpu.l2cache.demand_hits::cpu.itb.walker 3535 # number of demand (read+write) hits 806system.cpu.l2cache.demand_hits::cpu.inst 844543 # number of demand (read+write) hits 807system.cpu.l2cache.demand_hits::cpu.data 483587 # number of demand (read+write) hits 808system.cpu.l2cache.demand_hits::total 1340385 # number of demand (read+write) hits 809system.cpu.l2cache.overall_hits::cpu.dtb.walker 8720 # number of overall hits 810system.cpu.l2cache.overall_hits::cpu.itb.walker 3535 # number of overall hits 811system.cpu.l2cache.overall_hits::cpu.inst 844543 # number of overall hits 812system.cpu.l2cache.overall_hits::cpu.data 483587 # number of overall hits 813system.cpu.l2cache.overall_hits::total 1340385 # number of overall hits | 1001system.cpu.l2cache.ReadExReq_hits::cpu.data 113385 # number of ReadExReq hits 1002system.cpu.l2cache.ReadExReq_hits::total 113385 # number of ReadExReq hits 1003system.cpu.l2cache.demand_hits::cpu.dtb.walker 8705 # number of demand (read+write) hits 1004system.cpu.l2cache.demand_hits::cpu.itb.walker 3532 # number of demand (read+write) hits 1005system.cpu.l2cache.demand_hits::cpu.inst 844545 # number of demand (read+write) hits 1006system.cpu.l2cache.demand_hits::cpu.data 483020 # number of demand (read+write) hits 1007system.cpu.l2cache.demand_hits::total 1339802 # number of demand (read+write) hits 1008system.cpu.l2cache.overall_hits::cpu.dtb.walker 8705 # number of overall hits 1009system.cpu.l2cache.overall_hits::cpu.itb.walker 3532 # number of overall hits 1010system.cpu.l2cache.overall_hits::cpu.inst 844545 # number of overall hits 1011system.cpu.l2cache.overall_hits::cpu.data 483020 # number of overall hits 1012system.cpu.l2cache.overall_hits::total 1339802 # number of overall hits |
| 814system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 5 # number of ReadReq misses 815system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 2 # number of ReadReq misses | 1013system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 5 # number of ReadReq misses 1014system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 2 # number of ReadReq misses |
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| 830system.cpu.l2cache.overall_misses::cpu.inst 10601 # number of overall misses 831system.cpu.l2cache.overall_misses::cpu.data 143730 # number of overall misses 832system.cpu.l2cache.overall_misses::total 154338 # number of overall misses 833system.cpu.l2cache.ReadReq_miss_latency::cpu.dtb.walker 390500 # number of ReadReq miss cycles 834system.cpu.l2cache.ReadReq_miss_latency::cpu.itb.walker 122500 # number of ReadReq miss cycles 835system.cpu.l2cache.ReadReq_miss_latency::cpu.inst 747407000 # number of ReadReq miss cycles 836system.cpu.l2cache.ReadReq_miss_latency::cpu.data 696870750 # number of ReadReq miss cycles 837system.cpu.l2cache.ReadReq_miss_latency::total 1444790750 # number of ReadReq miss cycles 838system.cpu.l2cache.UpgradeReq_miss_latency::cpu.data 470980 # number of UpgradeReq miss cycles 839system.cpu.l2cache.UpgradeReq_miss_latency::total 470980 # number of UpgradeReq miss cycles 840system.cpu.l2cache.ReadExReq_miss_latency::cpu.data 8609068107 # number of ReadExReq miss cycles 841system.cpu.l2cache.ReadExReq_miss_latency::total 8609068107 # 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| 921system.cpu.l2cache.ReadReq_mshr_misses::cpu.dtb.walker 5 # number of ReadReq MSHR misses 922system.cpu.l2cache.ReadReq_mshr_misses::cpu.itb.walker 2 # number of ReadReq MSHR misses | 1120system.cpu.l2cache.ReadReq_mshr_misses::cpu.dtb.walker 5 # number of ReadReq MSHR misses 1121system.cpu.l2cache.ReadReq_mshr_misses::cpu.itb.walker 2 # number of ReadReq MSHR misses |
| 923system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst 10601 # number of ReadReq MSHR misses 924system.cpu.l2cache.ReadReq_mshr_misses::cpu.data 9837 # number of ReadReq MSHR misses 925system.cpu.l2cache.ReadReq_mshr_misses::total 20445 # number of ReadReq MSHR misses 926system.cpu.l2cache.UpgradeReq_mshr_misses::cpu.data 2872 # number of UpgradeReq MSHR misses 927system.cpu.l2cache.UpgradeReq_mshr_misses::total 2872 # number of UpgradeReq MSHR misses 928system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 133893 # number of ReadExReq MSHR misses 929system.cpu.l2cache.ReadExReq_mshr_misses::total 133893 # number of ReadExReq MSHR misses | 1122system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst 10585 # number of ReadReq MSHR misses 1123system.cpu.l2cache.ReadReq_mshr_misses::cpu.data 9809 # number of ReadReq MSHR misses 1124system.cpu.l2cache.ReadReq_mshr_misses::total 20401 # number of ReadReq MSHR misses 1125system.cpu.l2cache.UpgradeReq_mshr_misses::cpu.data 2907 # number of UpgradeReq MSHR misses 1126system.cpu.l2cache.UpgradeReq_mshr_misses::total 2907 # number of UpgradeReq MSHR misses 1127system.cpu.l2cache.ReadExReq_mshr_misses::cpu.data 133824 # number of ReadExReq MSHR misses 1128system.cpu.l2cache.ReadExReq_mshr_misses::total 133824 # number of ReadExReq MSHR misses |
| 930system.cpu.l2cache.demand_mshr_misses::cpu.dtb.walker 5 # number of demand (read+write) MSHR misses 931system.cpu.l2cache.demand_mshr_misses::cpu.itb.walker 2 # number of demand (read+write) MSHR misses | 1129system.cpu.l2cache.demand_mshr_misses::cpu.dtb.walker 5 # number of demand (read+write) MSHR misses 1130system.cpu.l2cache.demand_mshr_misses::cpu.itb.walker 2 # number of demand (read+write) MSHR misses |
| 932system.cpu.l2cache.demand_mshr_misses::cpu.inst 10601 # number of demand (read+write) MSHR misses 933system.cpu.l2cache.demand_mshr_misses::cpu.data 143730 # number of demand (read+write) MSHR misses 934system.cpu.l2cache.demand_mshr_misses::total 154338 # number of demand (read+write) MSHR misses | 1131system.cpu.l2cache.demand_mshr_misses::cpu.inst 10585 # number of demand (read+write) MSHR misses 1132system.cpu.l2cache.demand_mshr_misses::cpu.data 143633 # number of demand (read+write) MSHR misses 1133system.cpu.l2cache.demand_mshr_misses::total 154225 # number of demand (read+write) MSHR misses |
| 935system.cpu.l2cache.overall_mshr_misses::cpu.dtb.walker 5 # number of overall MSHR misses 936system.cpu.l2cache.overall_mshr_misses::cpu.itb.walker 2 # number of overall MSHR misses | 1134system.cpu.l2cache.overall_mshr_misses::cpu.dtb.walker 5 # number of overall MSHR misses 1135system.cpu.l2cache.overall_mshr_misses::cpu.itb.walker 2 # number of overall MSHR misses |
| 937system.cpu.l2cache.overall_mshr_misses::cpu.inst 10601 # number of overall MSHR misses 938system.cpu.l2cache.overall_mshr_misses::cpu.data 143730 # number of overall MSHR misses 939system.cpu.l2cache.overall_mshr_misses::total 154338 # number of overall MSHR misses 940system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.dtb.walker 326500 # number of ReadReq MSHR miss cycles 941system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.itb.walker 97500 # number of ReadReq MSHR miss cycles 942system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.inst 613945500 # number of ReadReq MSHR miss cycles 943system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.data 572634250 # number of ReadReq MSHR miss cycles 944system.cpu.l2cache.ReadReq_mshr_miss_latency::total 1187003750 # number of ReadReq MSHR miss cycles 945system.cpu.l2cache.UpgradeReq_mshr_miss_latency::cpu.data 28725872 # number of UpgradeReq MSHR miss cycles 946system.cpu.l2cache.UpgradeReq_mshr_miss_latency::total 28725872 # number of UpgradeReq MSHR miss cycles 947system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 6933351393 # number of ReadExReq MSHR miss cycles 948system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 6933351393 # number of ReadExReq MSHR miss cycles 949system.cpu.l2cache.demand_mshr_miss_latency::cpu.dtb.walker 326500 # number of demand (read+write) MSHR miss cycles 950system.cpu.l2cache.demand_mshr_miss_latency::cpu.itb.walker 97500 # number of demand (read+write) MSHR miss cycles 951system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 613945500 # number of demand (read+write) MSHR miss cycles 952system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 7505985643 # number of demand (read+write) MSHR miss cycles 953system.cpu.l2cache.demand_mshr_miss_latency::total 8120355143 # number of demand (read+write) MSHR miss cycles 954system.cpu.l2cache.overall_mshr_miss_latency::cpu.dtb.walker 326500 # number of overall MSHR miss cycles 955system.cpu.l2cache.overall_mshr_miss_latency::cpu.itb.walker 97500 # number of overall MSHR miss cycles 956system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 613945500 # number of overall MSHR miss cycles 957system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 7505985643 # number of overall MSHR miss cycles 958system.cpu.l2cache.overall_mshr_miss_latency::total 8120355143 # number of overall MSHR miss cycles 959system.cpu.l2cache.ReadReq_mshr_uncacheable_latency::cpu.inst 322980250 # number of ReadReq MSHR uncacheable cycles 960system.cpu.l2cache.ReadReq_mshr_uncacheable_latency::cpu.data 166657157250 # number of ReadReq MSHR uncacheable cycles 961system.cpu.l2cache.ReadReq_mshr_uncacheable_latency::total 166980137500 # number of ReadReq MSHR uncacheable cycles 962system.cpu.l2cache.WriteReq_mshr_uncacheable_latency::cpu.data 16702542535 # number of WriteReq MSHR uncacheable cycles 963system.cpu.l2cache.WriteReq_mshr_uncacheable_latency::total 16702542535 # number of WriteReq MSHR uncacheable cycles 964system.cpu.l2cache.overall_mshr_uncacheable_latency::cpu.inst 322980250 # number of overall MSHR uncacheable cycles 965system.cpu.l2cache.overall_mshr_uncacheable_latency::cpu.data 183359699785 # number of overall MSHR uncacheable cycles 966system.cpu.l2cache.overall_mshr_uncacheable_latency::total 183682680035 # number of overall MSHR uncacheable cycles 967system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.dtb.walker 0.000573 # mshr miss rate for ReadReq accesses 968system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.itb.walker 0.000565 # mshr miss rate for ReadReq accesses 969system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.inst 0.012397 # mshr miss rate for ReadReq accesses 970system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.data 0.025887 # mshr miss rate for ReadReq accesses 971system.cpu.l2cache.ReadReq_mshr_miss_rate::total 0.016390 # mshr miss rate for ReadReq accesses 972system.cpu.l2cache.UpgradeReq_mshr_miss_rate::cpu.data 0.991028 # mshr miss rate for UpgradeReq accesses 973system.cpu.l2cache.UpgradeReq_mshr_miss_rate::total 0.991028 # mshr miss rate for UpgradeReq accesses 974system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.541380 # mshr miss rate for ReadExReq accesses 975system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.541380 # mshr miss rate for ReadExReq accesses 976system.cpu.l2cache.demand_mshr_miss_rate::cpu.dtb.walker 0.000573 # mshr miss rate for demand accesses 977system.cpu.l2cache.demand_mshr_miss_rate::cpu.itb.walker 0.000565 # mshr miss rate for demand accesses 978system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.012397 # mshr miss rate for demand accesses 979system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.229119 # mshr miss rate for demand accesses 980system.cpu.l2cache.demand_mshr_miss_rate::total 0.103255 # mshr miss rate for demand accesses 981system.cpu.l2cache.overall_mshr_miss_rate::cpu.dtb.walker 0.000573 # mshr miss rate for overall accesses 982system.cpu.l2cache.overall_mshr_miss_rate::cpu.itb.walker 0.000565 # mshr miss rate for overall accesses 983system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.012397 # mshr miss rate for overall accesses 984system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.229119 # mshr miss rate for overall accesses 985system.cpu.l2cache.overall_mshr_miss_rate::total 0.103255 # mshr miss rate for overall accesses 986system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.dtb.walker 65300 # average ReadReq mshr miss latency 987system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.itb.walker 48750 # average ReadReq mshr miss latency 988system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.inst 57913.923215 # average ReadReq mshr miss latency 989system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.data 58212.285250 # average ReadReq mshr miss latency 990system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 58058.388359 # average ReadReq mshr miss latency 991system.cpu.l2cache.UpgradeReq_avg_mshr_miss_latency::cpu.data 10002.044568 # average UpgradeReq mshr miss latency 992system.cpu.l2cache.UpgradeReq_avg_mshr_miss_latency::total 10002.044568 # average UpgradeReq mshr miss latency 993system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 51782.777240 # average ReadExReq mshr miss latency 994system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 51782.777240 # average ReadExReq mshr miss latency 995system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.dtb.walker 65300 # average overall mshr miss latency 996system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.itb.walker 48750 # average overall mshr miss latency 997system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 57913.923215 # average overall mshr miss latency 998system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 52222.818083 # average overall mshr miss latency 999system.cpu.l2cache.demand_avg_mshr_miss_latency::total 52614.101148 # average overall mshr miss latency 1000system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.dtb.walker 65300 # average overall mshr miss latency 1001system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.itb.walker 48750 # average overall mshr miss latency 1002system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 57913.923215 # average overall mshr miss latency 1003system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 52222.818083 # average overall mshr miss latency 1004system.cpu.l2cache.overall_avg_mshr_miss_latency::total 52614.101148 # average overall mshr miss latency | 1136system.cpu.l2cache.overall_mshr_misses::cpu.inst 10585 # number of overall MSHR misses 1137system.cpu.l2cache.overall_mshr_misses::cpu.data 143633 # number of overall MSHR misses 1138system.cpu.l2cache.overall_mshr_misses::total 154225 # number of overall MSHR misses 1139system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.dtb.walker 242750 # number of ReadReq MSHR miss cycles 1140system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.itb.walker 125000 # number of ReadReq MSHR miss cycles 1141system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.inst 619898500 # number of ReadReq MSHR miss cycles 1142system.cpu.l2cache.ReadReq_mshr_miss_latency::cpu.data 615330500 # number of ReadReq MSHR miss cycles 1143system.cpu.l2cache.ReadReq_mshr_miss_latency::total 1235596750 # number of ReadReq MSHR miss cycles 1144system.cpu.l2cache.UpgradeReq_mshr_miss_latency::cpu.data 29079907 # number of UpgradeReq MSHR miss cycles 1145system.cpu.l2cache.UpgradeReq_mshr_miss_latency::total 29079907 # number of UpgradeReq MSHR miss cycles 1146system.cpu.l2cache.ReadExReq_mshr_miss_latency::cpu.data 7944865608 # number of ReadExReq MSHR miss cycles 1147system.cpu.l2cache.ReadExReq_mshr_miss_latency::total 7944865608 # number of ReadExReq MSHR miss cycles 1148system.cpu.l2cache.demand_mshr_miss_latency::cpu.dtb.walker 242750 # number of demand (read+write) MSHR miss cycles 1149system.cpu.l2cache.demand_mshr_miss_latency::cpu.itb.walker 125000 # number of demand (read+write) MSHR miss cycles 1150system.cpu.l2cache.demand_mshr_miss_latency::cpu.inst 619898500 # number of demand (read+write) MSHR miss cycles 1151system.cpu.l2cache.demand_mshr_miss_latency::cpu.data 8560196108 # number of demand (read+write) MSHR miss cycles 1152system.cpu.l2cache.demand_mshr_miss_latency::total 9180462358 # number of demand (read+write) MSHR miss cycles 1153system.cpu.l2cache.overall_mshr_miss_latency::cpu.dtb.walker 242750 # number of overall MSHR miss cycles 1154system.cpu.l2cache.overall_mshr_miss_latency::cpu.itb.walker 125000 # number of overall MSHR miss cycles 1155system.cpu.l2cache.overall_mshr_miss_latency::cpu.inst 619898500 # number of overall MSHR miss cycles 1156system.cpu.l2cache.overall_mshr_miss_latency::cpu.data 8560196108 # number of overall MSHR miss cycles 1157system.cpu.l2cache.overall_mshr_miss_latency::total 9180462358 # number of overall MSHR miss cycles 1158system.cpu.l2cache.ReadReq_mshr_uncacheable_latency::cpu.inst 343871250 # number of ReadReq MSHR uncacheable cycles 1159system.cpu.l2cache.ReadReq_mshr_uncacheable_latency::cpu.data 166656947250 # number of ReadReq MSHR uncacheable cycles 1160system.cpu.l2cache.ReadReq_mshr_uncacheable_latency::total 167000818500 # number of ReadReq MSHR uncacheable cycles 1161system.cpu.l2cache.WriteReq_mshr_uncacheable_latency::cpu.data 16702635650 # number of WriteReq MSHR uncacheable cycles 1162system.cpu.l2cache.WriteReq_mshr_uncacheable_latency::total 16702635650 # number of WriteReq MSHR uncacheable cycles 1163system.cpu.l2cache.overall_mshr_uncacheable_latency::cpu.inst 343871250 # number of overall MSHR uncacheable cycles 1164system.cpu.l2cache.overall_mshr_uncacheable_latency::cpu.data 183359582900 # number of overall MSHR uncacheable cycles 1165system.cpu.l2cache.overall_mshr_uncacheable_latency::total 183703454150 # number of overall MSHR uncacheable cycles 1166system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.dtb.walker 0.000574 # mshr miss rate for ReadReq accesses 1167system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.itb.walker 0.000566 # mshr miss rate for ReadReq accesses 1168system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.inst 0.012378 # mshr miss rate for ReadReq accesses 1169system.cpu.l2cache.ReadReq_mshr_miss_rate::cpu.data 0.025851 # mshr miss rate for ReadReq accesses 1170system.cpu.l2cache.ReadReq_mshr_miss_rate::total 0.016362 # mshr miss rate for ReadReq accesses 1171system.cpu.l2cache.UpgradeReq_mshr_miss_rate::cpu.data 0.991135 # mshr miss rate for UpgradeReq accesses 1172system.cpu.l2cache.UpgradeReq_mshr_miss_rate::total 0.991135 # mshr miss rate for UpgradeReq accesses 1173system.cpu.l2cache.ReadExReq_mshr_miss_rate::cpu.data 0.541340 # mshr miss rate for ReadExReq accesses 1174system.cpu.l2cache.ReadExReq_mshr_miss_rate::total 0.541340 # mshr miss rate for ReadExReq accesses 1175system.cpu.l2cache.demand_mshr_miss_rate::cpu.dtb.walker 0.000574 # mshr miss rate for demand accesses 1176system.cpu.l2cache.demand_mshr_miss_rate::cpu.itb.walker 0.000566 # mshr miss rate for demand accesses 1177system.cpu.l2cache.demand_mshr_miss_rate::cpu.inst 0.012378 # mshr miss rate for demand accesses 1178system.cpu.l2cache.demand_mshr_miss_rate::cpu.data 0.229207 # mshr miss rate for demand accesses 1179system.cpu.l2cache.demand_mshr_miss_rate::total 0.103228 # mshr miss rate for demand accesses 1180system.cpu.l2cache.overall_mshr_miss_rate::cpu.dtb.walker 0.000574 # mshr miss rate for overall accesses 1181system.cpu.l2cache.overall_mshr_miss_rate::cpu.itb.walker 0.000566 # mshr miss rate for overall accesses 1182system.cpu.l2cache.overall_mshr_miss_rate::cpu.inst 0.012378 # mshr miss rate for overall accesses 1183system.cpu.l2cache.overall_mshr_miss_rate::cpu.data 0.229207 # mshr miss rate for overall accesses 1184system.cpu.l2cache.overall_mshr_miss_rate::total 0.103228 # mshr miss rate for overall accesses 1185system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.dtb.walker 48550 # average ReadReq mshr miss latency 1186system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.itb.walker 62500 # average ReadReq mshr miss latency 1187system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.inst 58563.863958 # average ReadReq mshr miss latency 1188system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::cpu.data 62731.216230 # average ReadReq mshr miss latency 1189system.cpu.l2cache.ReadReq_avg_mshr_miss_latency::total 60565.499240 # average ReadReq mshr miss latency 1190system.cpu.l2cache.UpgradeReq_avg_mshr_miss_latency::cpu.data 10003.407981 # average UpgradeReq mshr miss latency 1191system.cpu.l2cache.UpgradeReq_avg_mshr_miss_latency::total 10003.407981 # average UpgradeReq mshr miss latency 1192system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::cpu.data 59368.017755 # average ReadExReq mshr miss latency 1193system.cpu.l2cache.ReadExReq_avg_mshr_miss_latency::total 59368.017755 # average ReadExReq mshr miss latency 1194system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.dtb.walker 48550 # average overall mshr miss latency 1195system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.itb.walker 62500 # average overall mshr miss latency 1196system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.inst 58563.863958 # average overall mshr miss latency 1197system.cpu.l2cache.demand_avg_mshr_miss_latency::cpu.data 59597.697660 # average overall mshr miss latency 1198system.cpu.l2cache.demand_avg_mshr_miss_latency::total 59526.421514 # average overall mshr miss latency 1199system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.dtb.walker 48550 # average overall mshr miss latency 1200system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.itb.walker 62500 # average overall mshr miss latency 1201system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.inst 58563.863958 # average overall mshr miss latency 1202system.cpu.l2cache.overall_avg_mshr_miss_latency::cpu.data 59597.697660 # average overall mshr miss latency 1203system.cpu.l2cache.overall_avg_mshr_miss_latency::total 59526.421514 # average overall mshr miss latency |
| 1005system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.inst inf # average ReadReq mshr uncacheable latency 1006system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.data inf # average ReadReq mshr uncacheable latency 1007system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 1008system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::cpu.data inf # average WriteReq mshr uncacheable latency 1009system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency 1010system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.inst inf # average overall mshr uncacheable latency 1011system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.data inf # average overall mshr uncacheable latency 1012system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 1013system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | 1204system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.inst inf # average ReadReq mshr uncacheable latency 1205system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::cpu.data inf # average ReadReq mshr uncacheable latency 1206system.cpu.l2cache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 1207system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::cpu.data inf # average WriteReq mshr uncacheable latency 1208system.cpu.l2cache.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency 1209system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.inst inf # average overall mshr uncacheable latency 1210system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.data inf # average overall mshr uncacheable latency 1211system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 1212system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 1014system.cpu.dcache.tags.replacements 626805 # number of replacements 1015system.cpu.dcache.tags.tagsinuse 511.881003 # Cycle average of tags in use 1016system.cpu.dcache.tags.total_refs 23655596 # Total number of references to valid blocks. 1017system.cpu.dcache.tags.sampled_refs 627317 # Sample count of references to valid blocks. 1018system.cpu.dcache.tags.avg_refs 37.709158 # Average number of references to valid blocks. 1019system.cpu.dcache.tags.warmup_cycle 640871250 # Cycle when the warmup percentage was hit. 1020system.cpu.dcache.tags.occ_blocks::cpu.data 511.881003 # Average occupied blocks per requestor 1021system.cpu.dcache.tags.occ_percent::cpu.data 0.999768 # Average percentage of cache occupancy 1022system.cpu.dcache.tags.occ_percent::total 0.999768 # Average percentage of cache occupancy 1023system.cpu.dcache.ReadReq_hits::cpu.data 13195774 # number of ReadReq hits 1024system.cpu.dcache.ReadReq_hits::total 13195774 # number of ReadReq hits 1025system.cpu.dcache.WriteReq_hits::cpu.data 9972821 # number of WriteReq hits 1026system.cpu.dcache.WriteReq_hits::total 9972821 # number of WriteReq hits 1027system.cpu.dcache.LoadLockedReq_hits::cpu.data 236302 # number of LoadLockedReq hits 1028system.cpu.dcache.LoadLockedReq_hits::total 236302 # number of LoadLockedReq hits 1029system.cpu.dcache.StoreCondReq_hits::cpu.data 247801 # number of StoreCondReq hits 1030system.cpu.dcache.StoreCondReq_hits::total 247801 # number of StoreCondReq hits 1031system.cpu.dcache.demand_hits::cpu.data 23168595 # number of demand (read+write) hits 1032system.cpu.dcache.demand_hits::total 23168595 # number of demand (read+write) hits 1033system.cpu.dcache.overall_hits::cpu.data 23168595 # number of overall hits 1034system.cpu.dcache.overall_hits::total 23168595 # number of overall hits 1035system.cpu.dcache.ReadReq_misses::cpu.data 368499 # number of ReadReq misses 1036system.cpu.dcache.ReadReq_misses::total 368499 # number of ReadReq misses 1037system.cpu.dcache.WriteReq_misses::cpu.data 250216 # number of WriteReq misses 1038system.cpu.dcache.WriteReq_misses::total 250216 # number of WriteReq misses 1039system.cpu.dcache.LoadLockedReq_misses::cpu.data 11500 # number of LoadLockedReq misses 1040system.cpu.dcache.LoadLockedReq_misses::total 11500 # number of LoadLockedReq misses 1041system.cpu.dcache.demand_misses::cpu.data 618715 # number of demand (read+write) misses 1042system.cpu.dcache.demand_misses::total 618715 # number of demand (read+write) misses 1043system.cpu.dcache.overall_misses::cpu.data 618715 # number of overall misses 1044system.cpu.dcache.overall_misses::total 618715 # number of overall misses 1045system.cpu.dcache.ReadReq_miss_latency::cpu.data 5384538000 # number of ReadReq miss cycles 1046system.cpu.dcache.ReadReq_miss_latency::total 5384538000 # number of ReadReq miss cycles 1047system.cpu.dcache.WriteReq_miss_latency::cpu.data 10623511265 # number of WriteReq miss cycles 1048system.cpu.dcache.WriteReq_miss_latency::total 10623511265 # number of WriteReq miss cycles 1049system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 158750500 # number of LoadLockedReq miss cycles 1050system.cpu.dcache.LoadLockedReq_miss_latency::total 158750500 # number of LoadLockedReq miss cycles 1051system.cpu.dcache.demand_miss_latency::cpu.data 16008049265 # number of demand (read+write) miss cycles 1052system.cpu.dcache.demand_miss_latency::total 16008049265 # number of demand (read+write) miss cycles 1053system.cpu.dcache.overall_miss_latency::cpu.data 16008049265 # number of overall miss cycles 1054system.cpu.dcache.overall_miss_latency::total 16008049265 # number of overall miss cycles 1055system.cpu.dcache.ReadReq_accesses::cpu.data 13564273 # number of ReadReq accesses(hits+misses) 1056system.cpu.dcache.ReadReq_accesses::total 13564273 # number of ReadReq accesses(hits+misses) 1057system.cpu.dcache.WriteReq_accesses::cpu.data 10223037 # number of WriteReq accesses(hits+misses) 1058system.cpu.dcache.WriteReq_accesses::total 10223037 # number of WriteReq accesses(hits+misses) 1059system.cpu.dcache.LoadLockedReq_accesses::cpu.data 247802 # number of LoadLockedReq accesses(hits+misses) 1060system.cpu.dcache.LoadLockedReq_accesses::total 247802 # number of LoadLockedReq accesses(hits+misses) 1061system.cpu.dcache.StoreCondReq_accesses::cpu.data 247801 # number of StoreCondReq accesses(hits+misses) 1062system.cpu.dcache.StoreCondReq_accesses::total 247801 # number of StoreCondReq accesses(hits+misses) 1063system.cpu.dcache.demand_accesses::cpu.data 23787310 # number of demand (read+write) accesses 1064system.cpu.dcache.demand_accesses::total 23787310 # number of demand (read+write) accesses 1065system.cpu.dcache.overall_accesses::cpu.data 23787310 # number of overall (read+write) accesses 1066system.cpu.dcache.overall_accesses::total 23787310 # number of overall (read+write) accesses 1067system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.027167 # miss rate for ReadReq accesses 1068system.cpu.dcache.ReadReq_miss_rate::total 0.027167 # miss rate for ReadReq accesses 1069system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.024476 # miss rate for WriteReq accesses 1070system.cpu.dcache.WriteReq_miss_rate::total 0.024476 # miss rate for WriteReq accesses 1071system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.046408 # miss rate for LoadLockedReq accesses 1072system.cpu.dcache.LoadLockedReq_miss_rate::total 0.046408 # miss rate for LoadLockedReq accesses 1073system.cpu.dcache.demand_miss_rate::cpu.data 0.026010 # miss rate for demand accesses 1074system.cpu.dcache.demand_miss_rate::total 0.026010 # miss rate for demand accesses 1075system.cpu.dcache.overall_miss_rate::cpu.data 0.026010 # miss rate for overall accesses 1076system.cpu.dcache.overall_miss_rate::total 0.026010 # miss rate for overall accesses 1077system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 14612.083072 # average ReadReq miss latency 1078system.cpu.dcache.ReadReq_avg_miss_latency::total 14612.083072 # average ReadReq miss latency 1079system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 42457.361899 # average WriteReq miss latency 1080system.cpu.dcache.WriteReq_avg_miss_latency::total 42457.361899 # average WriteReq miss latency 1081system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 13804.391304 # average LoadLockedReq miss latency 1082system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 13804.391304 # average LoadLockedReq miss latency 1083system.cpu.dcache.demand_avg_miss_latency::cpu.data 25873.058298 # average overall miss latency 1084system.cpu.dcache.demand_avg_miss_latency::total 25873.058298 # average overall miss latency 1085system.cpu.dcache.overall_avg_miss_latency::cpu.data 25873.058298 # average overall miss latency 1086system.cpu.dcache.overall_avg_miss_latency::total 25873.058298 # average overall miss latency | 1213system.cpu.dcache.tags.replacements 626141 # number of replacements 1214system.cpu.dcache.tags.tagsinuse 511.876746 # Cycle average of tags in use 1215system.cpu.dcache.tags.total_refs 23655438 # Total number of references to valid blocks. 1216system.cpu.dcache.tags.sampled_refs 626653 # Sample count of references to valid blocks. 1217system.cpu.dcache.tags.avg_refs 37.748863 # Average number of references to valid blocks. 1218system.cpu.dcache.tags.warmup_cycle 664004250 # Cycle when the warmup percentage was hit. 1219system.cpu.dcache.tags.occ_blocks::cpu.data 511.876746 # Average occupied blocks per requestor 1220system.cpu.dcache.tags.occ_percent::cpu.data 0.999759 # Average percentage of cache occupancy 1221system.cpu.dcache.tags.occ_percent::total 0.999759 # Average percentage of cache occupancy 1222system.cpu.dcache.ReadReq_hits::cpu.data 13195736 # number of ReadReq hits 1223system.cpu.dcache.ReadReq_hits::total 13195736 # number of ReadReq hits 1224system.cpu.dcache.WriteReq_hits::cpu.data 9972597 # number of WriteReq hits 1225system.cpu.dcache.WriteReq_hits::total 9972597 # number of WriteReq hits 1226system.cpu.dcache.LoadLockedReq_hits::cpu.data 236394 # number of LoadLockedReq hits 1227system.cpu.dcache.LoadLockedReq_hits::total 236394 # number of LoadLockedReq hits 1228system.cpu.dcache.StoreCondReq_hits::cpu.data 247778 # number of StoreCondReq hits 1229system.cpu.dcache.StoreCondReq_hits::total 247778 # number of StoreCondReq hits 1230system.cpu.dcache.demand_hits::cpu.data 23168333 # number of demand (read+write) hits 1231system.cpu.dcache.demand_hits::total 23168333 # number of demand (read+write) hits 1232system.cpu.dcache.overall_hits::cpu.data 23168333 # number of overall hits 1233system.cpu.dcache.overall_hits::total 23168333 # number of overall hits 1234system.cpu.dcache.ReadReq_misses::cpu.data 368059 # number of ReadReq misses 1235system.cpu.dcache.ReadReq_misses::total 368059 # number of ReadReq misses 1236system.cpu.dcache.WriteReq_misses::cpu.data 250142 # number of WriteReq misses 1237system.cpu.dcache.WriteReq_misses::total 250142 # number of WriteReq misses 1238system.cpu.dcache.LoadLockedReq_misses::cpu.data 11385 # number of LoadLockedReq misses 1239system.cpu.dcache.LoadLockedReq_misses::total 11385 # number of LoadLockedReq misses 1240system.cpu.dcache.demand_misses::cpu.data 618201 # number of demand (read+write) misses 1241system.cpu.dcache.demand_misses::total 618201 # number of demand (read+write) misses 1242system.cpu.dcache.overall_misses::cpu.data 618201 # number of overall misses 1243system.cpu.dcache.overall_misses::total 618201 # number of overall misses 1244system.cpu.dcache.ReadReq_miss_latency::cpu.data 5416878250 # number of ReadReq miss cycles 1245system.cpu.dcache.ReadReq_miss_latency::total 5416878250 # number of ReadReq miss cycles 1246system.cpu.dcache.WriteReq_miss_latency::cpu.data 11621403015 # number of WriteReq miss cycles 1247system.cpu.dcache.WriteReq_miss_latency::total 11621403015 # number of WriteReq miss cycles 1248system.cpu.dcache.LoadLockedReq_miss_latency::cpu.data 158363750 # number of LoadLockedReq miss cycles 1249system.cpu.dcache.LoadLockedReq_miss_latency::total 158363750 # number of LoadLockedReq miss cycles 1250system.cpu.dcache.demand_miss_latency::cpu.data 17038281265 # number of demand (read+write) miss cycles 1251system.cpu.dcache.demand_miss_latency::total 17038281265 # number of demand (read+write) miss cycles 1252system.cpu.dcache.overall_miss_latency::cpu.data 17038281265 # number of overall miss cycles 1253system.cpu.dcache.overall_miss_latency::total 17038281265 # number of overall miss cycles 1254system.cpu.dcache.ReadReq_accesses::cpu.data 13563795 # number of ReadReq accesses(hits+misses) 1255system.cpu.dcache.ReadReq_accesses::total 13563795 # number of ReadReq accesses(hits+misses) 1256system.cpu.dcache.WriteReq_accesses::cpu.data 10222739 # number of WriteReq accesses(hits+misses) 1257system.cpu.dcache.WriteReq_accesses::total 10222739 # number of WriteReq accesses(hits+misses) 1258system.cpu.dcache.LoadLockedReq_accesses::cpu.data 247779 # number of LoadLockedReq accesses(hits+misses) 1259system.cpu.dcache.LoadLockedReq_accesses::total 247779 # number of LoadLockedReq accesses(hits+misses) 1260system.cpu.dcache.StoreCondReq_accesses::cpu.data 247778 # number of StoreCondReq accesses(hits+misses) 1261system.cpu.dcache.StoreCondReq_accesses::total 247778 # number of StoreCondReq accesses(hits+misses) 1262system.cpu.dcache.demand_accesses::cpu.data 23786534 # number of demand (read+write) accesses 1263system.cpu.dcache.demand_accesses::total 23786534 # number of demand (read+write) accesses 1264system.cpu.dcache.overall_accesses::cpu.data 23786534 # number of overall (read+write) accesses 1265system.cpu.dcache.overall_accesses::total 23786534 # number of overall (read+write) accesses 1266system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.027135 # miss rate for ReadReq accesses 1267system.cpu.dcache.ReadReq_miss_rate::total 0.027135 # miss rate for ReadReq accesses 1268system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.024469 # miss rate for WriteReq accesses 1269system.cpu.dcache.WriteReq_miss_rate::total 0.024469 # miss rate for WriteReq accesses 1270system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.045948 # miss rate for LoadLockedReq accesses 1271system.cpu.dcache.LoadLockedReq_miss_rate::total 0.045948 # miss rate for LoadLockedReq accesses 1272system.cpu.dcache.demand_miss_rate::cpu.data 0.025990 # miss rate for demand accesses 1273system.cpu.dcache.demand_miss_rate::total 0.025990 # miss rate for demand accesses 1274system.cpu.dcache.overall_miss_rate::cpu.data 0.025990 # miss rate for overall accesses 1275system.cpu.dcache.overall_miss_rate::total 0.025990 # miss rate for overall accesses 1276system.cpu.dcache.ReadReq_avg_miss_latency::cpu.data 14717.418267 # average ReadReq miss latency 1277system.cpu.dcache.ReadReq_avg_miss_latency::total 14717.418267 # average ReadReq miss latency 1278system.cpu.dcache.WriteReq_avg_miss_latency::cpu.data 46459.223221 # average WriteReq miss latency 1279system.cpu.dcache.WriteReq_avg_miss_latency::total 46459.223221 # average WriteReq miss latency 1280system.cpu.dcache.LoadLockedReq_avg_miss_latency::cpu.data 13909.859464 # average LoadLockedReq miss latency 1281system.cpu.dcache.LoadLockedReq_avg_miss_latency::total 13909.859464 # average LoadLockedReq miss latency 1282system.cpu.dcache.demand_avg_miss_latency::cpu.data 27561.070372 # average overall miss latency 1283system.cpu.dcache.demand_avg_miss_latency::total 27561.070372 # average overall miss latency 1284system.cpu.dcache.overall_avg_miss_latency::cpu.data 27561.070372 # average overall miss latency 1285system.cpu.dcache.overall_avg_miss_latency::total 27561.070372 # average overall miss latency |
| 1087system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1088system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1089system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 1090system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 1091system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1092system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 1093system.cpu.dcache.fast_writes 0 # number of fast writes performed 1094system.cpu.dcache.cache_copies 0 # number of cache copies performed | 1286system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1287system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1288system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 1289system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 1290system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1291system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 1292system.cpu.dcache.fast_writes 0 # number of fast writes performed 1293system.cpu.dcache.cache_copies 0 # number of cache copies performed |
| 1095system.cpu.dcache.writebacks::writebacks 595785 # number of writebacks 1096system.cpu.dcache.writebacks::total 595785 # number of writebacks 1097system.cpu.dcache.ReadReq_mshr_misses::cpu.data 368499 # number of ReadReq MSHR misses 1098system.cpu.dcache.ReadReq_mshr_misses::total 368499 # number of ReadReq MSHR misses 1099system.cpu.dcache.WriteReq_mshr_misses::cpu.data 250216 # number of WriteReq MSHR misses 1100system.cpu.dcache.WriteReq_mshr_misses::total 250216 # number of WriteReq MSHR misses 1101system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 11500 # number of LoadLockedReq MSHR misses 1102system.cpu.dcache.LoadLockedReq_mshr_misses::total 11500 # number of LoadLockedReq MSHR misses 1103system.cpu.dcache.demand_mshr_misses::cpu.data 618715 # number of demand (read+write) MSHR misses 1104system.cpu.dcache.demand_mshr_misses::total 618715 # number of demand (read+write) MSHR misses 1105system.cpu.dcache.overall_mshr_misses::cpu.data 618715 # number of overall MSHR misses 1106system.cpu.dcache.overall_mshr_misses::total 618715 # number of overall MSHR misses 1107system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 4642816500 # number of ReadReq MSHR miss cycles 1108system.cpu.dcache.ReadReq_mshr_miss_latency::total 4642816500 # number of ReadReq MSHR miss cycles 1109system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 10058410735 # number of WriteReq MSHR miss cycles 1110system.cpu.dcache.WriteReq_mshr_miss_latency::total 10058410735 # number of WriteReq MSHR miss cycles 1111system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 135673500 # number of LoadLockedReq MSHR miss cycles 1112system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 135673500 # number of LoadLockedReq MSHR miss cycles 1113system.cpu.dcache.demand_mshr_miss_latency::cpu.data 14701227235 # number of demand (read+write) MSHR miss cycles 1114system.cpu.dcache.demand_mshr_miss_latency::total 14701227235 # number of demand (read+write) MSHR miss cycles 1115system.cpu.dcache.overall_mshr_miss_latency::cpu.data 14701227235 # number of overall MSHR miss cycles 1116system.cpu.dcache.overall_mshr_miss_latency::total 14701227235 # number of overall MSHR miss cycles 1117system.cpu.dcache.ReadReq_mshr_uncacheable_latency::cpu.data 182050836250 # number of ReadReq MSHR uncacheable cycles 1118system.cpu.dcache.ReadReq_mshr_uncacheable_latency::total 182050836250 # number of ReadReq MSHR uncacheable cycles 1119system.cpu.dcache.WriteReq_mshr_uncacheable_latency::cpu.data 26234094465 # number of WriteReq MSHR uncacheable cycles 1120system.cpu.dcache.WriteReq_mshr_uncacheable_latency::total 26234094465 # number of WriteReq MSHR uncacheable cycles 1121system.cpu.dcache.overall_mshr_uncacheable_latency::cpu.data 208284930715 # number of overall MSHR uncacheable cycles 1122system.cpu.dcache.overall_mshr_uncacheable_latency::total 208284930715 # number of overall MSHR uncacheable cycles 1123system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.027167 # mshr miss rate for ReadReq accesses 1124system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.027167 # mshr miss rate for ReadReq accesses 1125system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.024476 # mshr miss rate for WriteReq accesses 1126system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.024476 # mshr miss rate for WriteReq accesses 1127system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.046408 # mshr miss rate for LoadLockedReq accesses 1128system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.046408 # mshr miss rate for LoadLockedReq accesses 1129system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.026010 # mshr miss rate for demand accesses 1130system.cpu.dcache.demand_mshr_miss_rate::total 0.026010 # mshr miss rate for demand accesses 1131system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.026010 # mshr miss rate for overall accesses 1132system.cpu.dcache.overall_mshr_miss_rate::total 0.026010 # mshr miss rate for overall accesses 1133system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 12599.264856 # average ReadReq mshr miss latency 1134system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 12599.264856 # average ReadReq mshr miss latency 1135system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 40198.911081 # average WriteReq mshr miss latency 1136system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 40198.911081 # average WriteReq mshr miss latency 1137system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 11797.695652 # average LoadLockedReq mshr miss latency 1138system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 11797.695652 # average LoadLockedReq mshr miss latency 1139system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 23760.903219 # average overall mshr miss latency 1140system.cpu.dcache.demand_avg_mshr_miss_latency::total 23760.903219 # average overall mshr miss latency 1141system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 23760.903219 # average overall mshr miss latency 1142system.cpu.dcache.overall_avg_mshr_miss_latency::total 23760.903219 # average overall mshr miss latency | 1294system.cpu.dcache.writebacks::writebacks 595234 # number of writebacks 1295system.cpu.dcache.writebacks::total 595234 # number of writebacks 1296system.cpu.dcache.ReadReq_mshr_misses::cpu.data 368059 # number of ReadReq MSHR misses 1297system.cpu.dcache.ReadReq_mshr_misses::total 368059 # number of ReadReq MSHR misses 1298system.cpu.dcache.WriteReq_mshr_misses::cpu.data 250142 # number of WriteReq MSHR misses 1299system.cpu.dcache.WriteReq_mshr_misses::total 250142 # number of WriteReq MSHR misses 1300system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 11385 # number of LoadLockedReq MSHR misses 1301system.cpu.dcache.LoadLockedReq_mshr_misses::total 11385 # number of LoadLockedReq MSHR misses 1302system.cpu.dcache.demand_mshr_misses::cpu.data 618201 # number of demand (read+write) MSHR misses 1303system.cpu.dcache.demand_mshr_misses::total 618201 # number of demand (read+write) MSHR misses 1304system.cpu.dcache.overall_mshr_misses::cpu.data 618201 # number of overall MSHR misses 1305system.cpu.dcache.overall_mshr_misses::total 618201 # number of overall MSHR misses 1306system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 4678465750 # number of ReadReq MSHR miss cycles 1307system.cpu.dcache.ReadReq_mshr_miss_latency::total 4678465750 # number of ReadReq MSHR miss cycles 1308system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 11069177985 # number of WriteReq MSHR miss cycles 1309system.cpu.dcache.WriteReq_mshr_miss_latency::total 11069177985 # number of WriteReq MSHR miss cycles 1310system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 135539250 # number of LoadLockedReq MSHR miss cycles 1311system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 135539250 # number of LoadLockedReq MSHR miss cycles 1312system.cpu.dcache.demand_mshr_miss_latency::cpu.data 15747643735 # number of demand (read+write) MSHR miss cycles 1313system.cpu.dcache.demand_mshr_miss_latency::total 15747643735 # number of demand (read+write) MSHR miss cycles 1314system.cpu.dcache.overall_mshr_miss_latency::cpu.data 15747643735 # number of overall MSHR miss cycles 1315system.cpu.dcache.overall_mshr_miss_latency::total 15747643735 # number of overall MSHR miss cycles 1316system.cpu.dcache.ReadReq_mshr_uncacheable_latency::cpu.data 182050613250 # number of ReadReq MSHR uncacheable cycles 1317system.cpu.dcache.ReadReq_mshr_uncacheable_latency::total 182050613250 # number of ReadReq MSHR uncacheable cycles 1318system.cpu.dcache.WriteReq_mshr_uncacheable_latency::cpu.data 26234152350 # number of WriteReq MSHR uncacheable cycles 1319system.cpu.dcache.WriteReq_mshr_uncacheable_latency::total 26234152350 # number of WriteReq MSHR uncacheable cycles 1320system.cpu.dcache.overall_mshr_uncacheable_latency::cpu.data 208284765600 # number of overall MSHR uncacheable cycles 1321system.cpu.dcache.overall_mshr_uncacheable_latency::total 208284765600 # number of overall MSHR uncacheable cycles 1322system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.027135 # mshr miss rate for ReadReq accesses 1323system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.027135 # mshr miss rate for ReadReq accesses 1324system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.024469 # mshr miss rate for WriteReq accesses 1325system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.024469 # mshr miss rate for WriteReq accesses 1326system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.045948 # mshr miss rate for LoadLockedReq accesses 1327system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.045948 # mshr miss rate for LoadLockedReq accesses 1328system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.025990 # mshr miss rate for demand accesses 1329system.cpu.dcache.demand_mshr_miss_rate::total 0.025990 # mshr miss rate for demand accesses 1330system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.025990 # mshr miss rate for overall accesses 1331system.cpu.dcache.overall_mshr_miss_rate::total 0.025990 # mshr miss rate for overall accesses 1332system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 12711.184212 # average ReadReq mshr miss latency 1333system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 12711.184212 # average ReadReq mshr miss latency 1334system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 44251.577044 # average WriteReq mshr miss latency 1335system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 44251.577044 # average WriteReq mshr miss latency 1336system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 11905.072464 # average LoadLockedReq mshr miss latency 1337system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 11905.072464 # average LoadLockedReq mshr miss latency 1338system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 25473.339149 # average overall mshr miss latency 1339system.cpu.dcache.demand_avg_mshr_miss_latency::total 25473.339149 # average overall mshr miss latency 1340system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 25473.339149 # average overall mshr miss latency 1341system.cpu.dcache.overall_avg_mshr_miss_latency::total 25473.339149 # average overall mshr miss latency |
| 1143system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data inf # average ReadReq mshr uncacheable latency 1144system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 1145system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu.data inf # average WriteReq mshr uncacheable latency 1146system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency 1147system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data inf # average overall mshr uncacheable latency 1148system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 1149system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 1342system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data inf # average ReadReq mshr uncacheable latency 1343system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 1344system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu.data inf # average WriteReq mshr uncacheable latency 1345system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency 1346system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data inf # average overall mshr uncacheable latency 1347system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 1348system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 1150system.cpu.toL2Bus.throughput 53011951 # Throughput (bytes/s) 1151system.cpu.toL2Bus.trans_dist::ReadReq 2455175 # Transaction distribution 1152system.cpu.toL2Bus.trans_dist::ReadResp 2455175 # Transaction distribution | 1349system.cpu.toL2Bus.throughput 52965120 # Throughput (bytes/s) 1350system.cpu.toL2Bus.trans_dist::ReadReq 2454582 # Transaction distribution 1351system.cpu.toL2Bus.trans_dist::ReadResp 2454582 # Transaction distribution |
| 1153system.cpu.toL2Bus.trans_dist::WriteReq 763368 # Transaction distribution 1154system.cpu.toL2Bus.trans_dist::WriteResp 763368 # Transaction distribution | 1352system.cpu.toL2Bus.trans_dist::WriteReq 763368 # Transaction distribution 1353system.cpu.toL2Bus.trans_dist::WriteResp 763368 # Transaction distribution |
| 1155system.cpu.toL2Bus.trans_dist::Writeback 595785 # Transaction distribution 1156system.cpu.toL2Bus.trans_dist::UpgradeReq 2898 # Transaction distribution 1157system.cpu.toL2Bus.trans_dist::UpgradeResp 2898 # Transaction distribution 1158system.cpu.toL2Bus.trans_dist::ReadExReq 247318 # Transaction distribution 1159system.cpu.toL2Bus.trans_dist::ReadExResp 247318 # Transaction distribution 1160system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1725171 # Packet count per connected master and slave (bytes) 1161system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5751163 # Packet count per connected master and slave (bytes) 1162system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 12463 # Packet count per connected master and slave (bytes) 1163system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 27463 # Packet count per connected master and slave (bytes) 1164system.cpu.toL2Bus.pkt_count::total 7516260 # Packet count per connected master and slave (bytes) 1165system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 54755700 # Cumulative packet size per connected master and slave (bytes) 1166system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 83692841 # Cumulative packet size per connected master and slave (bytes) 1167system.cpu.toL2Bus.tot_pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 14148 # Cumulative packet size per connected master and slave (bytes) 1168system.cpu.toL2Bus.tot_pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 34900 # Cumulative packet size per connected master and slave (bytes) 1169system.cpu.toL2Bus.tot_pkt_size::total 138497589 # Cumulative packet size per connected master and slave (bytes) 1170system.cpu.toL2Bus.data_through_bus 138497589 # Total data (bytes) 1171system.cpu.toL2Bus.snoop_data_through_bus 166632 # Total snoop data (bytes) 1172system.cpu.toL2Bus.reqLayer0.occupancy 3009741500 # Layer occupancy (ticks) | 1354system.cpu.toL2Bus.trans_dist::Writeback 595234 # Transaction distribution 1355system.cpu.toL2Bus.trans_dist::UpgradeReq 2933 # Transaction distribution 1356system.cpu.toL2Bus.trans_dist::UpgradeResp 2933 # Transaction distribution 1357system.cpu.toL2Bus.trans_dist::ReadExReq 247209 # Transaction distribution 1358system.cpu.toL2Bus.trans_dist::ReadExResp 247209 # Transaction distribution 1359system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1725138 # Packet count per connected master and slave (bytes) 1360system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5749352 # Packet count per connected master and slave (bytes) 1361system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 12460 # Packet count per connected master and slave (bytes) 1362system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 27430 # Packet count per connected master and slave (bytes) 1363system.cpu.toL2Bus.pkt_count::total 7514380 # Packet count per connected master and slave (bytes) 1364system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 54754804 # Cumulative packet size per connected master and slave (bytes) 1365system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 83615077 # Cumulative packet size per connected master and slave (bytes) 1366system.cpu.toL2Bus.tot_pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 14136 # Cumulative packet size per connected master and slave (bytes) 1367system.cpu.toL2Bus.tot_pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 34840 # Cumulative packet size per connected master and slave (bytes) 1368system.cpu.toL2Bus.tot_pkt_size::total 138418857 # Cumulative packet size per connected master and slave (bytes) 1369system.cpu.toL2Bus.data_through_bus 138418857 # Total data (bytes) 1370system.cpu.toL2Bus.snoop_data_through_bus 166312 # Total snoop data (bytes) 1371system.cpu.toL2Bus.reqLayer0.occupancy 3008581500 # Layer occupancy (ticks) |
| 1173system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%) | 1372system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%) |
| 1174system.cpu.toL2Bus.respLayer0.occupancy 1296026750 # Layer occupancy (ticks) | 1373system.cpu.toL2Bus.respLayer0.occupancy 1295429750 # Layer occupancy (ticks) |
| 1175system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) | 1374system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%) |
| 1176system.cpu.toL2Bus.respLayer1.occupancy 2542955300 # Layer occupancy (ticks) | 1375system.cpu.toL2Bus.respLayer1.occupancy 2534385915 # Layer occupancy (ticks) |
| 1177system.cpu.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%) | 1376system.cpu.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%) |
| 1178system.cpu.toL2Bus.respLayer2.occupancy 8926500 # Layer occupancy (ticks) | 1377system.cpu.toL2Bus.respLayer2.occupancy 8926000 # Layer occupancy (ticks) |
| 1179system.cpu.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%) | 1378system.cpu.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%) |
| 1180system.cpu.toL2Bus.respLayer3.occupancy 18739250 # Layer occupancy (ticks) | 1379system.cpu.toL2Bus.respLayer3.occupancy 18720500 # Layer occupancy (ticks) |
| 1181system.cpu.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%) 1182system.iocache.tags.replacements 0 # number of replacements 1183system.iocache.tags.tagsinuse 0 # Cycle average of tags in use 1184system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 1185system.iocache.tags.sampled_refs 0 # Sample count of references to valid blocks. 1186system.iocache.tags.avg_refs nan # Average number of references to valid blocks. 1187system.iocache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 1188system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1189system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1190system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 1191system.iocache.blocked::no_targets 0 # number of cycles access was blocked 1192system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1193system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 1194system.iocache.fast_writes 0 # number of fast writes performed 1195system.iocache.cache_copies 0 # number of cache copies performed | 1380system.cpu.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%) 1381system.iocache.tags.replacements 0 # number of replacements 1382system.iocache.tags.tagsinuse 0 # Cycle average of tags in use 1383system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 1384system.iocache.tags.sampled_refs 0 # Sample count of references to valid blocks. 1385system.iocache.tags.avg_refs nan # Average number of references to valid blocks. 1386system.iocache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 1387system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 1388system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 1389system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 1390system.iocache.blocked::no_targets 0 # number of cycles access was blocked 1391system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 1392system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 1393system.iocache.fast_writes 0 # number of fast writes performed 1394system.iocache.cache_copies 0 # number of cache copies performed |
| 1196system.iocache.ReadReq_mshr_uncacheable_latency::realview.clcd 1460469685500 # number of ReadReq MSHR uncacheable cycles 1197system.iocache.ReadReq_mshr_uncacheable_latency::total 1460469685500 # number of ReadReq MSHR uncacheable cycles 1198system.iocache.overall_mshr_uncacheable_latency::realview.clcd 1460469685500 # number of overall MSHR uncacheable cycles 1199system.iocache.overall_mshr_uncacheable_latency::total 1460469685500 # number of overall MSHR uncacheable cycles | 1395system.iocache.ReadReq_mshr_uncacheable_latency::realview.clcd 1538389615750 # number of ReadReq MSHR uncacheable cycles 1396system.iocache.ReadReq_mshr_uncacheable_latency::total 1538389615750 # number of ReadReq MSHR uncacheable cycles 1397system.iocache.overall_mshr_uncacheable_latency::realview.clcd 1538389615750 # number of overall MSHR uncacheable cycles 1398system.iocache.overall_mshr_uncacheable_latency::total 1538389615750 # number of overall MSHR uncacheable cycles |
| 1200system.iocache.ReadReq_avg_mshr_uncacheable_latency::realview.clcd inf # average ReadReq mshr uncacheable latency 1201system.iocache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 1202system.iocache.overall_avg_mshr_uncacheable_latency::realview.clcd inf # average overall mshr uncacheable latency 1203system.iocache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 1204system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 1205 1206---------- End Simulation Statistics ---------- | 1399system.iocache.ReadReq_avg_mshr_uncacheable_latency::realview.clcd inf # average ReadReq mshr uncacheable latency 1400system.iocache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency 1401system.iocache.overall_avg_mshr_uncacheable_latency::realview.clcd inf # average overall mshr uncacheable latency 1402system.iocache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency 1403system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 1404 1405---------- End Simulation Statistics ---------- |