1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.616536 # Number of seconds simulated 4sim_ticks 2616536483000 # Number of ticks simulated 5final_tick 2616536483000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 317845 # Simulator instruction rate (inst/s) 8host_op_rate 404472 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 13815397020 # Simulator tick rate (ticks/s) 10host_mem_usage 476964 # Number of bytes of host memory used 11host_seconds 189.39 # Real time elapsed on the host |
12sim_insts 60197590 # Number of instructions simulated 13sim_ops 76603983 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks |
16system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 17system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 18system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 19system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 20system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 21system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 22system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s) 23system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s) 24system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s) 25system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s) 26system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s) 27system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s) |
28system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory 29system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory 30system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory 31system.physmem.bytes_read::cpu.inst 703944 # Number of bytes read from this memory 32system.physmem.bytes_read::cpu.data 9089752 # Number of bytes read from this memory 33system.physmem.bytes_read::total 132477536 # Number of bytes read from this memory 34system.physmem.bytes_inst_read::cpu.inst 703944 # Number of instructions bytes read from this memory 35system.physmem.bytes_inst_read::total 703944 # Number of instructions bytes read from this memory --- 610 unchanged lines hidden (view full) --- 646system.physmem.avgWrQLen 14.75 # Average write queue length when enqueuing 647system.physmem.readRowHits 15419173 # Number of row buffer hits during reads 648system.physmem.writeRowHits 91146 # Number of row buffer hits during writes 649system.physmem.readRowHitRate 99.52 # Row buffer hit rate for reads 650system.physmem.writeRowHitRate 85.22 # Row buffer hit rate for writes 651system.physmem.avgGap 160458.16 # Average gap between requests 652system.physmem.pageHitRate 99.43 # Row buffer hit rate, read and write combined 653system.physmem.prechargeAllPercent 2.19 # Percentage of time for which DRAM has all the banks in precharge state |
654system.membus.throughput 54116538 # Throughput (bytes/s) 655system.membus.trans_dist::ReadReq 16546563 # Transaction distribution 656system.membus.trans_dist::ReadResp 16546563 # Transaction distribution 657system.membus.trans_dist::WriteReq 763368 # Transaction distribution 658system.membus.trans_dist::WriteResp 763368 # Transaction distribution 659system.membus.trans_dist::Writeback 57909 # Transaction distribution 660system.membus.trans_dist::UpgradeReq 4515 # Transaction distribution 661system.membus.trans_dist::UpgradeResp 4515 # Transaction distribution --- 253 unchanged lines hidden (view full) --- 915system.cpu.num_fp_register_writes 2780 # number of times the floating registers were written 916system.cpu.num_mem_refs 27393282 # number of memory refs 917system.cpu.num_load_insts 15659729 # Number of load instructions 918system.cpu.num_store_insts 11733553 # Number of store instructions 919system.cpu.num_idle_cycles 4581527140.608249 # Number of idle cycles 920system.cpu.num_busy_cycles 651545825.391751 # Number of busy cycles 921system.cpu.not_idle_fraction 0.124505 # Percentage of non-idle cycles 922system.cpu.idle_fraction 0.875495 # Percentage of idle cycles |
923system.cpu.Branches 10308279 # Number of branches fetched |
924system.cpu.kern.inst.arm 0 # number of arm instructions executed 925system.cpu.kern.inst.quiesce 83016 # number of quiesce instructions executed 926system.cpu.icache.tags.replacements 856260 # number of replacements 927system.cpu.icache.tags.tagsinuse 510.868407 # Cycle average of tags in use 928system.cpu.icache.tags.total_refs 60634641 # Total number of references to valid blocks. 929system.cpu.icache.tags.sampled_refs 856772 # Sample count of references to valid blocks. 930system.cpu.icache.tags.avg_refs 70.771035 # Average number of references to valid blocks. 931system.cpu.icache.tags.warmup_cycle 19982971250 # Cycle when the warmup percentage was hit. --- 540 unchanged lines hidden --- |