0a1
> warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
3a5,7
> warn: Existing EnergyCtrl, but no enabled DVFSHandler found.
> warn: Not doing anything for miscreg ACTLR
> warn: Not doing anything for write of miscreg ACTLR
7c11,12
< warn: The ccsidr register isn't implemented and always reads as 0.
---
> warn: instruction 'mcr dccmvau' unimplemented
> warn: instruction 'mcr icimvau' unimplemented
11,13c16,33
< warn: instruction 'mcr dccmvau' unimplemented
< warn: instruction 'mcr icimvau' unimplemented
< warn: LCD dual screen mode not supported
---
> warn: Tried to read RealView I/O at offset 0x60 that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist
> warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4]
> warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4]
> warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0]
> warn: Returning zero for read from miscreg pmcr
> warn: Ignoring write to miscreg pmcntenclr
> warn: Ignoring write to miscreg pmintenclr
> warn: Ignoring write to miscreg pmovsr
> warn: Ignoring write to miscreg pmcr