| config.ini (9265:8fe936e937bd) | config.ini (9449:56610ab73040) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem |
| 11children=bridge cf0 cpu intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver | 11children=bridge cf0 cpu intrctrl iobus iocache membus physmem realview terminal vncserver |
| 12atags_addr=256 | 12atags_addr=256 |
| 13boot_loader=/projects/pd/randd/dist/binaries/boot.arm | 13boot_loader=/gem5/dist/binaries/boot.arm |
| 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 | 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 |
| 15clock=1 | 15clock=1000 |
| 16dtb_filename= 17early_kernel_symbols=false | 16dtb_filename= 17early_kernel_symbols=false |
| 18enable_context_switch_stats_dump=false |
|
| 18flags_addr=268435504 19gic_cpu_addr=520093952 20init_param=0 | 19flags_addr=268435504 20gic_cpu_addr=520093952 21init_param=0 |
| 21kernel=/projects/pd/randd/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 | 22kernel=/gem5/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8 |
| 22load_addr_mask=268435455 23machine_type=RealView_PBX 24mem_mode=timing | 23load_addr_mask=268435455 24machine_type=RealView_PBX 25mem_mode=timing |
| 25memories=system.physmem system.realview.nvmem 26midr_regval=890224640 | 26mem_ranges=0:134217727 27memories=system.realview.nvmem system.physmem |
| 27multi_proc=true 28num_work_ids=16 29readfile=tests/halt.sh 30symbolfile= 31work_begin_ckpt_count=0 32work_begin_cpu_id_exit=-1 33work_begin_exit_count=0 34work_cpus_ckpt_count=0 35work_end_ckpt_count=0 36work_end_exit_count=0 37work_item_id=-1 38system_port=system.membus.slave[0] 39 40[system.bridge] 41type=Bridge | 28multi_proc=true 29num_work_ids=16 30readfile=tests/halt.sh 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.bridge] 42type=Bridge |
| 42clock=1 | 43clock=1000 |
| 43delay=50000 44ranges=268435456:520093695 1073741824:1610612735 45req_size=16 46resp_size=16 47master=system.iobus.slave[0] 48slave=system.membus.master[0] 49 50[system.cf0] --- 8 unchanged lines hidden (view full) --- 59children=child 60child=system.cf0.image.child 61image_file= 62read_only=false 63table_size=65536 64 65[system.cf0.image.child] 66type=RawDiskImage | 44delay=50000 45ranges=268435456:520093695 1073741824:1610612735 46req_size=16 47resp_size=16 48master=system.iobus.slave[0] 49slave=system.membus.master[0] 50 51[system.cf0] --- 8 unchanged lines hidden (view full) --- 60children=child 61child=system.cf0.image.child 62image_file= 63read_only=false 64table_size=65536 65 66[system.cf0.image.child] 67type=RawDiskImage |
| 67image_file=/projects/pd/randd/dist/disks/linux-arm-ael.img | 68image_file=/gem5/dist/disks/linux-arm-ael.img |
| 68read_only=true 69 70[system.cpu] 71type=TimingSimpleCPU | 69read_only=true 70 71[system.cpu] 72type=TimingSimpleCPU |
| 72children=dcache dtb icache interrupts itb tracer | 73children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer |
| 73checker=Null 74clock=500 75cpu_id=0 | 74checker=Null 75clock=500 76cpu_id=0 |
| 76defer_registration=false | |
| 77do_checkpoint_insts=true 78do_quiesce=true 79do_statistics_insts=true 80dtb=system.cpu.dtb 81function_trace=false 82function_trace_start=0 83interrupts=system.cpu.interrupts | 77do_checkpoint_insts=true 78do_quiesce=true 79do_statistics_insts=true 80dtb=system.cpu.dtb 81function_trace=false 82function_trace_start=0 83interrupts=system.cpu.interrupts |
| 84isa=system.cpu.isa |
|
| 84itb=system.cpu.itb 85max_insts_all_threads=0 86max_insts_any_thread=0 87max_loads_all_threads=0 88max_loads_any_thread=0 89numThreads=1 90profile=0 91progress_interval=0 | 85itb=system.cpu.itb 86max_insts_all_threads=0 87max_insts_any_thread=0 88max_loads_all_threads=0 89max_loads_any_thread=0 90numThreads=1 91profile=0 92progress_interval=0 |
| 93switched_out=false |
|
| 92system=system 93tracer=system.cpu.tracer 94workload= 95dcache_port=system.cpu.dcache.cpu_side 96icache_port=system.cpu.icache.cpu_side 97 98[system.cpu.dcache] 99type=BaseCache 100addr_ranges=0:18446744073709551615 101assoc=4 102block_size=64 | 94system=system 95tracer=system.cpu.tracer 96workload= 97dcache_port=system.cpu.dcache.cpu_side 98icache_port=system.cpu.icache.cpu_side 99 100[system.cpu.dcache] 101type=BaseCache 102addr_ranges=0:18446744073709551615 103assoc=4 104block_size=64 |
| 103clock=1 | 105clock=500 |
| 104forward_snoops=true | 106forward_snoops=true |
| 105hash_delay=1 106hit_latency=1000 | 107hit_latency=2 |
| 107is_top_level=true 108max_miss_count=0 109mshrs=4 110prefetch_on_access=false 111prefetcher=Null | 108is_top_level=true 109max_miss_count=0 110mshrs=4 111prefetch_on_access=false 112prefetcher=Null |
| 112prioritizeRequests=false 113repl=Null 114response_latency=1000 | 113response_latency=2 |
| 115size=32768 | 114size=32768 |
| 116subblock_size=0 | |
| 117system=system | 115system=system |
| 118tgts_per_mshr=8 119trace_addr=0 | 116tgts_per_mshr=20 |
| 120two_queue=false 121write_buffers=8 122cpu_side=system.cpu.dcache_port | 117two_queue=false 118write_buffers=8 119cpu_side=system.cpu.dcache_port |
| 123mem_side=system.toL2Bus.slave[1] | 120mem_side=system.cpu.toL2Bus.slave[1] |
| 124 125[system.cpu.dtb] 126type=ArmTLB 127children=walker 128size=64 129walker=system.cpu.dtb.walker 130 131[system.cpu.dtb.walker] 132type=ArmTableWalker | 121 122[system.cpu.dtb] 123type=ArmTLB 124children=walker 125size=64 126walker=system.cpu.dtb.walker 127 128[system.cpu.dtb.walker] 129type=ArmTableWalker |
| 133clock=1 | 130clock=500 |
| 134num_squash_per_cycle=2 135sys=system | 131num_squash_per_cycle=2 132sys=system |
| 136port=system.toL2Bus.slave[3] | 133port=system.cpu.toL2Bus.slave[3] |
| 137 138[system.cpu.icache] 139type=BaseCache 140addr_ranges=0:18446744073709551615 141assoc=1 142block_size=64 | 134 135[system.cpu.icache] 136type=BaseCache 137addr_ranges=0:18446744073709551615 138assoc=1 139block_size=64 |
| 143clock=1 | 140clock=500 |
| 144forward_snoops=true | 141forward_snoops=true |
| 145hash_delay=1 146hit_latency=1000 | 142hit_latency=2 |
| 147is_top_level=true 148max_miss_count=0 149mshrs=4 150prefetch_on_access=false 151prefetcher=Null | 143is_top_level=true 144max_miss_count=0 145mshrs=4 146prefetch_on_access=false 147prefetcher=Null |
| 152prioritizeRequests=false 153repl=Null 154response_latency=1000 | 148response_latency=2 |
| 155size=32768 | 149size=32768 |
| 156subblock_size=0 | |
| 157system=system | 150system=system |
| 158tgts_per_mshr=8 159trace_addr=0 | 151tgts_per_mshr=20 |
| 160two_queue=false 161write_buffers=8 162cpu_side=system.cpu.icache_port | 152two_queue=false 153write_buffers=8 154cpu_side=system.cpu.icache_port |
| 163mem_side=system.toL2Bus.slave[0] | 155mem_side=system.cpu.toL2Bus.slave[0] |
| 164 165[system.cpu.interrupts] 166type=ArmInterrupts 167 | 156 157[system.cpu.interrupts] 158type=ArmInterrupts 159 |
| 160[system.cpu.isa] 161type=ArmISA 162fpsid=1090793632 163id_isar0=34607377 164id_isar1=34677009 165id_isar2=555950401 166id_isar3=17899825 167id_isar4=268501314 168id_isar5=0 169id_mmfr0=3 170id_mmfr1=0 171id_mmfr2=19070976 172id_mmfr3=4027589137 173id_pfr0=49 174id_pfr1=1 175midr=890224640 176 |
|
| 168[system.cpu.itb] 169type=ArmTLB 170children=walker 171size=64 172walker=system.cpu.itb.walker 173 174[system.cpu.itb.walker] 175type=ArmTableWalker | 177[system.cpu.itb] 178type=ArmTLB 179children=walker 180size=64 181walker=system.cpu.itb.walker 182 183[system.cpu.itb.walker] 184type=ArmTableWalker |
| 176clock=1 | 185clock=500 |
| 177num_squash_per_cycle=2 178sys=system | 186num_squash_per_cycle=2 187sys=system |
| 179port=system.toL2Bus.slave[2] | 188port=system.cpu.toL2Bus.slave[2] |
| 180 | 189 |
| 190[system.cpu.l2cache] 191type=BaseCache 192addr_ranges=0:18446744073709551615 193assoc=8 194block_size=64 195clock=500 196forward_snoops=true 197hit_latency=20 198is_top_level=false 199max_miss_count=0 200mshrs=20 201prefetch_on_access=false 202prefetcher=Null 203response_latency=20 204size=4194304 205system=system 206tgts_per_mshr=12 207two_queue=false 208write_buffers=8 209cpu_side=system.cpu.toL2Bus.master[0] 210mem_side=system.membus.slave[1] 211 212[system.cpu.toL2Bus] 213type=CoherentBus 214block_size=64 215clock=500 216header_cycles=1 217use_default_range=false 218width=32 219master=system.cpu.l2cache.cpu_side 220slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 221 |
|
| 181[system.cpu.tracer] 182type=ExeTracer 183 184[system.intrctrl] 185type=IntrControl 186sys=system 187 188[system.iobus] 189type=NoncoherentBus 190block_size=64 191clock=1000 192header_cycles=1 193use_default_range=false 194width=8 195master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 196slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 197 198[system.iocache] 199type=BaseCache | 222[system.cpu.tracer] 223type=ExeTracer 224 225[system.intrctrl] 226type=IntrControl 227sys=system 228 229[system.iobus] 230type=NoncoherentBus 231block_size=64 232clock=1000 233header_cycles=1 234use_default_range=false 235width=8 236master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 237slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 238 239[system.iocache] 240type=BaseCache |
| 200addr_ranges=0:268435455 | 241addr_ranges=0:134217727 |
| 201assoc=8 202block_size=64 | 242assoc=8 243block_size=64 |
| 203clock=1 | 244clock=1000 |
| 204forward_snoops=false | 245forward_snoops=false |
| 205hash_delay=1 206hit_latency=50000 207is_top_level=false | 246hit_latency=50 247is_top_level=true |
| 208max_miss_count=0 209mshrs=20 210prefetch_on_access=false 211prefetcher=Null | 248max_miss_count=0 249mshrs=20 250prefetch_on_access=false 251prefetcher=Null |
| 212prioritizeRequests=false 213repl=Null 214response_latency=50000 | 252response_latency=50 |
| 215size=1024 | 253size=1024 |
| 216subblock_size=0 | |
| 217system=system 218tgts_per_mshr=12 | 254system=system 255tgts_per_mshr=12 |
| 219trace_addr=0 | |
| 220two_queue=false 221write_buffers=8 222cpu_side=system.iobus.master[25] | 256two_queue=false 257write_buffers=8 258cpu_side=system.iobus.master[25] |
| 223mem_side=system.membus.slave[1] 224 225[system.l2c] 226type=BaseCache 227addr_ranges=0:18446744073709551615 228assoc=8 229block_size=64 230clock=1 231forward_snoops=true 232hash_delay=1 233hit_latency=10000 234is_top_level=false 235max_miss_count=0 236mshrs=92 237prefetch_on_access=false 238prefetcher=Null 239prioritizeRequests=false 240repl=Null 241response_latency=10000 242size=4194304 243subblock_size=0 244system=system 245tgts_per_mshr=16 246trace_addr=0 247two_queue=false 248write_buffers=8 249cpu_side=system.toL2Bus.master[0] | |
| 250mem_side=system.membus.slave[2] 251 252[system.membus] 253type=CoherentBus 254children=badaddr_responder 255block_size=64 256clock=1000 257header_cycles=1 258use_default_range=false 259width=8 260default=system.membus.badaddr_responder.pio 261master=system.bridge.slave system.realview.nvmem.port system.physmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio | 259mem_side=system.membus.slave[2] 260 261[system.membus] 262type=CoherentBus 263children=badaddr_responder 264block_size=64 265clock=1000 266header_cycles=1 267use_default_range=false 268width=8 269default=system.membus.badaddr_responder.pio 270master=system.bridge.slave system.realview.nvmem.port system.physmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio |
| 262slave=system.system_port system.iocache.mem_side system.l2c.mem_side | 271slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side |
| 263 264[system.membus.badaddr_responder] 265type=IsaFake | 272 273[system.membus.badaddr_responder] 274type=IsaFake |
| 266clock=1 | 275clock=1000 |
| 267fake_mem=false 268pio_addr=0 269pio_latency=100000 270pio_size=8 271ret_bad_addr=true 272ret_data16=65535 273ret_data32=4294967295 274ret_data64=18446744073709551615 275ret_data8=255 276system=system 277update_data=false 278warn_access=warn 279pio=system.membus.default 280 281[system.physmem] | 276fake_mem=false 277pio_addr=0 278pio_latency=100000 279pio_size=8 280ret_bad_addr=true 281ret_data16=65535 282ret_data32=4294967295 283ret_data64=18446744073709551615 284ret_data8=255 285system=system 286update_data=false 287warn_access=warn 288pio=system.membus.default 289 290[system.physmem] |
| 282type=SimpleMemory 283bandwidth=73.000000 284clock=1 | 291type=SimpleDRAM 292addr_mapping=openmap 293banks_per_rank=8 294clock=1000 |
| 285conf_table_reported=true 286in_addr_map=true | 295conf_table_reported=true 296in_addr_map=true |
| 287latency=30000 288latency_var=0 | 297lines_per_rowbuffer=64 298mem_sched_policy=fcfs |
| 289null=false | 299null=false |
| 300page_policy=open |
|
| 290range=0:134217727 | 301range=0:134217727 |
| 302ranks_per_channel=2 303read_buffer_size=32 304tBURST=4000 305tCL=14000 306tRCD=14000 307tREFI=7800000 308tRFC=300000 309tRP=14000 310tWTR=1000 311write_buffer_size=32 312write_thresh_perc=70 |
|
| 291zero=false 292port=system.membus.master[2] 293 294[system.realview] 295type=RealView 296children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 297intrctrl=system.intrctrl 298max_mem_size=268435456 299mem_start_addr=0 300pci_cfg_base=0 301system=system 302 303[system.realview.a9scu] 304type=A9SCU | 313zero=false 314port=system.membus.master[2] 315 316[system.realview] 317type=RealView 318children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 319intrctrl=system.intrctrl 320max_mem_size=268435456 321mem_start_addr=0 322pci_cfg_base=0 323system=system 324 325[system.realview.a9scu] 326type=A9SCU |
| 305clock=1 | 327clock=1000 |
| 306pio_addr=520093696 307pio_latency=100000 308system=system 309pio=system.membus.master[5] 310 311[system.realview.aaci_fake] 312type=AmbaFake 313amba_id=0 | 328pio_addr=520093696 329pio_latency=100000 330system=system 331pio=system.membus.master[5] 332 333[system.realview.aaci_fake] 334type=AmbaFake 335amba_id=0 |
| 314clock=1 | 336clock=1000 |
| 315ignore_access=false 316pio_addr=268451840 317pio_latency=100000 318system=system 319pio=system.iobus.master[21] 320 321[system.realview.cf_ctrl] 322type=IdeController --- 30 unchanged lines hidden (view full) --- 353MinimumGrant=0 354ProgIF=133 355Revision=0 356Status=640 357SubClassCode=1 358SubsystemID=0 359SubsystemVendorID=0 360VendorID=32902 | 337ignore_access=false 338pio_addr=268451840 339pio_latency=100000 340system=system 341pio=system.iobus.master[21] 342 343[system.realview.cf_ctrl] 344type=IdeController --- 30 unchanged lines hidden (view full) --- 375MinimumGrant=0 376ProgIF=133 377Revision=0 378Status=640 379SubClassCode=1 380SubsystemID=0 381SubsystemVendorID=0 382VendorID=32902 |
| 361clock=1 | 383clock=1000 |
| 362config_latency=20000 363ctrl_offset=2 364disks=system.cf0 365io_shift=1 366pci_bus=2 367pci_dev=7 368pci_func=0 369pio_latency=30000 370platform=system.realview 371system=system 372config=system.iobus.master[8] 373dma=system.iobus.slave[2] 374pio=system.iobus.master[7] 375 376[system.realview.clcd] 377type=Pl111 378amba_id=1315089 | 384config_latency=20000 385ctrl_offset=2 386disks=system.cf0 387io_shift=1 388pci_bus=2 389pci_dev=7 390pci_func=0 391pio_latency=30000 392platform=system.realview 393system=system 394config=system.iobus.master[8] 395dma=system.iobus.slave[2] 396pio=system.iobus.master[7] 397 398[system.realview.clcd] 399type=Pl111 400amba_id=1315089 |
| 379clock=41667 | 401clock=1000 |
| 380gic=system.realview.gic 381int_num=55 382pio_addr=268566528 383pio_latency=10000 | 402gic=system.realview.gic 403int_num=55 404pio_addr=268566528 405pio_latency=10000 |
| 406pixel_clock=41667 |
|
| 384system=system 385vnc=system.vncserver 386dma=system.iobus.slave[1] 387pio=system.iobus.master[4] 388 389[system.realview.dmac_fake] 390type=AmbaFake 391amba_id=0 | 407system=system 408vnc=system.vncserver 409dma=system.iobus.slave[1] 410pio=system.iobus.master[4] 411 412[system.realview.dmac_fake] 413type=AmbaFake 414amba_id=0 |
| 392clock=1 | 415clock=1000 |
| 393ignore_access=false 394pio_addr=268632064 395pio_latency=100000 396system=system 397pio=system.iobus.master[9] 398 399[system.realview.flash_fake] 400type=IsaFake | 416ignore_access=false 417pio_addr=268632064 418pio_latency=100000 419system=system 420pio=system.iobus.master[9] 421 422[system.realview.flash_fake] 423type=IsaFake |
| 401clock=1 | 424clock=1000 |
| 402fake_mem=true 403pio_addr=1073741824 404pio_latency=100000 405pio_size=536870912 406ret_bad_addr=false 407ret_data16=65535 408ret_data32=4294967295 409ret_data64=18446744073709551615 410ret_data8=255 411system=system 412update_data=false 413warn_access= 414pio=system.iobus.master[24] 415 416[system.realview.gic] 417type=Gic | 425fake_mem=true 426pio_addr=1073741824 427pio_latency=100000 428pio_size=536870912 429ret_bad_addr=false 430ret_data16=65535 431ret_data32=4294967295 432ret_data64=18446744073709551615 433ret_data8=255 434system=system 435update_data=false 436warn_access= 437pio=system.iobus.master[24] 438 439[system.realview.gic] 440type=Gic |
| 418clock=1 | 441clock=1000 |
| 419cpu_addr=520093952 420cpu_pio_delay=10000 421dist_addr=520097792 422dist_pio_delay=10000 423int_latency=10000 424it_lines=128 425platform=system.realview 426system=system 427pio=system.membus.master[3] 428 429[system.realview.gpio0_fake] 430type=AmbaFake 431amba_id=0 | 442cpu_addr=520093952 443cpu_pio_delay=10000 444dist_addr=520097792 445dist_pio_delay=10000 446int_latency=10000 447it_lines=128 448platform=system.realview 449system=system 450pio=system.membus.master[3] 451 452[system.realview.gpio0_fake] 453type=AmbaFake 454amba_id=0 |
| 432clock=1 | 455clock=1000 |
| 433ignore_access=false 434pio_addr=268513280 435pio_latency=100000 436system=system 437pio=system.iobus.master[16] 438 439[system.realview.gpio1_fake] 440type=AmbaFake 441amba_id=0 | 456ignore_access=false 457pio_addr=268513280 458pio_latency=100000 459system=system 460pio=system.iobus.master[16] 461 462[system.realview.gpio1_fake] 463type=AmbaFake 464amba_id=0 |
| 442clock=1 | 465clock=1000 |
| 443ignore_access=false 444pio_addr=268517376 445pio_latency=100000 446system=system 447pio=system.iobus.master[17] 448 449[system.realview.gpio2_fake] 450type=AmbaFake 451amba_id=0 | 466ignore_access=false 467pio_addr=268517376 468pio_latency=100000 469system=system 470pio=system.iobus.master[17] 471 472[system.realview.gpio2_fake] 473type=AmbaFake 474amba_id=0 |
| 452clock=1 | 475clock=1000 |
| 453ignore_access=false 454pio_addr=268521472 455pio_latency=100000 456system=system 457pio=system.iobus.master[18] 458 459[system.realview.kmi0] 460type=Pl050 461amba_id=1314896 | 476ignore_access=false 477pio_addr=268521472 478pio_latency=100000 479system=system 480pio=system.iobus.master[18] 481 482[system.realview.kmi0] 483type=Pl050 484amba_id=1314896 |
| 462clock=1 | 485clock=1000 |
| 463gic=system.realview.gic 464int_delay=1000000 465int_num=52 466is_mouse=false 467pio_addr=268460032 468pio_latency=100000 469system=system 470vnc=system.vncserver 471pio=system.iobus.master[5] 472 473[system.realview.kmi1] 474type=Pl050 475amba_id=1314896 | 486gic=system.realview.gic 487int_delay=1000000 488int_num=52 489is_mouse=false 490pio_addr=268460032 491pio_latency=100000 492system=system 493vnc=system.vncserver 494pio=system.iobus.master[5] 495 496[system.realview.kmi1] 497type=Pl050 498amba_id=1314896 |
| 476clock=1 | 499clock=1000 |
| 477gic=system.realview.gic 478int_delay=1000000 479int_num=53 480is_mouse=true 481pio_addr=268464128 482pio_latency=100000 483system=system 484vnc=system.vncserver 485pio=system.iobus.master[6] 486 487[system.realview.l2x0_fake] 488type=IsaFake | 500gic=system.realview.gic 501int_delay=1000000 502int_num=53 503is_mouse=true 504pio_addr=268464128 505pio_latency=100000 506system=system 507vnc=system.vncserver 508pio=system.iobus.master[6] 509 510[system.realview.l2x0_fake] 511type=IsaFake |
| 489clock=1 | 512clock=1000 |
| 490fake_mem=false 491pio_addr=520101888 492pio_latency=100000 493pio_size=4095 494ret_bad_addr=false 495ret_data16=65535 496ret_data32=4294967295 497ret_data64=18446744073709551615 --- 12 unchanged lines hidden (view full) --- 510pio_addr=520095232 511pio_latency=100000 512system=system 513pio=system.membus.master[6] 514 515[system.realview.mmc_fake] 516type=AmbaFake 517amba_id=0 | 513fake_mem=false 514pio_addr=520101888 515pio_latency=100000 516pio_size=4095 517ret_bad_addr=false 518ret_data16=65535 519ret_data32=4294967295 520ret_data64=18446744073709551615 --- 12 unchanged lines hidden (view full) --- 533pio_addr=520095232 534pio_latency=100000 535system=system 536pio=system.membus.master[6] 537 538[system.realview.mmc_fake] 539type=AmbaFake 540amba_id=0 |
| 518clock=1 | 541clock=1000 |
| 519ignore_access=false 520pio_addr=268455936 521pio_latency=100000 522system=system 523pio=system.iobus.master[22] 524 525[system.realview.nvmem] 526type=SimpleMemory 527bandwidth=73.000000 | 542ignore_access=false 543pio_addr=268455936 544pio_latency=100000 545system=system 546pio=system.iobus.master[22] 547 548[system.realview.nvmem] 549type=SimpleMemory 550bandwidth=73.000000 |
| 528clock=1 | 551clock=1000 |
| 529conf_table_reported=false 530in_addr_map=true 531latency=30000 532latency_var=0 533null=false 534range=2147483648:2214592511 535zero=true 536port=system.membus.master[1] 537 538[system.realview.realview_io] 539type=RealViewCtrl | 552conf_table_reported=false 553in_addr_map=true 554latency=30000 555latency_var=0 556null=false 557range=2147483648:2214592511 558zero=true 559port=system.membus.master[1] 560 561[system.realview.realview_io] 562type=RealViewCtrl |
| 540clock=1 | 563clock=1000 |
| 541idreg=0 542pio_addr=268435456 543pio_latency=100000 544proc_id0=201326592 545proc_id1=201327138 546system=system 547pio=system.iobus.master[1] 548 549[system.realview.rtc] 550type=PL031 551amba_id=3412017 | 564idreg=0 565pio_addr=268435456 566pio_latency=100000 567proc_id0=201326592 568proc_id1=201327138 569system=system 570pio=system.iobus.master[1] 571 572[system.realview.rtc] 573type=PL031 574amba_id=3412017 |
| 552clock=1 | 575clock=1000 |
| 553gic=system.realview.gic 554int_delay=100000 555int_num=42 556pio_addr=268529664 557pio_latency=100000 558system=system 559time=Thu Jan 1 00:00:00 2009 560pio=system.iobus.master[23] 561 562[system.realview.sci_fake] 563type=AmbaFake 564amba_id=0 | 576gic=system.realview.gic 577int_delay=100000 578int_num=42 579pio_addr=268529664 580pio_latency=100000 581system=system 582time=Thu Jan 1 00:00:00 2009 583pio=system.iobus.master[23] 584 585[system.realview.sci_fake] 586type=AmbaFake 587amba_id=0 |
| 565clock=1 | 588clock=1000 |
| 566ignore_access=false 567pio_addr=268492800 568pio_latency=100000 569system=system 570pio=system.iobus.master[20] 571 572[system.realview.smc_fake] 573type=AmbaFake 574amba_id=0 | 589ignore_access=false 590pio_addr=268492800 591pio_latency=100000 592system=system 593pio=system.iobus.master[20] 594 595[system.realview.smc_fake] 596type=AmbaFake 597amba_id=0 |
| 575clock=1 | 598clock=1000 |
| 576ignore_access=false 577pio_addr=269357056 578pio_latency=100000 579system=system 580pio=system.iobus.master[13] 581 582[system.realview.sp810_fake] 583type=AmbaFake 584amba_id=0 | 599ignore_access=false 600pio_addr=269357056 601pio_latency=100000 602system=system 603pio=system.iobus.master[13] 604 605[system.realview.sp810_fake] 606type=AmbaFake 607amba_id=0 |
| 585clock=1 | 608clock=1000 |
| 586ignore_access=true 587pio_addr=268439552 588pio_latency=100000 589system=system 590pio=system.iobus.master[14] 591 592[system.realview.ssp_fake] 593type=AmbaFake 594amba_id=0 | 609ignore_access=true 610pio_addr=268439552 611pio_latency=100000 612system=system 613pio=system.iobus.master[14] 614 615[system.realview.ssp_fake] 616type=AmbaFake 617amba_id=0 |
| 595clock=1 | 618clock=1000 |
| 596ignore_access=false 597pio_addr=268488704 598pio_latency=100000 599system=system 600pio=system.iobus.master[19] 601 602[system.realview.timer0] 603type=Sp804 604amba_id=1316868 | 619ignore_access=false 620pio_addr=268488704 621pio_latency=100000 622system=system 623pio=system.iobus.master[19] 624 625[system.realview.timer0] 626type=Sp804 627amba_id=1316868 |
| 605clock=1 | 628clock=1000 |
| 606clock0=1000000 607clock1=1000000 608gic=system.realview.gic 609int_num0=36 610int_num1=36 611pio_addr=268505088 612pio_latency=100000 613system=system 614pio=system.iobus.master[2] 615 616[system.realview.timer1] 617type=Sp804 618amba_id=1316868 | 629clock0=1000000 630clock1=1000000 631gic=system.realview.gic 632int_num0=36 633int_num1=36 634pio_addr=268505088 635pio_latency=100000 636system=system 637pio=system.iobus.master[2] 638 639[system.realview.timer1] 640type=Sp804 641amba_id=1316868 |
| 619clock=1 | 642clock=1000 |
| 620clock0=1000000 621clock1=1000000 622gic=system.realview.gic 623int_num0=37 624int_num1=37 625pio_addr=268509184 626pio_latency=100000 627system=system 628pio=system.iobus.master[3] 629 630[system.realview.uart] 631type=Pl011 | 643clock0=1000000 644clock1=1000000 645gic=system.realview.gic 646int_num0=37 647int_num1=37 648pio_addr=268509184 649pio_latency=100000 650system=system 651pio=system.iobus.master[3] 652 653[system.realview.uart] 654type=Pl011 |
| 632clock=1 | 655clock=1000 |
| 633end_on_eot=false 634gic=system.realview.gic 635int_delay=100000 636int_num=44 637pio_addr=268472320 638pio_latency=100000 639platform=system.realview 640system=system 641terminal=system.terminal 642pio=system.iobus.master[0] 643 644[system.realview.uart1_fake] 645type=AmbaFake 646amba_id=0 | 656end_on_eot=false 657gic=system.realview.gic 658int_delay=100000 659int_num=44 660pio_addr=268472320 661pio_latency=100000 662platform=system.realview 663system=system 664terminal=system.terminal 665pio=system.iobus.master[0] 666 667[system.realview.uart1_fake] 668type=AmbaFake 669amba_id=0 |
| 647clock=1 | 670clock=1000 |
| 648ignore_access=false 649pio_addr=268476416 650pio_latency=100000 651system=system 652pio=system.iobus.master[10] 653 654[system.realview.uart2_fake] 655type=AmbaFake 656amba_id=0 | 671ignore_access=false 672pio_addr=268476416 673pio_latency=100000 674system=system 675pio=system.iobus.master[10] 676 677[system.realview.uart2_fake] 678type=AmbaFake 679amba_id=0 |
| 657clock=1 | 680clock=1000 |
| 658ignore_access=false 659pio_addr=268480512 660pio_latency=100000 661system=system 662pio=system.iobus.master[11] 663 664[system.realview.uart3_fake] 665type=AmbaFake 666amba_id=0 | 681ignore_access=false 682pio_addr=268480512 683pio_latency=100000 684system=system 685pio=system.iobus.master[11] 686 687[system.realview.uart3_fake] 688type=AmbaFake 689amba_id=0 |
| 667clock=1 | 690clock=1000 |
| 668ignore_access=false 669pio_addr=268484608 670pio_latency=100000 671system=system 672pio=system.iobus.master[12] 673 674[system.realview.watchdog_fake] 675type=AmbaFake 676amba_id=0 | 691ignore_access=false 692pio_addr=268484608 693pio_latency=100000 694system=system 695pio=system.iobus.master[12] 696 697[system.realview.watchdog_fake] 698type=AmbaFake 699amba_id=0 |
| 677clock=1 | 700clock=1000 |
| 678ignore_access=false 679pio_addr=268500992 680pio_latency=100000 681system=system 682pio=system.iobus.master[15] 683 684[system.terminal] 685type=Terminal 686intr_control=system.intrctrl 687number=0 688output=true 689port=3456 690 | 701ignore_access=false 702pio_addr=268500992 703pio_latency=100000 704system=system 705pio=system.iobus.master[15] 706 707[system.terminal] 708type=Terminal 709intr_control=system.intrctrl 710number=0 711output=true 712port=3456 713 |
| 691[system.toL2Bus] 692type=CoherentBus 693block_size=64 694clock=1000 695header_cycles=1 696use_default_range=false 697width=8 698master=system.l2c.cpu_side 699slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port 700 | |
| 701[system.vncserver] 702type=VncServer 703frame_capture=false 704number=0 705port=5900 706 | 714[system.vncserver] 715type=VncServer 716frame_capture=false 717number=0 718port=5900 719 |