| config.ini (11680:b4d943429dc6) | config.ini (11731:c473ca7cc650) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=134217728 | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu cpu_clk_domain dvfs_handler intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain 14atags_addr=134217728 |
| 15boot_loader=/arm/projectscratch/randd/systems/dist/binaries/boot_emm.arm | 15boot_loader=/dist/m5/system/binaries/boot_emm.arm |
| 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED | 16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED |
| 20dtb_filename=/arm/projectscratch/randd/systems/dist/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb | 20dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.1cpu.dtb |
| 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 | 21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 |
| 33kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux.aarch32.ll_20131205.0-gem5 | 33kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5 |
| 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null | 34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null |
| 52readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh | 52readfile=/z/powerjg/gem5-upstream/tests/testing/../halt.sh |
| 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 --- 33 unchanged lines hidden (view full) --- 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 | 53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 --- 33 unchanged lines hidden (view full) --- 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 |
| 102image_file=/arm/projectscratch/randd/systems/dist/disks/linux-aarch32-ael.img | 102image_file=/dist/m5/system/disks/linux-aarch32-ael.img |
| 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 --- 41 unchanged lines hidden (view full) --- 152 153[system.cpu.dcache] 154type=Cache 155children=tags 156addr_ranges=0:18446744073709551615:0:0:0:0 157assoc=4 158clk_domain=system.cpu_clk_domain 159clusivity=mostly_incl | 103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 --- 41 unchanged lines hidden (view full) --- 152 153[system.cpu.dcache] 154type=Cache 155children=tags 156addr_ranges=0:18446744073709551615:0:0:0:0 157assoc=4 158clk_domain=system.cpu_clk_domain 159clusivity=mostly_incl |
| 160data_latency=2 |
|
| 160default_p_state=UNDEFINED 161demand_mshr_reserve=1 162eventq_index=0 | 161default_p_state=UNDEFINED 162demand_mshr_reserve=1 163eventq_index=0 |
| 163hit_latency=2 | |
| 164is_read_only=false 165max_miss_count=0 166mshrs=4 167p_state_clk_gate_bins=20 168p_state_clk_gate_max=1000000000000 169p_state_clk_gate_min=1000 170power_model=Null 171prefetch_on_access=false 172prefetcher=Null 173response_latency=2 174sequential_access=false 175size=32768 176system=system | 164is_read_only=false 165max_miss_count=0 166mshrs=4 167p_state_clk_gate_bins=20 168p_state_clk_gate_max=1000000000000 169p_state_clk_gate_min=1000 170power_model=Null 171prefetch_on_access=false 172prefetcher=Null 173response_latency=2 174sequential_access=false 175size=32768 176system=system |
| 177tag_latency=2 |
|
| 177tags=system.cpu.dcache.tags 178tgts_per_mshr=20 179write_buffers=8 180writeback_clean=false 181cpu_side=system.cpu.dcache_port 182mem_side=system.cpu.toL2Bus.slave[1] 183 184[system.cpu.dcache.tags] 185type=LRU 186assoc=4 187block_size=64 188clk_domain=system.cpu_clk_domain | 178tags=system.cpu.dcache.tags 179tgts_per_mshr=20 180write_buffers=8 181writeback_clean=false 182cpu_side=system.cpu.dcache_port 183mem_side=system.cpu.toL2Bus.slave[1] 184 185[system.cpu.dcache.tags] 186type=LRU 187assoc=4 188block_size=64 189clk_domain=system.cpu_clk_domain |
| 190data_latency=2 |
|
| 189default_p_state=UNDEFINED 190eventq_index=0 | 191default_p_state=UNDEFINED 192eventq_index=0 |
| 191hit_latency=2 | |
| 192p_state_clk_gate_bins=20 193p_state_clk_gate_max=1000000000000 194p_state_clk_gate_min=1000 195power_model=Null 196sequential_access=false 197size=32768 | 193p_state_clk_gate_bins=20 194p_state_clk_gate_max=1000000000000 195p_state_clk_gate_min=1000 196power_model=Null 197sequential_access=false 198size=32768 |
| 199tag_latency=2 |
|
| 198 199[system.cpu.dstage2_mmu] 200type=ArmStage2MMU 201children=stage2_tlb 202eventq_index=0 203stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 204sys=system 205tlb=system.cpu.dtb --- 43 unchanged lines hidden (view full) --- 249 250[system.cpu.icache] 251type=Cache 252children=tags 253addr_ranges=0:18446744073709551615:0:0:0:0 254assoc=1 255clk_domain=system.cpu_clk_domain 256clusivity=mostly_incl | 200 201[system.cpu.dstage2_mmu] 202type=ArmStage2MMU 203children=stage2_tlb 204eventq_index=0 205stage2_tlb=system.cpu.dstage2_mmu.stage2_tlb 206sys=system 207tlb=system.cpu.dtb --- 43 unchanged lines hidden (view full) --- 251 252[system.cpu.icache] 253type=Cache 254children=tags 255addr_ranges=0:18446744073709551615:0:0:0:0 256assoc=1 257clk_domain=system.cpu_clk_domain 258clusivity=mostly_incl |
| 259data_latency=2 |
|
| 257default_p_state=UNDEFINED 258demand_mshr_reserve=1 259eventq_index=0 | 260default_p_state=UNDEFINED 261demand_mshr_reserve=1 262eventq_index=0 |
| 260hit_latency=2 | |
| 261is_read_only=true 262max_miss_count=0 263mshrs=4 264p_state_clk_gate_bins=20 265p_state_clk_gate_max=1000000000000 266p_state_clk_gate_min=1000 267power_model=Null 268prefetch_on_access=false 269prefetcher=Null 270response_latency=2 271sequential_access=false 272size=32768 273system=system | 263is_read_only=true 264max_miss_count=0 265mshrs=4 266p_state_clk_gate_bins=20 267p_state_clk_gate_max=1000000000000 268p_state_clk_gate_min=1000 269power_model=Null 270prefetch_on_access=false 271prefetcher=Null 272response_latency=2 273sequential_access=false 274size=32768 275system=system |
| 276tag_latency=2 |
|
| 274tags=system.cpu.icache.tags 275tgts_per_mshr=20 276write_buffers=8 277writeback_clean=true 278cpu_side=system.cpu.icache_port 279mem_side=system.cpu.toL2Bus.slave[0] 280 281[system.cpu.icache.tags] 282type=LRU 283assoc=1 284block_size=64 285clk_domain=system.cpu_clk_domain | 277tags=system.cpu.icache.tags 278tgts_per_mshr=20 279write_buffers=8 280writeback_clean=true 281cpu_side=system.cpu.icache_port 282mem_side=system.cpu.toL2Bus.slave[0] 283 284[system.cpu.icache.tags] 285type=LRU 286assoc=1 287block_size=64 288clk_domain=system.cpu_clk_domain |
| 289data_latency=2 |
|
| 286default_p_state=UNDEFINED 287eventq_index=0 | 290default_p_state=UNDEFINED 291eventq_index=0 |
| 288hit_latency=2 | |
| 289p_state_clk_gate_bins=20 290p_state_clk_gate_max=1000000000000 291p_state_clk_gate_min=1000 292power_model=Null 293sequential_access=false 294size=32768 | 292p_state_clk_gate_bins=20 293p_state_clk_gate_max=1000000000000 294p_state_clk_gate_min=1000 295power_model=Null 296sequential_access=false 297size=32768 |
| 298tag_latency=2 |
|
| 295 296[system.cpu.interrupts] 297type=ArmInterrupts 298eventq_index=0 299 300[system.cpu.isa] 301type=ArmISA 302decoderFlavour=Generic --- 78 unchanged lines hidden (view full) --- 381 382[system.cpu.l2cache] 383type=Cache 384children=tags 385addr_ranges=0:18446744073709551615:0:0:0:0 386assoc=8 387clk_domain=system.cpu_clk_domain 388clusivity=mostly_incl | 299 300[system.cpu.interrupts] 301type=ArmInterrupts 302eventq_index=0 303 304[system.cpu.isa] 305type=ArmISA 306decoderFlavour=Generic --- 78 unchanged lines hidden (view full) --- 385 386[system.cpu.l2cache] 387type=Cache 388children=tags 389addr_ranges=0:18446744073709551615:0:0:0:0 390assoc=8 391clk_domain=system.cpu_clk_domain 392clusivity=mostly_incl |
| 393data_latency=20 |
|
| 389default_p_state=UNDEFINED 390demand_mshr_reserve=1 391eventq_index=0 | 394default_p_state=UNDEFINED 395demand_mshr_reserve=1 396eventq_index=0 |
| 392hit_latency=20 | |
| 393is_read_only=false 394max_miss_count=0 395mshrs=20 396p_state_clk_gate_bins=20 397p_state_clk_gate_max=1000000000000 398p_state_clk_gate_min=1000 399power_model=Null 400prefetch_on_access=false 401prefetcher=Null 402response_latency=20 403sequential_access=false 404size=4194304 405system=system | 397is_read_only=false 398max_miss_count=0 399mshrs=20 400p_state_clk_gate_bins=20 401p_state_clk_gate_max=1000000000000 402p_state_clk_gate_min=1000 403power_model=Null 404prefetch_on_access=false 405prefetcher=Null 406response_latency=20 407sequential_access=false 408size=4194304 409system=system |
| 410tag_latency=20 |
|
| 406tags=system.cpu.l2cache.tags 407tgts_per_mshr=12 408write_buffers=8 409writeback_clean=false 410cpu_side=system.cpu.toL2Bus.master[0] 411mem_side=system.membus.slave[2] 412 413[system.cpu.l2cache.tags] 414type=LRU 415assoc=8 416block_size=64 417clk_domain=system.cpu_clk_domain | 411tags=system.cpu.l2cache.tags 412tgts_per_mshr=12 413write_buffers=8 414writeback_clean=false 415cpu_side=system.cpu.toL2Bus.master[0] 416mem_side=system.membus.slave[2] 417 418[system.cpu.l2cache.tags] 419type=LRU 420assoc=8 421block_size=64 422clk_domain=system.cpu_clk_domain |
| 423data_latency=20 |
|
| 418default_p_state=UNDEFINED 419eventq_index=0 | 424default_p_state=UNDEFINED 425eventq_index=0 |
| 420hit_latency=20 | |
| 421p_state_clk_gate_bins=20 422p_state_clk_gate_max=1000000000000 423p_state_clk_gate_min=1000 424power_model=Null 425sequential_access=false 426size=4194304 | 426p_state_clk_gate_bins=20 427p_state_clk_gate_max=1000000000000 428p_state_clk_gate_min=1000 429power_model=Null 430sequential_access=false 431size=4194304 |
| 432tag_latency=20 |
|
| 427 428[system.cpu.toL2Bus] 429type=CoherentXBar 430children=snoop_filter 431clk_domain=system.cpu_clk_domain 432default_p_state=UNDEFINED 433eventq_index=0 434forward_latency=0 --- 63 unchanged lines hidden (view full) --- 498 499[system.iocache] 500type=Cache 501children=tags 502addr_ranges=2147483648:2415919103:0:0:0:0 503assoc=8 504clk_domain=system.clk_domain 505clusivity=mostly_incl | 433 434[system.cpu.toL2Bus] 435type=CoherentXBar 436children=snoop_filter 437clk_domain=system.cpu_clk_domain 438default_p_state=UNDEFINED 439eventq_index=0 440forward_latency=0 --- 63 unchanged lines hidden (view full) --- 504 505[system.iocache] 506type=Cache 507children=tags 508addr_ranges=2147483648:2415919103:0:0:0:0 509assoc=8 510clk_domain=system.clk_domain 511clusivity=mostly_incl |
| 512data_latency=50 |
|
| 506default_p_state=UNDEFINED 507demand_mshr_reserve=1 508eventq_index=0 | 513default_p_state=UNDEFINED 514demand_mshr_reserve=1 515eventq_index=0 |
| 509hit_latency=50 | |
| 510is_read_only=false 511max_miss_count=0 512mshrs=20 513p_state_clk_gate_bins=20 514p_state_clk_gate_max=1000000000000 515p_state_clk_gate_min=1000 516power_model=Null 517prefetch_on_access=false 518prefetcher=Null 519response_latency=50 520sequential_access=false 521size=1024 522system=system | 516is_read_only=false 517max_miss_count=0 518mshrs=20 519p_state_clk_gate_bins=20 520p_state_clk_gate_max=1000000000000 521p_state_clk_gate_min=1000 522power_model=Null 523prefetch_on_access=false 524prefetcher=Null 525response_latency=50 526sequential_access=false 527size=1024 528system=system |
| 529tag_latency=50 |
|
| 523tags=system.iocache.tags 524tgts_per_mshr=12 525write_buffers=8 526writeback_clean=false 527cpu_side=system.iobus.master[25] 528mem_side=system.membus.slave[3] 529 530[system.iocache.tags] 531type=LRU 532assoc=8 533block_size=64 534clk_domain=system.clk_domain | 530tags=system.iocache.tags 531tgts_per_mshr=12 532write_buffers=8 533writeback_clean=false 534cpu_side=system.iobus.master[25] 535mem_side=system.membus.slave[3] 536 537[system.iocache.tags] 538type=LRU 539assoc=8 540block_size=64 541clk_domain=system.clk_domain |
| 542data_latency=50 |
|
| 535default_p_state=UNDEFINED 536eventq_index=0 | 543default_p_state=UNDEFINED 544eventq_index=0 |
| 537hit_latency=50 | |
| 538p_state_clk_gate_bins=20 539p_state_clk_gate_max=1000000000000 540p_state_clk_gate_min=1000 541power_model=Null 542sequential_access=false 543size=1024 | 545p_state_clk_gate_bins=20 546p_state_clk_gate_max=1000000000000 547p_state_clk_gate_min=1000 548power_model=Null 549sequential_access=false 550size=1024 |
| 551tag_latency=50 |
|
| 544 545[system.membus] 546type=CoherentXBar 547children=badaddr_responder snoop_filter 548clk_domain=system.clk_domain 549default_p_state=UNDEFINED 550eventq_index=0 551forward_latency=4 --- 1078 unchanged lines hidden --- | 552 553[system.membus] 554type=CoherentXBar 555children=badaddr_responder snoop_filter 556clk_domain=system.clk_domain 557default_p_state=UNDEFINED 558eventq_index=0 559forward_latency=4 --- 1078 unchanged lines hidden --- |