1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.196139 # Number of seconds simulated 4sim_ticks 1196139241000 # Number of ticks simulated 5final_tick 1196139241000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 363491 # Simulator instruction rate (inst/s) 8host_op_rate 463152 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 7074263356 # Simulator tick rate (ticks/s) 10host_mem_usage 480032 # Number of bytes of host memory used 11host_seconds 169.08 # Real time elapsed on the host |
12sim_insts 61460236 # Number of instructions simulated 13sim_ops 78311148 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks |
16system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory 17system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory 18system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory 19system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory 20system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory 21system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory 22system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory 23system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory 24system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory 25system.realview.nvmem.bw_read::cpu0.inst 17 # Total read bandwidth from this memory (bytes/s) 26system.realview.nvmem.bw_read::cpu1.inst 40 # Total read bandwidth from this memory (bytes/s) 27system.realview.nvmem.bw_read::total 57 # Total read bandwidth from this memory (bytes/s) 28system.realview.nvmem.bw_inst_read::cpu0.inst 17 # Instruction read bandwidth from this memory (bytes/s) 29system.realview.nvmem.bw_inst_read::cpu1.inst 40 # Instruction read bandwidth from this memory (bytes/s) 30system.realview.nvmem.bw_inst_read::total 57 # Instruction read bandwidth from this memory (bytes/s) 31system.realview.nvmem.bw_total::cpu0.inst 17 # Total bandwidth to/from this memory (bytes/s) 32system.realview.nvmem.bw_total::cpu1.inst 40 # Total bandwidth to/from this memory (bytes/s) 33system.realview.nvmem.bw_total::total 57 # Total bandwidth to/from this memory (bytes/s) |
34system.physmem.bytes_read::realview.clcd 51904512 # Number of bytes read from this memory 35system.physmem.bytes_read::cpu0.dtb.walker 64 # Number of bytes read from this memory 36system.physmem.bytes_read::cpu0.itb.walker 128 # Number of bytes read from this memory 37system.physmem.bytes_read::cpu0.inst 393164 # Number of bytes read from this memory 38system.physmem.bytes_read::cpu0.data 4714556 # Number of bytes read from this memory 39system.physmem.bytes_read::cpu1.dtb.walker 256 # Number of bytes read from this memory 40system.physmem.bytes_read::cpu1.itb.walker 64 # Number of bytes read from this memory 41system.physmem.bytes_read::cpu1.inst 324676 # Number of bytes read from this memory --- 581 unchanged lines hidden (view full) --- 623system.physmem.avgWrQLen 12.50 # Average write queue length when enqueuing 624system.physmem.readRowHits 6598277 # Number of row buffer hits during reads 625system.physmem.writeRowHits 94784 # Number of row buffer hits during writes 626system.physmem.readRowHitRate 99.16 # Row buffer hit rate for reads 627system.physmem.writeRowHitRate 83.49 # Row buffer hit rate for writes 628system.physmem.avgGap 160007.15 # Average gap between requests 629system.physmem.pageHitRate 98.90 # Row buffer hit rate, read and write combined 630system.physmem.prechargeAllPercent 4.90 # Percentage of time for which DRAM has all the banks in precharge state |
631system.membus.throughput 59936382 # Throughput (bytes/s) 632system.membus.trans_dist::ReadReq 7703367 # Transaction distribution 633system.membus.trans_dist::ReadResp 7703367 # Transaction distribution 634system.membus.trans_dist::WriteReq 767572 # Transaction distribution 635system.membus.trans_dist::WriteResp 767572 # Transaction distribution 636system.membus.trans_dist::Writeback 64227 # Transaction distribution 637system.membus.trans_dist::UpgradeReq 31703 # Transaction distribution 638system.membus.trans_dist::SCUpgradeReq 17214 # Transaction distribution --- 752 unchanged lines hidden (view full) --- 1391system.cpu0.num_fp_register_writes 840 # number of times the floating registers were written 1392system.cpu0.num_mem_refs 13380719 # number of memory refs 1393system.cpu0.num_load_insts 7401377 # Number of load instructions 1394system.cpu0.num_store_insts 5979342 # Number of store instructions 1395system.cpu0.num_idle_cycles 2246536230.490122 # Number of idle cycles 1396system.cpu0.num_busy_cycles 145742251.509878 # Number of busy cycles 1397system.cpu0.not_idle_fraction 0.060922 # Percentage of non-idle cycles 1398system.cpu0.idle_fraction 0.939078 # Percentage of idle cycles |
1399system.cpu0.Branches 5599941 # Number of branches fetched |
1400system.cpu0.kern.inst.arm 0 # number of arm instructions executed 1401system.cpu0.kern.inst.quiesce 46939 # number of quiesce instructions executed 1402system.cpu0.icache.tags.replacements 424872 # number of replacements 1403system.cpu0.icache.tags.tagsinuse 509.359183 # Cycle average of tags in use 1404system.cpu0.icache.tags.total_refs 29135959 # Total number of references to valid blocks. 1405system.cpu0.icache.tags.sampled_refs 425384 # Sample count of references to valid blocks. 1406system.cpu0.icache.tags.avg_refs 68.493312 # Average number of references to valid blocks. 1407system.cpu0.icache.tags.warmup_cycle 76218358000 # Cycle when the warmup percentage was hit. --- 346 unchanged lines hidden (view full) --- 1754system.cpu1.num_fp_register_writes 2260 # number of times the floating registers were written 1755system.cpu1.num_mem_refs 14692820 # number of memory refs 1756system.cpu1.num_load_insts 8641241 # Number of load instructions 1757system.cpu1.num_store_insts 6051579 # Number of store instructions 1758system.cpu1.num_idle_cycles 1874235342.195830 # Number of idle cycles 1759system.cpu1.num_busy_cycles 516568442.804169 # Number of busy cycles 1760system.cpu1.not_idle_fraction 0.216065 # Percentage of non-idle cycles 1761system.cpu1.idle_fraction 0.783935 # Percentage of idle cycles |
1762system.cpu1.Branches 4947677 # Number of branches fetched |
1763system.cpu1.kern.inst.arm 0 # number of arm instructions executed 1764system.cpu1.kern.inst.quiesce 44317 # number of quiesce instructions executed 1765system.cpu1.icache.tags.replacements 469929 # number of replacements 1766system.cpu1.icache.tags.tagsinuse 478.566840 # Cycle average of tags in use 1767system.cpu1.icache.tags.total_refs 32737552 # Total number of references to valid blocks. 1768system.cpu1.icache.tags.sampled_refs 470441 # Sample count of references to valid blocks. 1769system.cpu1.icache.tags.avg_refs 69.589071 # Average number of references to valid blocks. 1770system.cpu1.icache.tags.warmup_cycle 93987616500 # Cycle when the warmup percentage was hit. --- 272 unchanged lines hidden --- |