7,11c7,11
< host_inst_rate 754175 # Simulator instruction rate (inst/s)
< host_op_rate 964493 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 14598169556 # Simulator tick rate (ticks/s)
< host_mem_usage 379804 # Number of bytes of host memory used
< host_seconds 80.13 # Real time elapsed on the host
---
> host_inst_rate 657704 # Simulator instruction rate (inst/s)
> host_op_rate 841119 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 12730829062 # Simulator tick rate (ticks/s)
> host_mem_usage 382856 # Number of bytes of host memory used
> host_seconds 91.88 # Real time elapsed on the host
14,32c14,90
< system.physmem.bytes_read 61898788 # Number of bytes read from this memory
< system.physmem.bytes_inst_read 1004992 # Number of instructions bytes read from this memory
< system.physmem.bytes_written 10078928 # Number of bytes written to this memory
< system.physmem.num_reads 6478591 # Number of read requests responded to by this memory
< system.physmem.num_writes 867017 # Number of write requests responded to by this memory
< system.physmem.num_other 0 # Number of other requests responded to by this memory
< system.physmem.bw_read 52918197 # Total read bandwidth from this memory (bytes/s)
< system.physmem.bw_inst_read 859183 # Instruction read bandwidth from this memory (bytes/s)
< system.physmem.bw_write 8616626 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_total 61534823 # Total bandwidth to/from this memory (bytes/s)
< system.realview.nvmem.bytes_read 68 # Number of bytes read from this memory
< system.realview.nvmem.bytes_inst_read 68 # Number of instructions bytes read from this memory
< system.realview.nvmem.bytes_written 0 # Number of bytes written to this memory
< system.realview.nvmem.num_reads 17 # Number of read requests responded to by this memory
< system.realview.nvmem.num_writes 0 # Number of write requests responded to by this memory
< system.realview.nvmem.num_other 0 # Number of other requests responded to by this memory
< system.realview.nvmem.bw_read 58 # Total read bandwidth from this memory (bytes/s)
< system.realview.nvmem.bw_inst_read 58 # Instruction read bandwidth from this memory (bytes/s)
< system.realview.nvmem.bw_total 58 # Total bandwidth to/from this memory (bytes/s)
---
> system.realview.nvmem.bytes_read::cpu0.inst 20 # Number of bytes read from this memory
> system.realview.nvmem.bytes_read::cpu1.inst 48 # Number of bytes read from this memory
> system.realview.nvmem.bytes_read::total 68 # Number of bytes read from this memory
> system.realview.nvmem.bytes_inst_read::cpu0.inst 20 # Number of instructions bytes read from this memory
> system.realview.nvmem.bytes_inst_read::cpu1.inst 48 # Number of instructions bytes read from this memory
> system.realview.nvmem.bytes_inst_read::total 68 # Number of instructions bytes read from this memory
> system.realview.nvmem.num_reads::cpu0.inst 5 # Number of read requests responded to by this memory
> system.realview.nvmem.num_reads::cpu1.inst 12 # Number of read requests responded to by this memory
> system.realview.nvmem.num_reads::total 17 # Number of read requests responded to by this memory
> system.realview.nvmem.bw_read::cpu0.inst 17 # Total read bandwidth from this memory (bytes/s)
> system.realview.nvmem.bw_read::cpu1.inst 41 # Total read bandwidth from this memory (bytes/s)
> system.realview.nvmem.bw_read::total 58 # Total read bandwidth from this memory (bytes/s)
> system.realview.nvmem.bw_inst_read::cpu0.inst 17 # Instruction read bandwidth from this memory (bytes/s)
> system.realview.nvmem.bw_inst_read::cpu1.inst 41 # Instruction read bandwidth from this memory (bytes/s)
> system.realview.nvmem.bw_inst_read::total 58 # Instruction read bandwidth from this memory (bytes/s)
> system.realview.nvmem.bw_total::cpu0.inst 17 # Total bandwidth to/from this memory (bytes/s)
> system.realview.nvmem.bw_total::cpu1.inst 41 # Total bandwidth to/from this memory (bytes/s)
> system.realview.nvmem.bw_total::total 58 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bytes_read::realview.clcd 50331648 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.dtb.walker 640 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.itb.walker 256 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.inst 534756 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu0.data 5211316 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.dtb.walker 1152 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.itb.walker 320 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.inst 470236 # Number of bytes read from this memory
> system.physmem.bytes_read::cpu1.data 5348464 # Number of bytes read from this memory
> system.physmem.bytes_read::total 61898788 # Number of bytes read from this memory
> system.physmem.bytes_inst_read::cpu0.inst 534756 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::cpu1.inst 470236 # Number of instructions bytes read from this memory
> system.physmem.bytes_inst_read::total 1004992 # Number of instructions bytes read from this memory
> system.physmem.bytes_written::writebacks 7051584 # Number of bytes written to this memory
> system.physmem.bytes_written::cpu0.data 17000 # Number of bytes written to this memory
> system.physmem.bytes_written::cpu1.data 3010344 # Number of bytes written to this memory
> system.physmem.bytes_written::total 10078928 # Number of bytes written to this memory
> system.physmem.num_reads::realview.clcd 6291456 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.dtb.walker 10 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.itb.walker 4 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.inst 14574 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu0.data 81499 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.dtb.walker 18 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.itb.walker 5 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.inst 7429 # Number of read requests responded to by this memory
> system.physmem.num_reads::cpu1.data 83596 # Number of read requests responded to by this memory
> system.physmem.num_reads::total 6478591 # Number of read requests responded to by this memory
> system.physmem.num_writes::writebacks 110181 # Number of write requests responded to by this memory
> system.physmem.num_writes::cpu0.data 4250 # Number of write requests responded to by this memory
> system.physmem.num_writes::cpu1.data 752586 # Number of write requests responded to by this memory
> system.physmem.num_writes::total 867017 # Number of write requests responded to by this memory
> system.physmem.bw_read::realview.clcd 43029277 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.dtb.walker 547 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.itb.walker 219 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.inst 457171 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu0.data 4455232 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.dtb.walker 985 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.itb.walker 274 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.inst 402012 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::cpu1.data 4572482 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_read::total 52918197 # Total read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu0.inst 457171 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::cpu1.inst 402012 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_inst_read::total 859183 # Instruction read bandwidth from this memory (bytes/s)
> system.physmem.bw_write::writebacks 6028504 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_write::cpu0.data 14534 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_write::cpu1.data 2573588 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_write::total 8616626 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_total::writebacks 6028504 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::realview.clcd 43029277 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.dtb.walker 547 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.itb.walker 219 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.inst 457171 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu0.data 4469765 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.dtb.walker 985 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.itb.walker 274 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.inst 402012 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::cpu1.data 7146070 # Total bandwidth to/from this memory (bytes/s)
> system.physmem.bw_total::total 61534823 # Total bandwidth to/from this memory (bytes/s)
213a272
> system.l2c.ReadReq_miss_rate::total 0.028163 # miss rate for ReadReq accesses
215a275
> system.l2c.UpgradeReq_miss_rate::total 0.826789 # miss rate for UpgradeReq accesses
217a278
> system.l2c.SCUpgradeReq_miss_rate::total 0.710105 # miss rate for SCUpgradeReq accesses
219a281
> system.l2c.ReadExReq_miss_rate::total 0.587311 # miss rate for ReadExReq accesses
227a290
> system.l2c.demand_miss_rate::total 0.122213 # miss rate for demand accesses
235a299
> system.l2c.overall_miss_rate::total 0.122213 # miss rate for overall accesses
243a308
> system.l2c.ReadReq_avg_miss_latency::total 52152.561534 # average ReadReq miss latency
245a311
> system.l2c.UpgradeReq_avg_miss_latency::total 7361.740598 # average UpgradeReq miss latency
247a314
> system.l2c.SCUpgradeReq_avg_miss_latency::total 8935.230618 # average SCUpgradeReq miss latency
249a317
> system.l2c.ReadExReq_avg_miss_latency::total 52082.720239 # average ReadExReq miss latency
257a326
> system.l2c.demand_avg_miss_latency::total 52096.107637 # average overall miss latency
265a335
> system.l2c.overall_avg_miss_latency::total 52096.107637 # average overall miss latency
374a445
> system.l2c.ReadReq_mshr_miss_rate::total 0.028163 # mshr miss rate for ReadReq accesses
376a448
> system.l2c.UpgradeReq_mshr_miss_rate::total 0.826789 # mshr miss rate for UpgradeReq accesses
378a451
> system.l2c.SCUpgradeReq_mshr_miss_rate::total 0.710105 # mshr miss rate for SCUpgradeReq accesses
380a454
> system.l2c.ReadExReq_mshr_miss_rate::total 0.587311 # mshr miss rate for ReadExReq accesses
388a463
> system.l2c.demand_mshr_miss_rate::total 0.122213 # mshr miss rate for demand accesses
396a472
> system.l2c.overall_mshr_miss_rate::total 0.122213 # mshr miss rate for overall accesses
404a481
> system.l2c.ReadReq_avg_mshr_miss_latency::total 40153.009531 # average ReadReq mshr miss latency
406a484
> system.l2c.UpgradeReq_avg_mshr_miss_latency::total 40051.711668 # average UpgradeReq mshr miss latency
408a487
> system.l2c.SCUpgradeReq_avg_mshr_miss_latency::total 40039.254171 # average SCUpgradeReq mshr miss latency
410a490
> system.l2c.ReadExReq_avg_mshr_miss_latency::total 40082.720239 # average ReadExReq mshr miss latency
418a499
> system.l2c.demand_avg_mshr_miss_latency::total 40096.193198 # average overall mshr miss latency
426a508
> system.l2c.overall_avg_mshr_miss_latency::total 40096.193198 # average overall mshr miss latency
430a513
> system.l2c.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
432a516
> system.l2c.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency
436a521
> system.l2c.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
543a629
> system.cpu0.icache.ReadReq_miss_rate::total 0.013882 # miss rate for ReadReq accesses
544a631
> system.cpu0.icache.demand_miss_rate::total 0.013882 # miss rate for demand accesses
545a633
> system.cpu0.icache.overall_miss_rate::total 0.013882 # miss rate for overall accesses
546a635
> system.cpu0.icache.ReadReq_avg_miss_latency::total 14826.735750 # average ReadReq miss latency
547a637
> system.cpu0.icache.demand_avg_miss_latency::total 14826.735750 # average overall miss latency
548a639
> system.cpu0.icache.overall_avg_miss_latency::total 14826.735750 # average overall miss latency
575a667
> system.cpu0.icache.ReadReq_mshr_miss_rate::total 0.013882 # mshr miss rate for ReadReq accesses
576a669
> system.cpu0.icache.demand_mshr_miss_rate::total 0.013882 # mshr miss rate for demand accesses
577a671
> system.cpu0.icache.overall_mshr_miss_rate::total 0.013882 # mshr miss rate for overall accesses
578a673
> system.cpu0.icache.ReadReq_avg_mshr_miss_latency::total 11823.686947 # average ReadReq mshr miss latency
579a675
> system.cpu0.icache.demand_avg_mshr_miss_latency::total 11823.686947 # average overall mshr miss latency
580a677
> system.cpu0.icache.overall_avg_mshr_miss_latency::total 11823.686947 # average overall mshr miss latency
581a679
> system.cpu0.icache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
582a681
> system.cpu0.icache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
641a741
> system.cpu0.dcache.ReadReq_miss_rate::total 0.033860 # miss rate for ReadReq accesses
642a743
> system.cpu0.dcache.WriteReq_miss_rate::total 0.025969 # miss rate for WriteReq accesses
643a745
> system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.060456 # miss rate for LoadLockedReq accesses
644a747
> system.cpu0.dcache.StoreCondReq_miss_rate::total 0.047493 # miss rate for StoreCondReq accesses
645a749
> system.cpu0.dcache.demand_miss_rate::total 0.030342 # miss rate for demand accesses
646a751
> system.cpu0.dcache.overall_miss_rate::total 0.030342 # miss rate for overall accesses
647a753
> system.cpu0.dcache.ReadReq_avg_miss_latency::total 15320.382890 # average ReadReq miss latency
648a755
> system.cpu0.dcache.WriteReq_avg_miss_latency::total 35592.072418 # average WriteReq miss latency
649a757
> system.cpu0.dcache.LoadLockedReq_avg_miss_latency::total 11039.558127 # average LoadLockedReq miss latency
650a759
> system.cpu0.dcache.StoreCondReq_avg_miss_latency::total 9145.766345 # average StoreCondReq miss latency
651a761
> system.cpu0.dcache.demand_avg_miss_latency::total 23054.541807 # average overall miss latency
652a763
> system.cpu0.dcache.overall_avg_miss_latency::total 23054.541807 # average overall miss latency
693a805
> system.cpu0.dcache.ReadReq_mshr_miss_rate::total 0.033860 # mshr miss rate for ReadReq accesses
694a807
> system.cpu0.dcache.WriteReq_mshr_miss_rate::total 0.025969 # mshr miss rate for WriteReq accesses
695a809
> system.cpu0.dcache.LoadLockedReq_mshr_miss_rate::total 0.060456 # mshr miss rate for LoadLockedReq accesses
696a811
> system.cpu0.dcache.StoreCondReq_mshr_miss_rate::total 0.047474 # mshr miss rate for StoreCondReq accesses
697a813
> system.cpu0.dcache.demand_mshr_miss_rate::total 0.030342 # mshr miss rate for demand accesses
698a815
> system.cpu0.dcache.overall_mshr_miss_rate::total 0.030342 # mshr miss rate for overall accesses
699a817
> system.cpu0.dcache.ReadReq_avg_mshr_miss_latency::total 12319.946018 # average ReadReq mshr miss latency
700a819
> system.cpu0.dcache.WriteReq_avg_mshr_miss_latency::total 32591.360717 # average WriteReq mshr miss latency
701a821
> system.cpu0.dcache.LoadLockedReq_avg_mshr_miss_latency::total 8039.558127 # average LoadLockedReq mshr miss latency
702a823
> system.cpu0.dcache.StoreCondReq_avg_mshr_miss_latency::total 6149.443774 # average StoreCondReq mshr miss latency
703a825
> system.cpu0.dcache.demand_avg_mshr_miss_latency::total 20054.000080 # average overall mshr miss latency
704a827
> system.cpu0.dcache.overall_avg_mshr_miss_latency::total 20054.000080 # average overall mshr miss latency
705a829
> system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
706a831
> system.cpu0.dcache.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency
707a833
> system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
808a935
> system.cpu1.icache.ReadReq_miss_rate::total 0.014087 # miss rate for ReadReq accesses
809a937
> system.cpu1.icache.demand_miss_rate::total 0.014087 # miss rate for demand accesses
810a939
> system.cpu1.icache.overall_miss_rate::total 0.014087 # miss rate for overall accesses
811a941
> system.cpu1.icache.ReadReq_avg_miss_latency::total 14686.743809 # average ReadReq miss latency
812a943
> system.cpu1.icache.demand_avg_miss_latency::total 14686.743809 # average overall miss latency
813a945
> system.cpu1.icache.overall_avg_miss_latency::total 14686.743809 # average overall miss latency
840a973
> system.cpu1.icache.ReadReq_mshr_miss_rate::total 0.014087 # mshr miss rate for ReadReq accesses
841a975
> system.cpu1.icache.demand_mshr_miss_rate::total 0.014087 # mshr miss rate for demand accesses
842a977
> system.cpu1.icache.overall_mshr_miss_rate::total 0.014087 # mshr miss rate for overall accesses
843a979
> system.cpu1.icache.ReadReq_avg_mshr_miss_latency::total 11684.088965 # average ReadReq mshr miss latency
844a981
> system.cpu1.icache.demand_avg_mshr_miss_latency::total 11684.088965 # average overall mshr miss latency
845a983
> system.cpu1.icache.overall_avg_mshr_miss_latency::total 11684.088965 # average overall mshr miss latency
846a985
> system.cpu1.icache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
847a987
> system.cpu1.icache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
906a1047
> system.cpu1.dcache.ReadReq_miss_rate::total 0.024175 # miss rate for ReadReq accesses
907a1049
> system.cpu1.dcache.WriteReq_miss_rate::total 0.030209 # miss rate for WriteReq accesses
908a1051
> system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.119732 # miss rate for LoadLockedReq accesses
909a1053
> system.cpu1.dcache.StoreCondReq_miss_rate::total 0.104658 # miss rate for StoreCondReq accesses
910a1055
> system.cpu1.dcache.demand_miss_rate::total 0.026659 # miss rate for demand accesses
911a1057
> system.cpu1.dcache.overall_miss_rate::total 0.026659 # miss rate for overall accesses
912a1059
> system.cpu1.dcache.ReadReq_avg_miss_latency::total 14503.858110 # average ReadReq miss latency
913a1061
> system.cpu1.dcache.WriteReq_avg_miss_latency::total 35153.999575 # average WriteReq miss latency
914a1063
> system.cpu1.dcache.LoadLockedReq_avg_miss_latency::total 11199.721298 # average LoadLockedReq miss latency
915a1065
> system.cpu1.dcache.StoreCondReq_avg_miss_latency::total 7579.207411 # average StoreCondReq miss latency
916a1067
> system.cpu1.dcache.demand_avg_miss_latency::total 24134.585035 # average overall miss latency
917a1069
> system.cpu1.dcache.overall_avg_miss_latency::total 24134.585035 # average overall miss latency
958a1111
> system.cpu1.dcache.ReadReq_mshr_miss_rate::total 0.024175 # mshr miss rate for ReadReq accesses
959a1113
> system.cpu1.dcache.WriteReq_mshr_miss_rate::total 0.030209 # mshr miss rate for WriteReq accesses
960a1115
> system.cpu1.dcache.LoadLockedReq_mshr_miss_rate::total 0.119732 # mshr miss rate for LoadLockedReq accesses
961a1117
> system.cpu1.dcache.StoreCondReq_mshr_miss_rate::total 0.104604 # mshr miss rate for StoreCondReq accesses
962a1119
> system.cpu1.dcache.demand_mshr_miss_rate::total 0.026659 # mshr miss rate for demand accesses
963a1121
> system.cpu1.dcache.overall_mshr_miss_rate::total 0.026659 # mshr miss rate for overall accesses
964a1123
> system.cpu1.dcache.ReadReq_avg_mshr_miss_latency::total 11503.175387 # average ReadReq mshr miss latency
965a1125
> system.cpu1.dcache.WriteReq_avg_mshr_miss_latency::total 32153.756914 # average WriteReq mshr miss latency
966a1127
> system.cpu1.dcache.LoadLockedReq_avg_mshr_miss_latency::total 8199.721298 # average LoadLockedReq mshr miss latency
967a1129
> system.cpu1.dcache.StoreCondReq_avg_mshr_miss_latency::total 4583.110196 # average StoreCondReq mshr miss latency
968a1131
> system.cpu1.dcache.demand_avg_mshr_miss_latency::total 21134.107546 # average overall mshr miss latency
969a1133
> system.cpu1.dcache.overall_avg_mshr_miss_latency::total 21134.107546 # average overall mshr miss latency
970a1135
> system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
971a1137
> system.cpu1.dcache.WriteReq_avg_mshr_uncacheable_latency::total inf # average WriteReq mshr uncacheable latency
972a1139
> system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
992a1160
> system.iocache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
993a1162
> system.iocache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency