| config.ini (9620:89aa34e10625) | config.ini (9885:afd9ea6101d9) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxArmSystem |
| 11children=bridge cf0 cpu0 cpu1 intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver | 11children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain |
| 12atags_addr=256 | 12atags_addr=256 |
| 13boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm | 13boot_loader=/dist/m5/system/binaries/boot.arm |
| 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 | 14boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1 |
| 15clock=1000 | 15cache_line_size=64 16clk_domain=system.clk_domain |
| 16dtb_filename=False 17early_kernel_symbols=false 18enable_context_switch_stats_dump=false 19flags_addr=268435504 20gic_cpu_addr=520093952 21init_param=0 | 17dtb_filename=False 18early_kernel_symbols=false 19enable_context_switch_stats_dump=false 20flags_addr=268435504 21gic_cpu_addr=520093952 22init_param=0 |
| 22kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 | 23kernel=/dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8 |
| 23load_addr_mask=268435455 24machine_type=RealView_PBX 25mem_mode=timing 26mem_ranges=0:134217727 27memories=system.physmem system.realview.nvmem 28multi_proc=true 29num_work_ids=16 | 24load_addr_mask=268435455 25machine_type=RealView_PBX 26mem_mode=timing 27mem_ranges=0:134217727 28memories=system.physmem system.realview.nvmem 29multi_proc=true 30num_work_ids=16 |
| 31panic_on_oops=true 32panic_on_panic=true |
|
| 30readfile=tests/halt.sh 31symbolfile= 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.bridge] 42type=Bridge | 33readfile=tests/halt.sh 34symbolfile= 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 37work_begin_exit_count=0 38work_cpus_ckpt_count=0 39work_end_ckpt_count=0 40work_end_exit_count=0 41work_item_id=-1 42system_port=system.membus.slave[0] 43 44[system.bridge] 45type=Bridge |
| 43clock=1000 | 46clk_domain=system.clk_domain |
| 44delay=50000 45ranges=268435456:520093695 1073741824:1610612735 46req_size=16 47resp_size=16 48master=system.iobus.slave[0] 49slave=system.membus.master[0] 50 51[system.cf0] --- 8 unchanged lines hidden (view full) --- 60children=child 61child=system.cf0.image.child 62image_file= 63read_only=false 64table_size=65536 65 66[system.cf0.image.child] 67type=RawDiskImage | 47delay=50000 48ranges=268435456:520093695 1073741824:1610612735 49req_size=16 50resp_size=16 51master=system.iobus.slave[0] 52slave=system.membus.master[0] 53 54[system.cf0] --- 8 unchanged lines hidden (view full) --- 63children=child 64child=system.cf0.image.child 65image_file= 66read_only=false 67table_size=65536 68 69[system.cf0.image.child] 70type=RawDiskImage |
| 68image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img | 71image_file=/dist/m5/system/disks/linux-arm-ael.img |
| 69read_only=true 70 | 72read_only=true 73 |
| 74[system.clk_domain] 75type=SrcClockDomain 76clock=1000 77voltage_domain=system.voltage_domain 78 |
|
| 71[system.cpu0] 72type=TimingSimpleCPU 73children=dcache dtb icache interrupts isa itb tracer | 79[system.cpu0] 80type=TimingSimpleCPU 81children=dcache dtb icache interrupts isa itb tracer |
| 74branchPred=Null | |
| 75checker=Null | 82checker=Null |
| 76clock=500 | 83clk_domain=system.cpu_clk_domain |
| 77cpu_id=0 78do_checkpoint_insts=true 79do_quiesce=true 80do_statistics_insts=true 81dtb=system.cpu0.dtb 82function_trace=false 83function_trace_start=0 84interrupts=system.cpu0.interrupts 85isa=system.cpu0.isa 86itb=system.cpu0.itb 87max_insts_all_threads=0 88max_insts_any_thread=0 89max_loads_all_threads=0 90max_loads_any_thread=0 91numThreads=1 92profile=0 93progress_interval=0 | 84cpu_id=0 85do_checkpoint_insts=true 86do_quiesce=true 87do_statistics_insts=true 88dtb=system.cpu0.dtb 89function_trace=false 90function_trace_start=0 91interrupts=system.cpu0.interrupts 92isa=system.cpu0.isa 93itb=system.cpu0.itb 94max_insts_all_threads=0 95max_insts_any_thread=0 96max_loads_all_threads=0 97max_loads_any_thread=0 98numThreads=1 99profile=0 100progress_interval=0 |
| 101simpoint_start_insts= |
|
| 94switched_out=false 95system=system 96tracer=system.cpu0.tracer 97workload= 98dcache_port=system.cpu0.dcache.cpu_side 99icache_port=system.cpu0.icache.cpu_side 100 101[system.cpu0.dcache] 102type=BaseCache | 102switched_out=false 103system=system 104tracer=system.cpu0.tracer 105workload= 106dcache_port=system.cpu0.dcache.cpu_side 107icache_port=system.cpu0.icache.cpu_side 108 109[system.cpu0.dcache] 110type=BaseCache |
| 111children=tags |
|
| 103addr_ranges=0:18446744073709551615 104assoc=4 | 112addr_ranges=0:18446744073709551615 113assoc=4 |
| 105block_size=64 106clock=500 | 114clk_domain=system.cpu_clk_domain |
| 107forward_snoops=true 108hit_latency=2 109is_top_level=true 110max_miss_count=0 111mshrs=4 112prefetch_on_access=false 113prefetcher=Null 114response_latency=2 115size=32768 116system=system | 115forward_snoops=true 116hit_latency=2 117is_top_level=true 118max_miss_count=0 119mshrs=4 120prefetch_on_access=false 121prefetcher=Null 122response_latency=2 123size=32768 124system=system |
| 125tags=system.cpu0.dcache.tags |
|
| 117tgts_per_mshr=20 118two_queue=false 119write_buffers=8 120cpu_side=system.cpu0.dcache_port 121mem_side=system.toL2Bus.slave[1] 122 | 126tgts_per_mshr=20 127two_queue=false 128write_buffers=8 129cpu_side=system.cpu0.dcache_port 130mem_side=system.toL2Bus.slave[1] 131 |
| 132[system.cpu0.dcache.tags] 133type=LRU 134assoc=4 135block_size=64 136clk_domain=system.cpu_clk_domain 137hit_latency=2 138size=32768 139 |
|
| 123[system.cpu0.dtb] 124type=ArmTLB 125children=walker 126size=64 127walker=system.cpu0.dtb.walker 128 129[system.cpu0.dtb.walker] 130type=ArmTableWalker | 140[system.cpu0.dtb] 141type=ArmTLB 142children=walker 143size=64 144walker=system.cpu0.dtb.walker 145 146[system.cpu0.dtb.walker] 147type=ArmTableWalker |
| 131clock=500 | 148clk_domain=system.cpu_clk_domain |
| 132num_squash_per_cycle=2 133sys=system 134port=system.toL2Bus.slave[3] 135 136[system.cpu0.icache] 137type=BaseCache | 149num_squash_per_cycle=2 150sys=system 151port=system.toL2Bus.slave[3] 152 153[system.cpu0.icache] 154type=BaseCache |
| 155children=tags |
|
| 138addr_ranges=0:18446744073709551615 139assoc=1 | 156addr_ranges=0:18446744073709551615 157assoc=1 |
| 140block_size=64 141clock=500 | 158clk_domain=system.cpu_clk_domain |
| 142forward_snoops=true 143hit_latency=2 144is_top_level=true 145max_miss_count=0 146mshrs=4 147prefetch_on_access=false 148prefetcher=Null 149response_latency=2 150size=32768 151system=system | 159forward_snoops=true 160hit_latency=2 161is_top_level=true 162max_miss_count=0 163mshrs=4 164prefetch_on_access=false 165prefetcher=Null 166response_latency=2 167size=32768 168system=system |
| 169tags=system.cpu0.icache.tags |
|
| 152tgts_per_mshr=20 153two_queue=false 154write_buffers=8 155cpu_side=system.cpu0.icache_port 156mem_side=system.toL2Bus.slave[0] 157 | 170tgts_per_mshr=20 171two_queue=false 172write_buffers=8 173cpu_side=system.cpu0.icache_port 174mem_side=system.toL2Bus.slave[0] 175 |
| 176[system.cpu0.icache.tags] 177type=LRU 178assoc=1 179block_size=64 180clk_domain=system.cpu_clk_domain 181hit_latency=2 182size=32768 183 |
|
| 158[system.cpu0.interrupts] 159type=ArmInterrupts 160 161[system.cpu0.isa] 162type=ArmISA 163fpsid=1090793632 164id_isar0=34607377 165id_isar1=34677009 --- 12 unchanged lines hidden (view full) --- 178[system.cpu0.itb] 179type=ArmTLB 180children=walker 181size=64 182walker=system.cpu0.itb.walker 183 184[system.cpu0.itb.walker] 185type=ArmTableWalker | 184[system.cpu0.interrupts] 185type=ArmInterrupts 186 187[system.cpu0.isa] 188type=ArmISA 189fpsid=1090793632 190id_isar0=34607377 191id_isar1=34677009 --- 12 unchanged lines hidden (view full) --- 204[system.cpu0.itb] 205type=ArmTLB 206children=walker 207size=64 208walker=system.cpu0.itb.walker 209 210[system.cpu0.itb.walker] 211type=ArmTableWalker |
| 186clock=500 | 212clk_domain=system.cpu_clk_domain |
| 187num_squash_per_cycle=2 188sys=system 189port=system.toL2Bus.slave[2] 190 191[system.cpu0.tracer] 192type=ExeTracer 193 194[system.cpu1] 195type=TimingSimpleCPU 196children=dcache dtb icache interrupts isa itb tracer | 213num_squash_per_cycle=2 214sys=system 215port=system.toL2Bus.slave[2] 216 217[system.cpu0.tracer] 218type=ExeTracer 219 220[system.cpu1] 221type=TimingSimpleCPU 222children=dcache dtb icache interrupts isa itb tracer |
| 197branchPred=Null | |
| 198checker=Null | 223checker=Null |
| 199clock=500 | 224clk_domain=system.cpu_clk_domain |
| 200cpu_id=1 201do_checkpoint_insts=true 202do_quiesce=true 203do_statistics_insts=true 204dtb=system.cpu1.dtb 205function_trace=false 206function_trace_start=0 207interrupts=system.cpu1.interrupts 208isa=system.cpu1.isa 209itb=system.cpu1.itb 210max_insts_all_threads=0 211max_insts_any_thread=0 212max_loads_all_threads=0 213max_loads_any_thread=0 214numThreads=1 215profile=0 216progress_interval=0 | 225cpu_id=1 226do_checkpoint_insts=true 227do_quiesce=true 228do_statistics_insts=true 229dtb=system.cpu1.dtb 230function_trace=false 231function_trace_start=0 232interrupts=system.cpu1.interrupts 233isa=system.cpu1.isa 234itb=system.cpu1.itb 235max_insts_all_threads=0 236max_insts_any_thread=0 237max_loads_all_threads=0 238max_loads_any_thread=0 239numThreads=1 240profile=0 241progress_interval=0 |
| 242simpoint_start_insts= |
|
| 217switched_out=false 218system=system 219tracer=system.cpu1.tracer 220workload= 221dcache_port=system.cpu1.dcache.cpu_side 222icache_port=system.cpu1.icache.cpu_side 223 224[system.cpu1.dcache] 225type=BaseCache | 243switched_out=false 244system=system 245tracer=system.cpu1.tracer 246workload= 247dcache_port=system.cpu1.dcache.cpu_side 248icache_port=system.cpu1.icache.cpu_side 249 250[system.cpu1.dcache] 251type=BaseCache |
| 252children=tags |
|
| 226addr_ranges=0:18446744073709551615 227assoc=4 | 253addr_ranges=0:18446744073709551615 254assoc=4 |
| 228block_size=64 229clock=500 | 255clk_domain=system.cpu_clk_domain |
| 230forward_snoops=true 231hit_latency=2 232is_top_level=true 233max_miss_count=0 234mshrs=4 235prefetch_on_access=false 236prefetcher=Null 237response_latency=2 238size=32768 239system=system | 256forward_snoops=true 257hit_latency=2 258is_top_level=true 259max_miss_count=0 260mshrs=4 261prefetch_on_access=false 262prefetcher=Null 263response_latency=2 264size=32768 265system=system |
| 266tags=system.cpu1.dcache.tags |
|
| 240tgts_per_mshr=20 241two_queue=false 242write_buffers=8 243cpu_side=system.cpu1.dcache_port 244mem_side=system.toL2Bus.slave[5] 245 | 267tgts_per_mshr=20 268two_queue=false 269write_buffers=8 270cpu_side=system.cpu1.dcache_port 271mem_side=system.toL2Bus.slave[5] 272 |
| 273[system.cpu1.dcache.tags] 274type=LRU 275assoc=4 276block_size=64 277clk_domain=system.cpu_clk_domain 278hit_latency=2 279size=32768 280 |
|
| 246[system.cpu1.dtb] 247type=ArmTLB 248children=walker 249size=64 250walker=system.cpu1.dtb.walker 251 252[system.cpu1.dtb.walker] 253type=ArmTableWalker | 281[system.cpu1.dtb] 282type=ArmTLB 283children=walker 284size=64 285walker=system.cpu1.dtb.walker 286 287[system.cpu1.dtb.walker] 288type=ArmTableWalker |
| 254clock=500 | 289clk_domain=system.cpu_clk_domain |
| 255num_squash_per_cycle=2 256sys=system 257port=system.toL2Bus.slave[7] 258 259[system.cpu1.icache] 260type=BaseCache | 290num_squash_per_cycle=2 291sys=system 292port=system.toL2Bus.slave[7] 293 294[system.cpu1.icache] 295type=BaseCache |
| 296children=tags |
|
| 261addr_ranges=0:18446744073709551615 262assoc=1 | 297addr_ranges=0:18446744073709551615 298assoc=1 |
| 263block_size=64 264clock=500 | 299clk_domain=system.cpu_clk_domain |
| 265forward_snoops=true 266hit_latency=2 267is_top_level=true 268max_miss_count=0 269mshrs=4 270prefetch_on_access=false 271prefetcher=Null 272response_latency=2 273size=32768 274system=system | 300forward_snoops=true 301hit_latency=2 302is_top_level=true 303max_miss_count=0 304mshrs=4 305prefetch_on_access=false 306prefetcher=Null 307response_latency=2 308size=32768 309system=system |
| 310tags=system.cpu1.icache.tags |
|
| 275tgts_per_mshr=20 276two_queue=false 277write_buffers=8 278cpu_side=system.cpu1.icache_port 279mem_side=system.toL2Bus.slave[4] 280 | 311tgts_per_mshr=20 312two_queue=false 313write_buffers=8 314cpu_side=system.cpu1.icache_port 315mem_side=system.toL2Bus.slave[4] 316 |
| 317[system.cpu1.icache.tags] 318type=LRU 319assoc=1 320block_size=64 321clk_domain=system.cpu_clk_domain 322hit_latency=2 323size=32768 324 |
|
| 281[system.cpu1.interrupts] 282type=ArmInterrupts 283 284[system.cpu1.isa] 285type=ArmISA 286fpsid=1090793632 287id_isar0=34607377 288id_isar1=34677009 --- 12 unchanged lines hidden (view full) --- 301[system.cpu1.itb] 302type=ArmTLB 303children=walker 304size=64 305walker=system.cpu1.itb.walker 306 307[system.cpu1.itb.walker] 308type=ArmTableWalker | 325[system.cpu1.interrupts] 326type=ArmInterrupts 327 328[system.cpu1.isa] 329type=ArmISA 330fpsid=1090793632 331id_isar0=34607377 332id_isar1=34677009 --- 12 unchanged lines hidden (view full) --- 345[system.cpu1.itb] 346type=ArmTLB 347children=walker 348size=64 349walker=system.cpu1.itb.walker 350 351[system.cpu1.itb.walker] 352type=ArmTableWalker |
| 309clock=500 | 353clk_domain=system.cpu_clk_domain |
| 310num_squash_per_cycle=2 311sys=system 312port=system.toL2Bus.slave[6] 313 314[system.cpu1.tracer] 315type=ExeTracer 316 | 354num_squash_per_cycle=2 355sys=system 356port=system.toL2Bus.slave[6] 357 358[system.cpu1.tracer] 359type=ExeTracer 360 |
| 361[system.cpu_clk_domain] 362type=SrcClockDomain 363clock=500 364voltage_domain=system.voltage_domain 365 |
|
| 317[system.intrctrl] 318type=IntrControl 319sys=system 320 321[system.iobus] 322type=NoncoherentBus | 366[system.intrctrl] 367type=IntrControl 368sys=system 369 370[system.iobus] 371type=NoncoherentBus |
| 323block_size=64 324clock=1000 | 372clk_domain=system.clk_domain |
| 325header_cycles=1 326use_default_range=false 327width=8 328master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 329slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 330 331[system.iocache] 332type=BaseCache | 373header_cycles=1 374use_default_range=false 375width=8 376master=system.realview.uart.pio system.realview.realview_io.pio system.realview.timer0.pio system.realview.timer1.pio system.realview.clcd.pio system.realview.kmi0.pio system.realview.kmi1.pio system.realview.cf_ctrl.pio system.realview.cf_ctrl.config system.realview.dmac_fake.pio system.realview.uart1_fake.pio system.realview.uart2_fake.pio system.realview.uart3_fake.pio system.realview.smc_fake.pio system.realview.sp810_fake.pio system.realview.watchdog_fake.pio system.realview.gpio0_fake.pio system.realview.gpio1_fake.pio system.realview.gpio2_fake.pio system.realview.ssp_fake.pio system.realview.sci_fake.pio system.realview.aaci_fake.pio system.realview.mmc_fake.pio system.realview.rtc.pio system.realview.flash_fake.pio system.iocache.cpu_side 377slave=system.bridge.master system.realview.clcd.dma system.realview.cf_ctrl.dma 378 379[system.iocache] 380type=BaseCache |
| 381children=tags |
|
| 333addr_ranges=0:134217727 334assoc=8 | 382addr_ranges=0:134217727 383assoc=8 |
| 335block_size=64 336clock=1000 | 384clk_domain=system.clk_domain |
| 337forward_snoops=false 338hit_latency=50 339is_top_level=true 340max_miss_count=0 341mshrs=20 342prefetch_on_access=false 343prefetcher=Null 344response_latency=50 345size=1024 346system=system | 385forward_snoops=false 386hit_latency=50 387is_top_level=true 388max_miss_count=0 389mshrs=20 390prefetch_on_access=false 391prefetcher=Null 392response_latency=50 393size=1024 394system=system |
| 395tags=system.iocache.tags |
|
| 347tgts_per_mshr=12 348two_queue=false 349write_buffers=8 350cpu_side=system.iobus.master[25] 351mem_side=system.membus.slave[2] 352 | 396tgts_per_mshr=12 397two_queue=false 398write_buffers=8 399cpu_side=system.iobus.master[25] 400mem_side=system.membus.slave[2] 401 |
| 402[system.iocache.tags] 403type=LRU 404assoc=8 405block_size=64 406clk_domain=system.clk_domain 407hit_latency=50 408size=1024 409 |
|
| 353[system.l2c] 354type=BaseCache | 410[system.l2c] 411type=BaseCache |
| 412children=tags |
|
| 355addr_ranges=0:18446744073709551615 356assoc=8 | 413addr_ranges=0:18446744073709551615 414assoc=8 |
| 357block_size=64 358clock=500 | 415clk_domain=system.cpu_clk_domain |
| 359forward_snoops=true 360hit_latency=20 361is_top_level=false 362max_miss_count=0 363mshrs=20 364prefetch_on_access=false 365prefetcher=Null 366response_latency=20 367size=4194304 368system=system | 416forward_snoops=true 417hit_latency=20 418is_top_level=false 419max_miss_count=0 420mshrs=20 421prefetch_on_access=false 422prefetcher=Null 423response_latency=20 424size=4194304 425system=system |
| 426tags=system.l2c.tags |
|
| 369tgts_per_mshr=12 370two_queue=false 371write_buffers=8 372cpu_side=system.toL2Bus.master[0] 373mem_side=system.membus.slave[1] 374 | 427tgts_per_mshr=12 428two_queue=false 429write_buffers=8 430cpu_side=system.toL2Bus.master[0] 431mem_side=system.membus.slave[1] 432 |
| 433[system.l2c.tags] 434type=LRU 435assoc=8 436block_size=64 437clk_domain=system.cpu_clk_domain 438hit_latency=20 439size=4194304 440 |
|
| 375[system.membus] 376type=CoherentBus 377children=badaddr_responder | 441[system.membus] 442type=CoherentBus 443children=badaddr_responder |
| 378block_size=64 379clock=1000 | 444clk_domain=system.clk_domain |
| 380header_cycles=1 381system=system 382use_default_range=false 383width=8 384default=system.membus.badaddr_responder.pio | 445header_cycles=1 446system=system 447use_default_range=false 448width=8 449default=system.membus.badaddr_responder.pio |
| 385master=system.bridge.slave system.realview.nvmem.port system.physmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio | 450master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.realview.local_cpu_timer.pio system.physmem.port |
| 386slave=system.system_port system.l2c.mem_side system.iocache.mem_side 387 388[system.membus.badaddr_responder] 389type=IsaFake | 451slave=system.system_port system.l2c.mem_side system.iocache.mem_side 452 453[system.membus.badaddr_responder] 454type=IsaFake |
| 390clock=1000 | 455clk_domain=system.clk_domain |
| 391fake_mem=false 392pio_addr=0 393pio_latency=100000 394pio_size=8 395ret_bad_addr=true 396ret_data16=65535 397ret_data32=4294967295 398ret_data64=18446744073709551615 399ret_data8=255 400system=system 401update_data=false 402warn_access=warn 403pio=system.membus.default 404 405[system.physmem] 406type=SimpleDRAM 407activation_limit=4 | 456fake_mem=false 457pio_addr=0 458pio_latency=100000 459pio_size=8 460ret_bad_addr=true 461ret_data16=65535 462ret_data32=4294967295 463ret_data64=18446744073709551615 464ret_data8=255 465system=system 466update_data=false 467warn_access=warn 468pio=system.membus.default 469 470[system.physmem] 471type=SimpleDRAM 472activation_limit=4 |
| 408addr_mapping=openmap | 473addr_mapping=RaBaChCo |
| 409banks_per_rank=8 | 474banks_per_rank=8 |
| 475burst_length=8 |
|
| 410channels=1 | 476channels=1 |
| 411clock=1000 | 477clk_domain=system.clk_domain |
| 412conf_table_reported=true | 478conf_table_reported=true |
| 479device_bus_width=8 480device_rowbuffer_size=1024 481devices_per_rank=8 |
|
| 413in_addr_map=true | 482in_addr_map=true |
| 414lines_per_rowbuffer=32 | |
| 415mem_sched_policy=frfcfs 416null=false 417page_policy=open 418range=0:134217727 419ranks_per_channel=2 420read_buffer_size=32 | 483mem_sched_policy=frfcfs 484null=false 485page_policy=open 486range=0:134217727 487ranks_per_channel=2 488read_buffer_size=32 |
| 489static_backend_latency=10000 490static_frontend_latency=10000 |
|
| 421tBURST=5000 422tCL=13750 423tRCD=13750 424tREFI=7800000 425tRFC=300000 426tRP=13750 427tWTR=7500 428tXAW=40000 429write_buffer_size=32 430write_thresh_perc=70 | 491tBURST=5000 492tCL=13750 493tRCD=13750 494tREFI=7800000 495tRFC=300000 496tRP=13750 497tWTR=7500 498tXAW=40000 499write_buffer_size=32 500write_thresh_perc=70 |
| 431zero=false 432port=system.membus.master[2] | 501port=system.membus.master[6] |
| 433 434[system.realview] 435type=RealView 436children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 437intrctrl=system.intrctrl 438max_mem_size=268435456 439mem_start_addr=0 440pci_cfg_base=0 441system=system 442 443[system.realview.a9scu] 444type=A9SCU | 502 503[system.realview] 504type=RealView 505children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake local_cpu_timer mmc_fake nvmem realview_io rtc sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake 506intrctrl=system.intrctrl 507max_mem_size=268435456 508mem_start_addr=0 509pci_cfg_base=0 510system=system 511 512[system.realview.a9scu] 513type=A9SCU |
| 445clock=1000 | 514clk_domain=system.clk_domain |
| 446pio_addr=520093696 447pio_latency=100000 448system=system | 515pio_addr=520093696 516pio_latency=100000 517system=system |
| 449pio=system.membus.master[5] | 518pio=system.membus.master[4] |
| 450 451[system.realview.aaci_fake] 452type=AmbaFake 453amba_id=0 | 519 520[system.realview.aaci_fake] 521type=AmbaFake 522amba_id=0 |
| 454clock=1000 | 523clk_domain=system.clk_domain |
| 455ignore_access=false 456pio_addr=268451840 457pio_latency=100000 458system=system 459pio=system.iobus.master[21] 460 461[system.realview.cf_ctrl] 462type=IdeController --- 30 unchanged lines hidden (view full) --- 493MinimumGrant=0 494ProgIF=133 495Revision=0 496Status=640 497SubClassCode=1 498SubsystemID=0 499SubsystemVendorID=0 500VendorID=32902 | 524ignore_access=false 525pio_addr=268451840 526pio_latency=100000 527system=system 528pio=system.iobus.master[21] 529 530[system.realview.cf_ctrl] 531type=IdeController --- 30 unchanged lines hidden (view full) --- 562MinimumGrant=0 563ProgIF=133 564Revision=0 565Status=640 566SubClassCode=1 567SubsystemID=0 568SubsystemVendorID=0 569VendorID=32902 |
| 501clock=1000 | 570clk_domain=system.clk_domain |
| 502config_latency=20000 503ctrl_offset=2 504disks=system.cf0 505io_shift=1 506pci_bus=2 507pci_dev=7 508pci_func=0 509pio_latency=30000 510platform=system.realview 511system=system 512config=system.iobus.master[8] 513dma=system.iobus.slave[2] 514pio=system.iobus.master[7] 515 516[system.realview.clcd] 517type=Pl111 518amba_id=1315089 | 571config_latency=20000 572ctrl_offset=2 573disks=system.cf0 574io_shift=1 575pci_bus=2 576pci_dev=7 577pci_func=0 578pio_latency=30000 579platform=system.realview 580system=system 581config=system.iobus.master[8] 582dma=system.iobus.slave[2] 583pio=system.iobus.master[7] 584 585[system.realview.clcd] 586type=Pl111 587amba_id=1315089 |
| 519clock=1000 | 588clk_domain=system.clk_domain |
| 520gic=system.realview.gic 521int_num=55 522pio_addr=268566528 523pio_latency=10000 524pixel_clock=41667 525system=system 526vnc=system.vncserver 527dma=system.iobus.slave[1] 528pio=system.iobus.master[4] 529 530[system.realview.dmac_fake] 531type=AmbaFake 532amba_id=0 | 589gic=system.realview.gic 590int_num=55 591pio_addr=268566528 592pio_latency=10000 593pixel_clock=41667 594system=system 595vnc=system.vncserver 596dma=system.iobus.slave[1] 597pio=system.iobus.master[4] 598 599[system.realview.dmac_fake] 600type=AmbaFake 601amba_id=0 |
| 533clock=1000 | 602clk_domain=system.clk_domain |
| 534ignore_access=false 535pio_addr=268632064 536pio_latency=100000 537system=system 538pio=system.iobus.master[9] 539 540[system.realview.flash_fake] 541type=IsaFake | 603ignore_access=false 604pio_addr=268632064 605pio_latency=100000 606system=system 607pio=system.iobus.master[9] 608 609[system.realview.flash_fake] 610type=IsaFake |
| 542clock=1000 | 611clk_domain=system.clk_domain |
| 543fake_mem=true 544pio_addr=1073741824 545pio_latency=100000 546pio_size=536870912 547ret_bad_addr=false 548ret_data16=65535 549ret_data32=4294967295 550ret_data64=18446744073709551615 551ret_data8=255 552system=system 553update_data=false 554warn_access= 555pio=system.iobus.master[24] 556 557[system.realview.gic] 558type=Pl390 | 612fake_mem=true 613pio_addr=1073741824 614pio_latency=100000 615pio_size=536870912 616ret_bad_addr=false 617ret_data16=65535 618ret_data32=4294967295 619ret_data64=18446744073709551615 620ret_data8=255 621system=system 622update_data=false 623warn_access= 624pio=system.iobus.master[24] 625 626[system.realview.gic] 627type=Pl390 |
| 559clock=1000 | 628clk_domain=system.clk_domain |
| 560cpu_addr=520093952 561cpu_pio_delay=10000 562dist_addr=520097792 563dist_pio_delay=10000 564int_latency=10000 565it_lines=128 566platform=system.realview 567system=system | 629cpu_addr=520093952 630cpu_pio_delay=10000 631dist_addr=520097792 632dist_pio_delay=10000 633int_latency=10000 634it_lines=128 635platform=system.realview 636system=system |
| 568pio=system.membus.master[3] | 637pio=system.membus.master[2] |
| 569 570[system.realview.gpio0_fake] 571type=AmbaFake 572amba_id=0 | 638 639[system.realview.gpio0_fake] 640type=AmbaFake 641amba_id=0 |
| 573clock=1000 | 642clk_domain=system.clk_domain |
| 574ignore_access=false 575pio_addr=268513280 576pio_latency=100000 577system=system 578pio=system.iobus.master[16] 579 580[system.realview.gpio1_fake] 581type=AmbaFake 582amba_id=0 | 643ignore_access=false 644pio_addr=268513280 645pio_latency=100000 646system=system 647pio=system.iobus.master[16] 648 649[system.realview.gpio1_fake] 650type=AmbaFake 651amba_id=0 |
| 583clock=1000 | 652clk_domain=system.clk_domain |
| 584ignore_access=false 585pio_addr=268517376 586pio_latency=100000 587system=system 588pio=system.iobus.master[17] 589 590[system.realview.gpio2_fake] 591type=AmbaFake 592amba_id=0 | 653ignore_access=false 654pio_addr=268517376 655pio_latency=100000 656system=system 657pio=system.iobus.master[17] 658 659[system.realview.gpio2_fake] 660type=AmbaFake 661amba_id=0 |
| 593clock=1000 | 662clk_domain=system.clk_domain |
| 594ignore_access=false 595pio_addr=268521472 596pio_latency=100000 597system=system 598pio=system.iobus.master[18] 599 600[system.realview.kmi0] 601type=Pl050 602amba_id=1314896 | 663ignore_access=false 664pio_addr=268521472 665pio_latency=100000 666system=system 667pio=system.iobus.master[18] 668 669[system.realview.kmi0] 670type=Pl050 671amba_id=1314896 |
| 603clock=1000 | 672clk_domain=system.clk_domain |
| 604gic=system.realview.gic 605int_delay=1000000 606int_num=52 607is_mouse=false 608pio_addr=268460032 609pio_latency=100000 610system=system 611vnc=system.vncserver 612pio=system.iobus.master[5] 613 614[system.realview.kmi1] 615type=Pl050 616amba_id=1314896 | 673gic=system.realview.gic 674int_delay=1000000 675int_num=52 676is_mouse=false 677pio_addr=268460032 678pio_latency=100000 679system=system 680vnc=system.vncserver 681pio=system.iobus.master[5] 682 683[system.realview.kmi1] 684type=Pl050 685amba_id=1314896 |
| 617clock=1000 | 686clk_domain=system.clk_domain |
| 618gic=system.realview.gic 619int_delay=1000000 620int_num=53 621is_mouse=true 622pio_addr=268464128 623pio_latency=100000 624system=system 625vnc=system.vncserver 626pio=system.iobus.master[6] 627 628[system.realview.l2x0_fake] 629type=IsaFake | 687gic=system.realview.gic 688int_delay=1000000 689int_num=53 690is_mouse=true 691pio_addr=268464128 692pio_latency=100000 693system=system 694vnc=system.vncserver 695pio=system.iobus.master[6] 696 697[system.realview.l2x0_fake] 698type=IsaFake |
| 630clock=1000 | 699clk_domain=system.clk_domain |
| 631fake_mem=false 632pio_addr=520101888 633pio_latency=100000 634pio_size=4095 635ret_bad_addr=false 636ret_data16=65535 637ret_data32=4294967295 638ret_data64=18446744073709551615 639ret_data8=255 640system=system 641update_data=false 642warn_access= | 700fake_mem=false 701pio_addr=520101888 702pio_latency=100000 703pio_size=4095 704ret_bad_addr=false 705ret_data16=65535 706ret_data32=4294967295 707ret_data64=18446744073709551615 708ret_data8=255 709system=system 710update_data=false 711warn_access= |
| 643pio=system.membus.master[4] | 712pio=system.membus.master[3] |
| 644 645[system.realview.local_cpu_timer] 646type=CpuLocalTimer | 713 714[system.realview.local_cpu_timer] 715type=CpuLocalTimer |
| 647clock=1000 | 716clk_domain=system.clk_domain |
| 648gic=system.realview.gic 649int_num_timer=29 650int_num_watchdog=30 651pio_addr=520095232 652pio_latency=100000 653system=system | 717gic=system.realview.gic 718int_num_timer=29 719int_num_watchdog=30 720pio_addr=520095232 721pio_latency=100000 722system=system |
| 654pio=system.membus.master[6] | 723pio=system.membus.master[5] |
| 655 656[system.realview.mmc_fake] 657type=AmbaFake 658amba_id=0 | 724 725[system.realview.mmc_fake] 726type=AmbaFake 727amba_id=0 |
| 659clock=1000 | 728clk_domain=system.clk_domain |
| 660ignore_access=false 661pio_addr=268455936 662pio_latency=100000 663system=system 664pio=system.iobus.master[22] 665 666[system.realview.nvmem] 667type=SimpleMemory 668bandwidth=73.000000 | 729ignore_access=false 730pio_addr=268455936 731pio_latency=100000 732system=system 733pio=system.iobus.master[22] 734 735[system.realview.nvmem] 736type=SimpleMemory 737bandwidth=73.000000 |
| 669clock=1000 | 738clk_domain=system.clk_domain |
| 670conf_table_reported=false 671in_addr_map=true 672latency=30000 673latency_var=0 674null=false 675range=2147483648:2214592511 | 739conf_table_reported=false 740in_addr_map=true 741latency=30000 742latency_var=0 743null=false 744range=2147483648:2214592511 |
| 676zero=true | |
| 677port=system.membus.master[1] 678 679[system.realview.realview_io] 680type=RealViewCtrl | 745port=system.membus.master[1] 746 747[system.realview.realview_io] 748type=RealViewCtrl |
| 681clock=1000 | 749clk_domain=system.clk_domain |
| 682idreg=0 683pio_addr=268435456 684pio_latency=100000 685proc_id0=201326592 686proc_id1=201327138 687system=system 688pio=system.iobus.master[1] 689 690[system.realview.rtc] 691type=PL031 692amba_id=3412017 | 750idreg=0 751pio_addr=268435456 752pio_latency=100000 753proc_id0=201326592 754proc_id1=201327138 755system=system 756pio=system.iobus.master[1] 757 758[system.realview.rtc] 759type=PL031 760amba_id=3412017 |
| 693clock=1000 | 761clk_domain=system.clk_domain |
| 694gic=system.realview.gic 695int_delay=100000 696int_num=42 697pio_addr=268529664 698pio_latency=100000 699system=system 700time=Thu Jan 1 00:00:00 2009 701pio=system.iobus.master[23] 702 703[system.realview.sci_fake] 704type=AmbaFake 705amba_id=0 | 762gic=system.realview.gic 763int_delay=100000 764int_num=42 765pio_addr=268529664 766pio_latency=100000 767system=system 768time=Thu Jan 1 00:00:00 2009 769pio=system.iobus.master[23] 770 771[system.realview.sci_fake] 772type=AmbaFake 773amba_id=0 |
| 706clock=1000 | 774clk_domain=system.clk_domain |
| 707ignore_access=false 708pio_addr=268492800 709pio_latency=100000 710system=system 711pio=system.iobus.master[20] 712 713[system.realview.smc_fake] 714type=AmbaFake 715amba_id=0 | 775ignore_access=false 776pio_addr=268492800 777pio_latency=100000 778system=system 779pio=system.iobus.master[20] 780 781[system.realview.smc_fake] 782type=AmbaFake 783amba_id=0 |
| 716clock=1000 | 784clk_domain=system.clk_domain |
| 717ignore_access=false 718pio_addr=269357056 719pio_latency=100000 720system=system 721pio=system.iobus.master[13] 722 723[system.realview.sp810_fake] 724type=AmbaFake 725amba_id=0 | 785ignore_access=false 786pio_addr=269357056 787pio_latency=100000 788system=system 789pio=system.iobus.master[13] 790 791[system.realview.sp810_fake] 792type=AmbaFake 793amba_id=0 |
| 726clock=1000 | 794clk_domain=system.clk_domain |
| 727ignore_access=true 728pio_addr=268439552 729pio_latency=100000 730system=system 731pio=system.iobus.master[14] 732 733[system.realview.ssp_fake] 734type=AmbaFake 735amba_id=0 | 795ignore_access=true 796pio_addr=268439552 797pio_latency=100000 798system=system 799pio=system.iobus.master[14] 800 801[system.realview.ssp_fake] 802type=AmbaFake 803amba_id=0 |
| 736clock=1000 | 804clk_domain=system.clk_domain |
| 737ignore_access=false 738pio_addr=268488704 739pio_latency=100000 740system=system 741pio=system.iobus.master[19] 742 743[system.realview.timer0] 744type=Sp804 745amba_id=1316868 | 805ignore_access=false 806pio_addr=268488704 807pio_latency=100000 808system=system 809pio=system.iobus.master[19] 810 811[system.realview.timer0] 812type=Sp804 813amba_id=1316868 |
| 746clock=1000 | 814clk_domain=system.clk_domain |
| 747clock0=1000000 748clock1=1000000 749gic=system.realview.gic 750int_num0=36 751int_num1=36 752pio_addr=268505088 753pio_latency=100000 754system=system 755pio=system.iobus.master[2] 756 757[system.realview.timer1] 758type=Sp804 759amba_id=1316868 | 815clock0=1000000 816clock1=1000000 817gic=system.realview.gic 818int_num0=36 819int_num1=36 820pio_addr=268505088 821pio_latency=100000 822system=system 823pio=system.iobus.master[2] 824 825[system.realview.timer1] 826type=Sp804 827amba_id=1316868 |
| 760clock=1000 | 828clk_domain=system.clk_domain |
| 761clock0=1000000 762clock1=1000000 763gic=system.realview.gic 764int_num0=37 765int_num1=37 766pio_addr=268509184 767pio_latency=100000 768system=system 769pio=system.iobus.master[3] 770 771[system.realview.uart] 772type=Pl011 | 829clock0=1000000 830clock1=1000000 831gic=system.realview.gic 832int_num0=37 833int_num1=37 834pio_addr=268509184 835pio_latency=100000 836system=system 837pio=system.iobus.master[3] 838 839[system.realview.uart] 840type=Pl011 |
| 773clock=1000 | 841clk_domain=system.clk_domain |
| 774end_on_eot=false 775gic=system.realview.gic 776int_delay=100000 777int_num=44 778pio_addr=268472320 779pio_latency=100000 780platform=system.realview 781system=system 782terminal=system.terminal 783pio=system.iobus.master[0] 784 785[system.realview.uart1_fake] 786type=AmbaFake 787amba_id=0 | 842end_on_eot=false 843gic=system.realview.gic 844int_delay=100000 845int_num=44 846pio_addr=268472320 847pio_latency=100000 848platform=system.realview 849system=system 850terminal=system.terminal 851pio=system.iobus.master[0] 852 853[system.realview.uart1_fake] 854type=AmbaFake 855amba_id=0 |
| 788clock=1000 | 856clk_domain=system.clk_domain |
| 789ignore_access=false 790pio_addr=268476416 791pio_latency=100000 792system=system 793pio=system.iobus.master[10] 794 795[system.realview.uart2_fake] 796type=AmbaFake 797amba_id=0 | 857ignore_access=false 858pio_addr=268476416 859pio_latency=100000 860system=system 861pio=system.iobus.master[10] 862 863[system.realview.uart2_fake] 864type=AmbaFake 865amba_id=0 |
| 798clock=1000 | 866clk_domain=system.clk_domain |
| 799ignore_access=false 800pio_addr=268480512 801pio_latency=100000 802system=system 803pio=system.iobus.master[11] 804 805[system.realview.uart3_fake] 806type=AmbaFake 807amba_id=0 | 867ignore_access=false 868pio_addr=268480512 869pio_latency=100000 870system=system 871pio=system.iobus.master[11] 872 873[system.realview.uart3_fake] 874type=AmbaFake 875amba_id=0 |
| 808clock=1000 | 876clk_domain=system.clk_domain |
| 809ignore_access=false 810pio_addr=268484608 811pio_latency=100000 812system=system 813pio=system.iobus.master[12] 814 815[system.realview.watchdog_fake] 816type=AmbaFake 817amba_id=0 | 877ignore_access=false 878pio_addr=268484608 879pio_latency=100000 880system=system 881pio=system.iobus.master[12] 882 883[system.realview.watchdog_fake] 884type=AmbaFake 885amba_id=0 |
| 818clock=1000 | 886clk_domain=system.clk_domain |
| 819ignore_access=false 820pio_addr=268500992 821pio_latency=100000 822system=system 823pio=system.iobus.master[15] 824 825[system.terminal] 826type=Terminal 827intr_control=system.intrctrl 828number=0 829output=true 830port=3456 831 832[system.toL2Bus] 833type=CoherentBus | 887ignore_access=false 888pio_addr=268500992 889pio_latency=100000 890system=system 891pio=system.iobus.master[15] 892 893[system.terminal] 894type=Terminal 895intr_control=system.intrctrl 896number=0 897output=true 898port=3456 899 900[system.toL2Bus] 901type=CoherentBus |
| 834block_size=64 835clock=500 | 902clk_domain=system.cpu_clk_domain |
| 836header_cycles=1 837system=system 838use_default_range=false 839width=8 840master=system.l2c.cpu_side 841slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 842 843[system.vncserver] 844type=VncServer 845frame_capture=false 846number=0 847port=5900 848 | 903header_cycles=1 904system=system 905use_default_range=false 906width=8 907master=system.l2c.cpu_side 908slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port 909 910[system.vncserver] 911type=VncServer 912frame_capture=false 913number=0 914port=5900 915 |
| 916[system.voltage_domain] 917type=VoltageDomain 918voltage=1.000000 919 |
|