1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxArmSystem 13children=bridge cf0 clk_domain cpu0 cpu1 cpu_clk_domain dvfs_handler intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver voltage_domain 14atags_addr=134217728 |
15boot_loader=/dist/m5/system/binaries/boot_emm.arm |
16boot_osflags=earlyprintk=pl011,0x1c090000 console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=256MB root=/dev/sda1 17cache_line_size=64 18clk_domain=system.clk_domain 19default_p_state=UNDEFINED |
20dtb_filename=/dist/m5/system/binaries/vexpress.aarch32.ll_20131205.0-gem5.2cpu.dtb |
21early_kernel_symbols=false 22enable_context_switch_stats_dump=false 23eventq_index=0 24exit_on_work_items=false 25flags_addr=469827632 26gic_cpu_addr=738205696 27have_large_asid_64=false 28have_lpae=true 29have_security=false 30have_virtualization=false 31highest_el_is_64=false 32init_param=0 |
33kernel=/dist/m5/system/binaries/vmlinux.aarch32.ll_20131205.0-gem5 |
34kernel_addr_check=true 35load_addr_mask=268435455 36load_offset=2147483648 37machine_type=VExpress_EMM 38mem_mode=timing 39mem_ranges=2147483648:2415919103:0:0:0:0 40memories=system.physmem system.realview.nvmem system.realview.vram 41mmap_using_noreserve=false 42multi_proc=true 43multi_thread=false 44num_work_ids=16 45p_state_clk_gate_bins=20 46p_state_clk_gate_max=1000000000000 47p_state_clk_gate_min=1000 48panic_on_oops=true 49panic_on_panic=true 50phys_addr_range_64=40 51power_model=Null |
52readfile=/z/powerjg/gem5-upstream/tests/testing/../halt.sh |
53reset_addr_64=0 54symbolfile= 55thermal_components= 56thermal_model=Null 57work_begin_ckpt_count=0 58work_begin_cpu_id_exit=-1 59work_begin_exit_count=0 60work_cpus_ckpt_count=0 --- 33 unchanged lines hidden (view full) --- 94eventq_index=0 95image_file= 96read_only=false 97table_size=65536 98 99[system.cf0.image.child] 100type=RawDiskImage 101eventq_index=0 |
102image_file=/dist/m5/system/disks/linux-aarch32-ael.img |
103read_only=true 104 105[system.clk_domain] 106type=SrcClockDomain 107clock=1000 108domain_id=-1 109eventq_index=0 110init_perf_level=0 --- 41 unchanged lines hidden (view full) --- 152 153[system.cpu0.dcache] 154type=Cache 155children=tags 156addr_ranges=0:18446744073709551615:0:0:0:0 157assoc=2 158clk_domain=system.cpu_clk_domain 159clusivity=mostly_incl |
160data_latency=2 |
161default_p_state=UNDEFINED 162demand_mshr_reserve=1 163eventq_index=0 |
164is_read_only=false 165max_miss_count=0 166mshrs=6 167p_state_clk_gate_bins=20 168p_state_clk_gate_max=1000000000000 169p_state_clk_gate_min=1000 170power_model=Null 171prefetch_on_access=false 172prefetcher=Null 173response_latency=2 174sequential_access=false 175size=32768 176system=system |
177tag_latency=2 |
178tags=system.cpu0.dcache.tags 179tgts_per_mshr=8 180write_buffers=16 181writeback_clean=true 182cpu_side=system.cpu0.dcache_port 183mem_side=system.cpu0.toL2Bus.slave[1] 184 185[system.cpu0.dcache.tags] 186type=LRU 187assoc=2 188block_size=64 189clk_domain=system.cpu_clk_domain |
190data_latency=2 |
191default_p_state=UNDEFINED 192eventq_index=0 |
193p_state_clk_gate_bins=20 194p_state_clk_gate_max=1000000000000 195p_state_clk_gate_min=1000 196power_model=Null 197sequential_access=false 198size=32768 |
199tag_latency=2 |
200 201[system.cpu0.dstage2_mmu] 202type=ArmStage2MMU 203children=stage2_tlb 204eventq_index=0 205stage2_tlb=system.cpu0.dstage2_mmu.stage2_tlb 206sys=system 207tlb=system.cpu0.dtb --- 43 unchanged lines hidden (view full) --- 251 252[system.cpu0.icache] 253type=Cache 254children=tags 255addr_ranges=0:18446744073709551615:0:0:0:0 256assoc=2 257clk_domain=system.cpu_clk_domain 258clusivity=mostly_incl |
259data_latency=1 |
260default_p_state=UNDEFINED 261demand_mshr_reserve=1 262eventq_index=0 |
263is_read_only=true 264max_miss_count=0 265mshrs=2 266p_state_clk_gate_bins=20 267p_state_clk_gate_max=1000000000000 268p_state_clk_gate_min=1000 269power_model=Null 270prefetch_on_access=false 271prefetcher=Null 272response_latency=1 273sequential_access=false 274size=32768 275system=system |
276tag_latency=1 |
277tags=system.cpu0.icache.tags 278tgts_per_mshr=8 279write_buffers=8 280writeback_clean=true 281cpu_side=system.cpu0.icache_port 282mem_side=system.cpu0.toL2Bus.slave[0] 283 284[system.cpu0.icache.tags] 285type=LRU 286assoc=2 287block_size=64 288clk_domain=system.cpu_clk_domain |
289data_latency=1 |
290default_p_state=UNDEFINED 291eventq_index=0 |
292p_state_clk_gate_bins=20 293p_state_clk_gate_max=1000000000000 294p_state_clk_gate_min=1000 295power_model=Null 296sequential_access=false 297size=32768 |
298tag_latency=1 |
299 300[system.cpu0.interrupts] 301type=ArmInterrupts 302eventq_index=0 303 304[system.cpu0.isa] 305type=ArmISA 306decoderFlavour=Generic --- 78 unchanged lines hidden (view full) --- 385 386[system.cpu0.l2cache] 387type=Cache 388children=prefetcher tags 389addr_ranges=0:18446744073709551615:0:0:0:0 390assoc=16 391clk_domain=system.cpu_clk_domain 392clusivity=mostly_excl |
393data_latency=12 |
394default_p_state=UNDEFINED 395demand_mshr_reserve=1 396eventq_index=0 |
397is_read_only=false 398max_miss_count=0 399mshrs=16 400p_state_clk_gate_bins=20 401p_state_clk_gate_max=1000000000000 402p_state_clk_gate_min=1000 403power_model=Null 404prefetch_on_access=true 405prefetcher=system.cpu0.l2cache.prefetcher 406response_latency=12 407sequential_access=false 408size=1048576 409system=system |
410tag_latency=12 |
411tags=system.cpu0.l2cache.tags 412tgts_per_mshr=8 413write_buffers=8 414writeback_clean=false 415cpu_side=system.cpu0.toL2Bus.master[0] 416mem_side=system.toL2Bus.slave[0] 417 418[system.cpu0.l2cache.prefetcher] --- 26 unchanged lines hidden (view full) --- 445thresh_conf=4 446use_master_id=true 447 448[system.cpu0.l2cache.tags] 449type=RandomRepl 450assoc=16 451block_size=64 452clk_domain=system.cpu_clk_domain |
453data_latency=12 |
454default_p_state=UNDEFINED 455eventq_index=0 |
456p_state_clk_gate_bins=20 457p_state_clk_gate_max=1000000000000 458p_state_clk_gate_min=1000 459power_model=Null 460sequential_access=false 461size=1048576 |
462tag_latency=12 |
463 464[system.cpu0.toL2Bus] 465type=CoherentXBar 466children=snoop_filter 467clk_domain=system.cpu_clk_domain 468default_p_state=UNDEFINED 469eventq_index=0 470forward_latency=0 --- 65 unchanged lines hidden (view full) --- 536 537[system.cpu1.dcache] 538type=Cache 539children=tags 540addr_ranges=0:18446744073709551615:0:0:0:0 541assoc=2 542clk_domain=system.cpu_clk_domain 543clusivity=mostly_incl |
544data_latency=2 |
545default_p_state=UNDEFINED 546demand_mshr_reserve=1 547eventq_index=0 |
548is_read_only=false 549max_miss_count=0 550mshrs=6 551p_state_clk_gate_bins=20 552p_state_clk_gate_max=1000000000000 553p_state_clk_gate_min=1000 554power_model=Null 555prefetch_on_access=false 556prefetcher=Null 557response_latency=2 558sequential_access=false 559size=32768 560system=system |
561tag_latency=2 |
562tags=system.cpu1.dcache.tags 563tgts_per_mshr=8 564write_buffers=16 565writeback_clean=true 566cpu_side=system.cpu1.dcache_port 567mem_side=system.cpu1.toL2Bus.slave[1] 568 569[system.cpu1.dcache.tags] 570type=LRU 571assoc=2 572block_size=64 573clk_domain=system.cpu_clk_domain |
574data_latency=2 |
575default_p_state=UNDEFINED 576eventq_index=0 |
577p_state_clk_gate_bins=20 578p_state_clk_gate_max=1000000000000 579p_state_clk_gate_min=1000 580power_model=Null 581sequential_access=false 582size=32768 |
583tag_latency=2 |
584 585[system.cpu1.dstage2_mmu] 586type=ArmStage2MMU 587children=stage2_tlb 588eventq_index=0 589stage2_tlb=system.cpu1.dstage2_mmu.stage2_tlb 590sys=system 591tlb=system.cpu1.dtb --- 43 unchanged lines hidden (view full) --- 635 636[system.cpu1.icache] 637type=Cache 638children=tags 639addr_ranges=0:18446744073709551615:0:0:0:0 640assoc=2 641clk_domain=system.cpu_clk_domain 642clusivity=mostly_incl |
643data_latency=1 |
644default_p_state=UNDEFINED 645demand_mshr_reserve=1 646eventq_index=0 |
647is_read_only=true 648max_miss_count=0 649mshrs=2 650p_state_clk_gate_bins=20 651p_state_clk_gate_max=1000000000000 652p_state_clk_gate_min=1000 653power_model=Null 654prefetch_on_access=false 655prefetcher=Null 656response_latency=1 657sequential_access=false 658size=32768 659system=system |
660tag_latency=1 |
661tags=system.cpu1.icache.tags 662tgts_per_mshr=8 663write_buffers=8 664writeback_clean=true 665cpu_side=system.cpu1.icache_port 666mem_side=system.cpu1.toL2Bus.slave[0] 667 668[system.cpu1.icache.tags] 669type=LRU 670assoc=2 671block_size=64 672clk_domain=system.cpu_clk_domain |
673data_latency=1 |
674default_p_state=UNDEFINED 675eventq_index=0 |
676p_state_clk_gate_bins=20 677p_state_clk_gate_max=1000000000000 678p_state_clk_gate_min=1000 679power_model=Null 680sequential_access=false 681size=32768 |
682tag_latency=1 |
683 684[system.cpu1.interrupts] 685type=ArmInterrupts 686eventq_index=0 687 688[system.cpu1.isa] 689type=ArmISA 690decoderFlavour=Generic --- 78 unchanged lines hidden (view full) --- 769 770[system.cpu1.l2cache] 771type=Cache 772children=prefetcher tags 773addr_ranges=0:18446744073709551615:0:0:0:0 774assoc=16 775clk_domain=system.cpu_clk_domain 776clusivity=mostly_excl |
777data_latency=12 |
778default_p_state=UNDEFINED 779demand_mshr_reserve=1 780eventq_index=0 |
781is_read_only=false 782max_miss_count=0 783mshrs=16 784p_state_clk_gate_bins=20 785p_state_clk_gate_max=1000000000000 786p_state_clk_gate_min=1000 787power_model=Null 788prefetch_on_access=true 789prefetcher=system.cpu1.l2cache.prefetcher 790response_latency=12 791sequential_access=false 792size=1048576 793system=system |
794tag_latency=12 |
795tags=system.cpu1.l2cache.tags 796tgts_per_mshr=8 797write_buffers=8 798writeback_clean=false 799cpu_side=system.cpu1.toL2Bus.master[0] 800mem_side=system.toL2Bus.slave[1] 801 802[system.cpu1.l2cache.prefetcher] --- 26 unchanged lines hidden (view full) --- 829thresh_conf=4 830use_master_id=true 831 832[system.cpu1.l2cache.tags] 833type=RandomRepl 834assoc=16 835block_size=64 836clk_domain=system.cpu_clk_domain |
837data_latency=12 |
838default_p_state=UNDEFINED 839eventq_index=0 |
840p_state_clk_gate_bins=20 841p_state_clk_gate_max=1000000000000 842p_state_clk_gate_min=1000 843power_model=Null 844sequential_access=false 845size=1048576 |
846tag_latency=12 |
847 848[system.cpu1.toL2Bus] 849type=CoherentXBar 850children=snoop_filter 851clk_domain=system.cpu_clk_domain 852default_p_state=UNDEFINED 853eventq_index=0 854forward_latency=0 --- 63 unchanged lines hidden (view full) --- 918 919[system.iocache] 920type=Cache 921children=tags 922addr_ranges=2147483648:2415919103:0:0:0:0 923assoc=8 924clk_domain=system.clk_domain 925clusivity=mostly_incl |
926data_latency=50 |
927default_p_state=UNDEFINED 928demand_mshr_reserve=1 929eventq_index=0 |
930is_read_only=false 931max_miss_count=0 932mshrs=20 933p_state_clk_gate_bins=20 934p_state_clk_gate_max=1000000000000 935p_state_clk_gate_min=1000 936power_model=Null 937prefetch_on_access=false 938prefetcher=Null 939response_latency=50 940sequential_access=false 941size=1024 942system=system |
943tag_latency=50 |
944tags=system.iocache.tags 945tgts_per_mshr=12 946write_buffers=8 947writeback_clean=false 948cpu_side=system.iobus.master[25] 949mem_side=system.membus.slave[3] 950 951[system.iocache.tags] 952type=LRU 953assoc=8 954block_size=64 955clk_domain=system.clk_domain |
956data_latency=50 |
957default_p_state=UNDEFINED 958eventq_index=0 |
959p_state_clk_gate_bins=20 960p_state_clk_gate_max=1000000000000 961p_state_clk_gate_min=1000 962power_model=Null 963sequential_access=false 964size=1024 |
965tag_latency=50 |
966 967[system.l2c] 968type=Cache 969children=tags 970addr_ranges=0:18446744073709551615:0:0:0:0 971assoc=8 972clk_domain=system.cpu_clk_domain 973clusivity=mostly_incl |
974data_latency=20 |
975default_p_state=UNDEFINED 976demand_mshr_reserve=1 977eventq_index=0 |
978is_read_only=false 979max_miss_count=0 980mshrs=20 981p_state_clk_gate_bins=20 982p_state_clk_gate_max=1000000000000 983p_state_clk_gate_min=1000 984power_model=Null 985prefetch_on_access=false 986prefetcher=Null 987response_latency=20 988sequential_access=false 989size=4194304 990system=system |
991tag_latency=20 |
992tags=system.l2c.tags 993tgts_per_mshr=12 994write_buffers=8 995writeback_clean=false 996cpu_side=system.toL2Bus.master[0] 997mem_side=system.membus.slave[2] 998 999[system.l2c.tags] 1000type=LRU 1001assoc=8 1002block_size=64 1003clk_domain=system.cpu_clk_domain |
1004data_latency=20 |
1005default_p_state=UNDEFINED 1006eventq_index=0 |
1007p_state_clk_gate_bins=20 1008p_state_clk_gate_max=1000000000000 1009p_state_clk_gate_min=1000 1010power_model=Null 1011sequential_access=false 1012size=4194304 |
1013tag_latency=20 |
1014 1015[system.membus] 1016type=CoherentXBar 1017children=badaddr_responder snoop_filter 1018clk_domain=system.clk_domain 1019default_p_state=UNDEFINED 1020eventq_index=0 1021forward_latency=4 --- 1107 unchanged lines hidden --- |