1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
--- 33 unchanged lines hidden (view full) ---
42multi_thread=false
43num_work_ids=16
44panic_on_oops=true
45panic_on_panic=true
46phys_addr_range_64=40
47readfile=/z/atgutier/gem5/gem5-commit/tests/halt.sh
48reset_addr_64=0
49symbolfile=
50work_begin_ckpt_count=0
51work_begin_cpu_id_exit=-1
52work_begin_exit_count=0
53work_cpus_ckpt_count=0
54work_end_ckpt_count=0
55work_end_exit_count=0
56work_item_id=-1
57system_port=system.membus.slave[1]
--- 79 unchanged lines hidden (view full) ---
137type=Cache
138children=tags
139addr_ranges=0:18446744073709551615
140assoc=2
141clk_domain=system.cpu_clk_domain
142clusivity=mostly_incl
143demand_mshr_reserve=1
144eventq_index=0
145forward_snoops=true
146hit_latency=2
147is_read_only=false
148max_miss_count=0
149mshrs=6
150prefetch_on_access=false
151prefetcher=Null
152response_latency=2
153sequential_access=false
--- 61 unchanged lines hidden (view full) ---
215type=Cache
216children=tags
217addr_ranges=0:18446744073709551615
218assoc=2
219clk_domain=system.cpu_clk_domain
220clusivity=mostly_incl
221demand_mshr_reserve=1
222eventq_index=0
223forward_snoops=false
224hit_latency=1
225is_read_only=true
226max_miss_count=0
227mshrs=2
228prefetch_on_access=false
229prefetcher=Null
230response_latency=1
231sequential_access=false
--- 96 unchanged lines hidden (view full) ---
328type=Cache
329children=prefetcher tags
330addr_ranges=0:18446744073709551615
331assoc=16
332clk_domain=system.cpu_clk_domain
333clusivity=mostly_excl
334demand_mshr_reserve=1
335eventq_index=0
336forward_snoops=true
337hit_latency=12
338is_read_only=false
339max_miss_count=0
340mshrs=16
341prefetch_on_access=true
342prefetcher=system.cpu0.l2cache.prefetcher
343response_latency=12
344sequential_access=false
--- 43 unchanged lines hidden (view full) ---
388
389[system.cpu0.toL2Bus]
390type=CoherentXBar
391children=snoop_filter
392clk_domain=system.cpu_clk_domain
393eventq_index=0
394forward_latency=0
395frontend_latency=1
396response_latency=1
397snoop_filter=system.cpu0.toL2Bus.snoop_filter
398snoop_response_latency=1
399system=system
400use_default_range=false
401width=32
402master=system.cpu0.l2cache.cpu_side
403slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
--- 48 unchanged lines hidden (view full) ---
452type=Cache
453children=tags
454addr_ranges=0:18446744073709551615
455assoc=2
456clk_domain=system.cpu_clk_domain
457clusivity=mostly_incl
458demand_mshr_reserve=1
459eventq_index=0
460forward_snoops=true
461hit_latency=2
462is_read_only=false
463max_miss_count=0
464mshrs=6
465prefetch_on_access=false
466prefetcher=Null
467response_latency=2
468sequential_access=false
--- 61 unchanged lines hidden (view full) ---
530type=Cache
531children=tags
532addr_ranges=0:18446744073709551615
533assoc=2
534clk_domain=system.cpu_clk_domain
535clusivity=mostly_incl
536demand_mshr_reserve=1
537eventq_index=0
538forward_snoops=false
539hit_latency=1
540is_read_only=true
541max_miss_count=0
542mshrs=2
543prefetch_on_access=false
544prefetcher=Null
545response_latency=1
546sequential_access=false
--- 96 unchanged lines hidden (view full) ---
643type=Cache
644children=prefetcher tags
645addr_ranges=0:18446744073709551615
646assoc=16
647clk_domain=system.cpu_clk_domain
648clusivity=mostly_excl
649demand_mshr_reserve=1
650eventq_index=0
651forward_snoops=true
652hit_latency=12
653is_read_only=false
654max_miss_count=0
655mshrs=16
656prefetch_on_access=true
657prefetcher=system.cpu1.l2cache.prefetcher
658response_latency=12
659sequential_access=false
--- 43 unchanged lines hidden (view full) ---
703
704[system.cpu1.toL2Bus]
705type=CoherentXBar
706children=snoop_filter
707clk_domain=system.cpu_clk_domain
708eventq_index=0
709forward_latency=0
710frontend_latency=1
711response_latency=1
712snoop_filter=system.cpu1.toL2Bus.snoop_filter
713snoop_response_latency=1
714system=system
715use_default_range=false
716width=32
717master=system.cpu1.l2cache.cpu_side
718slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
--- 46 unchanged lines hidden (view full) ---
765type=Cache
766children=tags
767addr_ranges=2147483648:2415919103
768assoc=8
769clk_domain=system.clk_domain
770clusivity=mostly_incl
771demand_mshr_reserve=1
772eventq_index=0
773forward_snoops=false
774hit_latency=50
775is_read_only=false
776max_miss_count=0
777mshrs=20
778prefetch_on_access=false
779prefetcher=Null
780response_latency=50
781sequential_access=false
--- 20 unchanged lines hidden (view full) ---
802type=Cache
803children=tags
804addr_ranges=0:18446744073709551615
805assoc=8
806clk_domain=system.cpu_clk_domain
807clusivity=mostly_incl
808demand_mshr_reserve=1
809eventq_index=0
810forward_snoops=true
811hit_latency=20
812is_read_only=false
813max_miss_count=0
814mshrs=20
815prefetch_on_access=false
816prefetcher=Null
817response_latency=20
818sequential_access=false
--- 18 unchanged lines hidden (view full) ---
837
838[system.membus]
839type=CoherentXBar
840children=badaddr_responder
841clk_domain=system.clk_domain
842eventq_index=0
843forward_latency=4
844frontend_latency=3
845response_latency=2
846snoop_filter=Null
847snoop_response_latency=4
848system=system
849use_default_range=false
850width=16
851default=system.membus.badaddr_responder.pio
852master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
--- 216 unchanged lines hidden (view full) ---
1069vnc=system.vncserver
1070dma=system.iobus.slave[1]
1071pio=system.iobus.master[5]
1072
1073[system.realview.dcc]
1074type=SubSystem
1075children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
1076eventq_index=0
1077
1078[system.realview.dcc.osc_cpu]
1079type=RealViewOsc
1080dcc=0
1081device=0
1082eventq_index=0
1083freq=16667
1084parent=system.realview.realview_io
--- 371 unchanged lines hidden (view full) ---
1456int_num_watchdog=30
1457pio_addr=738721792
1458pio_latency=100000
1459system=system
1460pio=system.membus.master[4]
1461
1462[system.realview.mcc]
1463type=SubSystem
1464children=osc_clcd osc_mcc osc_peripheral osc_system_bus
1465eventq_index=0
1466
1467[system.realview.mcc.osc_clcd]
1468type=RealViewOsc
1469dcc=0
1470device=1
1471eventq_index=0
1472freq=42105
1473parent=system.realview.realview_io
--- 29 unchanged lines hidden (view full) ---
1503device=4
1504eventq_index=0
1505freq=41667
1506parent=system.realview.realview_io
1507position=0
1508site=0
1509voltage_domain=system.voltage_domain
1510
1511[system.realview.mmc_fake]
1512type=AmbaFake
1513amba_id=0
1514clk_domain=system.clk_domain
1515eventq_index=0
1516ignore_access=false
1517pio_addr=470089728
1518pio_latency=100000
--- 207 unchanged lines hidden (view full) ---
1726
1727[system.toL2Bus]
1728type=CoherentXBar
1729children=snoop_filter
1730clk_domain=system.cpu_clk_domain
1731eventq_index=0
1732forward_latency=0
1733frontend_latency=1
1734response_latency=1
1735snoop_filter=system.toL2Bus.snoop_filter
1736snoop_response_latency=1
1737system=system
1738use_default_range=false
1739width=32
1740master=system.l2c.cpu_side
1741slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
--- 20 unchanged lines hidden ---
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
--- 33 unchanged lines hidden (view full) ---
42multi_thread=false
43num_work_ids=16
44panic_on_oops=true
45panic_on_panic=true
46phys_addr_range_64=40
47readfile=/z/atgutier/gem5/gem5-commit/tests/halt.sh
48reset_addr_64=0
49symbolfile=
50work_begin_ckpt_count=0
51work_begin_cpu_id_exit=-1
52work_begin_exit_count=0
53work_cpus_ckpt_count=0
54work_end_ckpt_count=0
55work_end_exit_count=0
56work_item_id=-1
57system_port=system.membus.slave[1]
--- 79 unchanged lines hidden (view full) ---
137type=Cache
138children=tags
139addr_ranges=0:18446744073709551615
140assoc=2
141clk_domain=system.cpu_clk_domain
142clusivity=mostly_incl
143demand_mshr_reserve=1
144eventq_index=0
145forward_snoops=true
146hit_latency=2
147is_read_only=false
148max_miss_count=0
149mshrs=6
150prefetch_on_access=false
151prefetcher=Null
152response_latency=2
153sequential_access=false
--- 61 unchanged lines hidden (view full) ---
215type=Cache
216children=tags
217addr_ranges=0:18446744073709551615
218assoc=2
219clk_domain=system.cpu_clk_domain
220clusivity=mostly_incl
221demand_mshr_reserve=1
222eventq_index=0
223forward_snoops=false
224hit_latency=1
225is_read_only=true
226max_miss_count=0
227mshrs=2
228prefetch_on_access=false
229prefetcher=Null
230response_latency=1
231sequential_access=false
--- 96 unchanged lines hidden (view full) ---
328type=Cache
329children=prefetcher tags
330addr_ranges=0:18446744073709551615
331assoc=16
332clk_domain=system.cpu_clk_domain
333clusivity=mostly_excl
334demand_mshr_reserve=1
335eventq_index=0
336forward_snoops=true
337hit_latency=12
338is_read_only=false
339max_miss_count=0
340mshrs=16
341prefetch_on_access=true
342prefetcher=system.cpu0.l2cache.prefetcher
343response_latency=12
344sequential_access=false
--- 43 unchanged lines hidden (view full) ---
388
389[system.cpu0.toL2Bus]
390type=CoherentXBar
391children=snoop_filter
392clk_domain=system.cpu_clk_domain
393eventq_index=0
394forward_latency=0
395frontend_latency=1
396response_latency=1
397snoop_filter=system.cpu0.toL2Bus.snoop_filter
398snoop_response_latency=1
399system=system
400use_default_range=false
401width=32
402master=system.cpu0.l2cache.cpu_side
403slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu0.itb.walker.port system.cpu0.dtb.walker.port
--- 48 unchanged lines hidden (view full) ---
452type=Cache
453children=tags
454addr_ranges=0:18446744073709551615
455assoc=2
456clk_domain=system.cpu_clk_domain
457clusivity=mostly_incl
458demand_mshr_reserve=1
459eventq_index=0
460forward_snoops=true
461hit_latency=2
462is_read_only=false
463max_miss_count=0
464mshrs=6
465prefetch_on_access=false
466prefetcher=Null
467response_latency=2
468sequential_access=false
--- 61 unchanged lines hidden (view full) ---
530type=Cache
531children=tags
532addr_ranges=0:18446744073709551615
533assoc=2
534clk_domain=system.cpu_clk_domain
535clusivity=mostly_incl
536demand_mshr_reserve=1
537eventq_index=0
538forward_snoops=false
539hit_latency=1
540is_read_only=true
541max_miss_count=0
542mshrs=2
543prefetch_on_access=false
544prefetcher=Null
545response_latency=1
546sequential_access=false
--- 96 unchanged lines hidden (view full) ---
643type=Cache
644children=prefetcher tags
645addr_ranges=0:18446744073709551615
646assoc=16
647clk_domain=system.cpu_clk_domain
648clusivity=mostly_excl
649demand_mshr_reserve=1
650eventq_index=0
651forward_snoops=true
652hit_latency=12
653is_read_only=false
654max_miss_count=0
655mshrs=16
656prefetch_on_access=true
657prefetcher=system.cpu1.l2cache.prefetcher
658response_latency=12
659sequential_access=false
--- 43 unchanged lines hidden (view full) ---
703
704[system.cpu1.toL2Bus]
705type=CoherentXBar
706children=snoop_filter
707clk_domain=system.cpu_clk_domain
708eventq_index=0
709forward_latency=0
710frontend_latency=1
711response_latency=1
712snoop_filter=system.cpu1.toL2Bus.snoop_filter
713snoop_response_latency=1
714system=system
715use_default_range=false
716width=32
717master=system.cpu1.l2cache.cpu_side
718slave=system.cpu1.icache.mem_side system.cpu1.dcache.mem_side system.cpu1.itb.walker.port system.cpu1.dtb.walker.port
--- 46 unchanged lines hidden (view full) ---
765type=Cache
766children=tags
767addr_ranges=2147483648:2415919103
768assoc=8
769clk_domain=system.clk_domain
770clusivity=mostly_incl
771demand_mshr_reserve=1
772eventq_index=0
773forward_snoops=false
774hit_latency=50
775is_read_only=false
776max_miss_count=0
777mshrs=20
778prefetch_on_access=false
779prefetcher=Null
780response_latency=50
781sequential_access=false
--- 20 unchanged lines hidden (view full) ---
802type=Cache
803children=tags
804addr_ranges=0:18446744073709551615
805assoc=8
806clk_domain=system.cpu_clk_domain
807clusivity=mostly_incl
808demand_mshr_reserve=1
809eventq_index=0
810forward_snoops=true
811hit_latency=20
812is_read_only=false
813max_miss_count=0
814mshrs=20
815prefetch_on_access=false
816prefetcher=Null
817response_latency=20
818sequential_access=false
--- 18 unchanged lines hidden (view full) ---
837
838[system.membus]
839type=CoherentXBar
840children=badaddr_responder
841clk_domain=system.clk_domain
842eventq_index=0
843forward_latency=4
844frontend_latency=3
845response_latency=2
846snoop_filter=Null
847snoop_response_latency=4
848system=system
849use_default_range=false
850width=16
851default=system.membus.badaddr_responder.pio
852master=system.bridge.slave system.realview.nvmem.port system.realview.gic.pio system.realview.vgic.pio system.realview.local_cpu_timer.pio system.physmem.port
--- 216 unchanged lines hidden (view full) ---
1069vnc=system.vncserver
1070dma=system.iobus.slave[1]
1071pio=system.iobus.master[5]
1072
1073[system.realview.dcc]
1074type=SubSystem
1075children=osc_cpu osc_ddr osc_hsbm osc_pxl osc_smb osc_sys
1076eventq_index=0
1077
1078[system.realview.dcc.osc_cpu]
1079type=RealViewOsc
1080dcc=0
1081device=0
1082eventq_index=0
1083freq=16667
1084parent=system.realview.realview_io
--- 371 unchanged lines hidden (view full) ---
1456int_num_watchdog=30
1457pio_addr=738721792
1458pio_latency=100000
1459system=system
1460pio=system.membus.master[4]
1461
1462[system.realview.mcc]
1463type=SubSystem
1464children=osc_clcd osc_mcc osc_peripheral osc_system_bus
1465eventq_index=0
1466
1467[system.realview.mcc.osc_clcd]
1468type=RealViewOsc
1469dcc=0
1470device=1
1471eventq_index=0
1472freq=42105
1473parent=system.realview.realview_io
--- 29 unchanged lines hidden (view full) ---
1503device=4
1504eventq_index=0
1505freq=41667
1506parent=system.realview.realview_io
1507position=0
1508site=0
1509voltage_domain=system.voltage_domain
1510
1511[system.realview.mmc_fake]
1512type=AmbaFake
1513amba_id=0
1514clk_domain=system.clk_domain
1515eventq_index=0
1516ignore_access=false
1517pio_addr=470089728
1518pio_latency=100000
--- 207 unchanged lines hidden (view full) ---
1726
1727[system.toL2Bus]
1728type=CoherentXBar
1729children=snoop_filter
1730clk_domain=system.cpu_clk_domain
1731eventq_index=0
1732forward_latency=0
1733frontend_latency=1
1734response_latency=1
1735snoop_filter=system.toL2Bus.snoop_filter
1736snoop_response_latency=1
1737system=system
1738use_default_range=false
1739width=32
1740master=system.l2c.cpu_side
1741slave=system.cpu0.l2cache.mem_side system.cpu1.l2cache.mem_side
--- 20 unchanged lines hidden ---