| stats.txt (9283:490958b032d6) | stats.txt (9312:e05e1b69ebf2) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.332810 # Number of seconds simulated 4sim_ticks 2332810264000 # Number of ticks simulated 5final_tick 2332810264000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.332810 # Number of seconds simulated 4sim_ticks 2332810264000 # Number of ticks simulated 5final_tick 2332810264000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1681370 # Simulator instruction rate (inst/s) 8host_op_rate 2162138 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 64929680145 # Simulator tick rate (ticks/s) 10host_mem_usage 380112 # Number of bytes of host memory used 11host_seconds 35.93 # Real time elapsed on the host | 7host_inst_rate 1184768 # Simulator instruction rate (inst/s) 8host_op_rate 1523538 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 45752340761 # Simulator tick rate (ticks/s) 10host_mem_usage 382236 # Number of bytes of host memory used 11host_seconds 50.99 # Real time elapsed on the host |
| 12sim_insts 60408639 # Number of instructions simulated 13sim_ops 77681819 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 192 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 705120 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 9071632 # Number of bytes read from this memory 19system.physmem.bytes_read::total 121450608 # Number of bytes read from this memory --- 24 unchanged lines hidden (view full) --- 44system.physmem.bw_write::total 2880238 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_total::writebacks 1587455 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::realview.clcd 47870736 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu.dtb.walker 137 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.itb.walker 82 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu.inst 302262 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu.data 5181496 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::total 54942169 # Total bandwidth to/from this memory (bytes/s) | 12sim_insts 60408639 # Number of instructions simulated 13sim_ops 77681819 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory 15system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 192 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 705120 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 9071632 # Number of bytes read from this memory 19system.physmem.bytes_read::total 121450608 # Number of bytes read from this memory --- 24 unchanged lines hidden (view full) --- 44system.physmem.bw_write::total 2880238 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_total::writebacks 1587455 # Total bandwidth to/from this memory (bytes/s) 46system.physmem.bw_total::realview.clcd 47870736 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu.dtb.walker 137 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.itb.walker 82 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu.inst 302262 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu.data 5181496 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::total 54942169 # Total bandwidth to/from this memory (bytes/s) |
| 52system.physmem.readReqs 0 # Total number of read requests seen 53system.physmem.writeReqs 0 # Total number of write requests seen 54system.physmem.cpureqs 0 # Reqs generatd by CPU via cache - shady 55system.physmem.bytesRead 0 # Total number of bytes read from memory 56system.physmem.bytesWritten 0 # Total number of bytes written to memory 57system.physmem.bytesConsumedRd 0 # bytesRead derated as per pkt->getSize() 58system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() 59system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q 60system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed 61system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis 62system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis 63system.physmem.perBankRdReqs::2 0 # Track reads on a per bank basis 64system.physmem.perBankRdReqs::3 0 # Track reads on a per bank basis 65system.physmem.perBankRdReqs::4 0 # Track reads on a per bank basis 66system.physmem.perBankRdReqs::5 0 # Track reads on a per bank basis 67system.physmem.perBankRdReqs::6 0 # Track reads on a per bank basis 68system.physmem.perBankRdReqs::7 0 # Track reads on a per bank basis 69system.physmem.perBankRdReqs::8 0 # Track reads on a per bank basis 70system.physmem.perBankRdReqs::9 0 # Track reads on a per bank basis 71system.physmem.perBankRdReqs::10 0 # Track reads on a per bank basis 72system.physmem.perBankRdReqs::11 0 # Track reads on a per bank basis 73system.physmem.perBankRdReqs::12 0 # Track reads on a per bank basis 74system.physmem.perBankRdReqs::13 0 # Track reads on a per bank basis 75system.physmem.perBankRdReqs::14 0 # Track reads on a per bank basis 76system.physmem.perBankRdReqs::15 0 # Track reads on a per bank basis 77system.physmem.perBankWrReqs::0 0 # Track writes on a per bank basis 78system.physmem.perBankWrReqs::1 0 # Track writes on a per bank basis 79system.physmem.perBankWrReqs::2 0 # Track writes on a per bank basis 80system.physmem.perBankWrReqs::3 0 # Track writes on a per bank basis 81system.physmem.perBankWrReqs::4 0 # Track writes on a per bank basis 82system.physmem.perBankWrReqs::5 0 # Track writes on a per bank basis 83system.physmem.perBankWrReqs::6 0 # Track writes on a per bank basis 84system.physmem.perBankWrReqs::7 0 # Track writes on a per bank basis 85system.physmem.perBankWrReqs::8 0 # Track writes on a per bank basis 86system.physmem.perBankWrReqs::9 0 # Track writes on a per bank basis 87system.physmem.perBankWrReqs::10 0 # Track writes on a per bank basis 88system.physmem.perBankWrReqs::11 0 # Track writes on a per bank basis 89system.physmem.perBankWrReqs::12 0 # Track writes on a per bank basis 90system.physmem.perBankWrReqs::13 0 # Track writes on a per bank basis 91system.physmem.perBankWrReqs::14 0 # Track writes on a per bank basis 92system.physmem.perBankWrReqs::15 0 # Track writes on a per bank basis 93system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry 94system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry 95system.physmem.totGap 0 # Total gap between requests 96system.physmem.readPktSize::0 0 # Categorize read packet sizes 97system.physmem.readPktSize::1 0 # Categorize read packet sizes 98system.physmem.readPktSize::2 0 # Categorize read packet sizes 99system.physmem.readPktSize::3 0 # Categorize read packet sizes 100system.physmem.readPktSize::4 0 # Categorize read packet sizes 101system.physmem.readPktSize::5 0 # Categorize read packet sizes 102system.physmem.readPktSize::6 0 # Categorize read packet sizes 103system.physmem.readPktSize::7 0 # Categorize read packet sizes 104system.physmem.readPktSize::8 0 # Categorize read packet sizes 105system.physmem.writePktSize::0 0 # categorize write packet sizes 106system.physmem.writePktSize::1 0 # categorize write packet sizes 107system.physmem.writePktSize::2 0 # categorize write packet sizes 108system.physmem.writePktSize::3 0 # categorize write packet sizes 109system.physmem.writePktSize::4 0 # categorize write packet sizes 110system.physmem.writePktSize::5 0 # categorize write packet sizes 111system.physmem.writePktSize::6 0 # categorize write packet sizes 112system.physmem.writePktSize::7 0 # categorize write packet sizes 113system.physmem.writePktSize::8 0 # categorize write packet sizes 114system.physmem.neitherpktsize::0 0 # categorize neither packet sizes 115system.physmem.neitherpktsize::1 0 # categorize neither packet sizes 116system.physmem.neitherpktsize::2 0 # categorize neither packet sizes 117system.physmem.neitherpktsize::3 0 # categorize neither packet sizes 118system.physmem.neitherpktsize::4 0 # categorize neither packet sizes 119system.physmem.neitherpktsize::5 0 # categorize neither packet sizes 120system.physmem.neitherpktsize::6 0 # categorize neither packet sizes 121system.physmem.neitherpktsize::7 0 # categorize neither packet sizes 122system.physmem.neitherpktsize::8 0 # categorize neither packet sizes 123system.physmem.rdQLenPdf::0 0 # What read queue length does an incoming req see 124system.physmem.rdQLenPdf::1 0 # What read queue length does an incoming req see 125system.physmem.rdQLenPdf::2 0 # What read queue length does an incoming req see 126system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see 127system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see 128system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see 129system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see 130system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see 131system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see 132system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see 133system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see 134system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see 135system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see 136system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see 137system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see 138system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see 139system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see 140system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see 141system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see 142system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see 143system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see 144system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see 145system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see 146system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see 147system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see 148system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see 149system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see 150system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see 151system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see 152system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see 153system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see 154system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see 155system.physmem.rdQLenPdf::32 0 # What read queue length does an incoming req see 156system.physmem.wrQLenPdf::0 0 # What write queue length does an incoming req see 157system.physmem.wrQLenPdf::1 0 # What write queue length does an incoming req see 158system.physmem.wrQLenPdf::2 0 # What write queue length does an incoming req see 159system.physmem.wrQLenPdf::3 0 # What write queue length does an incoming req see 160system.physmem.wrQLenPdf::4 0 # What write queue length does an incoming req see 161system.physmem.wrQLenPdf::5 0 # What write queue length does an incoming req see 162system.physmem.wrQLenPdf::6 0 # What write queue length does an incoming req see 163system.physmem.wrQLenPdf::7 0 # What write queue length does an incoming req see 164system.physmem.wrQLenPdf::8 0 # What write queue length does an incoming req see 165system.physmem.wrQLenPdf::9 0 # What write queue length does an incoming req see 166system.physmem.wrQLenPdf::10 0 # What write queue length does an incoming req see 167system.physmem.wrQLenPdf::11 0 # What write queue length does an incoming req see 168system.physmem.wrQLenPdf::12 0 # What write queue length does an incoming req see 169system.physmem.wrQLenPdf::13 0 # What write queue length does an incoming req see 170system.physmem.wrQLenPdf::14 0 # What write queue length does an incoming req see 171system.physmem.wrQLenPdf::15 0 # What write queue length does an incoming req see 172system.physmem.wrQLenPdf::16 0 # What write queue length does an incoming req see 173system.physmem.wrQLenPdf::17 0 # What write queue length does an incoming req see 174system.physmem.wrQLenPdf::18 0 # What write queue length does an incoming req see 175system.physmem.wrQLenPdf::19 0 # What write queue length does an incoming req see 176system.physmem.wrQLenPdf::20 0 # What write queue length does an incoming req see 177system.physmem.wrQLenPdf::21 0 # What write queue length does an incoming req see 178system.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see 179system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see 180system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see 181system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see 182system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see 183system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see 184system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see 185system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see 186system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see 187system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see 188system.physmem.wrQLenPdf::32 0 # What write queue length does an incoming req see 189system.physmem.totQLat 0 # Total cycles spent in queuing delays 190system.physmem.totMemAccLat 0 # Sum of mem lat for all requests 191system.physmem.totBusLat 0 # Total cycles spent in databus access 192system.physmem.totBankLat 0 # Total cycles spent in bank access 193system.physmem.avgQLat nan # Average queueing delay per request 194system.physmem.avgBankLat nan # Average bank access latency per request 195system.physmem.avgBusLat nan # Average bus latency per request 196system.physmem.avgMemAccLat nan # Average memory access latency 197system.physmem.avgRdBW 0.00 # Average achieved read bandwidth in MB/s 198system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MB/s 199system.physmem.avgConsumedRdBW 0.00 # Average consumed read bandwidth in MB/s 200system.physmem.avgConsumedWrBW 0.00 # Average consumed write bandwidth in MB/s 201system.physmem.peakBW 16000.00 # Theoretical peak bandwidth in MB/s 202system.physmem.busUtil 0.00 # Data bus utilization in percentage 203system.physmem.avgRdQLen 0.00 # Average read queue length over time 204system.physmem.avgWrQLen 0.00 # Average write queue length over time 205system.physmem.readRowHits 0 # Number of row buffer hits during reads 206system.physmem.writeRowHits 0 # Number of row buffer hits during writes 207system.physmem.readRowHitRate nan # Row buffer hit rate for reads 208system.physmem.writeRowHitRate nan # Row buffer hit rate for writes 209system.physmem.avgGap nan # Average gap between requests |
|
| 52system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 53system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 54system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 55system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 56system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 57system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 58system.realview.nvmem.bw_read::cpu.inst 9 # Total read bandwidth from this memory (bytes/s) 59system.realview.nvmem.bw_read::total 9 # Total read bandwidth from this memory (bytes/s) 60system.realview.nvmem.bw_inst_read::cpu.inst 9 # Instruction read bandwidth from this memory (bytes/s) 61system.realview.nvmem.bw_inst_read::total 9 # Instruction read bandwidth from this memory (bytes/s) 62system.realview.nvmem.bw_total::cpu.inst 9 # Total bandwidth to/from this memory (bytes/s) 63system.realview.nvmem.bw_total::total 9 # Total bandwidth to/from this memory (bytes/s) | 210system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 211system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 212system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 213system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 214system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 215system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 216system.realview.nvmem.bw_read::cpu.inst 9 # Total read bandwidth from this memory (bytes/s) 217system.realview.nvmem.bw_read::total 9 # Total read bandwidth from this memory (bytes/s) 218system.realview.nvmem.bw_inst_read::cpu.inst 9 # Instruction read bandwidth from this memory (bytes/s) 219system.realview.nvmem.bw_inst_read::total 9 # Instruction read bandwidth from this memory (bytes/s) 220system.realview.nvmem.bw_total::cpu.inst 9 # Total bandwidth to/from this memory (bytes/s) 221system.realview.nvmem.bw_total::total 9 # Total bandwidth to/from this memory (bytes/s) |
| 64system.cpu.l2cache.replacements 62243 # number of replacements 65system.cpu.l2cache.tagsinuse 50007.272909 # Cycle average of tags in use 66system.cpu.l2cache.total_refs 1669922 # Total number of references to valid blocks. 67system.cpu.l2cache.sampled_refs 127628 # Sample count of references to valid blocks. 68system.cpu.l2cache.avg_refs 13.084292 # Average number of references to valid blocks. 69system.cpu.l2cache.warmup_cycle 2316901489000 # Cycle when the warmup percentage was hit. 70system.cpu.l2cache.occ_blocks::writebacks 36899.582990 # Average occupied blocks per requestor 71system.cpu.l2cache.occ_blocks::cpu.dtb.walker 2.960148 # Average occupied blocks per requestor 72system.cpu.l2cache.occ_blocks::cpu.itb.walker 0.993931 # Average occupied blocks per requestor 73system.cpu.l2cache.occ_blocks::cpu.inst 7014.720482 # Average occupied blocks per requestor 74system.cpu.l2cache.occ_blocks::cpu.data 6089.015357 # Average occupied blocks per requestor 75system.cpu.l2cache.occ_percent::writebacks 0.563043 # Average percentage of cache occupancy 76system.cpu.l2cache.occ_percent::cpu.dtb.walker 0.000045 # Average percentage of cache occupancy 77system.cpu.l2cache.occ_percent::cpu.itb.walker 0.000015 # Average percentage of cache occupancy 78system.cpu.l2cache.occ_percent::cpu.inst 0.107036 # Average percentage of cache occupancy 79system.cpu.l2cache.occ_percent::cpu.data 0.092911 # Average percentage of cache occupancy 80system.cpu.l2cache.occ_percent::total 0.763050 # Average percentage of cache occupancy 81system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 7507 # number of ReadReq hits 82system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3129 # number of ReadReq hits 83system.cpu.l2cache.ReadReq_hits::cpu.inst 838871 # number of ReadReq hits 84system.cpu.l2cache.ReadReq_hits::cpu.data 366771 # number of ReadReq hits 85system.cpu.l2cache.ReadReq_hits::total 1216278 # number of ReadReq hits 86system.cpu.l2cache.Writeback_hits::writebacks 592643 # number of Writeback hits 87system.cpu.l2cache.Writeback_hits::total 592643 # number of Writeback hits 88system.cpu.l2cache.UpgradeReq_hits::cpu.data 26 # number of UpgradeReq hits 89system.cpu.l2cache.UpgradeReq_hits::total 26 # number of UpgradeReq hits 90system.cpu.l2cache.ReadExReq_hits::cpu.data 113739 # number of ReadExReq hits 91system.cpu.l2cache.ReadExReq_hits::total 113739 # number of ReadExReq hits 92system.cpu.l2cache.demand_hits::cpu.dtb.walker 7507 # number of demand (read+write) hits 93system.cpu.l2cache.demand_hits::cpu.itb.walker 3129 # number of demand (read+write) hits 94system.cpu.l2cache.demand_hits::cpu.inst 838871 # number of demand (read+write) hits 95system.cpu.l2cache.demand_hits::cpu.data 480510 # number of demand (read+write) hits 96system.cpu.l2cache.demand_hits::total 1330017 # number of demand (read+write) hits 97system.cpu.l2cache.overall_hits::cpu.dtb.walker 7507 # number of overall hits 98system.cpu.l2cache.overall_hits::cpu.itb.walker 3129 # number of overall hits 99system.cpu.l2cache.overall_hits::cpu.inst 838871 # number of overall hits 100system.cpu.l2cache.overall_hits::cpu.data 480510 # number of overall hits 101system.cpu.l2cache.overall_hits::total 1330017 # number of overall hits 102system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 5 # number of ReadReq misses 103system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 3 # number of ReadReq misses 104system.cpu.l2cache.ReadReq_misses::cpu.inst 10604 # number of ReadReq misses 105system.cpu.l2cache.ReadReq_misses::cpu.data 9871 # number of ReadReq misses 106system.cpu.l2cache.ReadReq_misses::total 20483 # number of ReadReq misses 107system.cpu.l2cache.UpgradeReq_misses::cpu.data 2919 # number of UpgradeReq misses 108system.cpu.l2cache.UpgradeReq_misses::total 2919 # number of UpgradeReq misses 109system.cpu.l2cache.ReadExReq_misses::cpu.data 133468 # number of ReadExReq misses 110system.cpu.l2cache.ReadExReq_misses::total 133468 # number of ReadExReq misses 111system.cpu.l2cache.demand_misses::cpu.dtb.walker 5 # number of demand (read+write) misses 112system.cpu.l2cache.demand_misses::cpu.itb.walker 3 # number of demand (read+write) misses 113system.cpu.l2cache.demand_misses::cpu.inst 10604 # number of demand (read+write) misses 114system.cpu.l2cache.demand_misses::cpu.data 143339 # number of demand (read+write) misses 115system.cpu.l2cache.demand_misses::total 153951 # number of demand (read+write) misses 116system.cpu.l2cache.overall_misses::cpu.dtb.walker 5 # number of overall misses 117system.cpu.l2cache.overall_misses::cpu.itb.walker 3 # number of overall misses 118system.cpu.l2cache.overall_misses::cpu.inst 10604 # number of overall misses 119system.cpu.l2cache.overall_misses::cpu.data 143339 # number of overall misses 120system.cpu.l2cache.overall_misses::total 153951 # number of overall misses 121system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 7512 # number of ReadReq accesses(hits+misses) 122system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 3132 # number of ReadReq accesses(hits+misses) 123system.cpu.l2cache.ReadReq_accesses::cpu.inst 849475 # number of ReadReq accesses(hits+misses) 124system.cpu.l2cache.ReadReq_accesses::cpu.data 376642 # number of ReadReq accesses(hits+misses) 125system.cpu.l2cache.ReadReq_accesses::total 1236761 # number of ReadReq accesses(hits+misses) 126system.cpu.l2cache.Writeback_accesses::writebacks 592643 # number of Writeback accesses(hits+misses) 127system.cpu.l2cache.Writeback_accesses::total 592643 # number of Writeback accesses(hits+misses) 128system.cpu.l2cache.UpgradeReq_accesses::cpu.data 2945 # number of UpgradeReq accesses(hits+misses) 129system.cpu.l2cache.UpgradeReq_accesses::total 2945 # number of UpgradeReq accesses(hits+misses) 130system.cpu.l2cache.ReadExReq_accesses::cpu.data 247207 # number of ReadExReq accesses(hits+misses) 131system.cpu.l2cache.ReadExReq_accesses::total 247207 # number of ReadExReq accesses(hits+misses) 132system.cpu.l2cache.demand_accesses::cpu.dtb.walker 7512 # number of demand (read+write) accesses 133system.cpu.l2cache.demand_accesses::cpu.itb.walker 3132 # number of demand (read+write) accesses 134system.cpu.l2cache.demand_accesses::cpu.inst 849475 # number of demand (read+write) accesses 135system.cpu.l2cache.demand_accesses::cpu.data 623849 # number of demand (read+write) accesses 136system.cpu.l2cache.demand_accesses::total 1483968 # number of demand (read+write) accesses 137system.cpu.l2cache.overall_accesses::cpu.dtb.walker 7512 # number of overall (read+write) accesses 138system.cpu.l2cache.overall_accesses::cpu.itb.walker 3132 # number of overall (read+write) accesses 139system.cpu.l2cache.overall_accesses::cpu.inst 849475 # number of overall (read+write) accesses 140system.cpu.l2cache.overall_accesses::cpu.data 623849 # number of overall (read+write) accesses 141system.cpu.l2cache.overall_accesses::total 1483968 # number of overall (read+write) accesses 142system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000666 # miss rate for ReadReq accesses 143system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.000958 # miss rate for ReadReq accesses 144system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.012483 # miss rate for ReadReq accesses 145system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.026208 # miss rate for ReadReq accesses 146system.cpu.l2cache.ReadReq_miss_rate::total 0.016562 # miss rate for ReadReq accesses 147system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.991171 # miss rate for UpgradeReq accesses 148system.cpu.l2cache.UpgradeReq_miss_rate::total 0.991171 # miss rate for UpgradeReq accesses 149system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.539904 # miss rate for ReadExReq accesses 150system.cpu.l2cache.ReadExReq_miss_rate::total 0.539904 # miss rate for ReadExReq accesses 151system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000666 # miss rate for demand accesses 152system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.000958 # miss rate for demand accesses 153system.cpu.l2cache.demand_miss_rate::cpu.inst 0.012483 # miss rate for demand accesses 154system.cpu.l2cache.demand_miss_rate::cpu.data 0.229766 # miss rate for demand accesses 155system.cpu.l2cache.demand_miss_rate::total 0.103743 # miss rate for demand accesses 156system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000666 # miss rate for overall accesses 157system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.000958 # miss rate for overall accesses 158system.cpu.l2cache.overall_miss_rate::cpu.inst 0.012483 # miss rate for overall accesses 159system.cpu.l2cache.overall_miss_rate::cpu.data 0.229766 # miss rate for overall accesses 160system.cpu.l2cache.overall_miss_rate::total 0.103743 # miss rate for overall accesses 161system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 162system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 163system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 164system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 165system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 166system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 167system.cpu.l2cache.fast_writes 0 # number of fast writes performed 168system.cpu.l2cache.cache_copies 0 # number of cache copies performed 169system.cpu.l2cache.writebacks::writebacks 57863 # number of writebacks 170system.cpu.l2cache.writebacks::total 57863 # number of writebacks 171system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 172system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 173system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 174system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 175system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 176system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 177system.cf0.dma_write_txs 0 # Number of DMA write transactions. 178system.cpu.dtb.inst_hits 0 # ITB inst hits 179system.cpu.dtb.inst_misses 0 # ITB inst misses --- 162 unchanged lines hidden (view full) --- 342system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 343system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 344system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 345system.cpu.dcache.fast_writes 0 # number of fast writes performed 346system.cpu.dcache.cache_copies 0 # number of cache copies performed 347system.cpu.dcache.writebacks::writebacks 592643 # number of writebacks 348system.cpu.dcache.writebacks::total 592643 # number of writebacks 349system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | 222system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 223system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 224system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 225system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 226system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 227system.cf0.dma_write_txs 0 # Number of DMA write transactions. 228system.cpu.dtb.inst_hits 0 # ITB inst hits 229system.cpu.dtb.inst_misses 0 # ITB inst misses --- 162 unchanged lines hidden (view full) --- 392system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 393system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 394system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 395system.cpu.dcache.fast_writes 0 # number of fast writes performed 396system.cpu.dcache.cache_copies 0 # number of cache copies performed 397system.cpu.dcache.writebacks::writebacks 592643 # number of writebacks 398system.cpu.dcache.writebacks::total 592643 # number of writebacks 399system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate |
| 400system.cpu.l2cache.replacements 62243 # number of replacements 401system.cpu.l2cache.tagsinuse 50007.272909 # Cycle average of tags in use 402system.cpu.l2cache.total_refs 1669922 # Total number of references to valid blocks. 403system.cpu.l2cache.sampled_refs 127628 # Sample count of references to valid blocks. 404system.cpu.l2cache.avg_refs 13.084292 # Average number of references to valid blocks. 405system.cpu.l2cache.warmup_cycle 2316901489000 # Cycle when the warmup percentage was hit. 406system.cpu.l2cache.occ_blocks::writebacks 36899.582990 # Average occupied blocks per requestor 407system.cpu.l2cache.occ_blocks::cpu.dtb.walker 2.960148 # Average occupied blocks per requestor 408system.cpu.l2cache.occ_blocks::cpu.itb.walker 0.993931 # Average occupied blocks per requestor 409system.cpu.l2cache.occ_blocks::cpu.inst 7014.720482 # Average occupied blocks per requestor 410system.cpu.l2cache.occ_blocks::cpu.data 6089.015357 # Average occupied blocks per requestor 411system.cpu.l2cache.occ_percent::writebacks 0.563043 # Average percentage of cache occupancy 412system.cpu.l2cache.occ_percent::cpu.dtb.walker 0.000045 # Average percentage of cache occupancy 413system.cpu.l2cache.occ_percent::cpu.itb.walker 0.000015 # Average percentage of cache occupancy 414system.cpu.l2cache.occ_percent::cpu.inst 0.107036 # Average percentage of cache occupancy 415system.cpu.l2cache.occ_percent::cpu.data 0.092911 # Average percentage of cache occupancy 416system.cpu.l2cache.occ_percent::total 0.763050 # Average percentage of cache occupancy 417system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 7507 # number of ReadReq hits 418system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3129 # number of ReadReq hits 419system.cpu.l2cache.ReadReq_hits::cpu.inst 838871 # number of ReadReq hits 420system.cpu.l2cache.ReadReq_hits::cpu.data 366771 # number of ReadReq hits 421system.cpu.l2cache.ReadReq_hits::total 1216278 # number of ReadReq hits 422system.cpu.l2cache.Writeback_hits::writebacks 592643 # number of Writeback hits 423system.cpu.l2cache.Writeback_hits::total 592643 # number of Writeback hits 424system.cpu.l2cache.UpgradeReq_hits::cpu.data 26 # number of UpgradeReq hits 425system.cpu.l2cache.UpgradeReq_hits::total 26 # number of UpgradeReq hits 426system.cpu.l2cache.ReadExReq_hits::cpu.data 113739 # number of ReadExReq hits 427system.cpu.l2cache.ReadExReq_hits::total 113739 # number of ReadExReq hits 428system.cpu.l2cache.demand_hits::cpu.dtb.walker 7507 # number of demand (read+write) hits 429system.cpu.l2cache.demand_hits::cpu.itb.walker 3129 # number of demand (read+write) hits 430system.cpu.l2cache.demand_hits::cpu.inst 838871 # number of demand (read+write) hits 431system.cpu.l2cache.demand_hits::cpu.data 480510 # number of demand (read+write) hits 432system.cpu.l2cache.demand_hits::total 1330017 # number of demand (read+write) hits 433system.cpu.l2cache.overall_hits::cpu.dtb.walker 7507 # number of overall hits 434system.cpu.l2cache.overall_hits::cpu.itb.walker 3129 # number of overall hits 435system.cpu.l2cache.overall_hits::cpu.inst 838871 # number of overall hits 436system.cpu.l2cache.overall_hits::cpu.data 480510 # number of overall hits 437system.cpu.l2cache.overall_hits::total 1330017 # number of overall hits 438system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 5 # number of ReadReq misses 439system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 3 # number of ReadReq misses 440system.cpu.l2cache.ReadReq_misses::cpu.inst 10604 # number of ReadReq misses 441system.cpu.l2cache.ReadReq_misses::cpu.data 9871 # number of ReadReq misses 442system.cpu.l2cache.ReadReq_misses::total 20483 # number of ReadReq misses 443system.cpu.l2cache.UpgradeReq_misses::cpu.data 2919 # number of UpgradeReq misses 444system.cpu.l2cache.UpgradeReq_misses::total 2919 # number of UpgradeReq misses 445system.cpu.l2cache.ReadExReq_misses::cpu.data 133468 # number of ReadExReq misses 446system.cpu.l2cache.ReadExReq_misses::total 133468 # number of ReadExReq misses 447system.cpu.l2cache.demand_misses::cpu.dtb.walker 5 # number of demand (read+write) misses 448system.cpu.l2cache.demand_misses::cpu.itb.walker 3 # number of demand (read+write) misses 449system.cpu.l2cache.demand_misses::cpu.inst 10604 # number of demand (read+write) misses 450system.cpu.l2cache.demand_misses::cpu.data 143339 # number of demand (read+write) misses 451system.cpu.l2cache.demand_misses::total 153951 # number of demand (read+write) misses 452system.cpu.l2cache.overall_misses::cpu.dtb.walker 5 # number of overall misses 453system.cpu.l2cache.overall_misses::cpu.itb.walker 3 # number of overall misses 454system.cpu.l2cache.overall_misses::cpu.inst 10604 # number of overall misses 455system.cpu.l2cache.overall_misses::cpu.data 143339 # number of overall misses 456system.cpu.l2cache.overall_misses::total 153951 # number of overall misses 457system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 7512 # number of ReadReq accesses(hits+misses) 458system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 3132 # number of ReadReq accesses(hits+misses) 459system.cpu.l2cache.ReadReq_accesses::cpu.inst 849475 # number of ReadReq accesses(hits+misses) 460system.cpu.l2cache.ReadReq_accesses::cpu.data 376642 # number of ReadReq accesses(hits+misses) 461system.cpu.l2cache.ReadReq_accesses::total 1236761 # number of ReadReq accesses(hits+misses) 462system.cpu.l2cache.Writeback_accesses::writebacks 592643 # number of Writeback accesses(hits+misses) 463system.cpu.l2cache.Writeback_accesses::total 592643 # number of Writeback accesses(hits+misses) 464system.cpu.l2cache.UpgradeReq_accesses::cpu.data 2945 # number of UpgradeReq accesses(hits+misses) 465system.cpu.l2cache.UpgradeReq_accesses::total 2945 # number of UpgradeReq accesses(hits+misses) 466system.cpu.l2cache.ReadExReq_accesses::cpu.data 247207 # number of ReadExReq accesses(hits+misses) 467system.cpu.l2cache.ReadExReq_accesses::total 247207 # number of ReadExReq accesses(hits+misses) 468system.cpu.l2cache.demand_accesses::cpu.dtb.walker 7512 # number of demand (read+write) accesses 469system.cpu.l2cache.demand_accesses::cpu.itb.walker 3132 # number of demand (read+write) accesses 470system.cpu.l2cache.demand_accesses::cpu.inst 849475 # number of demand (read+write) accesses 471system.cpu.l2cache.demand_accesses::cpu.data 623849 # number of demand (read+write) accesses 472system.cpu.l2cache.demand_accesses::total 1483968 # number of demand (read+write) accesses 473system.cpu.l2cache.overall_accesses::cpu.dtb.walker 7512 # number of overall (read+write) accesses 474system.cpu.l2cache.overall_accesses::cpu.itb.walker 3132 # number of overall (read+write) accesses 475system.cpu.l2cache.overall_accesses::cpu.inst 849475 # number of overall (read+write) accesses 476system.cpu.l2cache.overall_accesses::cpu.data 623849 # number of overall (read+write) accesses 477system.cpu.l2cache.overall_accesses::total 1483968 # number of overall (read+write) accesses 478system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000666 # miss rate for ReadReq accesses 479system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.000958 # miss rate for ReadReq accesses 480system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.012483 # miss rate for ReadReq accesses 481system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.026208 # miss rate for ReadReq accesses 482system.cpu.l2cache.ReadReq_miss_rate::total 0.016562 # miss rate for ReadReq accesses 483system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.991171 # miss rate for UpgradeReq accesses 484system.cpu.l2cache.UpgradeReq_miss_rate::total 0.991171 # miss rate for UpgradeReq accesses 485system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.539904 # miss rate for ReadExReq accesses 486system.cpu.l2cache.ReadExReq_miss_rate::total 0.539904 # miss rate for ReadExReq accesses 487system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000666 # miss rate for demand accesses 488system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.000958 # miss rate for demand accesses 489system.cpu.l2cache.demand_miss_rate::cpu.inst 0.012483 # miss rate for demand accesses 490system.cpu.l2cache.demand_miss_rate::cpu.data 0.229766 # miss rate for demand accesses 491system.cpu.l2cache.demand_miss_rate::total 0.103743 # miss rate for demand accesses 492system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000666 # miss rate for overall accesses 493system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.000958 # miss rate for overall accesses 494system.cpu.l2cache.overall_miss_rate::cpu.inst 0.012483 # miss rate for overall accesses 495system.cpu.l2cache.overall_miss_rate::cpu.data 0.229766 # miss rate for overall accesses 496system.cpu.l2cache.overall_miss_rate::total 0.103743 # miss rate for overall accesses 497system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 498system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 499system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 500system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 501system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 502system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 503system.cpu.l2cache.fast_writes 0 # number of fast writes performed 504system.cpu.l2cache.cache_copies 0 # number of cache copies performed 505system.cpu.l2cache.writebacks::writebacks 57863 # number of writebacks 506system.cpu.l2cache.writebacks::total 57863 # number of writebacks 507system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate |
|
| 350system.iocache.replacements 0 # number of replacements 351system.iocache.tagsinuse 0 # Cycle average of tags in use 352system.iocache.total_refs 0 # Total number of references to valid blocks. 353system.iocache.sampled_refs 0 # Sample count of references to valid blocks. 354system.iocache.avg_refs nan # Average number of references to valid blocks. 355system.iocache.warmup_cycle 0 # Cycle when the warmup percentage was hit. 356system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 357system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 358system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 359system.iocache.blocked::no_targets 0 # number of cycles access was blocked 360system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 361system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 362system.iocache.fast_writes 0 # number of fast writes performed 363system.iocache.cache_copies 0 # number of cache copies performed 364system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 365 366---------- End Simulation Statistics ---------- | 508system.iocache.replacements 0 # number of replacements 509system.iocache.tagsinuse 0 # Cycle average of tags in use 510system.iocache.total_refs 0 # Total number of references to valid blocks. 511system.iocache.sampled_refs 0 # Sample count of references to valid blocks. 512system.iocache.avg_refs nan # Average number of references to valid blocks. 513system.iocache.warmup_cycle 0 # Cycle when the warmup percentage was hit. 514system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 515system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 516system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 517system.iocache.blocked::no_targets 0 # number of cycles access was blocked 518system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 519system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 520system.iocache.fast_writes 0 # number of fast writes performed 521system.iocache.cache_copies 0 # number of cache copies performed 522system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 523 524---------- End Simulation Statistics ---------- |