| stats.txt (9055:38f1926fb599) | stats.txt (9079:9a244ebdc3c9) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.332330 # Number of seconds simulated 4sim_ticks 2332330037000 # Number of ticks simulated 5final_tick 2332330037000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.332330 # Number of seconds simulated 4sim_ticks 2332330037000 # Number of ticks simulated 5final_tick 2332330037000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1412842 # Simulator instruction rate (inst/s) 8host_op_rate 1823742 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 55482154888 # Simulator tick rate (ticks/s) 10host_mem_usage 382804 # Number of bytes of host memory used 11host_seconds 42.04 # Real time elapsed on the host | 7host_inst_rate 1988795 # Simulator instruction rate (inst/s) 8host_op_rate 2567201 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 78099767101 # Simulator tick rate (ticks/s) 10host_mem_usage 382744 # Number of bytes of host memory used 11host_seconds 29.86 # Real time elapsed on the host |
| 12sim_insts 59392246 # Number of instructions simulated 13sim_ops 76665494 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory | 12sim_insts 59392246 # Number of instructions simulated 13sim_ops 76665494 # Number of ops (including micro ops) simulated 14system.physmem.bytes_read::realview.clcd 111673344 # Number of bytes read from this memory |
| 15system.physmem.bytes_read::cpu.dtb.walker 1536 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 960 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 941920 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 10043536 # Number of bytes read from this memory 19system.physmem.bytes_read::total 122661296 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 941920 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 941920 # Number of instructions bytes read from this memory 22system.physmem.bytes_written::writebacks 6574400 # Number of bytes written to this memory | 15system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory 16system.physmem.bytes_read::cpu.itb.walker 192 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.inst 704992 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.data 9071568 # Number of bytes read from this memory 19system.physmem.bytes_read::total 121450416 # Number of bytes read from this memory 20system.physmem.bytes_inst_read::cpu.inst 704992 # Number of instructions bytes read from this memory 21system.physmem.bytes_inst_read::total 704992 # Number of instructions bytes read from this memory 22system.physmem.bytes_written::writebacks 3703040 # Number of bytes written to this memory |
| 23system.physmem.bytes_written::cpu.data 3015816 # Number of bytes written to this memory | 23system.physmem.bytes_written::cpu.data 3015816 # Number of bytes written to this memory |
| 24system.physmem.bytes_written::total 9590216 # Number of bytes written to this memory | 24system.physmem.bytes_written::total 6718856 # Number of bytes written to this memory |
| 25system.physmem.num_reads::realview.clcd 13959168 # Number of read requests responded to by this memory | 25system.physmem.num_reads::realview.clcd 13959168 # Number of read requests responded to by this memory |
| 26system.physmem.num_reads::cpu.dtb.walker 24 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 15 # Number of read requests responded to by this memory 28system.physmem.num_reads::cpu.inst 20920 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 156964 # Number of read requests responded to by this memory 30system.physmem.num_reads::total 14137091 # Number of read requests responded to by this memory 31system.physmem.num_writes::writebacks 102725 # Number of write requests responded to by this memory | 26system.physmem.num_reads::cpu.dtb.walker 5 # Number of read requests responded to by this memory 27system.physmem.num_reads::cpu.itb.walker 3 # Number of read requests responded to by this memory 28system.physmem.num_reads::cpu.inst 17218 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu.data 141777 # Number of read requests responded to by this memory 30system.physmem.num_reads::total 14118171 # Number of read requests responded to by this memory 31system.physmem.num_writes::writebacks 57860 # Number of write requests responded to by this memory |
| 32system.physmem.num_writes::cpu.data 753954 # Number of write requests responded to by this memory | 32system.physmem.num_writes::cpu.data 753954 # Number of write requests responded to by this memory |
| 33system.physmem.num_writes::total 856679 # Number of write requests responded to by this memory | 33system.physmem.num_writes::total 811814 # Number of write requests responded to by this memory |
| 34system.physmem.bw_read::realview.clcd 47880592 # Total read bandwidth from this memory (bytes/s) | 34system.physmem.bw_read::realview.clcd 47880592 # Total read bandwidth from this memory (bytes/s) |
| 35system.physmem.bw_read::cpu.dtb.walker 659 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu.itb.walker 412 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu.inst 403854 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu.data 4306224 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::total 52591740 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 403854 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 403854 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 2818812 # Write bandwidth from this memory (bytes/s) | 35system.physmem.bw_read::cpu.dtb.walker 137 # Total read bandwidth from this memory (bytes/s) 36system.physmem.bw_read::cpu.itb.walker 82 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu.inst 302269 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu.data 3889487 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::total 52072569 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_inst_read::cpu.inst 302269 # Instruction read bandwidth from this memory (bytes/s) 41system.physmem.bw_inst_read::total 302269 # Instruction read bandwidth from this memory (bytes/s) 42system.physmem.bw_write::writebacks 1587700 # Write bandwidth from this memory (bytes/s) |
| 43system.physmem.bw_write::cpu.data 1293049 # Write bandwidth from this memory (bytes/s) | 43system.physmem.bw_write::cpu.data 1293049 # Write bandwidth from this memory (bytes/s) |
| 44system.physmem.bw_write::total 4111861 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_total::writebacks 2818812 # Total bandwidth to/from this memory (bytes/s) | 44system.physmem.bw_write::total 2880748 # Write bandwidth from this memory (bytes/s) 45system.physmem.bw_total::writebacks 1587700 # Total bandwidth to/from this memory (bytes/s) |
| 46system.physmem.bw_total::realview.clcd 47880592 # Total bandwidth to/from this memory (bytes/s) | 46system.physmem.bw_total::realview.clcd 47880592 # Total bandwidth to/from this memory (bytes/s) |
| 47system.physmem.bw_total::cpu.dtb.walker 659 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.itb.walker 412 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu.inst 403854 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu.data 5599273 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::total 56703601 # Total bandwidth to/from this memory (bytes/s) | 47system.physmem.bw_total::cpu.dtb.walker 137 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu.itb.walker 82 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu.inst 302269 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu.data 5182536 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::total 54953317 # Total bandwidth to/from this memory (bytes/s) |
| 52system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 53system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 54system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 55system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 56system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 57system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 58system.realview.nvmem.bw_read::cpu.inst 9 # Total read bandwidth from this memory (bytes/s) 59system.realview.nvmem.bw_read::total 9 # Total read bandwidth from this memory (bytes/s) 60system.realview.nvmem.bw_inst_read::cpu.inst 9 # Instruction read bandwidth from this memory (bytes/s) 61system.realview.nvmem.bw_inst_read::total 9 # Instruction read bandwidth from this memory (bytes/s) 62system.realview.nvmem.bw_total::cpu.inst 9 # Total bandwidth to/from this memory (bytes/s) 63system.realview.nvmem.bw_total::total 9 # Total bandwidth to/from this memory (bytes/s) | 52system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 53system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 54system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 55system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory 56system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory 57system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory 58system.realview.nvmem.bw_read::cpu.inst 9 # Total read bandwidth from this memory (bytes/s) 59system.realview.nvmem.bw_read::total 9 # Total read bandwidth from this memory (bytes/s) 60system.realview.nvmem.bw_inst_read::cpu.inst 9 # Instruction read bandwidth from this memory (bytes/s) 61system.realview.nvmem.bw_inst_read::total 9 # Instruction read bandwidth from this memory (bytes/s) 62system.realview.nvmem.bw_total::cpu.inst 9 # Total bandwidth to/from this memory (bytes/s) 63system.realview.nvmem.bw_total::total 9 # Total bandwidth to/from this memory (bytes/s) |
| 64system.l2c.replacements 117012 # number of replacements 65system.l2c.tagsinuse 24288.656748 # Cycle average of tags in use 66system.l2c.total_refs 1527554 # Total number of references to valid blocks. 67system.l2c.sampled_refs 146810 # Sample count of references to valid blocks. 68system.l2c.avg_refs 10.404972 # Average number of references to valid blocks. 69system.l2c.warmup_cycle 0 # Cycle when the warmup percentage was hit. 70system.l2c.occ_blocks::writebacks 13693.996987 # Average occupied blocks per requestor 71system.l2c.occ_blocks::cpu.dtb.walker 7.872000 # Average occupied blocks per requestor 72system.l2c.occ_blocks::cpu.itb.walker 1.975558 # Average occupied blocks per requestor 73system.l2c.occ_blocks::cpu.inst 5248.163956 # Average occupied blocks per requestor 74system.l2c.occ_blocks::cpu.data 5336.648246 # Average occupied blocks per requestor 75system.l2c.occ_percent::writebacks 0.208954 # Average percentage of cache occupancy 76system.l2c.occ_percent::cpu.dtb.walker 0.000120 # Average percentage of cache occupancy 77system.l2c.occ_percent::cpu.itb.walker 0.000030 # Average percentage of cache occupancy 78system.l2c.occ_percent::cpu.inst 0.080081 # Average percentage of cache occupancy 79system.l2c.occ_percent::cpu.data 0.081431 # Average percentage of cache occupancy 80system.l2c.occ_percent::total 0.370615 # Average percentage of cache occupancy 81system.l2c.ReadReq_hits::cpu.dtb.walker 7515 # number of ReadReq hits 82system.l2c.ReadReq_hits::cpu.itb.walker 3139 # number of ReadReq hits 83system.l2c.ReadReq_hits::cpu.inst 835264 # number of ReadReq hits 84system.l2c.ReadReq_hits::cpu.data 357385 # number of ReadReq hits 85system.l2c.ReadReq_hits::total 1203303 # number of ReadReq hits 86system.l2c.Writeback_hits::writebacks 605735 # number of Writeback hits 87system.l2c.Writeback_hits::total 605735 # number of Writeback hits | 64system.l2c.replacements 62240 # number of replacements 65system.l2c.tagsinuse 50004.786190 # Cycle average of tags in use 66system.l2c.total_refs 1717775 # Total number of references to valid blocks. 67system.l2c.sampled_refs 127625 # Sample count of references to valid blocks. 68system.l2c.avg_refs 13.459549 # Average number of references to valid blocks. 69system.l2c.warmup_cycle 2316513323500 # Cycle when the warmup percentage was hit. 70system.l2c.occ_blocks::writebacks 36897.037256 # Average occupied blocks per requestor 71system.l2c.occ_blocks::cpu.dtb.walker 2.960071 # Average occupied blocks per requestor 72system.l2c.occ_blocks::cpu.itb.walker 0.993930 # Average occupied blocks per requestor 73system.l2c.occ_blocks::cpu.inst 7014.608709 # Average occupied blocks per requestor 74system.l2c.occ_blocks::cpu.data 6089.186223 # Average occupied blocks per requestor 75system.l2c.occ_percent::writebacks 0.563004 # Average percentage of cache occupancy 76system.l2c.occ_percent::cpu.dtb.walker 0.000045 # Average percentage of cache occupancy 77system.l2c.occ_percent::cpu.itb.walker 0.000015 # Average percentage of cache occupancy 78system.l2c.occ_percent::cpu.inst 0.107034 # Average percentage of cache occupancy 79system.l2c.occ_percent::cpu.data 0.092914 # Average percentage of cache occupancy 80system.l2c.occ_percent::total 0.763012 # Average percentage of cache occupancy 81system.l2c.ReadReq_hits::cpu.dtb.walker 7534 # number of ReadReq hits 82system.l2c.ReadReq_hits::cpu.itb.walker 3151 # number of ReadReq hits 83system.l2c.ReadReq_hits::cpu.inst 838895 # number of ReadReq hits 84system.l2c.ReadReq_hits::cpu.data 364444 # number of ReadReq hits 85system.l2c.ReadReq_hits::total 1214024 # number of ReadReq hits 86system.l2c.Writeback_hits::writebacks 642748 # number of Writeback hits 87system.l2c.Writeback_hits::total 642748 # number of Writeback hits |
| 88system.l2c.UpgradeReq_hits::cpu.data 26 # number of UpgradeReq hits 89system.l2c.UpgradeReq_hits::total 26 # number of UpgradeReq hits | 88system.l2c.UpgradeReq_hits::cpu.data 26 # number of UpgradeReq hits 89system.l2c.UpgradeReq_hits::total 26 # number of UpgradeReq hits |
| 90system.l2c.ReadExReq_hits::cpu.data 106156 # number of ReadExReq hits 91system.l2c.ReadExReq_hits::total 106156 # number of ReadExReq hits 92system.l2c.demand_hits::cpu.dtb.walker 7515 # number of demand (read+write) hits 93system.l2c.demand_hits::cpu.itb.walker 3139 # number of demand (read+write) hits 94system.l2c.demand_hits::cpu.inst 835264 # number of demand (read+write) hits 95system.l2c.demand_hits::cpu.data 463541 # number of demand (read+write) hits 96system.l2c.demand_hits::total 1309459 # number of demand (read+write) hits 97system.l2c.overall_hits::cpu.dtb.walker 7515 # number of overall hits 98system.l2c.overall_hits::cpu.itb.walker 3139 # number of overall hits 99system.l2c.overall_hits::cpu.inst 835264 # number of overall hits 100system.l2c.overall_hits::cpu.data 463541 # number of overall hits 101system.l2c.overall_hits::total 1309459 # number of overall hits 102system.l2c.ReadReq_misses::cpu.dtb.walker 24 # number of ReadReq misses 103system.l2c.ReadReq_misses::cpu.itb.walker 15 # number of ReadReq misses 104system.l2c.ReadReq_misses::cpu.inst 14304 # number of ReadReq misses 105system.l2c.ReadReq_misses::cpu.data 17465 # number of ReadReq misses 106system.l2c.ReadReq_misses::total 31808 # number of ReadReq misses | 90system.l2c.ReadExReq_hits::cpu.data 113737 # number of ReadExReq hits 91system.l2c.ReadExReq_hits::total 113737 # number of ReadExReq hits 92system.l2c.demand_hits::cpu.dtb.walker 7534 # number of demand (read+write) hits 93system.l2c.demand_hits::cpu.itb.walker 3151 # number of demand (read+write) hits 94system.l2c.demand_hits::cpu.inst 838895 # number of demand (read+write) hits 95system.l2c.demand_hits::cpu.data 478181 # number of demand (read+write) hits 96system.l2c.demand_hits::total 1327761 # number of demand (read+write) hits 97system.l2c.overall_hits::cpu.dtb.walker 7534 # number of overall hits 98system.l2c.overall_hits::cpu.itb.walker 3151 # number of overall hits 99system.l2c.overall_hits::cpu.inst 838895 # number of overall hits 100system.l2c.overall_hits::cpu.data 478181 # number of overall hits 101system.l2c.overall_hits::total 1327761 # number of overall hits 102system.l2c.ReadReq_misses::cpu.dtb.walker 5 # number of ReadReq misses 103system.l2c.ReadReq_misses::cpu.itb.walker 3 # number of ReadReq misses 104system.l2c.ReadReq_misses::cpu.inst 10602 # number of ReadReq misses 105system.l2c.ReadReq_misses::cpu.data 9870 # number of ReadReq misses 106system.l2c.ReadReq_misses::total 20480 # number of ReadReq misses |
| 107system.l2c.UpgradeReq_misses::cpu.data 2918 # number of UpgradeReq misses 108system.l2c.UpgradeReq_misses::total 2918 # number of UpgradeReq misses | 107system.l2c.UpgradeReq_misses::cpu.data 2918 # number of UpgradeReq misses 108system.l2c.UpgradeReq_misses::total 2918 # number of UpgradeReq misses |
| 109system.l2c.ReadExReq_misses::cpu.data 141050 # number of ReadExReq misses 110system.l2c.ReadExReq_misses::total 141050 # number of ReadExReq misses 111system.l2c.demand_misses::cpu.dtb.walker 24 # number of demand (read+write) misses 112system.l2c.demand_misses::cpu.itb.walker 15 # number of demand (read+write) misses 113system.l2c.demand_misses::cpu.inst 14304 # number of demand (read+write) misses 114system.l2c.demand_misses::cpu.data 158515 # number of demand (read+write) misses 115system.l2c.demand_misses::total 172858 # number of demand (read+write) misses 116system.l2c.overall_misses::cpu.dtb.walker 24 # number of overall misses 117system.l2c.overall_misses::cpu.itb.walker 15 # number of overall misses 118system.l2c.overall_misses::cpu.inst 14304 # number of overall misses 119system.l2c.overall_misses::cpu.data 158515 # number of overall misses 120system.l2c.overall_misses::total 172858 # number of overall misses | 109system.l2c.ReadExReq_misses::cpu.data 133469 # number of ReadExReq misses 110system.l2c.ReadExReq_misses::total 133469 # number of ReadExReq misses 111system.l2c.demand_misses::cpu.dtb.walker 5 # number of demand (read+write) misses 112system.l2c.demand_misses::cpu.itb.walker 3 # number of demand (read+write) misses 113system.l2c.demand_misses::cpu.inst 10602 # number of demand (read+write) misses 114system.l2c.demand_misses::cpu.data 143339 # number of demand (read+write) misses 115system.l2c.demand_misses::total 153949 # number of demand (read+write) misses 116system.l2c.overall_misses::cpu.dtb.walker 5 # number of overall misses 117system.l2c.overall_misses::cpu.itb.walker 3 # number of overall misses 118system.l2c.overall_misses::cpu.inst 10602 # number of overall misses 119system.l2c.overall_misses::cpu.data 143339 # number of overall misses 120system.l2c.overall_misses::total 153949 # number of overall misses |
| 121system.l2c.ReadReq_accesses::cpu.dtb.walker 7539 # number of ReadReq accesses(hits+misses) 122system.l2c.ReadReq_accesses::cpu.itb.walker 3154 # number of ReadReq accesses(hits+misses) | 121system.l2c.ReadReq_accesses::cpu.dtb.walker 7539 # number of ReadReq accesses(hits+misses) 122system.l2c.ReadReq_accesses::cpu.itb.walker 3154 # number of ReadReq accesses(hits+misses) |
| 123system.l2c.ReadReq_accesses::cpu.inst 849568 # number of ReadReq accesses(hits+misses) 124system.l2c.ReadReq_accesses::cpu.data 374850 # number of ReadReq accesses(hits+misses) 125system.l2c.ReadReq_accesses::total 1235111 # number of ReadReq accesses(hits+misses) 126system.l2c.Writeback_accesses::writebacks 605735 # number of Writeback accesses(hits+misses) 127system.l2c.Writeback_accesses::total 605735 # number of Writeback accesses(hits+misses) | 123system.l2c.ReadReq_accesses::cpu.inst 849497 # number of ReadReq accesses(hits+misses) 124system.l2c.ReadReq_accesses::cpu.data 374314 # number of ReadReq accesses(hits+misses) 125system.l2c.ReadReq_accesses::total 1234504 # number of ReadReq accesses(hits+misses) 126system.l2c.Writeback_accesses::writebacks 642748 # number of Writeback accesses(hits+misses) 127system.l2c.Writeback_accesses::total 642748 # number of Writeback accesses(hits+misses) |
| 128system.l2c.UpgradeReq_accesses::cpu.data 2944 # number of UpgradeReq accesses(hits+misses) 129system.l2c.UpgradeReq_accesses::total 2944 # number of UpgradeReq accesses(hits+misses) 130system.l2c.ReadExReq_accesses::cpu.data 247206 # number of ReadExReq accesses(hits+misses) 131system.l2c.ReadExReq_accesses::total 247206 # number of ReadExReq accesses(hits+misses) 132system.l2c.demand_accesses::cpu.dtb.walker 7539 # number of demand (read+write) accesses 133system.l2c.demand_accesses::cpu.itb.walker 3154 # number of demand (read+write) accesses | 128system.l2c.UpgradeReq_accesses::cpu.data 2944 # number of UpgradeReq accesses(hits+misses) 129system.l2c.UpgradeReq_accesses::total 2944 # number of UpgradeReq accesses(hits+misses) 130system.l2c.ReadExReq_accesses::cpu.data 247206 # number of ReadExReq accesses(hits+misses) 131system.l2c.ReadExReq_accesses::total 247206 # number of ReadExReq accesses(hits+misses) 132system.l2c.demand_accesses::cpu.dtb.walker 7539 # number of demand (read+write) accesses 133system.l2c.demand_accesses::cpu.itb.walker 3154 # number of demand (read+write) accesses |
| 134system.l2c.demand_accesses::cpu.inst 849568 # number of demand (read+write) accesses 135system.l2c.demand_accesses::cpu.data 622056 # number of demand (read+write) accesses 136system.l2c.demand_accesses::total 1482317 # number of demand (read+write) accesses | 134system.l2c.demand_accesses::cpu.inst 849497 # number of demand (read+write) accesses 135system.l2c.demand_accesses::cpu.data 621520 # number of demand (read+write) accesses 136system.l2c.demand_accesses::total 1481710 # number of demand (read+write) accesses |
| 137system.l2c.overall_accesses::cpu.dtb.walker 7539 # number of overall (read+write) accesses 138system.l2c.overall_accesses::cpu.itb.walker 3154 # number of overall (read+write) accesses | 137system.l2c.overall_accesses::cpu.dtb.walker 7539 # number of overall (read+write) accesses 138system.l2c.overall_accesses::cpu.itb.walker 3154 # number of overall (read+write) accesses |
| 139system.l2c.overall_accesses::cpu.inst 849568 # number of overall (read+write) accesses 140system.l2c.overall_accesses::cpu.data 622056 # number of overall (read+write) accesses 141system.l2c.overall_accesses::total 1482317 # number of overall (read+write) accesses 142system.l2c.ReadReq_miss_rate::cpu.dtb.walker 0.003183 # miss rate for ReadReq accesses 143system.l2c.ReadReq_miss_rate::cpu.itb.walker 0.004756 # miss rate for ReadReq accesses 144system.l2c.ReadReq_miss_rate::cpu.inst 0.016837 # miss rate for ReadReq accesses 145system.l2c.ReadReq_miss_rate::cpu.data 0.046592 # miss rate for ReadReq accesses 146system.l2c.ReadReq_miss_rate::total 0.025753 # miss rate for ReadReq accesses | 139system.l2c.overall_accesses::cpu.inst 849497 # number of overall (read+write) accesses 140system.l2c.overall_accesses::cpu.data 621520 # number of overall (read+write) accesses 141system.l2c.overall_accesses::total 1481710 # number of overall (read+write) accesses 142system.l2c.ReadReq_miss_rate::cpu.dtb.walker 0.000663 # miss rate for ReadReq accesses 143system.l2c.ReadReq_miss_rate::cpu.itb.walker 0.000951 # miss rate for ReadReq accesses 144system.l2c.ReadReq_miss_rate::cpu.inst 0.012480 # miss rate for ReadReq accesses 145system.l2c.ReadReq_miss_rate::cpu.data 0.026368 # miss rate for ReadReq accesses 146system.l2c.ReadReq_miss_rate::total 0.016590 # miss rate for ReadReq accesses |
| 147system.l2c.UpgradeReq_miss_rate::cpu.data 0.991168 # miss rate for UpgradeReq accesses 148system.l2c.UpgradeReq_miss_rate::total 0.991168 # miss rate for UpgradeReq accesses | 147system.l2c.UpgradeReq_miss_rate::cpu.data 0.991168 # miss rate for UpgradeReq accesses 148system.l2c.UpgradeReq_miss_rate::total 0.991168 # miss rate for UpgradeReq accesses |
| 149system.l2c.ReadExReq_miss_rate::cpu.data 0.570577 # miss rate for ReadExReq accesses 150system.l2c.ReadExReq_miss_rate::total 0.570577 # miss rate for ReadExReq accesses 151system.l2c.demand_miss_rate::cpu.dtb.walker 0.003183 # miss rate for demand accesses 152system.l2c.demand_miss_rate::cpu.itb.walker 0.004756 # miss rate for demand accesses 153system.l2c.demand_miss_rate::cpu.inst 0.016837 # miss rate for demand accesses 154system.l2c.demand_miss_rate::cpu.data 0.254824 # miss rate for demand accesses 155system.l2c.demand_miss_rate::total 0.116613 # miss rate for demand accesses 156system.l2c.overall_miss_rate::cpu.dtb.walker 0.003183 # miss rate for overall accesses 157system.l2c.overall_miss_rate::cpu.itb.walker 0.004756 # miss rate for overall accesses 158system.l2c.overall_miss_rate::cpu.inst 0.016837 # miss rate for overall accesses 159system.l2c.overall_miss_rate::cpu.data 0.254824 # miss rate for overall accesses 160system.l2c.overall_miss_rate::total 0.116613 # miss rate for overall accesses | 149system.l2c.ReadExReq_miss_rate::cpu.data 0.539910 # miss rate for ReadExReq accesses 150system.l2c.ReadExReq_miss_rate::total 0.539910 # miss rate for ReadExReq accesses 151system.l2c.demand_miss_rate::cpu.dtb.walker 0.000663 # miss rate for demand accesses 152system.l2c.demand_miss_rate::cpu.itb.walker 0.000951 # miss rate for demand accesses 153system.l2c.demand_miss_rate::cpu.inst 0.012480 # miss rate for demand accesses 154system.l2c.demand_miss_rate::cpu.data 0.230627 # miss rate for demand accesses 155system.l2c.demand_miss_rate::total 0.103900 # miss rate for demand accesses 156system.l2c.overall_miss_rate::cpu.dtb.walker 0.000663 # miss rate for overall accesses 157system.l2c.overall_miss_rate::cpu.itb.walker 0.000951 # miss rate for overall accesses 158system.l2c.overall_miss_rate::cpu.inst 0.012480 # miss rate for overall accesses 159system.l2c.overall_miss_rate::cpu.data 0.230627 # miss rate for overall accesses 160system.l2c.overall_miss_rate::total 0.103900 # miss rate for overall accesses |
| 161system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 162system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 163system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 164system.l2c.blocked::no_targets 0 # number of cycles access was blocked 165system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 166system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 167system.l2c.fast_writes 0 # number of fast writes performed 168system.l2c.cache_copies 0 # number of cache copies performed | 161system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 162system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 163system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 164system.l2c.blocked::no_targets 0 # number of cycles access was blocked 165system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 166system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 167system.l2c.fast_writes 0 # number of fast writes performed 168system.l2c.cache_copies 0 # number of cache copies performed |
| 169system.l2c.writebacks::writebacks 102725 # number of writebacks 170system.l2c.writebacks::total 102725 # number of writebacks | 169system.l2c.writebacks::writebacks 57860 # number of writebacks 170system.l2c.writebacks::total 57860 # number of writebacks |
| 171system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate 172system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 173system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 174system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 175system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 176system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 177system.cf0.dma_write_txs 0 # Number of DMA write transactions. 178system.cpu.dtb.inst_hits 0 # ITB inst hits --- 40 unchanged lines hidden (view full) --- 219system.cpu.itb.accesses 60407774 # DTB accesses 220system.cpu.numCycles 4664583062 # number of cpu cycles simulated 221system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 222system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 223system.cpu.committedInsts 59392246 # Number of instructions committed 224system.cpu.committedOps 76665494 # Number of ops (including micro ops) committed 225system.cpu.num_int_alu_accesses 68281415 # Number of integer alu accesses 226system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses | 171system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate 172system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 173system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 174system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD). 175system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes. 176system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. 177system.cf0.dma_write_txs 0 # Number of DMA write transactions. 178system.cpu.dtb.inst_hits 0 # ITB inst hits --- 40 unchanged lines hidden (view full) --- 219system.cpu.itb.accesses 60407774 # DTB accesses 220system.cpu.numCycles 4664583062 # number of cpu cycles simulated 221system.cpu.numWorkItemsStarted 0 # number of work items this cpu started 222system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed 223system.cpu.committedInsts 59392246 # Number of instructions committed 224system.cpu.committedOps 76665494 # Number of ops (including micro ops) committed 225system.cpu.num_int_alu_accesses 68281415 # Number of integer alu accesses 226system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses |
| 227system.cpu.num_func_calls 1972385 # number of times a function call or return occured | 227system.cpu.num_func_calls 2136013 # number of times a function call or return occured |
| 228system.cpu.num_conditional_control_insts 7647793 # number of instructions that are conditional controls 229system.cpu.num_int_insts 68281415 # number of integer instructions 230system.cpu.num_fp_insts 10269 # number of float instructions 231system.cpu.num_int_register_reads 345981857 # number of times the integer registers were read 232system.cpu.num_int_register_writes 73062916 # number of times the integer registers were written 233system.cpu.num_fp_register_reads 7493 # number of times the floating registers were read 234system.cpu.num_fp_register_writes 2780 # number of times the floating registers were written 235system.cpu.num_mem_refs 27361692 # number of memory refs --- 41 unchanged lines hidden (view full) --- 277system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 278system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 279system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 280system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 281system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 282system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 283system.cpu.icache.fast_writes 0 # number of fast writes performed 284system.cpu.icache.cache_copies 0 # number of cache copies performed | 228system.cpu.num_conditional_control_insts 7647793 # number of instructions that are conditional controls 229system.cpu.num_int_insts 68281415 # number of integer instructions 230system.cpu.num_fp_insts 10269 # number of float instructions 231system.cpu.num_int_register_reads 345981857 # number of times the integer registers were read 232system.cpu.num_int_register_writes 73062916 # number of times the integer registers were written 233system.cpu.num_fp_register_reads 7493 # number of times the floating registers were read 234system.cpu.num_fp_register_writes 2780 # number of times the floating registers were written 235system.cpu.num_mem_refs 27361692 # number of memory refs --- 41 unchanged lines hidden (view full) --- 277system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 278system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 279system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 280system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 281system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 282system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 283system.cpu.icache.fast_writes 0 # number of fast writes performed 284system.cpu.icache.cache_copies 0 # number of cache copies performed |
| 285system.cpu.icache.writebacks::writebacks 44595 # number of writebacks 286system.cpu.icache.writebacks::total 44595 # number of writebacks | 285system.cpu.icache.writebacks::writebacks 50093 # number of writebacks 286system.cpu.icache.writebacks::total 50093 # number of writebacks |
| 287system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 288system.cpu.dcache.replacements 623347 # number of replacements 289system.cpu.dcache.tagsinuse 511.997030 # Cycle average of tags in use 290system.cpu.dcache.total_refs 23628362 # Total number of references to valid blocks. 291system.cpu.dcache.sampled_refs 623859 # Sample count of references to valid blocks. 292system.cpu.dcache.avg_refs 37.874523 # Average number of references to valid blocks. 293system.cpu.dcache.warmup_cycle 21763000 # Cycle when the warmup percentage was hit. 294system.cpu.dcache.occ_blocks::cpu.data 511.997030 # Average occupied blocks per requestor --- 46 unchanged lines hidden (view full) --- 341system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 342system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 343system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 344system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 345system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 346system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 347system.cpu.dcache.fast_writes 0 # number of fast writes performed 348system.cpu.dcache.cache_copies 0 # number of cache copies performed | 287system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate 288system.cpu.dcache.replacements 623347 # number of replacements 289system.cpu.dcache.tagsinuse 511.997030 # Cycle average of tags in use 290system.cpu.dcache.total_refs 23628362 # Total number of references to valid blocks. 291system.cpu.dcache.sampled_refs 623859 # Sample count of references to valid blocks. 292system.cpu.dcache.avg_refs 37.874523 # Average number of references to valid blocks. 293system.cpu.dcache.warmup_cycle 21763000 # Cycle when the warmup percentage was hit. 294system.cpu.dcache.occ_blocks::cpu.data 511.997030 # Average occupied blocks per requestor --- 46 unchanged lines hidden (view full) --- 341system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 342system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 343system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 344system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 345system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 346system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 347system.cpu.dcache.fast_writes 0 # number of fast writes performed 348system.cpu.dcache.cache_copies 0 # number of cache copies performed |
| 349system.cpu.dcache.writebacks::writebacks 561140 # number of writebacks 350system.cpu.dcache.writebacks::total 561140 # number of writebacks | 349system.cpu.dcache.writebacks::writebacks 592655 # number of writebacks 350system.cpu.dcache.writebacks::total 592655 # number of writebacks |
| 351system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 352system.iocache.replacements 0 # number of replacements 353system.iocache.tagsinuse 0 # Cycle average of tags in use 354system.iocache.total_refs 0 # Total number of references to valid blocks. 355system.iocache.sampled_refs 0 # Sample count of references to valid blocks. 356system.iocache.avg_refs nan # Average number of references to valid blocks. 357system.iocache.warmup_cycle 0 # Cycle when the warmup percentage was hit. 358system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 359system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 360system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 361system.iocache.blocked::no_targets 0 # number of cycles access was blocked 362system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 363system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 364system.iocache.fast_writes 0 # number of fast writes performed 365system.iocache.cache_copies 0 # number of cache copies performed 366system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 367 368---------- End Simulation Statistics ---------- | 351system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate 352system.iocache.replacements 0 # number of replacements 353system.iocache.tagsinuse 0 # Cycle average of tags in use 354system.iocache.total_refs 0 # Total number of references to valid blocks. 355system.iocache.sampled_refs 0 # Sample count of references to valid blocks. 356system.iocache.avg_refs nan # Average number of references to valid blocks. 357system.iocache.warmup_cycle 0 # Cycle when the warmup percentage was hit. 358system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 359system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 360system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 361system.iocache.blocked::no_targets 0 # number of cycles access was blocked 362system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 363system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 364system.iocache.fast_writes 0 # number of fast writes performed 365system.iocache.cache_copies 0 # number of cache copies performed 366system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate 367 368---------- End Simulation Statistics ---------- |