| stats.txt (11336:b318499f676c) | stats.txt (11456:c0fb4435b80f) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.783855 # Number of seconds simulated 4sim_ticks 2783854535000 # Number of ticks simulated 5final_tick 2783854535000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.783855 # Number of seconds simulated 4sim_ticks 2783854535000 # Number of ticks simulated 5final_tick 2783854535000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1173204 # Simulator instruction rate (inst/s) 8host_op_rate 1428188 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 22875895912 # Simulator tick rate (ticks/s) 10host_mem_usage 581200 # Number of bytes of host memory used 11host_seconds 121.69 # Real time elapsed on the host | 7host_inst_rate 1225194 # Simulator instruction rate (inst/s) 8host_op_rate 1491477 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 23889629831 # Simulator tick rate (ticks/s) 10host_mem_usage 578692 # Number of bytes of host memory used 11host_seconds 116.53 # Real time elapsed on the host |
| 12sim_insts 142771651 # Number of instructions simulated 13sim_ops 173801592 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 448 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.inst 1207012 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10324836 # Number of bytes read from this memory --- 321 unchanged lines hidden (view full) --- 341system.cpu.dcache.overall_miss_rate::cpu.data 0.015166 # miss rate for overall accesses 342system.cpu.dcache.overall_miss_rate::total 0.015166 # miss rate for overall accesses 343system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 344system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 345system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 346system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 347system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 348system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 12sim_insts 142771651 # Number of instructions simulated 13sim_ops 173801592 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu.dtb.walker 448 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu.inst 1207012 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu.data 10324836 # Number of bytes read from this memory --- 321 unchanged lines hidden (view full) --- 341system.cpu.dcache.overall_miss_rate::cpu.data 0.015166 # miss rate for overall accesses 342system.cpu.dcache.overall_miss_rate::total 0.015166 # miss rate for overall accesses 343system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 344system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 345system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 346system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked 347system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 348system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 349system.cpu.dcache.fast_writes 0 # number of fast writes performed 350system.cpu.dcache.cache_copies 0 # number of cache copies performed | |
| 351system.cpu.dcache.writebacks::writebacks 682017 # number of writebacks 352system.cpu.dcache.writebacks::total 682017 # number of writebacks | 349system.cpu.dcache.writebacks::writebacks 682017 # number of writebacks 350system.cpu.dcache.writebacks::total 682017 # number of writebacks |
| 353system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 354system.cpu.icache.tags.replacements 1698998 # number of replacements 355system.cpu.icache.tags.tagsinuse 511.663679 # Cycle average of tags in use 356system.cpu.icache.tags.total_refs 145341757 # Total number of references to valid blocks. 357system.cpu.icache.tags.sampled_refs 1699510 # Sample count of references to valid blocks. 358system.cpu.icache.tags.avg_refs 85.519801 # Average number of references to valid blocks. 359system.cpu.icache.tags.warmup_cycle 7831491500 # Cycle when the warmup percentage was hit. 360system.cpu.icache.tags.occ_blocks::cpu.inst 511.663679 # Average occupied blocks per requestor 361system.cpu.icache.tags.occ_percent::cpu.inst 0.999343 # Average percentage of cache occupancy --- 31 unchanged lines hidden (view full) --- 393system.cpu.icache.overall_miss_rate::cpu.inst 0.011558 # miss rate for overall accesses 394system.cpu.icache.overall_miss_rate::total 0.011558 # miss rate for overall accesses 395system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 396system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 397system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 398system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 399system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 400system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 351system.cpu.icache.tags.replacements 1698998 # number of replacements 352system.cpu.icache.tags.tagsinuse 511.663679 # Cycle average of tags in use 353system.cpu.icache.tags.total_refs 145341757 # Total number of references to valid blocks. 354system.cpu.icache.tags.sampled_refs 1699510 # Sample count of references to valid blocks. 355system.cpu.icache.tags.avg_refs 85.519801 # Average number of references to valid blocks. 356system.cpu.icache.tags.warmup_cycle 7831491500 # Cycle when the warmup percentage was hit. 357system.cpu.icache.tags.occ_blocks::cpu.inst 511.663679 # Average occupied blocks per requestor 358system.cpu.icache.tags.occ_percent::cpu.inst 0.999343 # Average percentage of cache occupancy --- 31 unchanged lines hidden (view full) --- 390system.cpu.icache.overall_miss_rate::cpu.inst 0.011558 # miss rate for overall accesses 391system.cpu.icache.overall_miss_rate::total 0.011558 # miss rate for overall accesses 392system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 393system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 394system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked 395system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked 396system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 397system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 401system.cpu.icache.fast_writes 0 # number of fast writes performed 402system.cpu.icache.cache_copies 0 # number of cache copies performed | |
| 403system.cpu.icache.writebacks::writebacks 1698998 # number of writebacks 404system.cpu.icache.writebacks::total 1698998 # number of writebacks | 398system.cpu.icache.writebacks::writebacks 1698998 # number of writebacks 399system.cpu.icache.writebacks::total 1698998 # number of writebacks |
| 405system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 406system.cpu.l2cache.tags.replacements 109913 # number of replacements 407system.cpu.l2cache.tags.tagsinuse 65155.314985 # Cycle average of tags in use 408system.cpu.l2cache.tags.total_refs 4524855 # Total number of references to valid blocks. 409system.cpu.l2cache.tags.sampled_refs 175194 # Sample count of references to valid blocks. 410system.cpu.l2cache.tags.avg_refs 25.827682 # Average number of references to valid blocks. 411system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 412system.cpu.l2cache.tags.occ_blocks::writebacks 48764.050695 # Average occupied blocks per requestor 413system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 2.931995 # Average occupied blocks per requestor --- 117 unchanged lines hidden (view full) --- 531system.cpu.l2cache.overall_miss_rate::cpu.data 0.199219 # miss rate for overall accesses 532system.cpu.l2cache.overall_miss_rate::total 0.071780 # miss rate for overall accesses 533system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 534system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 535system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 536system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 537system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 538system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 400system.cpu.l2cache.tags.replacements 109913 # number of replacements 401system.cpu.l2cache.tags.tagsinuse 65155.314985 # Cycle average of tags in use 402system.cpu.l2cache.tags.total_refs 4524855 # Total number of references to valid blocks. 403system.cpu.l2cache.tags.sampled_refs 175194 # Sample count of references to valid blocks. 404system.cpu.l2cache.tags.avg_refs 25.827682 # Average number of references to valid blocks. 405system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. 406system.cpu.l2cache.tags.occ_blocks::writebacks 48764.050695 # Average occupied blocks per requestor 407system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 2.931995 # Average occupied blocks per requestor --- 117 unchanged lines hidden (view full) --- 525system.cpu.l2cache.overall_miss_rate::cpu.data 0.199219 # miss rate for overall accesses 526system.cpu.l2cache.overall_miss_rate::total 0.071780 # miss rate for overall accesses 527system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 528system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked 529system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked 530system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked 531system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 532system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 539system.cpu.l2cache.fast_writes 0 # number of fast writes performed 540system.cpu.l2cache.cache_copies 0 # number of cache copies performed | |
| 541system.cpu.l2cache.writebacks::writebacks 101950 # number of writebacks 542system.cpu.l2cache.writebacks::total 101950 # number of writebacks | 533system.cpu.l2cache.writebacks::writebacks 101950 # number of writebacks 534system.cpu.l2cache.writebacks::total 101950 # number of writebacks |
| 543system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 544system.cpu.toL2Bus.snoop_filter.tot_requests 5059903 # Total number of requests made to the snoop filter. 545system.cpu.toL2Bus.snoop_filter.hit_single_requests 2540486 # Number of requests hitting in the snoop filter with a single holder of the requested data. 546system.cpu.toL2Bus.snoop_filter.hit_multi_requests 39261 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 547system.cpu.toL2Bus.snoop_filter.tot_snoops 422 # Total number of snoops made to the snoop filter. 548system.cpu.toL2Bus.snoop_filter.hit_single_snoops 422 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 549system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 550system.cpu.toL2Bus.trans_dist::ReadReq 67800 # Transaction distribution 551system.cpu.toL2Bus.trans_dist::ReadResp 2288329 # Transaction distribution --- 94 unchanged lines hidden (view full) --- 646system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id 647system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 648system.iocache.tags.tag_accesses 328176 # Number of tag accesses 649system.iocache.tags.data_accesses 328176 # Number of data accesses 650system.iocache.ReadReq_misses::realview.ide 240 # number of ReadReq misses 651system.iocache.ReadReq_misses::total 240 # number of ReadReq misses 652system.iocache.WriteLineReq_misses::realview.ide 36224 # number of WriteLineReq misses 653system.iocache.WriteLineReq_misses::total 36224 # number of WriteLineReq misses | 535system.cpu.toL2Bus.snoop_filter.tot_requests 5059903 # Total number of requests made to the snoop filter. 536system.cpu.toL2Bus.snoop_filter.hit_single_requests 2540486 # Number of requests hitting in the snoop filter with a single holder of the requested data. 537system.cpu.toL2Bus.snoop_filter.hit_multi_requests 39261 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 538system.cpu.toL2Bus.snoop_filter.tot_snoops 422 # Total number of snoops made to the snoop filter. 539system.cpu.toL2Bus.snoop_filter.hit_single_snoops 422 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 540system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 541system.cpu.toL2Bus.trans_dist::ReadReq 67800 # Transaction distribution 542system.cpu.toL2Bus.trans_dist::ReadResp 2288329 # Transaction distribution --- 94 unchanged lines hidden (view full) --- 637system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id 638system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 639system.iocache.tags.tag_accesses 328176 # Number of tag accesses 640system.iocache.tags.data_accesses 328176 # Number of data accesses 641system.iocache.ReadReq_misses::realview.ide 240 # number of ReadReq misses 642system.iocache.ReadReq_misses::total 240 # number of ReadReq misses 643system.iocache.WriteLineReq_misses::realview.ide 36224 # number of WriteLineReq misses 644system.iocache.WriteLineReq_misses::total 36224 # number of WriteLineReq misses |
| 654system.iocache.demand_misses::realview.ide 240 # number of demand (read+write) misses 655system.iocache.demand_misses::total 240 # number of demand (read+write) misses 656system.iocache.overall_misses::realview.ide 240 # number of overall misses 657system.iocache.overall_misses::total 240 # number of overall misses | 645system.iocache.demand_misses::realview.ide 36464 # number of demand (read+write) misses 646system.iocache.demand_misses::total 36464 # number of demand (read+write) misses 647system.iocache.overall_misses::realview.ide 36464 # number of overall misses 648system.iocache.overall_misses::total 36464 # number of overall misses |
| 658system.iocache.ReadReq_accesses::realview.ide 240 # number of ReadReq accesses(hits+misses) 659system.iocache.ReadReq_accesses::total 240 # number of ReadReq accesses(hits+misses) 660system.iocache.WriteLineReq_accesses::realview.ide 36224 # number of WriteLineReq accesses(hits+misses) 661system.iocache.WriteLineReq_accesses::total 36224 # number of WriteLineReq accesses(hits+misses) | 649system.iocache.ReadReq_accesses::realview.ide 240 # number of ReadReq accesses(hits+misses) 650system.iocache.ReadReq_accesses::total 240 # number of ReadReq accesses(hits+misses) 651system.iocache.WriteLineReq_accesses::realview.ide 36224 # number of WriteLineReq accesses(hits+misses) 652system.iocache.WriteLineReq_accesses::total 36224 # number of WriteLineReq accesses(hits+misses) |
| 662system.iocache.demand_accesses::realview.ide 240 # number of demand (read+write) accesses 663system.iocache.demand_accesses::total 240 # number of demand (read+write) accesses 664system.iocache.overall_accesses::realview.ide 240 # number of overall (read+write) accesses 665system.iocache.overall_accesses::total 240 # number of overall (read+write) accesses | 653system.iocache.demand_accesses::realview.ide 36464 # number of demand (read+write) accesses 654system.iocache.demand_accesses::total 36464 # number of demand (read+write) accesses 655system.iocache.overall_accesses::realview.ide 36464 # number of overall (read+write) accesses 656system.iocache.overall_accesses::total 36464 # number of overall (read+write) accesses |
| 666system.iocache.ReadReq_miss_rate::realview.ide 1 # miss rate for ReadReq accesses 667system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 668system.iocache.WriteLineReq_miss_rate::realview.ide 1 # miss rate for WriteLineReq accesses 669system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 670system.iocache.demand_miss_rate::realview.ide 1 # miss rate for demand accesses 671system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 672system.iocache.overall_miss_rate::realview.ide 1 # miss rate for overall accesses 673system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 674system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 675system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 676system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 677system.iocache.blocked::no_targets 0 # number of cycles access was blocked 678system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 679system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 657system.iocache.ReadReq_miss_rate::realview.ide 1 # miss rate for ReadReq accesses 658system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 659system.iocache.WriteLineReq_miss_rate::realview.ide 1 # miss rate for WriteLineReq accesses 660system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 661system.iocache.demand_miss_rate::realview.ide 1 # miss rate for demand accesses 662system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 663system.iocache.overall_miss_rate::realview.ide 1 # miss rate for overall accesses 664system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 665system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 666system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 667system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 668system.iocache.blocked::no_targets 0 # number of cycles access was blocked 669system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 670system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 680system.iocache.fast_writes 0 # number of fast writes performed 681system.iocache.cache_copies 0 # number of cache copies performed | |
| 682system.iocache.writebacks::writebacks 36190 # number of writebacks 683system.iocache.writebacks::total 36190 # number of writebacks | 671system.iocache.writebacks::writebacks 36190 # number of writebacks 672system.iocache.writebacks::total 36190 # number of writebacks |
| 684system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 685system.membus.trans_dist::ReadReq 40087 # Transaction distribution 686system.membus.trans_dist::ReadResp 74202 # Transaction distribution 687system.membus.trans_dist::WriteReq 27546 # Transaction distribution 688system.membus.trans_dist::WriteResp 27546 # Transaction distribution 689system.membus.trans_dist::WritebackDirty 138140 # Transaction distribution 690system.membus.trans_dist::CleanEvict 8203 # Transaction distribution 691system.membus.trans_dist::UpgradeReq 4507 # Transaction distribution 692system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution --- 77 unchanged lines hidden --- | 673system.membus.trans_dist::ReadReq 40087 # Transaction distribution 674system.membus.trans_dist::ReadResp 74202 # Transaction distribution 675system.membus.trans_dist::WriteReq 27546 # Transaction distribution 676system.membus.trans_dist::WriteResp 27546 # Transaction distribution 677system.membus.trans_dist::WritebackDirty 138140 # Transaction distribution 678system.membus.trans_dist::CleanEvict 8203 # Transaction distribution 679system.membus.trans_dist::UpgradeReq 4507 # Transaction distribution 680system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution --- 77 unchanged lines hidden --- |