Cross Reference: /gem5/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt

1
2---------- Begin Simulation Statistics ----------
3sim_seconds 2.783867 # Number of seconds simulated

4sim_ticks 2783867165000 # Number of ticks simulated
5final_tick 2783867165000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)

4sim_ticks 2783867052000 # Number of ticks simulated
5final_tick 2783867052000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)

6sim_freq 1000000000000 # Frequency of simulated ticks

7host_inst_rate 1374338 # Simulator instruction rate (inst/s)
8host_op_rate 1673035 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 26797569978 # Simulator tick rate (ticks/s)
10host_mem_usage 615488 # Number of bytes of host memory used
11host_seconds 103.89 # Real time elapsed on the host
12sim_insts 142773109 # Number of instructions simulated
13sim_ops 173803334 # Number of ops (including micro ops) simulated

7host_inst_rate 1378466 # Simulator instruction rate (inst/s)
8host_op_rate 1678062 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 26878113924 # Simulator tick rate (ticks/s)
10host_mem_usage 614624 # Number of bytes of host memory used
11host_seconds 103.57 # Real time elapsed on the host
12sim_insts 142772879 # Number of instructions simulated
13sim_ops 173803124 # Number of ops (including micro ops) simulated

14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu.dtb.walker 448 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory

18system.physmem.bytes_read::cpu.inst 1210852 # Number of bytes read from this memory

18system.physmem.bytes_read::cpu.inst 1210788 # Number of bytes read from this memory

19system.physmem.bytes_read::cpu.data 10328292 # Number of bytes read from this memory
20system.physmem.bytes_read::realview.ide 960 # Number of bytes read from this memory

21system.physmem.bytes_read::total 11540680 # Number of bytes read from this memory
22system.physmem.bytes_inst_read::cpu.inst 1210852 # Number of instructions bytes read from this memory
23system.physmem.bytes_inst_read::total 1210852 # Number of instructions bytes read from this memory
24system.physmem.bytes_written::writebacks 8837632 # Number of bytes written to this memory

21system.physmem.bytes_read::total 11540616 # Number of bytes read from this memory
22system.physmem.bytes_inst_read::cpu.inst 1210788 # Number of instructions bytes read from this memory
23system.physmem.bytes_inst_read::total 1210788 # Number of instructions bytes read from this memory
24system.physmem.bytes_written::writebacks 8837568 # Number of bytes written to this memory

25system.physmem.bytes_written::cpu.data 17524 # Number of bytes written to this memory

26system.physmem.bytes_written::total 8855156 # Number of bytes written to this memory

26system.physmem.bytes_written::total 8855092 # Number of bytes written to this memory

27system.physmem.num_reads::cpu.dtb.walker 7 # Number of read requests responded to by this memory
28system.physmem.num_reads::cpu.itb.walker 2 # Number of read requests responded to by this memory

29system.physmem.num_reads::cpu.inst 27373 # Number of read requests responded to by this memory

29system.physmem.num_reads::cpu.inst 27372 # Number of read requests responded to by this memory

30system.physmem.num_reads::cpu.data 161899 # Number of read requests responded to by this memory
31system.physmem.num_reads::realview.ide 15 # Number of read requests responded to by this memory

32system.physmem.num_reads::total 189296 # Number of read requests responded to by this memory
33system.physmem.num_writes::writebacks 138088 # Number of write requests responded to by this memory

32system.physmem.num_reads::total 189295 # Number of read requests responded to by this memory
33system.physmem.num_writes::writebacks 138087 # Number of write requests responded to by this memory

34system.physmem.num_writes::cpu.data 4381 # Number of write requests responded to by this memory

35system.physmem.num_writes::total 142469 # Number of write requests responded to by this memory

35system.physmem.num_writes::total 142468 # Number of write requests responded to by this memory

36system.physmem.bw_read::cpu.dtb.walker 161 # Total read bandwidth from this memory (bytes/s)
37system.physmem.bw_read::cpu.itb.walker 46 # Total read bandwidth from this memory (bytes/s)

38system.physmem.bw_read::cpu.inst 434953 # Total read bandwidth from this memory (bytes/s)

38system.physmem.bw_read::cpu.inst 434930 # Total read bandwidth from this memory (bytes/s)

39system.physmem.bw_read::cpu.data 3710052 # Total read bandwidth from this memory (bytes/s)
40system.physmem.bw_read::realview.ide 345 # Total read bandwidth from this memory (bytes/s)

41system.physmem.bw_read::total 4145557 # Total read bandwidth from this memory (bytes/s)
42system.physmem.bw_inst_read::cpu.inst 434953 # Instruction read bandwidth from this memory (bytes/s)
43system.physmem.bw_inst_read::total 434953 # Instruction read bandwidth from this memory (bytes/s)
44system.physmem.bw_write::writebacks 3174588 # Write bandwidth from this memory (bytes/s)

41system.physmem.bw_read::total 4145534 # Total read bandwidth from this memory (bytes/s)
42system.physmem.bw_inst_read::cpu.inst 434930 # Instruction read bandwidth from this memory (bytes/s)
43system.physmem.bw_inst_read::total 434930 # Instruction read bandwidth from this memory (bytes/s)
44system.physmem.bw_write::writebacks 3174565 # Write bandwidth from this memory (bytes/s)

45system.physmem.bw_write::cpu.data 6295 # Write bandwidth from this memory (bytes/s)

46system.physmem.bw_write::total 3180883 # Write bandwidth from this memory (bytes/s)
47system.physmem.bw_total::writebacks 3174588 # Total bandwidth to/from this memory (bytes/s)

46system.physmem.bw_write::total 3180860 # Write bandwidth from this memory (bytes/s)
47system.physmem.bw_total::writebacks 3174565 # Total bandwidth to/from this memory (bytes/s)

48system.physmem.bw_total::cpu.dtb.walker 161 # Total bandwidth to/from this memory (bytes/s)
49system.physmem.bw_total::cpu.itb.walker 46 # Total bandwidth to/from this memory (bytes/s)

50system.physmem.bw_total::cpu.inst 434953 # Total bandwidth to/from this memory (bytes/s)

50system.physmem.bw_total::cpu.inst 434930 # Total bandwidth to/from this memory (bytes/s)

51system.physmem.bw_total::cpu.data 3716347 # Total bandwidth to/from this memory (bytes/s)
52system.physmem.bw_total::realview.ide 345 # Total bandwidth to/from this memory (bytes/s)

53system.physmem.bw_total::total 7326440 # Total bandwidth to/from this memory (bytes/s)

53system.physmem.bw_total::total 7326394 # Total bandwidth to/from this memory (bytes/s)

54system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
55system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
56system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
57system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
58system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
59system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
60system.realview.nvmem.bw_read::cpu.inst 7 # Total read bandwidth from this memory (bytes/s)
61system.realview.nvmem.bw_read::total 7 # Total read bandwidth from this memory (bytes/s)

--- 52 unchanged lines hidden (view full) ---

114system.cpu.dtb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
115system.cpu.dtb.walker.walkRequestOrigin_Requested::total 10029 # Table walker requests started/completed, data/inst
116system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 7865 # Table walker requests started/completed, data/inst
117system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
118system.cpu.dtb.walker.walkRequestOrigin_Completed::total 7865 # Table walker requests started/completed, data/inst
119system.cpu.dtb.walker.walkRequestOrigin::total 17894 # Table walker requests started/completed, data/inst
120system.cpu.dtb.inst_hits 0 # ITB inst hits
121system.cpu.dtb.inst_misses 0 # ITB inst misses

122system.cpu.dtb.read_hits 31526301 # DTB read hits

122system.cpu.dtb.read_hits 31526223 # DTB read hits

123system.cpu.dtb.read_misses 8581 # DTB read misses

124system.cpu.dtb.write_hits 23124463 # DTB write hits

124system.cpu.dtb.write_hits 23124452 # DTB write hits

125system.cpu.dtb.write_misses 1448 # DTB write misses
126system.cpu.dtb.flush_tlb 64 # Number of times complete TLB was flushed
127system.cpu.dtb.flush_tlb_mva 917 # Number of times TLB was flushed by MVA
128system.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
129system.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
130system.cpu.dtb.flush_entries 4349 # Number of entries that have been flushed from TLB
131system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
132system.cpu.dtb.prefetch_faults 1613 # Number of TLB faults due to prefetch
133system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
134system.cpu.dtb.perms_faults 445 # Number of TLB faults due to permissions restrictions

135system.cpu.dtb.read_accesses 31534882 # DTB read accesses
136system.cpu.dtb.write_accesses 23125911 # DTB write accesses

135system.cpu.dtb.read_accesses 31534804 # DTB read accesses
136system.cpu.dtb.write_accesses 23125900 # DTB write accesses

137system.cpu.dtb.inst_accesses 0 # ITB inst accesses

138system.cpu.dtb.hits 54650764 # DTB hits

138system.cpu.dtb.hits 54650675 # DTB hits

139system.cpu.dtb.misses 10029 # DTB misses

140system.cpu.dtb.accesses 54660793 # DTB accesses

140system.cpu.dtb.accesses 54660704 # DTB accesses

141system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested
142system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
143system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst
144system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst
145system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
146system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst
147system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst
148system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst

--- 31 unchanged lines hidden (view full) ---

180system.cpu.itb.walker.walkPageSizes::total 3107 # Table walker page sizes translated
181system.cpu.itb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst
182system.cpu.itb.walker.walkRequestOrigin_Requested::Inst 4762 # Table walker requests started/completed, data/inst
183system.cpu.itb.walker.walkRequestOrigin_Requested::total 4762 # Table walker requests started/completed, data/inst
184system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 # Table walker requests started/completed, data/inst
185system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 3107 # Table walker requests started/completed, data/inst
186system.cpu.itb.walker.walkRequestOrigin_Completed::total 3107 # Table walker requests started/completed, data/inst
187system.cpu.itb.walker.walkRequestOrigin::total 7869 # Table walker requests started/completed, data/inst

188system.cpu.itb.inst_hits 147039592 # ITB inst hits

188system.cpu.itb.inst_hits 147039346 # ITB inst hits

189system.cpu.itb.inst_misses 4762 # ITB inst misses
190system.cpu.itb.read_hits 0 # DTB read hits
191system.cpu.itb.read_misses 0 # DTB read misses
192system.cpu.itb.write_hits 0 # DTB write hits
193system.cpu.itb.write_misses 0 # DTB write misses
194system.cpu.itb.flush_tlb 64 # Number of times complete TLB was flushed
195system.cpu.itb.flush_tlb_mva 917 # Number of times TLB was flushed by MVA
196system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID
197system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID
198system.cpu.itb.flush_entries 2913 # Number of entries that have been flushed from TLB
199system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions
200system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch
201system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions
202system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions
203system.cpu.itb.read_accesses 0 # DTB read accesses
204system.cpu.itb.write_accesses 0 # DTB write accesses

205system.cpu.itb.inst_accesses 147044354 # ITB inst accesses
206system.cpu.itb.hits 147039592 # DTB hits

205system.cpu.itb.inst_accesses 147044108 # ITB inst accesses
206system.cpu.itb.hits 147039346 # DTB hits

207system.cpu.itb.misses 4762 # DTB misses

208system.cpu.itb.accesses 147044354 # DTB accesses
209system.cpu.numCycles 5567737414 # number of cpu cycles simulated

208system.cpu.itb.accesses 147044108 # DTB accesses
209system.cpu.numCycles 5567737188 # number of cpu cycles simulated

210system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
211system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed

212system.cpu.committedInsts 142773109 # Number of instructions committed
213system.cpu.committedOps 173803334 # Number of ops (including micro ops) committed
214system.cpu.num_int_alu_accesses 153162826 # Number of integer alu accesses

212system.cpu.committedInsts 142772879 # Number of instructions committed
213system.cpu.committedOps 173803124 # Number of ops (including micro ops) committed
214system.cpu.num_int_alu_accesses 153162683 # Number of integer alu accesses

215system.cpu.num_fp_alu_accesses 11484 # Number of float alu accesses

216system.cpu.num_func_calls 16873879 # number of times a function call or return occured
217system.cpu.num_conditional_control_insts 18730390 # number of instructions that are conditional controls
218system.cpu.num_int_insts 153162826 # number of integer instructions

216system.cpu.num_func_calls 16873899 # number of times a function call or return occured
217system.cpu.num_conditional_control_insts 18730330 # number of instructions that are conditional controls
218system.cpu.num_int_insts 153162683 # number of integer instructions

219system.cpu.num_fp_insts 11484 # number of float instructions

220system.cpu.num_int_register_reads 285060124 # number of times the integer registers were read
221system.cpu.num_int_register_writes 107179564 # number of times the integer registers were written

220system.cpu.num_int_register_reads 285059803 # number of times the integer registers were read
221system.cpu.num_int_register_writes 107179480 # number of times the integer registers were written

222system.cpu.num_fp_register_reads 8772 # number of times the floating registers were read
223system.cpu.num_fp_register_writes 2716 # number of times the floating registers were written

224system.cpu.num_cc_register_reads 530854681 # number of times the CC registers were read
225system.cpu.num_cc_register_writes 62364458 # number of times the CC registers were written
226system.cpu.num_mem_refs 55939365 # number of memory refs
227system.cpu.num_load_insts 31855962 # Number of load instructions
228system.cpu.num_store_insts 24083403 # Number of store instructions
229system.cpu.num_idle_cycles 5389653746.932553 # Number of idle cycles
230system.cpu.num_busy_cycles 178083667.067447 # Number of busy cycles

224system.cpu.num_cc_register_reads 530854003 # number of times the CC registers were read
225system.cpu.num_cc_register_writes 62364299 # number of times the CC registers were written
226system.cpu.num_mem_refs 55939276 # number of memory refs
227system.cpu.num_load_insts 31855884 # Number of load instructions
228system.cpu.num_store_insts 24083392 # Number of store instructions
229system.cpu.num_idle_cycles 5389653746.932674 # Number of idle cycles
230system.cpu.num_busy_cycles 178083441.067325 # Number of busy cycles

231system.cpu.not_idle_fraction 0.031985 # Percentage of non-idle cycles
232system.cpu.idle_fraction 0.968015 # Percentage of idle cycles

233system.cpu.Branches 36397028 # Number of branches fetched

233system.cpu.Branches 36396981 # Number of branches fetched

234system.cpu.op_class::No_OpClass 2337 0.00% 0.00% # Class of executed instruction

235system.cpu.op_class::IntAlu 121152975 68.36% 68.36% # Class of executed instruction

235system.cpu.op_class::IntAlu 121152838 68.36% 68.36% # Class of executed instruction

236system.cpu.op_class::IntMult 116892 0.07% 68.43% # Class of executed instruction
237system.cpu.op_class::IntDiv 0 0.00% 68.43% # Class of executed instruction
238system.cpu.op_class::FloatAdd 0 0.00% 68.43% # Class of executed instruction
239system.cpu.op_class::FloatCmp 0 0.00% 68.43% # Class of executed instruction
240system.cpu.op_class::FloatCvt 0 0.00% 68.43% # Class of executed instruction
241system.cpu.op_class::FloatMult 0 0.00% 68.43% # Class of executed instruction
242system.cpu.op_class::FloatDiv 0 0.00% 68.43% # Class of executed instruction
243system.cpu.op_class::FloatSqrt 0 0.00% 68.43% # Class of executed instruction

--- 12 unchanged lines hidden (view full) ---

256system.cpu.op_class::SimdFloatAlu 0 0.00% 68.43% # Class of executed instruction
257system.cpu.op_class::SimdFloatCmp 0 0.00% 68.43% # Class of executed instruction
258system.cpu.op_class::SimdFloatCvt 0 0.00% 68.43% # Class of executed instruction
259system.cpu.op_class::SimdFloatDiv 0 0.00% 68.43% # Class of executed instruction
260system.cpu.op_class::SimdFloatMisc 8569 0.00% 68.44% # Class of executed instruction
261system.cpu.op_class::SimdFloatMult 0 0.00% 68.44% # Class of executed instruction
262system.cpu.op_class::SimdFloatMultAcc 0 0.00% 68.44% # Class of executed instruction
263system.cpu.op_class::SimdFloatSqrt 0 0.00% 68.44% # Class of executed instruction

264system.cpu.op_class::MemRead 31855962 17.98% 86.41% # Class of executed instruction
265system.cpu.op_class::MemWrite 24083403 13.59% 100.00% # Class of executed instruction

264system.cpu.op_class::MemRead 31855884 17.98% 86.41% # Class of executed instruction
265system.cpu.op_class::MemWrite 24083392 13.59% 100.00% # Class of executed instruction

266system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
267system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction

268system.cpu.op_class::total 177220138 # Class of executed instruction

268system.cpu.op_class::total 177219912 # Class of executed instruction

269system.cpu.kern.inst.arm 0 # number of arm instructions executed
270system.cpu.kern.inst.quiesce 3083 # number of quiesce instructions executed

271system.cpu.dcache.tags.replacements 819403 # number of replacements

271system.cpu.dcache.tags.replacements 819402 # number of replacements

272system.cpu.dcache.tags.tagsinuse 511.997174 # Cycle average of tags in use

273system.cpu.dcache.tags.total_refs 53784550 # Total number of references to valid blocks.
274system.cpu.dcache.tags.sampled_refs 819915 # Sample count of references to valid blocks.
275system.cpu.dcache.tags.avg_refs 65.597714 # Average number of references to valid blocks.

273system.cpu.dcache.tags.total_refs 53784483 # Total number of references to valid blocks.
274system.cpu.dcache.tags.sampled_refs 819914 # Sample count of references to valid blocks.
275system.cpu.dcache.tags.avg_refs 65.597713 # Average number of references to valid blocks.

276system.cpu.dcache.tags.warmup_cycle 23053500 # Cycle when the warmup percentage was hit.
277system.cpu.dcache.tags.occ_blocks::cpu.data 511.997174 # Average occupied blocks per requestor
278system.cpu.dcache.tags.occ_percent::cpu.data 0.999994 # Average percentage of cache occupancy
279system.cpu.dcache.tags.occ_percent::total 0.999994 # Average percentage of cache occupancy
280system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
281system.cpu.dcache.tags.age_task_id_blocks_1024::0 286 # Occupied blocks per task id
282system.cpu.dcache.tags.age_task_id_blocks_1024::1 196 # Occupied blocks per task id
283system.cpu.dcache.tags.age_task_id_blocks_1024::2 30 # Occupied blocks per task id
284system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id

285system.cpu.dcache.tags.tag_accesses 219237855 # Number of tag accesses
286system.cpu.dcache.tags.data_accesses 219237855 # Number of data accesses
287system.cpu.dcache.ReadReq_hits::cpu.data 30129122 # number of ReadReq hits
288system.cpu.dcache.ReadReq_hits::total 30129122 # number of ReadReq hits
289system.cpu.dcache.WriteReq_hits::cpu.data 22340107 # number of WriteReq hits
290system.cpu.dcache.WriteReq_hits::total 22340107 # number of WriteReq hits

285system.cpu.dcache.tags.tag_accesses 219237582 # Number of tag accesses
286system.cpu.dcache.tags.data_accesses 219237582 # Number of data accesses
287system.cpu.dcache.ReadReq_hits::cpu.data 30129052 # number of ReadReq hits
288system.cpu.dcache.ReadReq_hits::total 30129052 # number of ReadReq hits
289system.cpu.dcache.WriteReq_hits::cpu.data 22340110 # number of WriteReq hits
290system.cpu.dcache.WriteReq_hits::total 22340110 # number of WriteReq hits

291system.cpu.dcache.SoftPFReq_hits::cpu.data 395080 # number of SoftPFReq hits
292system.cpu.dcache.SoftPFReq_hits::total 395080 # number of SoftPFReq hits
293system.cpu.dcache.LoadLockedReq_hits::cpu.data 457347 # number of LoadLockedReq hits
294system.cpu.dcache.LoadLockedReq_hits::total 457347 # number of LoadLockedReq hits
295system.cpu.dcache.StoreCondReq_hits::cpu.data 460136 # number of StoreCondReq hits
296system.cpu.dcache.StoreCondReq_hits::total 460136 # number of StoreCondReq hits

297system.cpu.dcache.demand_hits::cpu.data 52469229 # number of demand (read+write) hits
298system.cpu.dcache.demand_hits::total 52469229 # number of demand (read+write) hits
299system.cpu.dcache.overall_hits::cpu.data 52864309 # number of overall hits
300system.cpu.dcache.overall_hits::total 52864309 # number of overall hits
301system.cpu.dcache.ReadReq_misses::cpu.data 396277 # number of ReadReq misses
302system.cpu.dcache.ReadReq_misses::total 396277 # number of ReadReq misses

297system.cpu.dcache.demand_hits::cpu.data 52469162 # number of demand (read+write) hits
298system.cpu.dcache.demand_hits::total 52469162 # number of demand (read+write) hits
299system.cpu.dcache.overall_hits::cpu.data 52864242 # number of overall hits
300system.cpu.dcache.overall_hits::total 52864242 # number of overall hits
301system.cpu.dcache.ReadReq_misses::cpu.data 396276 # number of ReadReq misses
302system.cpu.dcache.ReadReq_misses::total 396276 # number of ReadReq misses

303system.cpu.dcache.WriteReq_misses::cpu.data 301678 # number of WriteReq misses
304system.cpu.dcache.WriteReq_misses::total 301678 # number of WriteReq misses
305system.cpu.dcache.SoftPFReq_misses::cpu.data 116120 # number of SoftPFReq misses
306system.cpu.dcache.SoftPFReq_misses::total 116120 # number of SoftPFReq misses
307system.cpu.dcache.LoadLockedReq_misses::cpu.data 8612 # number of LoadLockedReq misses
308system.cpu.dcache.LoadLockedReq_misses::total 8612 # number of LoadLockedReq misses
309system.cpu.dcache.StoreCondReq_misses::cpu.data 2 # number of StoreCondReq misses
310system.cpu.dcache.StoreCondReq_misses::total 2 # number of StoreCondReq misses

311system.cpu.dcache.demand_misses::cpu.data 697955 # number of demand (read+write) misses
312system.cpu.dcache.demand_misses::total 697955 # number of demand (read+write) misses
313system.cpu.dcache.overall_misses::cpu.data 814075 # number of overall misses
314system.cpu.dcache.overall_misses::total 814075 # number of overall misses
315system.cpu.dcache.ReadReq_accesses::cpu.data 30525399 # number of ReadReq accesses(hits+misses)
316system.cpu.dcache.ReadReq_accesses::total 30525399 # number of ReadReq accesses(hits+misses)
317system.cpu.dcache.WriteReq_accesses::cpu.data 22641785 # number of WriteReq accesses(hits+misses)
318system.cpu.dcache.WriteReq_accesses::total 22641785 # number of WriteReq accesses(hits+misses)

311system.cpu.dcache.demand_misses::cpu.data 697954 # number of demand (read+write) misses
312system.cpu.dcache.demand_misses::total 697954 # number of demand (read+write) misses
313system.cpu.dcache.overall_misses::cpu.data 814074 # number of overall misses
314system.cpu.dcache.overall_misses::total 814074 # number of overall misses
315system.cpu.dcache.ReadReq_accesses::cpu.data 30525328 # number of ReadReq accesses(hits+misses)
316system.cpu.dcache.ReadReq_accesses::total 30525328 # number of ReadReq accesses(hits+misses)
317system.cpu.dcache.WriteReq_accesses::cpu.data 22641788 # number of WriteReq accesses(hits+misses)
318system.cpu.dcache.WriteReq_accesses::total 22641788 # number of WriteReq accesses(hits+misses)

319system.cpu.dcache.SoftPFReq_accesses::cpu.data 511200 # number of SoftPFReq accesses(hits+misses)
320system.cpu.dcache.SoftPFReq_accesses::total 511200 # number of SoftPFReq accesses(hits+misses)
321system.cpu.dcache.LoadLockedReq_accesses::cpu.data 465959 # number of LoadLockedReq accesses(hits+misses)
322system.cpu.dcache.LoadLockedReq_accesses::total 465959 # number of LoadLockedReq accesses(hits+misses)
323system.cpu.dcache.StoreCondReq_accesses::cpu.data 460138 # number of StoreCondReq accesses(hits+misses)
324system.cpu.dcache.StoreCondReq_accesses::total 460138 # number of StoreCondReq accesses(hits+misses)

325system.cpu.dcache.demand_accesses::cpu.data 53167184 # number of demand (read+write) accesses
326system.cpu.dcache.demand_accesses::total 53167184 # number of demand (read+write) accesses
327system.cpu.dcache.overall_accesses::cpu.data 53678384 # number of overall (read+write) accesses
328system.cpu.dcache.overall_accesses::total 53678384 # number of overall (read+write) accesses

325system.cpu.dcache.demand_accesses::cpu.data 53167116 # number of demand (read+write) accesses
326system.cpu.dcache.demand_accesses::total 53167116 # number of demand (read+write) accesses
327system.cpu.dcache.overall_accesses::cpu.data 53678316 # number of overall (read+write) accesses
328system.cpu.dcache.overall_accesses::total 53678316 # number of overall (read+write) accesses

329system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.012982 # miss rate for ReadReq accesses
330system.cpu.dcache.ReadReq_miss_rate::total 0.012982 # miss rate for ReadReq accesses
331system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013324 # miss rate for WriteReq accesses
332system.cpu.dcache.WriteReq_miss_rate::total 0.013324 # miss rate for WriteReq accesses
333system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.227152 # miss rate for SoftPFReq accesses
334system.cpu.dcache.SoftPFReq_miss_rate::total 0.227152 # miss rate for SoftPFReq accesses
335system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.018482 # miss rate for LoadLockedReq accesses
336system.cpu.dcache.LoadLockedReq_miss_rate::total 0.018482 # miss rate for LoadLockedReq accesses

--- 6 unchanged lines hidden (view full) ---

343system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
344system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
345system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
346system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked
347system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
348system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
349system.cpu.dcache.fast_writes 0 # number of fast writes performed
350system.cpu.dcache.cache_copies 0 # number of cache copies performed

351system.cpu.dcache.writebacks::writebacks 682060 # number of writebacks
352system.cpu.dcache.writebacks::total 682060 # number of writebacks

351system.cpu.dcache.writebacks::writebacks 682059 # number of writebacks
352system.cpu.dcache.writebacks::total 682059 # number of writebacks

353system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate

354system.cpu.icache.tags.replacements 1699220 # number of replacements

354system.cpu.icache.tags.replacements 1699214 # number of replacements

355system.cpu.icache.tags.tagsinuse 511.663681 # Cycle average of tags in use

356system.cpu.icache.tags.total_refs 145342961 # Total number of references to valid blocks.
357system.cpu.icache.tags.sampled_refs 1699732 # Sample count of references to valid blocks.
358system.cpu.icache.tags.avg_refs 85.509340 # Average number of references to valid blocks.

356system.cpu.icache.tags.total_refs 145342721 # Total number of references to valid blocks.
357system.cpu.icache.tags.sampled_refs 1699726 # Sample count of references to valid blocks.
358system.cpu.icache.tags.avg_refs 85.509500 # Average number of references to valid blocks.

359system.cpu.icache.tags.warmup_cycle 7831491500 # Cycle when the warmup percentage was hit.
360system.cpu.icache.tags.occ_blocks::cpu.inst 511.663681 # Average occupied blocks per requestor
361system.cpu.icache.tags.occ_percent::cpu.inst 0.999343 # Average percentage of cache occupancy
362system.cpu.icache.tags.occ_percent::total 0.999343 # Average percentage of cache occupancy
363system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
364system.cpu.icache.tags.age_task_id_blocks_1024::0 197 # Occupied blocks per task id
365system.cpu.icache.tags.age_task_id_blocks_1024::1 77 # Occupied blocks per task id
366system.cpu.icache.tags.age_task_id_blocks_1024::2 233 # Occupied blocks per task id
367system.cpu.icache.tags.age_task_id_blocks_1024::3 5 # Occupied blocks per task id
368system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id

369system.cpu.icache.tags.tag_accesses 148742437 # Number of tag accesses
370system.cpu.icache.tags.data_accesses 148742437 # Number of data accesses
371system.cpu.icache.ReadReq_hits::cpu.inst 145342961 # number of ReadReq hits
372system.cpu.icache.ReadReq_hits::total 145342961 # number of ReadReq hits
373system.cpu.icache.demand_hits::cpu.inst 145342961 # number of demand (read+write) hits
374system.cpu.icache.demand_hits::total 145342961 # number of demand (read+write) hits
375system.cpu.icache.overall_hits::cpu.inst 145342961 # number of overall hits
376system.cpu.icache.overall_hits::total 145342961 # number of overall hits
377system.cpu.icache.ReadReq_misses::cpu.inst 1699738 # number of ReadReq misses
378system.cpu.icache.ReadReq_misses::total 1699738 # number of ReadReq misses
379system.cpu.icache.demand_misses::cpu.inst 1699738 # number of demand (read+write) misses
380system.cpu.icache.demand_misses::total 1699738 # number of demand (read+write) misses
381system.cpu.icache.overall_misses::cpu.inst 1699738 # number of overall misses
382system.cpu.icache.overall_misses::total 1699738 # number of overall misses
383system.cpu.icache.ReadReq_accesses::cpu.inst 147042699 # number of ReadReq accesses(hits+misses)
384system.cpu.icache.ReadReq_accesses::total 147042699 # number of ReadReq accesses(hits+misses)
385system.cpu.icache.demand_accesses::cpu.inst 147042699 # number of demand (read+write) accesses
386system.cpu.icache.demand_accesses::total 147042699 # number of demand (read+write) accesses
387system.cpu.icache.overall_accesses::cpu.inst 147042699 # number of overall (read+write) accesses
388system.cpu.icache.overall_accesses::total 147042699 # number of overall (read+write) accesses

369system.cpu.icache.tags.tag_accesses 148742185 # Number of tag accesses
370system.cpu.icache.tags.data_accesses 148742185 # Number of data accesses
371system.cpu.icache.ReadReq_hits::cpu.inst 145342721 # number of ReadReq hits
372system.cpu.icache.ReadReq_hits::total 145342721 # number of ReadReq hits
373system.cpu.icache.demand_hits::cpu.inst 145342721 # number of demand (read+write) hits
374system.cpu.icache.demand_hits::total 145342721 # number of demand (read+write) hits
375system.cpu.icache.overall_hits::cpu.inst 145342721 # number of overall hits
376system.cpu.icache.overall_hits::total 145342721 # number of overall hits
377system.cpu.icache.ReadReq_misses::cpu.inst 1699732 # number of ReadReq misses
378system.cpu.icache.ReadReq_misses::total 1699732 # number of ReadReq misses
379system.cpu.icache.demand_misses::cpu.inst 1699732 # number of demand (read+write) misses
380system.cpu.icache.demand_misses::total 1699732 # number of demand (read+write) misses
381system.cpu.icache.overall_misses::cpu.inst 1699732 # number of overall misses
382system.cpu.icache.overall_misses::total 1699732 # number of overall misses
383system.cpu.icache.ReadReq_accesses::cpu.inst 147042453 # number of ReadReq accesses(hits+misses)
384system.cpu.icache.ReadReq_accesses::total 147042453 # number of ReadReq accesses(hits+misses)
385system.cpu.icache.demand_accesses::cpu.inst 147042453 # number of demand (read+write) accesses
386system.cpu.icache.demand_accesses::total 147042453 # number of demand (read+write) accesses
387system.cpu.icache.overall_accesses::cpu.inst 147042453 # number of overall (read+write) accesses
388system.cpu.icache.overall_accesses::total 147042453 # number of overall (read+write) accesses

389system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.011559 # miss rate for ReadReq accesses
390system.cpu.icache.ReadReq_miss_rate::total 0.011559 # miss rate for ReadReq accesses
391system.cpu.icache.demand_miss_rate::cpu.inst 0.011559 # miss rate for demand accesses
392system.cpu.icache.demand_miss_rate::total 0.011559 # miss rate for demand accesses
393system.cpu.icache.overall_miss_rate::cpu.inst 0.011559 # miss rate for overall accesses
394system.cpu.icache.overall_miss_rate::total 0.011559 # miss rate for overall accesses
395system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
396system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
397system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
398system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
399system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
400system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
401system.cpu.icache.fast_writes 0 # number of fast writes performed
402system.cpu.icache.cache_copies 0 # number of cache copies performed
403system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate

404system.cpu.l2cache.tags.replacements 110027 # number of replacements
405system.cpu.l2cache.tags.tagsinuse 65155.309065 # Cycle average of tags in use
406system.cpu.l2cache.tags.total_refs 2727894 # Total number of references to valid blocks.
407system.cpu.l2cache.tags.sampled_refs 175308 # Sample count of references to valid blocks.
408system.cpu.l2cache.tags.avg_refs 15.560579 # Average number of references to valid blocks.

404system.cpu.l2cache.tags.replacements 110026 # number of replacements
405system.cpu.l2cache.tags.tagsinuse 65155.309107 # Cycle average of tags in use
406system.cpu.l2cache.tags.total_refs 2727887 # Total number of references to valid blocks.
407system.cpu.l2cache.tags.sampled_refs 175307 # Sample count of references to valid blocks.
408system.cpu.l2cache.tags.avg_refs 15.560628 # Average number of references to valid blocks.

409system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit.

410system.cpu.l2cache.tags.occ_blocks::writebacks 48893.397928 # Average occupied blocks per requestor

410system.cpu.l2cache.tags.occ_blocks::writebacks 48893.401643 # Average occupied blocks per requestor

411system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 2.931998 # Average occupied blocks per requestor
412system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.004345 # Average occupied blocks per requestor

413system.cpu.l2cache.tags.occ_blocks::cpu.inst 9064.659727 # Average occupied blocks per requestor
414system.cpu.l2cache.tags.occ_blocks::cpu.data 7194.315067 # Average occupied blocks per requestor

413system.cpu.l2cache.tags.occ_blocks::cpu.inst 9064.654943 # Average occupied blocks per requestor
414system.cpu.l2cache.tags.occ_blocks::cpu.data 7194.316179 # Average occupied blocks per requestor

415system.cpu.l2cache.tags.occ_percent::writebacks 0.746054 # Average percentage of cache occupancy
416system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000045 # Average percentage of cache occupancy
417system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000000 # Average percentage of cache occupancy
418system.cpu.l2cache.tags.occ_percent::cpu.inst 0.138316 # Average percentage of cache occupancy
419system.cpu.l2cache.tags.occ_percent::cpu.data 0.109777 # Average percentage of cache occupancy
420system.cpu.l2cache.tags.occ_percent::total 0.994191 # Average percentage of cache occupancy
421system.cpu.l2cache.tags.occ_task_id_blocks::1023 5 # Occupied blocks per task id
422system.cpu.l2cache.tags.occ_task_id_blocks::1024 65276 # Occupied blocks per task id
423system.cpu.l2cache.tags.age_task_id_blocks_1023::4 5 # Occupied blocks per task id
424system.cpu.l2cache.tags.age_task_id_blocks_1024::0 40 # Occupied blocks per task id
425system.cpu.l2cache.tags.age_task_id_blocks_1024::1 180 # Occupied blocks per task id
426system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3716 # Occupied blocks per task id
427system.cpu.l2cache.tags.age_task_id_blocks_1024::3 10700 # Occupied blocks per task id
428system.cpu.l2cache.tags.age_task_id_blocks_1024::4 50640 # Occupied blocks per task id
429system.cpu.l2cache.tags.occ_task_id_percent::1023 0.000076 # Percentage of cache occupancy per task id
430system.cpu.l2cache.tags.occ_task_id_percent::1024 0.996033 # Percentage of cache occupancy per task id

431system.cpu.l2cache.tags.tag_accesses 26204409 # Number of tag accesses
432system.cpu.l2cache.tags.data_accesses 26204409 # Number of data accesses

431system.cpu.l2cache.tags.tag_accesses 26204344 # Number of tag accesses
432system.cpu.l2cache.tags.data_accesses 26204344 # Number of data accesses

433system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 7601 # number of ReadReq hits
434system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3621 # number of ReadReq hits

435system.cpu.l2cache.ReadReq_hits::cpu.inst 1681362 # number of ReadReq hits
436system.cpu.l2cache.ReadReq_hits::cpu.data 505475 # number of ReadReq hits
437system.cpu.l2cache.ReadReq_hits::total 2198059 # number of ReadReq hits
438system.cpu.l2cache.Writeback_hits::writebacks 682060 # number of Writeback hits
439system.cpu.l2cache.Writeback_hits::total 682060 # number of Writeback hits

435system.cpu.l2cache.ReadReq_hits::cpu.inst 1681357 # number of ReadReq hits
436system.cpu.l2cache.ReadReq_hits::cpu.data 505474 # number of ReadReq hits
437system.cpu.l2cache.ReadReq_hits::total 2198053 # number of ReadReq hits
438system.cpu.l2cache.Writeback_hits::writebacks 682059 # number of Writeback hits
439system.cpu.l2cache.Writeback_hits::total 682059 # number of Writeback hits

440system.cpu.l2cache.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits
441system.cpu.l2cache.UpgradeReq_hits::total 28 # number of UpgradeReq hits
442system.cpu.l2cache.ReadExReq_hits::cpu.data 151058 # number of ReadExReq hits
443system.cpu.l2cache.ReadExReq_hits::total 151058 # number of ReadExReq hits
444system.cpu.l2cache.demand_hits::cpu.dtb.walker 7601 # number of demand (read+write) hits
445system.cpu.l2cache.demand_hits::cpu.itb.walker 3621 # number of demand (read+write) hits

446system.cpu.l2cache.demand_hits::cpu.inst 1681362 # number of demand (read+write) hits
447system.cpu.l2cache.demand_hits::cpu.data 656533 # number of demand (read+write) hits
448system.cpu.l2cache.demand_hits::total 2349117 # number of demand (read+write) hits

446system.cpu.l2cache.demand_hits::cpu.inst 1681357 # number of demand (read+write) hits
447system.cpu.l2cache.demand_hits::cpu.data 656532 # number of demand (read+write) hits
448system.cpu.l2cache.demand_hits::total 2349111 # number of demand (read+write) hits

449system.cpu.l2cache.overall_hits::cpu.dtb.walker 7601 # number of overall hits
450system.cpu.l2cache.overall_hits::cpu.itb.walker 3621 # number of overall hits

451system.cpu.l2cache.overall_hits::cpu.inst 1681362 # number of overall hits
452system.cpu.l2cache.overall_hits::cpu.data 656533 # number of overall hits
453system.cpu.l2cache.overall_hits::total 2349117 # number of overall hits

451system.cpu.l2cache.overall_hits::cpu.inst 1681357 # number of overall hits
452system.cpu.l2cache.overall_hits::cpu.data 656532 # number of overall hits
453system.cpu.l2cache.overall_hits::total 2349111 # number of overall hits

454system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 7 # number of ReadReq misses
455system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 2 # number of ReadReq misses

456system.cpu.l2cache.ReadReq_misses::cpu.inst 18358 # number of ReadReq misses

456system.cpu.l2cache.ReadReq_misses::cpu.inst 18357 # number of ReadReq misses

457system.cpu.l2cache.ReadReq_misses::cpu.data 15534 # number of ReadReq misses

458system.cpu.l2cache.ReadReq_misses::total 33901 # number of ReadReq misses

458system.cpu.l2cache.ReadReq_misses::total 33900 # number of ReadReq misses

459system.cpu.l2cache.UpgradeReq_misses::cpu.data 2728 # number of UpgradeReq misses
460system.cpu.l2cache.UpgradeReq_misses::total 2728 # number of UpgradeReq misses
461system.cpu.l2cache.SCUpgradeReq_misses::cpu.data 2 # number of SCUpgradeReq misses
462system.cpu.l2cache.SCUpgradeReq_misses::total 2 # number of SCUpgradeReq misses
463system.cpu.l2cache.ReadExReq_misses::cpu.data 147864 # number of ReadExReq misses
464system.cpu.l2cache.ReadExReq_misses::total 147864 # number of ReadExReq misses
465system.cpu.l2cache.demand_misses::cpu.dtb.walker 7 # number of demand (read+write) misses
466system.cpu.l2cache.demand_misses::cpu.itb.walker 2 # number of demand (read+write) misses

467system.cpu.l2cache.demand_misses::cpu.inst 18358 # number of demand (read+write) misses

467system.cpu.l2cache.demand_misses::cpu.inst 18357 # number of demand (read+write) misses

468system.cpu.l2cache.demand_misses::cpu.data 163398 # number of demand (read+write) misses

469system.cpu.l2cache.demand_misses::total 181765 # number of demand (read+write) misses

469system.cpu.l2cache.demand_misses::total 181764 # number of demand (read+write) misses

470system.cpu.l2cache.overall_misses::cpu.dtb.walker 7 # number of overall misses
471system.cpu.l2cache.overall_misses::cpu.itb.walker 2 # number of overall misses

472system.cpu.l2cache.overall_misses::cpu.inst 18358 # number of overall misses

472system.cpu.l2cache.overall_misses::cpu.inst 18357 # number of overall misses

473system.cpu.l2cache.overall_misses::cpu.data 163398 # number of overall misses

474system.cpu.l2cache.overall_misses::total 181765 # number of overall misses

474system.cpu.l2cache.overall_misses::total 181764 # number of overall misses

475system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 7608 # number of ReadReq accesses(hits+misses)
476system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 3623 # number of ReadReq accesses(hits+misses)

477system.cpu.l2cache.ReadReq_accesses::cpu.inst 1699720 # number of ReadReq accesses(hits+misses)
478system.cpu.l2cache.ReadReq_accesses::cpu.data 521009 # number of ReadReq accesses(hits+misses)
479system.cpu.l2cache.ReadReq_accesses::total 2231960 # number of ReadReq accesses(hits+misses)
480system.cpu.l2cache.Writeback_accesses::writebacks 682060 # number of Writeback accesses(hits+misses)
481system.cpu.l2cache.Writeback_accesses::total 682060 # number of Writeback accesses(hits+misses)

477system.cpu.l2cache.ReadReq_accesses::cpu.inst 1699714 # number of ReadReq accesses(hits+misses)
478system.cpu.l2cache.ReadReq_accesses::cpu.data 521008 # number of ReadReq accesses(hits+misses)
479system.cpu.l2cache.ReadReq_accesses::total 2231953 # number of ReadReq accesses(hits+misses)
480system.cpu.l2cache.Writeback_accesses::writebacks 682059 # number of Writeback accesses(hits+misses)
481system.cpu.l2cache.Writeback_accesses::total 682059 # number of Writeback accesses(hits+misses)

482system.cpu.l2cache.UpgradeReq_accesses::cpu.data 2756 # number of UpgradeReq accesses(hits+misses)
483system.cpu.l2cache.UpgradeReq_accesses::total 2756 # number of UpgradeReq accesses(hits+misses)
484system.cpu.l2cache.SCUpgradeReq_accesses::cpu.data 2 # number of SCUpgradeReq accesses(hits+misses)
485system.cpu.l2cache.SCUpgradeReq_accesses::total 2 # number of SCUpgradeReq accesses(hits+misses)
486system.cpu.l2cache.ReadExReq_accesses::cpu.data 298922 # number of ReadExReq accesses(hits+misses)
487system.cpu.l2cache.ReadExReq_accesses::total 298922 # number of ReadExReq accesses(hits+misses)
488system.cpu.l2cache.demand_accesses::cpu.dtb.walker 7608 # number of demand (read+write) accesses
489system.cpu.l2cache.demand_accesses::cpu.itb.walker 3623 # number of demand (read+write) accesses

490system.cpu.l2cache.demand_accesses::cpu.inst 1699720 # number of demand (read+write) accesses
491system.cpu.l2cache.demand_accesses::cpu.data 819931 # number of demand (read+write) accesses
492system.cpu.l2cache.demand_accesses::total 2530882 # number of demand (read+write) accesses

490system.cpu.l2cache.demand_accesses::cpu.inst 1699714 # number of demand (read+write) accesses
491system.cpu.l2cache.demand_accesses::cpu.data 819930 # number of demand (read+write) accesses
492system.cpu.l2cache.demand_accesses::total 2530875 # number of demand (read+write) accesses

493system.cpu.l2cache.overall_accesses::cpu.dtb.walker 7608 # number of overall (read+write) accesses
494system.cpu.l2cache.overall_accesses::cpu.itb.walker 3623 # number of overall (read+write) accesses

495system.cpu.l2cache.overall_accesses::cpu.inst 1699720 # number of overall (read+write) accesses
496system.cpu.l2cache.overall_accesses::cpu.data 819931 # number of overall (read+write) accesses
497system.cpu.l2cache.overall_accesses::total 2530882 # number of overall (read+write) accesses

495system.cpu.l2cache.overall_accesses::cpu.inst 1699714 # number of overall (read+write) accesses
496system.cpu.l2cache.overall_accesses::cpu.data 819930 # number of overall (read+write) accesses
497system.cpu.l2cache.overall_accesses::total 2530875 # number of overall (read+write) accesses

498system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000920 # miss rate for ReadReq accesses
499system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.000552 # miss rate for ReadReq accesses

500system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.010801 # miss rate for ReadReq accesses

500system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.010800 # miss rate for ReadReq accesses

501system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.029815 # miss rate for ReadReq accesses

502system.cpu.l2cache.ReadReq_miss_rate::total 0.015189 # miss rate for ReadReq accesses

502system.cpu.l2cache.ReadReq_miss_rate::total 0.015188 # miss rate for ReadReq accesses

503system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.989840 # miss rate for UpgradeReq accesses
504system.cpu.l2cache.UpgradeReq_miss_rate::total 0.989840 # miss rate for UpgradeReq accesses
505system.cpu.l2cache.SCUpgradeReq_miss_rate::cpu.data 1 # miss rate for SCUpgradeReq accesses
506system.cpu.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses
507system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.494657 # miss rate for ReadExReq accesses
508system.cpu.l2cache.ReadExReq_miss_rate::total 0.494657 # miss rate for ReadExReq accesses
509system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000920 # miss rate for demand accesses
510system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.000552 # miss rate for demand accesses

511system.cpu.l2cache.demand_miss_rate::cpu.inst 0.010801 # miss rate for demand accesses

511system.cpu.l2cache.demand_miss_rate::cpu.inst 0.010800 # miss rate for demand accesses

512system.cpu.l2cache.demand_miss_rate::cpu.data 0.199283 # miss rate for demand accesses
513system.cpu.l2cache.demand_miss_rate::total 0.071819 # miss rate for demand accesses
514system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000920 # miss rate for overall accesses
515system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.000552 # miss rate for overall accesses

516system.cpu.l2cache.overall_miss_rate::cpu.inst 0.010801 # miss rate for overall accesses

516system.cpu.l2cache.overall_miss_rate::cpu.inst 0.010800 # miss rate for overall accesses

517system.cpu.l2cache.overall_miss_rate::cpu.data 0.199283 # miss rate for overall accesses
518system.cpu.l2cache.overall_miss_rate::total 0.071819 # miss rate for overall accesses
519system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
520system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
521system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
522system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
523system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
524system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
525system.cpu.l2cache.fast_writes 0 # number of fast writes performed
526system.cpu.l2cache.cache_copies 0 # number of cache copies performed

527system.cpu.l2cache.writebacks::writebacks 101898 # number of writebacks
528system.cpu.l2cache.writebacks::total 101898 # number of writebacks

527system.cpu.l2cache.writebacks::writebacks 101897 # number of writebacks
528system.cpu.l2cache.writebacks::total 101897 # number of writebacks

529system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate

530system.cpu.toL2Bus.trans_dist::ReadReq 2288556 # Transaction distribution
531system.cpu.toL2Bus.trans_dist::ReadResp 2288556 # Transaction distribution
532system.cpu.toL2Bus.trans_dist::WriteReq 27560 # Transaction distribution
533system.cpu.toL2Bus.trans_dist::WriteResp 27560 # Transaction distribution
534system.cpu.toL2Bus.trans_dist::Writeback 682060 # Transaction distribution

530system.cpu.toL2Bus.trans_dist::ReadReq 2288542 # Transaction distribution
531system.cpu.toL2Bus.trans_dist::ReadResp 2288542 # Transaction distribution
532system.cpu.toL2Bus.trans_dist::WriteReq 27546 # Transaction distribution
533system.cpu.toL2Bus.trans_dist::WriteResp 27546 # Transaction distribution
534system.cpu.toL2Bus.trans_dist::Writeback 682059 # Transaction distribution

535system.cpu.toL2Bus.trans_dist::UpgradeReq 2756 # Transaction distribution
536system.cpu.toL2Bus.trans_dist::SCUpgradeReq 2 # Transaction distribution
537system.cpu.toL2Bus.trans_dist::UpgradeResp 2758 # Transaction distribution
538system.cpu.toL2Bus.trans_dist::ReadExReq 298922 # Transaction distribution
539system.cpu.toL2Bus.trans_dist::ReadExResp 298922 # Transaction distribution

540system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 3417520 # Packet count per connected master and slave (bytes)
541system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2444702 # Packet count per connected master and slave (bytes)

540system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 3417508 # Packet count per connected master and slave (bytes)
541system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2444657 # Packet count per connected master and slave (bytes)

542system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 18430 # Packet count per connected master and slave (bytes)
543system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 37000 # Packet count per connected master and slave (bytes)

544system.cpu.toL2Bus.pkt_count::total 5917652 # Packet count per connected master and slave (bytes)
545system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 108819320 # Cumulative packet size per connected master and slave (bytes)
546system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 96310219 # Cumulative packet size per connected master and slave (bytes)

544system.cpu.toL2Bus.pkt_count::total 5917595 # Packet count per connected master and slave (bytes)
545system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 108818936 # Cumulative packet size per connected master and slave (bytes)
546system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 96310049 # Cumulative packet size per connected master and slave (bytes)

547system.cpu.toL2Bus.pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 36860 # Cumulative packet size per connected master and slave (bytes)
548system.cpu.toL2Bus.pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 74000 # Cumulative packet size per connected master and slave (bytes)

549system.cpu.toL2Bus.pkt_size::total 205240399 # Cumulative packet size per connected master and slave (bytes)

549system.cpu.toL2Bus.pkt_size::total 205239845 # Cumulative packet size per connected master and slave (bytes)

550system.cpu.toL2Bus.snoops 36631 # Total snoops (count)

551system.cpu.toL2Bus.snoop_fanout::samples 3268666 # Request fanout histogram
552system.cpu.toL2Bus.snoop_fanout::mean 5.011156 # Request fanout histogram
553system.cpu.toL2Bus.snoop_fanout::stdev 0.105029 # Request fanout histogram

551system.cpu.toL2Bus.snoop_fanout::samples 3268658 # Request fanout histogram
552system.cpu.toL2Bus.snoop_fanout::mean 3.011156 # Request fanout histogram
553system.cpu.toL2Bus.snoop_fanout::stdev 0.105030 # Request fanout histogram

554system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
555system.cpu.toL2Bus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram
556system.cpu.toL2Bus.snoop_fanout::1 0 0.00% 0.00% # Request fanout histogram
557system.cpu.toL2Bus.snoop_fanout::2 0 0.00% 0.00% # Request fanout histogram

558system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 0.00% # Request fanout histogram
559system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 0.00% # Request fanout histogram
560system.cpu.toL2Bus.snoop_fanout::5 3232202 98.88% 98.88% # Request fanout histogram
561system.cpu.toL2Bus.snoop_fanout::6 36464 1.12% 100.00% # Request fanout histogram

558system.cpu.toL2Bus.snoop_fanout::3 3232194 98.88% 98.88% # Request fanout histogram
559system.cpu.toL2Bus.snoop_fanout::4 36464 1.12% 100.00% # Request fanout histogram

562system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram

560system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram

563system.cpu.toL2Bus.snoop_fanout::min_value 5 # Request fanout histogram
564system.cpu.toL2Bus.snoop_fanout::max_value 6 # Request fanout histogram
565system.cpu.toL2Bus.snoop_fanout::total 3268666 # Request fanout histogram
566system.iobus.trans_dist::ReadReq 30171 # Transaction distribution
567system.iobus.trans_dist::ReadResp 30171 # Transaction distribution
568system.iobus.trans_dist::WriteReq 59016 # Transaction distribution
569system.iobus.trans_dist::WriteResp 22792 # Transaction distribution

561system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram
562system.cpu.toL2Bus.snoop_fanout::max_value 4 # Request fanout histogram
563system.cpu.toL2Bus.snoop_fanout::total 3268658 # Request fanout histogram
564system.iobus.trans_dist::ReadReq 30164 # Transaction distribution
565system.iobus.trans_dist::ReadResp 30164 # Transaction distribution
566system.iobus.trans_dist::WriteReq 59002 # Transaction distribution
567system.iobus.trans_dist::WriteResp 22778 # Transaction distribution

570system.iobus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution

568system.iobus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution

571system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 54158 # Packet count per connected master and slave (bytes)

569system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 54116 # Packet count per connected master and slave (bytes)

572system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 116 # Packet count per connected master and slave (bytes)
573system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 34 # Packet count per connected master and slave (bytes)
574system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 20 # Packet count per connected master and slave (bytes)
575system.iobus.pkt_count_system.bridge.master::system.realview.kmi0.pio 120 # Packet count per connected master and slave (bytes)
576system.iobus.pkt_count_system.bridge.master::system.realview.kmi1.pio 834 # Packet count per connected master and slave (bytes)
577system.iobus.pkt_count_system.bridge.master::system.realview.rtc.pio 32 # Packet count per connected master and slave (bytes)
578system.iobus.pkt_count_system.bridge.master::system.realview.uart1_fake.pio 16 # Packet count per connected master and slave (bytes)
579system.iobus.pkt_count_system.bridge.master::system.realview.uart2_fake.pio 16 # Packet count per connected master and slave (bytes)

--- 4 unchanged lines hidden (view full) ---

584system.iobus.pkt_count_system.bridge.master::system.realview.lan_fake.pio 4 # Packet count per connected master and slave (bytes)
585system.iobus.pkt_count_system.bridge.master::system.realview.usb_fake.pio 10 # Packet count per connected master and slave (bytes)
586system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio 16 # Packet count per connected master and slave (bytes)
587system.iobus.pkt_count_system.bridge.master::system.realview.ide.pio 7244 # Packet count per connected master and slave (bytes)
588system.iobus.pkt_count_system.bridge.master::system.realview.ide-pciconf 210 # Packet count per connected master and slave (bytes)
589system.iobus.pkt_count_system.bridge.master::system.realview.ethernet.pio 42268 # Packet count per connected master and slave (bytes)
590system.iobus.pkt_count_system.bridge.master::system.realview.ethernet-pciconf 164 # Packet count per connected master and slave (bytes)
591system.iobus.pkt_count_system.bridge.master::system.realview.pciconfig.pio 60 # Packet count per connected master and slave (bytes)

570system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 116 # Packet count per connected master and slave (bytes)
571system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 34 # Packet count per connected master and slave (bytes)
572system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 20 # Packet count per connected master and slave (bytes)
573system.iobus.pkt_count_system.bridge.master::system.realview.kmi0.pio 120 # Packet count per connected master and slave (bytes)
574system.iobus.pkt_count_system.bridge.master::system.realview.kmi1.pio 834 # Packet count per connected master and slave (bytes)
575system.iobus.pkt_count_system.bridge.master::system.realview.rtc.pio 32 # Packet count per connected master and slave (bytes)
576system.iobus.pkt_count_system.bridge.master::system.realview.uart1_fake.pio 16 # Packet count per connected master and slave (bytes)
577system.iobus.pkt_count_system.bridge.master::system.realview.uart2_fake.pio 16 # Packet count per connected master and slave (bytes)

--- 4 unchanged lines hidden (view full) ---

582system.iobus.pkt_count_system.bridge.master::system.realview.lan_fake.pio 4 # Packet count per connected master and slave (bytes)
583system.iobus.pkt_count_system.bridge.master::system.realview.usb_fake.pio 10 # Packet count per connected master and slave (bytes)
584system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio 16 # Packet count per connected master and slave (bytes)
585system.iobus.pkt_count_system.bridge.master::system.realview.ide.pio 7244 # Packet count per connected master and slave (bytes)
586system.iobus.pkt_count_system.bridge.master::system.realview.ide-pciconf 210 # Packet count per connected master and slave (bytes)
587system.iobus.pkt_count_system.bridge.master::system.realview.ethernet.pio 42268 # Packet count per connected master and slave (bytes)
588system.iobus.pkt_count_system.bridge.master::system.realview.ethernet-pciconf 164 # Packet count per connected master and slave (bytes)
589system.iobus.pkt_count_system.bridge.master::system.realview.pciconfig.pio 60 # Packet count per connected master and slave (bytes)

592system.iobus.pkt_count_system.bridge.master::total 105446 # Packet count per connected master and slave (bytes)

590system.iobus.pkt_count_system.bridge.master::total 105404 # Packet count per connected master and slave (bytes)

593system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 72928 # Packet count per connected master and slave (bytes)
594system.iobus.pkt_count_system.realview.ide.dma::total 72928 # Packet count per connected master and slave (bytes)

591system.iobus.pkt_count_system.realview.ide.dma::system.iocache.cpu_side 72928 # Packet count per connected master and slave (bytes)
592system.iobus.pkt_count_system.realview.ide.dma::total 72928 # Packet count per connected master and slave (bytes)

595system.iobus.pkt_count::total 178374 # Packet count per connected master and slave (bytes)
596system.iobus.pkt_size_system.bridge.master::system.realview.uart.pio 67875 # Cumulative packet size per connected master and slave (bytes)

593system.iobus.pkt_count::total 178332 # Packet count per connected master and slave (bytes)
594system.iobus.pkt_size_system.bridge.master::system.realview.uart.pio 67833 # Cumulative packet size per connected master and slave (bytes)

597system.iobus.pkt_size_system.bridge.master::system.realview.realview_io.pio 232 # Cumulative packet size per connected master and slave (bytes)
598system.iobus.pkt_size_system.bridge.master::system.realview.timer0.pio 68 # Cumulative packet size per connected master and slave (bytes)
599system.iobus.pkt_size_system.bridge.master::system.realview.timer1.pio 40 # Cumulative packet size per connected master and slave (bytes)
600system.iobus.pkt_size_system.bridge.master::system.realview.kmi0.pio 84 # Cumulative packet size per connected master and slave (bytes)
601system.iobus.pkt_size_system.bridge.master::system.realview.kmi1.pio 441 # Cumulative packet size per connected master and slave (bytes)
602system.iobus.pkt_size_system.bridge.master::system.realview.rtc.pio 64 # Cumulative packet size per connected master and slave (bytes)
603system.iobus.pkt_size_system.bridge.master::system.realview.uart1_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)
604system.iobus.pkt_size_system.bridge.master::system.realview.uart2_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)

--- 4 unchanged lines hidden (view full) ---

609system.iobus.pkt_size_system.bridge.master::system.realview.lan_fake.pio 8 # Cumulative packet size per connected master and slave (bytes)
610system.iobus.pkt_size_system.bridge.master::system.realview.usb_fake.pio 20 # Cumulative packet size per connected master and slave (bytes)
611system.iobus.pkt_size_system.bridge.master::system.realview.mmc_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)
612system.iobus.pkt_size_system.bridge.master::system.realview.ide.pio 4753 # Cumulative packet size per connected master and slave (bytes)
613system.iobus.pkt_size_system.bridge.master::system.realview.ide-pciconf 265 # Cumulative packet size per connected master and slave (bytes)
614system.iobus.pkt_size_system.bridge.master::system.realview.ethernet.pio 84536 # Cumulative packet size per connected master and slave (bytes)
615system.iobus.pkt_size_system.bridge.master::system.realview.ethernet-pciconf 253 # Cumulative packet size per connected master and slave (bytes)
616system.iobus.pkt_size_system.bridge.master::system.realview.pciconfig.pio 120 # Cumulative packet size per connected master and slave (bytes)

595system.iobus.pkt_size_system.bridge.master::system.realview.realview_io.pio 232 # Cumulative packet size per connected master and slave (bytes)
596system.iobus.pkt_size_system.bridge.master::system.realview.timer0.pio 68 # Cumulative packet size per connected master and slave (bytes)
597system.iobus.pkt_size_system.bridge.master::system.realview.timer1.pio 40 # Cumulative packet size per connected master and slave (bytes)
598system.iobus.pkt_size_system.bridge.master::system.realview.kmi0.pio 84 # Cumulative packet size per connected master and slave (bytes)
599system.iobus.pkt_size_system.bridge.master::system.realview.kmi1.pio 441 # Cumulative packet size per connected master and slave (bytes)
600system.iobus.pkt_size_system.bridge.master::system.realview.rtc.pio 64 # Cumulative packet size per connected master and slave (bytes)
601system.iobus.pkt_size_system.bridge.master::system.realview.uart1_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)
602system.iobus.pkt_size_system.bridge.master::system.realview.uart2_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)

--- 4 unchanged lines hidden (view full) ---

607system.iobus.pkt_size_system.bridge.master::system.realview.lan_fake.pio 8 # Cumulative packet size per connected master and slave (bytes)
608system.iobus.pkt_size_system.bridge.master::system.realview.usb_fake.pio 20 # Cumulative packet size per connected master and slave (bytes)
609system.iobus.pkt_size_system.bridge.master::system.realview.mmc_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)
610system.iobus.pkt_size_system.bridge.master::system.realview.ide.pio 4753 # Cumulative packet size per connected master and slave (bytes)
611system.iobus.pkt_size_system.bridge.master::system.realview.ide-pciconf 265 # Cumulative packet size per connected master and slave (bytes)
612system.iobus.pkt_size_system.bridge.master::system.realview.ethernet.pio 84536 # Cumulative packet size per connected master and slave (bytes)
613system.iobus.pkt_size_system.bridge.master::system.realview.ethernet-pciconf 253 # Cumulative packet size per connected master and slave (bytes)
614system.iobus.pkt_size_system.bridge.master::system.realview.pciconfig.pio 120 # Cumulative packet size per connected master and slave (bytes)

617system.iobus.pkt_size_system.bridge.master::total 159103 # Cumulative packet size per connected master and slave (bytes)

615system.iobus.pkt_size_system.bridge.master::total 159061 # Cumulative packet size per connected master and slave (bytes)

618system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 2321152 # Cumulative packet size per connected master and slave (bytes)
619system.iobus.pkt_size_system.realview.ide.dma::total 2321152 # Cumulative packet size per connected master and slave (bytes)

616system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 2321152 # Cumulative packet size per connected master and slave (bytes)
617system.iobus.pkt_size_system.realview.ide.dma::total 2321152 # Cumulative packet size per connected master and slave (bytes)

620system.iobus.pkt_size::total 2480255 # Cumulative packet size per connected master and slave (bytes)

618system.iobus.pkt_size::total 2480213 # Cumulative packet size per connected master and slave (bytes)

621system.iocache.tags.replacements 36430 # number of replacements

619system.iocache.tags.replacements 36430 # number of replacements

622system.iocache.tags.tagsinuse 0.909962 # Cycle average of tags in use

620system.iocache.tags.tagsinuse 0.909961 # Cycle average of tags in use

623system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
624system.iocache.tags.sampled_refs 36446 # Sample count of references to valid blocks.
625system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
626system.iocache.tags.warmup_cycle 227409731009 # Cycle when the warmup percentage was hit.

621system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
622system.iocache.tags.sampled_refs 36446 # Sample count of references to valid blocks.
623system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
624system.iocache.tags.warmup_cycle 227409731009 # Cycle when the warmup percentage was hit.

627system.iocache.tags.occ_blocks::realview.ide 0.909962 # Average occupied blocks per requestor

625system.iocache.tags.occ_blocks::realview.ide 0.909961 # Average occupied blocks per requestor

628system.iocache.tags.occ_percent::realview.ide 0.056873 # Average percentage of cache occupancy
629system.iocache.tags.occ_percent::total 0.056873 # Average percentage of cache occupancy
630system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
631system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
632system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
633system.iocache.tags.tag_accesses 328176 # Number of tag accesses
634system.iocache.tags.data_accesses 328176 # Number of data accesses
635system.iocache.ReadReq_misses::realview.ide 240 # number of ReadReq misses

--- 26 unchanged lines hidden (view full) ---

662system.iocache.blocked::no_targets 0 # number of cycles access was blocked
663system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
664system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
665system.iocache.fast_writes 0 # number of fast writes performed
666system.iocache.cache_copies 0 # number of cache copies performed
667system.iocache.writebacks::writebacks 36190 # number of writebacks
668system.iocache.writebacks::total 36190 # number of writebacks
669system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate

626system.iocache.tags.occ_percent::realview.ide 0.056873 # Average percentage of cache occupancy
627system.iocache.tags.occ_percent::total 0.056873 # Average percentage of cache occupancy
628system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
629system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
630system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
631system.iocache.tags.tag_accesses 328176 # Number of tag accesses
632system.iocache.tags.data_accesses 328176 # Number of data accesses
633system.iocache.ReadReq_misses::realview.ide 240 # number of ReadReq misses

--- 26 unchanged lines hidden (view full) ---

660system.iocache.blocked::no_targets 0 # number of cycles access was blocked
661system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
662system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
663system.iocache.fast_writes 0 # number of fast writes performed
664system.iocache.cache_copies 0 # number of cache copies performed
665system.iocache.writebacks::writebacks 36190 # number of writebacks
666system.iocache.writebacks::total 36190 # number of writebacks
667system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate

670system.membus.trans_dist::ReadReq 74235 # Transaction distribution
671system.membus.trans_dist::ReadResp 74235 # Transaction distribution
672system.membus.trans_dist::WriteReq 27560 # Transaction distribution
673system.membus.trans_dist::WriteResp 27560 # Transaction distribution
674system.membus.trans_dist::Writeback 138088 # Transaction distribution

668system.membus.trans_dist::ReadReq 74227 # Transaction distribution
669system.membus.trans_dist::ReadResp 74227 # Transaction distribution
670system.membus.trans_dist::WriteReq 27546 # Transaction distribution
671system.membus.trans_dist::WriteResp 27546 # Transaction distribution
672system.membus.trans_dist::Writeback 138087 # Transaction distribution

675system.membus.trans_dist::WriteInvalidateReq 36224 # Transaction distribution
676system.membus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution
677system.membus.trans_dist::UpgradeReq 4507 # Transaction distribution
678system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution
679system.membus.trans_dist::UpgradeResp 4509 # Transaction distribution
680system.membus.trans_dist::ReadExReq 146085 # Transaction distribution
681system.membus.trans_dist::ReadExResp 146085 # Transaction distribution

673system.membus.trans_dist::WriteInvalidateReq 36224 # Transaction distribution
674system.membus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution
675system.membus.trans_dist::UpgradeReq 4507 # Transaction distribution
676system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution
677system.membus.trans_dist::UpgradeResp 4509 # Transaction distribution
678system.membus.trans_dist::ReadExReq 146085 # Transaction distribution
679system.membus.trans_dist::ReadExResp 146085 # Transaction distribution

682system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 105446 # Packet count per connected master and slave (bytes)

680system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 105404 # Packet count per connected master and slave (bytes)

683system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes)
684system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 1946 # Packet count per connected master and slave (bytes)

681system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes)
682system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 1946 # Packet count per connected master and slave (bytes)

685system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 498794 # Packet count per connected master and slave (bytes)
686system.membus.pkt_count_system.cpu.l2cache.mem_side::total 606196 # Packet count per connected master and slave (bytes)

683system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 498791 # Packet count per connected master and slave (bytes)
684system.membus.pkt_count_system.cpu.l2cache.mem_side::total 606151 # Packet count per connected master and slave (bytes)

687system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 109118 # Packet count per connected master and slave (bytes)
688system.membus.pkt_count_system.iocache.mem_side::total 109118 # Packet count per connected master and slave (bytes)

685system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 109118 # Packet count per connected master and slave (bytes)
686system.membus.pkt_count_system.iocache.mem_side::total 109118 # Packet count per connected master and slave (bytes)

689system.membus.pkt_count::total 715314 # Packet count per connected master and slave (bytes)
690system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 159103 # Cumulative packet size per connected master and slave (bytes)

687system.membus.pkt_count::total 715269 # Packet count per connected master and slave (bytes)
688system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 159061 # Cumulative packet size per connected master and slave (bytes)

691system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 20 # Cumulative packet size per connected master and slave (bytes)
692system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 3892 # Cumulative packet size per connected master and slave (bytes)

689system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 20 # Cumulative packet size per connected master and slave (bytes)
690system.membus.pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 3892 # Cumulative packet size per connected master and slave (bytes)

693system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18096444 # Cumulative packet size per connected master and slave (bytes)
694system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18259459 # Cumulative packet size per connected master and slave (bytes)

691system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18096316 # Cumulative packet size per connected master and slave (bytes)
692system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18259289 # Cumulative packet size per connected master and slave (bytes)

695system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 4649856 # Cumulative packet size per connected master and slave (bytes)
696system.membus.pkt_size_system.iocache.mem_side::total 4649856 # Cumulative packet size per connected master and slave (bytes)

693system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 4649856 # Cumulative packet size per connected master and slave (bytes)
694system.membus.pkt_size_system.iocache.mem_side::total 4649856 # Cumulative packet size per connected master and slave (bytes)

697system.membus.pkt_size::total 22909315 # Cumulative packet size per connected master and slave (bytes)

695system.membus.pkt_size::total 22909145 # Cumulative packet size per connected master and slave (bytes)

698system.membus.snoops 0 # Total snoops (count)

696system.membus.snoops 0 # Total snoops (count)

699system.membus.snoop_fanout::samples 359047 # Request fanout histogram

697system.membus.snoop_fanout::samples 359045 # Request fanout histogram

700system.membus.snoop_fanout::mean 1 # Request fanout histogram
701system.membus.snoop_fanout::stdev 0 # Request fanout histogram
702system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
703system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram

698system.membus.snoop_fanout::mean 1 # Request fanout histogram
699system.membus.snoop_fanout::stdev 0 # Request fanout histogram
700system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram
701system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram

704system.membus.snoop_fanout::1 359047 100.00% 100.00% # Request fanout histogram

702system.membus.snoop_fanout::1 359045 100.00% 100.00% # Request fanout histogram

705system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
706system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
707system.membus.snoop_fanout::min_value 1 # Request fanout histogram
708system.membus.snoop_fanout::max_value 1 # Request fanout histogram

703system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram
704system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram
705system.membus.snoop_fanout::min_value 1 # Request fanout histogram
706system.membus.snoop_fanout::max_value 1 # Request fanout histogram

709system.membus.snoop_fanout::total 359047 # Request fanout histogram

707system.membus.snoop_fanout::total 359045 # Request fanout histogram