| stats.txt (10072:fa5c8a8a7bab) | stats.txt (10220:9eab5efc02e8) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.332812 # Number of seconds simulated 4sim_ticks 2332811899500 # Number of ticks simulated 5final_tick 2332811899500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 2.332812 # Number of seconds simulated 4sim_ticks 2332811899500 # Number of ticks simulated 5final_tick 2332811899500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1065837 # Simulator instruction rate (inst/s) 8host_op_rate 1370594 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 41157671581 # Simulator tick rate (ticks/s) 10host_mem_usage 420236 # Number of bytes of host memory used 11host_seconds 56.68 # Real time elapsed on the host | 7host_inst_rate 975328 # Simulator instruction rate (inst/s) 8host_op_rate 1254205 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 37662621026 # Simulator tick rate (ticks/s) 10host_mem_usage 462792 # Number of bytes of host memory used 11host_seconds 61.94 # Real time elapsed on the host |
| 12sim_insts 60411489 # Number of instructions simulated 13sim_ops 77685090 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 17system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 18system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 19system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory --- 157 unchanged lines hidden (view full) --- 177system.cpu.num_mem_refs 27362421 # number of memory refs 178system.cpu.num_load_insts 15640088 # Number of load instructions 179system.cpu.num_store_insts 11722333 # Number of store instructions 180system.cpu.num_idle_cycles 4586822073.007144 # Number of idle cycles 181system.cpu.num_busy_cycles 78801726.992856 # Number of busy cycles 182system.cpu.not_idle_fraction 0.016890 # Percentage of non-idle cycles 183system.cpu.idle_fraction 0.983110 # Percentage of idle cycles 184system.cpu.Branches 10299261 # Number of branches fetched | 12sim_insts 60411489 # Number of instructions simulated 13sim_ops 77685090 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory 17system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory 18system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory 19system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory --- 157 unchanged lines hidden (view full) --- 177system.cpu.num_mem_refs 27362421 # number of memory refs 178system.cpu.num_load_insts 15640088 # Number of load instructions 179system.cpu.num_store_insts 11722333 # Number of store instructions 180system.cpu.num_idle_cycles 4586822073.007144 # Number of idle cycles 181system.cpu.num_busy_cycles 78801726.992856 # Number of busy cycles 182system.cpu.not_idle_fraction 0.016890 # Percentage of non-idle cycles 183system.cpu.idle_fraction 0.983110 # Percentage of idle cycles 184system.cpu.Branches 10299261 # Number of branches fetched |
| 185system.cpu.op_class::No_OpClass 28518 0.04% 0.04% # Class of executed instruction 186system.cpu.op_class::IntAlu 50337551 64.69% 64.72% # Class of executed instruction 187system.cpu.op_class::IntMult 87780 0.11% 64.84% # Class of executed instruction 188system.cpu.op_class::IntDiv 0 0.00% 64.84% # Class of executed instruction 189system.cpu.op_class::FloatAdd 0 0.00% 64.84% # Class of executed instruction 190system.cpu.op_class::FloatCmp 0 0.00% 64.84% # Class of executed instruction 191system.cpu.op_class::FloatCvt 0 0.00% 64.84% # Class of executed instruction 192system.cpu.op_class::FloatMult 0 0.00% 64.84% # Class of executed instruction 193system.cpu.op_class::FloatDiv 0 0.00% 64.84% # Class of executed instruction 194system.cpu.op_class::FloatSqrt 0 0.00% 64.84% # Class of executed instruction 195system.cpu.op_class::SimdAdd 0 0.00% 64.84% # Class of executed instruction 196system.cpu.op_class::SimdAddAcc 0 0.00% 64.84% # Class of executed instruction 197system.cpu.op_class::SimdAlu 0 0.00% 64.84% # Class of executed instruction 198system.cpu.op_class::SimdCmp 0 0.00% 64.84% # Class of executed instruction 199system.cpu.op_class::SimdCvt 0 0.00% 64.84% # Class of executed instruction 200system.cpu.op_class::SimdMisc 0 0.00% 64.84% # Class of executed instruction 201system.cpu.op_class::SimdMult 0 0.00% 64.84% # Class of executed instruction 202system.cpu.op_class::SimdMultAcc 0 0.00% 64.84% # Class of executed instruction 203system.cpu.op_class::SimdShift 0 0.00% 64.84% # Class of executed instruction 204system.cpu.op_class::SimdShiftAcc 0 0.00% 64.84% # Class of executed instruction 205system.cpu.op_class::SimdSqrt 0 0.00% 64.84% # Class of executed instruction 206system.cpu.op_class::SimdFloatAdd 0 0.00% 64.84% # Class of executed instruction 207system.cpu.op_class::SimdFloatAlu 0 0.00% 64.84% # Class of executed instruction 208system.cpu.op_class::SimdFloatCmp 0 0.00% 64.84% # Class of executed instruction 209system.cpu.op_class::SimdFloatCvt 0 0.00% 64.84% # Class of executed instruction 210system.cpu.op_class::SimdFloatDiv 0 0.00% 64.84% # Class of executed instruction 211system.cpu.op_class::SimdFloatMisc 2117 0.00% 64.84% # Class of executed instruction 212system.cpu.op_class::SimdFloatMult 0 0.00% 64.84% # Class of executed instruction 213system.cpu.op_class::SimdFloatMultAcc 0 0.00% 64.84% # Class of executed instruction 214system.cpu.op_class::SimdFloatSqrt 0 0.00% 64.84% # Class of executed instruction 215system.cpu.op_class::MemRead 15640088 20.10% 84.94% # Class of executed instruction 216system.cpu.op_class::MemWrite 11722333 15.06% 100.00% # Class of executed instruction 217system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction 218system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 219system.cpu.op_class::total 77818387 # Class of executed instruction |
|
| 185system.cpu.kern.inst.arm 0 # number of arm instructions executed 186system.cpu.kern.inst.quiesce 82795 # number of quiesce instructions executed 187system.cpu.icache.tags.replacements 850590 # number of replacements 188system.cpu.icache.tags.tagsinuse 511.678462 # Cycle average of tags in use 189system.cpu.icache.tags.total_refs 60586338 # Total number of references to valid blocks. 190system.cpu.icache.tags.sampled_refs 851102 # Sample count of references to valid blocks. 191system.cpu.icache.tags.avg_refs 71.185754 # Average number of references to valid blocks. 192system.cpu.icache.tags.warmup_cycle 5711018500 # Cycle when the warmup percentage was hit. --- 257 unchanged lines hidden --- | 220system.cpu.kern.inst.arm 0 # number of arm instructions executed 221system.cpu.kern.inst.quiesce 82795 # number of quiesce instructions executed 222system.cpu.icache.tags.replacements 850590 # number of replacements 223system.cpu.icache.tags.tagsinuse 511.678462 # Cycle average of tags in use 224system.cpu.icache.tags.total_refs 60586338 # Total number of references to valid blocks. 225system.cpu.icache.tags.sampled_refs 851102 # Sample count of references to valid blocks. 226system.cpu.icache.tags.avg_refs 71.185754 # Average number of references to valid blocks. 227system.cpu.icache.tags.warmup_cycle 5711018500 # Cycle when the warmup percentage was hit. --- 257 unchanged lines hidden --- |