52,54c52,55
< system.physmem.readReqs 0 # Total number of read requests seen
< system.physmem.writeReqs 0 # Total number of write requests seen
< system.physmem.cpureqs 0 # Reqs generatd by CPU via cache - shady
---
> system.physmem.readReqs 0 # Total number of read requests accepted by DRAM controller
> system.physmem.writeReqs 0 # Total number of write requests accepted by DRAM controller
> system.physmem.readBursts 0 # Total number of DRAM read bursts. Each DRAM read request translates to either one or multiple DRAM read bursts
> system.physmem.writeBursts 0 # Total number of DRAM write bursts. Each DRAM write request translates to either one or multiple DRAM write bursts
59c60
< system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q
---
> system.physmem.servicedByWrQ 0 # Number of DRAM read bursts serviced by write Q