3,5c3,5
< sim_seconds 2.783855 # Number of seconds simulated
< sim_ticks 2783854715000 # Number of ticks simulated
< final_tick 2783854715000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_seconds 2.783856 # Number of seconds simulated
> sim_ticks 2783855588000 # Number of ticks simulated
> final_tick 2783855588000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,13c7,13
< host_inst_rate 1570014 # Simulator instruction rate (inst/s)
< host_op_rate 1911240 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 30613244357 # Simulator tick rate (ticks/s)
< host_mem_usage 581428 # Number of bytes of host memory used
< host_seconds 90.94 # Real time elapsed on the host
< sim_insts 142771202 # Number of instructions simulated
< sim_ops 173801044 # Number of ops (including micro ops) simulated
---
> host_inst_rate 1539062 # Simulator instruction rate (inst/s)
> host_op_rate 1873561 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 30009675812 # Simulator tick rate (ticks/s)
> host_mem_usage 581968 # Number of bytes of host memory used
> host_seconds 92.77 # Real time elapsed on the host
> sim_insts 142771499 # Number of instructions simulated
> sim_ops 173801409 # Number of ops (including micro ops) simulated
16c16
< system.physmem.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.physmem.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
20c20
< system.physmem.bytes_read::cpu.data 10324772 # Number of bytes read from this memory
---
> system.physmem.bytes_read::cpu.data 10324900 # Number of bytes read from this memory
22c22
< system.physmem.bytes_read::total 11533320 # Number of bytes read from this memory
---
> system.physmem.bytes_read::total 11533448 # Number of bytes read from this memory
31c31
< system.physmem.num_reads::cpu.data 161844 # Number of read requests responded to by this memory
---
> system.physmem.num_reads::cpu.data 161846 # Number of read requests responded to by this memory
33c33
< system.physmem.num_reads::total 189181 # Number of read requests responded to by this memory
---
> system.physmem.num_reads::total 189183 # Number of read requests responded to by this memory
40c40
< system.physmem.bw_read::cpu.data 3708804 # Total read bandwidth from this memory (bytes/s)
---
> system.physmem.bw_read::cpu.data 3708849 # Total read bandwidth from this memory (bytes/s)
42c42
< system.physmem.bw_read::total 4142932 # Total read bandwidth from this memory (bytes/s)
---
> system.physmem.bw_read::total 4142976 # Total read bandwidth from this memory (bytes/s)
45c45
< system.physmem.bw_write::writebacks 3175775 # Write bandwidth from this memory (bytes/s)
---
> system.physmem.bw_write::writebacks 3175774 # Write bandwidth from this memory (bytes/s)
47,48c47,48
< system.physmem.bw_write::total 3182070 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_total::writebacks 3175775 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_write::total 3182069 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_total::writebacks 3175774 # Total bandwidth to/from this memory (bytes/s)
52c52
< system.physmem.bw_total::cpu.data 3715099 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_total::cpu.data 3715144 # Total bandwidth to/from this memory (bytes/s)
54,55c54,55
< system.physmem.bw_total::total 7325002 # Total bandwidth to/from this memory (bytes/s)
< system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.physmem.bw_total::total 7325045 # Total bandwidth to/from this memory (bytes/s)
> system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
68,70c68,70
< system.realview.vram.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.bridge.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.vram.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.bridge.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
78c78
< system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
108c108
< system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
129c129
< system.cpu.dtb.read_hits 31525882 # DTB read hits
---
> system.cpu.dtb.read_hits 31525952 # DTB read hits
131c131
< system.cpu.dtb.write_hits 23124079 # DTB write hits
---
> system.cpu.dtb.write_hits 23124113 # DTB write hits
142,143c142,143
< system.cpu.dtb.read_accesses 31534462 # DTB read accesses
< system.cpu.dtb.write_accesses 23125527 # DTB write accesses
---
> system.cpu.dtb.read_accesses 31534532 # DTB read accesses
> system.cpu.dtb.write_accesses 23125561 # DTB write accesses
145c145
< system.cpu.dtb.hits 54649961 # DTB hits
---
> system.cpu.dtb.hits 54650065 # DTB hits
147,148c147,148
< system.cpu.dtb.accesses 54659989 # DTB accesses
< system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.dtb.accesses 54660093 # DTB accesses
> system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
178c178
< system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
197c197
< system.cpu.itb.inst_hits 147037694 # ITB inst hits
---
> system.cpu.itb.inst_hits 147038008 # ITB inst hits
214,215c214,215
< system.cpu.itb.inst_accesses 147042456 # ITB inst accesses
< system.cpu.itb.hits 147037694 # DTB hits
---
> system.cpu.itb.inst_accesses 147042770 # ITB inst accesses
> system.cpu.itb.hits 147038008 # DTB hits
217c217
< system.cpu.itb.accesses 147042456 # DTB accesses
---
> system.cpu.itb.accesses 147042770 # DTB accesses
220,221c220,221
< system.cpu.pwrStateClkGateDist::mean 874939633.669805 # Distribution of time spent in the clock gated state
< system.cpu.pwrStateClkGateDist::stdev 17329944405.377167 # Distribution of time spent in the clock gated state
---
> system.cpu.pwrStateClkGateDist::mean 874939855.098377 # Distribution of time spent in the clock gated state
> system.cpu.pwrStateClkGateDist::stdev 17329944394.226795 # Distribution of time spent in the clock gated state
231,233c231,233
< system.cpu.pwrStateResidencyTicks::ON 89040643297 # Cumulative time (in ticks) in various power states
< system.cpu.pwrStateResidencyTicks::CLK_GATED 2694814071703 # Cumulative time (in ticks) in various power states
< system.cpu.numCycles 5567712511 # number of cpu cycles simulated
---
> system.cpu.pwrStateResidencyTicks::ON 89040834297 # Cumulative time (in ticks) in various power states
> system.cpu.pwrStateResidencyTicks::CLK_GATED 2694814753703 # Cumulative time (in ticks) in various power states
> system.cpu.numCycles 5567714257 # number of cpu cycles simulated
238,240c238,240
< system.cpu.committedInsts 142771202 # Number of instructions committed
< system.cpu.committedOps 173801044 # Number of ops (including micro ops) committed
< system.cpu.num_int_alu_accesses 153160791 # Number of integer alu accesses
---
> system.cpu.committedInsts 142771499 # Number of instructions committed
> system.cpu.committedOps 173801409 # Number of ops (including micro ops) committed
> system.cpu.num_int_alu_accesses 153161120 # Number of integer alu accesses
242,244c242,244
< system.cpu.num_func_calls 16873864 # number of times a function call or return occured
< system.cpu.num_conditional_control_insts 18730220 # number of instructions that are conditional controls
< system.cpu.num_int_insts 153160791 # number of integer instructions
---
> system.cpu.num_func_calls 16873932 # number of times a function call or return occured
> system.cpu.num_conditional_control_insts 18730256 # number of instructions that are conditional controls
> system.cpu.num_int_insts 153161120 # number of integer instructions
246,247c246,247
< system.cpu.num_int_register_reads 285043206 # number of times the integer registers were read
< system.cpu.num_int_register_writes 107178068 # number of times the integer registers were written
---
> system.cpu.num_int_register_reads 285043874 # number of times the integer registers were read
> system.cpu.num_int_register_writes 107178310 # number of times the integer registers were written
250,256c250,256
< system.cpu.num_cc_register_reads 530847827 # number of times the CC registers were read
< system.cpu.num_cc_register_writes 62363707 # number of times the CC registers were written
< system.cpu.num_mem_refs 55938510 # number of memory refs
< system.cpu.num_load_insts 31855508 # Number of load instructions
< system.cpu.num_store_insts 24083002 # Number of store instructions
< system.cpu.num_idle_cycles 5389631125.859330 # Number of idle cycles
< system.cpu.num_busy_cycles 178081385.140670 # Number of busy cycles
---
> system.cpu.num_cc_register_reads 530848973 # number of times the CC registers were read
> system.cpu.num_cc_register_writes 62363815 # number of times the CC registers were written
> system.cpu.num_mem_refs 55938612 # number of memory refs
> system.cpu.num_load_insts 31855576 # Number of load instructions
> system.cpu.num_store_insts 24083036 # Number of store instructions
> system.cpu.num_idle_cycles 5389632489.859149 # Number of idle cycles
> system.cpu.num_busy_cycles 178081767.140850 # Number of busy cycles
259c259
< system.cpu.Branches 36396820 # Number of branches fetched
---
> system.cpu.Branches 36396926 # Number of branches fetched
261c261
< system.cpu.op_class::IntAlu 121151571 68.36% 68.36% # Class of executed instruction
---
> system.cpu.op_class::IntAlu 121151851 68.36% 68.36% # Class of executed instruction
292,293c292,293
< system.cpu.op_class::MemRead 31852800 17.97% 86.41% # Class of executed instruction
< system.cpu.op_class::MemWrite 24074230 13.58% 99.99% # Class of executed instruction
---
> system.cpu.op_class::MemRead 31852868 17.97% 86.41% # Class of executed instruction
> system.cpu.op_class::MemWrite 24074264 13.58% 99.99% # Class of executed instruction
298,300c298,300
< system.cpu.op_class::total 177217860 # Class of executed instruction
< system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.dcache.tags.replacements 819387 # number of replacements
---
> system.cpu.op_class::total 177218242 # Class of executed instruction
> system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.dcache.tags.replacements 819384 # number of replacements
302,304c302,304
< system.cpu.dcache.tags.total_refs 53783783 # Total number of references to valid blocks.
< system.cpu.dcache.tags.sampled_refs 819899 # Sample count of references to valid blocks.
< system.cpu.dcache.tags.avg_refs 65.598059 # Average number of references to valid blocks.
---
> system.cpu.dcache.tags.total_refs 53783890 # Total number of references to valid blocks.
> system.cpu.dcache.tags.sampled_refs 819896 # Sample count of references to valid blocks.
> system.cpu.dcache.tags.avg_refs 65.598430 # Average number of references to valid blocks.
314,320c314,320
< system.cpu.dcache.tags.tag_accesses 219234707 # Number of tag accesses
< system.cpu.dcache.tags.data_accesses 219234707 # Number of data accesses
< system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.dcache.ReadReq_hits::cpu.data 30128737 # number of ReadReq hits
< system.cpu.dcache.ReadReq_hits::total 30128737 # number of ReadReq hits
< system.cpu.dcache.WriteReq_hits::cpu.data 22339767 # number of WriteReq hits
< system.cpu.dcache.WriteReq_hits::total 22339767 # number of WriteReq hits
---
> system.cpu.dcache.tags.tag_accesses 219235120 # Number of tag accesses
> system.cpu.dcache.tags.data_accesses 219235120 # Number of data accesses
> system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.dcache.ReadReq_hits::cpu.data 30128814 # number of ReadReq hits
> system.cpu.dcache.ReadReq_hits::total 30128814 # number of ReadReq hits
> system.cpu.dcache.WriteReq_hits::cpu.data 22339797 # number of WriteReq hits
> system.cpu.dcache.WriteReq_hits::total 22339797 # number of WriteReq hits
327,334c327,334
< system.cpu.dcache.demand_hits::cpu.data 52468504 # number of demand (read+write) hits
< system.cpu.dcache.demand_hits::total 52468504 # number of demand (read+write) hits
< system.cpu.dcache.overall_hits::cpu.data 52863571 # number of overall hits
< system.cpu.dcache.overall_hits::total 52863571 # number of overall hits
< system.cpu.dcache.ReadReq_misses::cpu.data 396277 # number of ReadReq misses
< system.cpu.dcache.ReadReq_misses::total 396277 # number of ReadReq misses
< system.cpu.dcache.WriteReq_misses::cpu.data 301662 # number of WriteReq misses
< system.cpu.dcache.WriteReq_misses::total 301662 # number of WriteReq misses
---
> system.cpu.dcache.demand_hits::cpu.data 52468611 # number of demand (read+write) hits
> system.cpu.dcache.demand_hits::total 52468611 # number of demand (read+write) hits
> system.cpu.dcache.overall_hits::cpu.data 52863678 # number of overall hits
> system.cpu.dcache.overall_hits::total 52863678 # number of overall hits
> system.cpu.dcache.ReadReq_misses::cpu.data 396270 # number of ReadReq misses
> system.cpu.dcache.ReadReq_misses::total 396270 # number of ReadReq misses
> system.cpu.dcache.WriteReq_misses::cpu.data 301666 # number of WriteReq misses
> system.cpu.dcache.WriteReq_misses::total 301666 # number of WriteReq misses
341,348c341,348
< system.cpu.dcache.demand_misses::cpu.data 697939 # number of demand (read+write) misses
< system.cpu.dcache.demand_misses::total 697939 # number of demand (read+write) misses
< system.cpu.dcache.overall_misses::cpu.data 814058 # number of overall misses
< system.cpu.dcache.overall_misses::total 814058 # number of overall misses
< system.cpu.dcache.ReadReq_accesses::cpu.data 30525014 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.ReadReq_accesses::total 30525014 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::cpu.data 22641429 # number of WriteReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::total 22641429 # number of WriteReq accesses(hits+misses)
---
> system.cpu.dcache.demand_misses::cpu.data 697936 # number of demand (read+write) misses
> system.cpu.dcache.demand_misses::total 697936 # number of demand (read+write) misses
> system.cpu.dcache.overall_misses::cpu.data 814055 # number of overall misses
> system.cpu.dcache.overall_misses::total 814055 # number of overall misses
> system.cpu.dcache.ReadReq_accesses::cpu.data 30525084 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.ReadReq_accesses::total 30525084 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::cpu.data 22641463 # number of WriteReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::total 22641463 # number of WriteReq accesses(hits+misses)
355,358c355,358
< system.cpu.dcache.demand_accesses::cpu.data 53166443 # number of demand (read+write) accesses
< system.cpu.dcache.demand_accesses::total 53166443 # number of demand (read+write) accesses
< system.cpu.dcache.overall_accesses::cpu.data 53677629 # number of overall (read+write) accesses
< system.cpu.dcache.overall_accesses::total 53677629 # number of overall (read+write) accesses
---
> system.cpu.dcache.demand_accesses::cpu.data 53166547 # number of demand (read+write) accesses
> system.cpu.dcache.demand_accesses::total 53166547 # number of demand (read+write) accesses
> system.cpu.dcache.overall_accesses::cpu.data 53677733 # number of overall (read+write) accesses
> system.cpu.dcache.overall_accesses::total 53677733 # number of overall (read+write) accesses
361,362c361,362
< system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013323 # miss rate for WriteReq accesses
< system.cpu.dcache.WriteReq_miss_rate::total 0.013323 # miss rate for WriteReq accesses
---
> system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013324 # miss rate for WriteReq accesses
> system.cpu.dcache.WriteReq_miss_rate::total 0.013324 # miss rate for WriteReq accesses
379,382c379,382
< system.cpu.dcache.writebacks::writebacks 682138 # number of writebacks
< system.cpu.dcache.writebacks::total 682138 # number of writebacks
< system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.icache.tags.replacements 1698988 # number of replacements
---
> system.cpu.dcache.writebacks::writebacks 682141 # number of writebacks
> system.cpu.dcache.writebacks::total 682141 # number of writebacks
> system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.icache.tags.replacements 1698986 # number of replacements
384,386c384,386
< system.cpu.icache.tags.total_refs 145341295 # Total number of references to valid blocks.
< system.cpu.icache.tags.sampled_refs 1699500 # Sample count of references to valid blocks.
< system.cpu.icache.tags.avg_refs 85.520032 # Average number of references to valid blocks.
---
> system.cpu.icache.tags.total_refs 145341611 # Total number of references to valid blocks.
> system.cpu.icache.tags.sampled_refs 1699498 # Sample count of references to valid blocks.
> system.cpu.icache.tags.avg_refs 85.520319 # Average number of references to valid blocks.
397,417c397,417
< system.cpu.icache.tags.tag_accesses 148740307 # Number of tag accesses
< system.cpu.icache.tags.data_accesses 148740307 # Number of data accesses
< system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.icache.ReadReq_hits::cpu.inst 145341295 # number of ReadReq hits
< system.cpu.icache.ReadReq_hits::total 145341295 # number of ReadReq hits
< system.cpu.icache.demand_hits::cpu.inst 145341295 # number of demand (read+write) hits
< system.cpu.icache.demand_hits::total 145341295 # number of demand (read+write) hits
< system.cpu.icache.overall_hits::cpu.inst 145341295 # number of overall hits
< system.cpu.icache.overall_hits::total 145341295 # number of overall hits
< system.cpu.icache.ReadReq_misses::cpu.inst 1699506 # number of ReadReq misses
< system.cpu.icache.ReadReq_misses::total 1699506 # number of ReadReq misses
< system.cpu.icache.demand_misses::cpu.inst 1699506 # number of demand (read+write) misses
< system.cpu.icache.demand_misses::total 1699506 # number of demand (read+write) misses
< system.cpu.icache.overall_misses::cpu.inst 1699506 # number of overall misses
< system.cpu.icache.overall_misses::total 1699506 # number of overall misses
< system.cpu.icache.ReadReq_accesses::cpu.inst 147040801 # number of ReadReq accesses(hits+misses)
< system.cpu.icache.ReadReq_accesses::total 147040801 # number of ReadReq accesses(hits+misses)
< system.cpu.icache.demand_accesses::cpu.inst 147040801 # number of demand (read+write) accesses
< system.cpu.icache.demand_accesses::total 147040801 # number of demand (read+write) accesses
< system.cpu.icache.overall_accesses::cpu.inst 147040801 # number of overall (read+write) accesses
< system.cpu.icache.overall_accesses::total 147040801 # number of overall (read+write) accesses
---
> system.cpu.icache.tags.tag_accesses 148740619 # Number of tag accesses
> system.cpu.icache.tags.data_accesses 148740619 # Number of data accesses
> system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.icache.ReadReq_hits::cpu.inst 145341611 # number of ReadReq hits
> system.cpu.icache.ReadReq_hits::total 145341611 # number of ReadReq hits
> system.cpu.icache.demand_hits::cpu.inst 145341611 # number of demand (read+write) hits
> system.cpu.icache.demand_hits::total 145341611 # number of demand (read+write) hits
> system.cpu.icache.overall_hits::cpu.inst 145341611 # number of overall hits
> system.cpu.icache.overall_hits::total 145341611 # number of overall hits
> system.cpu.icache.ReadReq_misses::cpu.inst 1699504 # number of ReadReq misses
> system.cpu.icache.ReadReq_misses::total 1699504 # number of ReadReq misses
> system.cpu.icache.demand_misses::cpu.inst 1699504 # number of demand (read+write) misses
> system.cpu.icache.demand_misses::total 1699504 # number of demand (read+write) misses
> system.cpu.icache.overall_misses::cpu.inst 1699504 # number of overall misses
> system.cpu.icache.overall_misses::total 1699504 # number of overall misses
> system.cpu.icache.ReadReq_accesses::cpu.inst 147041115 # number of ReadReq accesses(hits+misses)
> system.cpu.icache.ReadReq_accesses::total 147041115 # number of ReadReq accesses(hits+misses)
> system.cpu.icache.demand_accesses::cpu.inst 147041115 # number of demand (read+write) accesses
> system.cpu.icache.demand_accesses::total 147041115 # number of demand (read+write) accesses
> system.cpu.icache.overall_accesses::cpu.inst 147041115 # number of overall (read+write) accesses
> system.cpu.icache.overall_accesses::total 147041115 # number of overall (read+write) accesses
430,437c430,437
< system.cpu.icache.writebacks::writebacks 1698988 # number of writebacks
< system.cpu.icache.writebacks::total 1698988 # number of writebacks
< system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.l2cache.tags.replacements 109912 # number of replacements
< system.cpu.l2cache.tags.tagsinuse 65246.862245 # Cycle average of tags in use
< system.cpu.l2cache.tags.total_refs 4827688 # Total number of references to valid blocks.
< system.cpu.l2cache.tags.sampled_refs 175338 # Sample count of references to valid blocks.
< system.cpu.l2cache.tags.avg_refs 27.533609 # Average number of references to valid blocks.
---
> system.cpu.icache.writebacks::writebacks 1698986 # number of writebacks
> system.cpu.icache.writebacks::total 1698986 # number of writebacks
> system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.l2cache.tags.replacements 109914 # number of replacements
> system.cpu.l2cache.tags.tagsinuse 65246.862425 # Cycle average of tags in use
> system.cpu.l2cache.tags.total_refs 4827677 # Total number of references to valid blocks.
> system.cpu.l2cache.tags.sampled_refs 175340 # Sample count of references to valid blocks.
> system.cpu.l2cache.tags.avg_refs 27.533233 # Average number of references to valid blocks.
441,442c441,442
< system.cpu.l2cache.tags.occ_blocks::cpu.inst 9170.132693 # Average occupied blocks per requestor
< system.cpu.l2cache.tags.occ_blocks::cpu.data 56073.734427 # Average occupied blocks per requestor
---
> system.cpu.l2cache.tags.occ_blocks::cpu.inst 9170.133245 # Average occupied blocks per requestor
> system.cpu.l2cache.tags.occ_blocks::cpu.data 56073.734054 # Average occupied blocks per requestor
457,459c457,459
< system.cpu.l2cache.tags.tag_accesses 40257223 # Number of tag accesses
< system.cpu.l2cache.tags.data_accesses 40257223 # Number of data accesses
< system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.l2cache.tags.tag_accesses 40257153 # Number of tag accesses
> system.cpu.l2cache.tags.data_accesses 40257153 # Number of data accesses
> system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
463,466c463,466
< system.cpu.l2cache.WritebackDirty_hits::writebacks 682138 # number of WritebackDirty hits
< system.cpu.l2cache.WritebackDirty_hits::total 682138 # number of WritebackDirty hits
< system.cpu.l2cache.WritebackClean_hits::writebacks 1666989 # number of WritebackClean hits
< system.cpu.l2cache.WritebackClean_hits::total 1666989 # number of WritebackClean hits
---
> system.cpu.l2cache.WritebackDirty_hits::writebacks 682141 # number of WritebackDirty hits
> system.cpu.l2cache.WritebackDirty_hits::total 682141 # number of WritebackDirty hits
> system.cpu.l2cache.WritebackClean_hits::writebacks 1666986 # number of WritebackClean hits
> system.cpu.l2cache.WritebackClean_hits::total 1666986 # number of WritebackClean hits
469,474c469,474
< system.cpu.l2cache.ReadExReq_hits::cpu.data 152790 # number of ReadExReq hits
< system.cpu.l2cache.ReadExReq_hits::total 152790 # number of ReadExReq hits
< system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 1681191 # number of ReadCleanReq hits
< system.cpu.l2cache.ReadCleanReq_hits::total 1681191 # number of ReadCleanReq hits
< system.cpu.l2cache.ReadSharedReq_hits::cpu.data 505440 # number of ReadSharedReq hits
< system.cpu.l2cache.ReadSharedReq_hits::total 505440 # number of ReadSharedReq hits
---
> system.cpu.l2cache.ReadExReq_hits::cpu.data 152792 # number of ReadExReq hits
> system.cpu.l2cache.ReadExReq_hits::total 152792 # number of ReadExReq hits
> system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 1681189 # number of ReadCleanReq hits
> system.cpu.l2cache.ReadCleanReq_hits::total 1681189 # number of ReadCleanReq hits
> system.cpu.l2cache.ReadSharedReq_hits::cpu.data 505433 # number of ReadSharedReq hits
> system.cpu.l2cache.ReadSharedReq_hits::total 505433 # number of ReadSharedReq hits
477,479c477,479
< system.cpu.l2cache.demand_hits::cpu.inst 1681191 # number of demand (read+write) hits
< system.cpu.l2cache.demand_hits::cpu.data 658230 # number of demand (read+write) hits
< system.cpu.l2cache.demand_hits::total 2347806 # number of demand (read+write) hits
---
> system.cpu.l2cache.demand_hits::cpu.inst 1681189 # number of demand (read+write) hits
> system.cpu.l2cache.demand_hits::cpu.data 658225 # number of demand (read+write) hits
> system.cpu.l2cache.demand_hits::total 2347799 # number of demand (read+write) hits
482,484c482,484
< system.cpu.l2cache.overall_hits::cpu.inst 1681191 # number of overall hits
< system.cpu.l2cache.overall_hits::cpu.data 658230 # number of overall hits
< system.cpu.l2cache.overall_hits::total 2347806 # number of overall hits
---
> system.cpu.l2cache.overall_hits::cpu.inst 1681189 # number of overall hits
> system.cpu.l2cache.overall_hits::cpu.data 658225 # number of overall hits
> system.cpu.l2cache.overall_hits::total 2347799 # number of overall hits
492,493c492,493
< system.cpu.l2cache.ReadExReq_misses::cpu.data 146117 # number of ReadExReq misses
< system.cpu.l2cache.ReadExReq_misses::total 146117 # number of ReadExReq misses
---
> system.cpu.l2cache.ReadExReq_misses::cpu.data 146119 # number of ReadExReq misses
> system.cpu.l2cache.ReadExReq_misses::total 146119 # number of ReadExReq misses
501,502c501,502
< system.cpu.l2cache.demand_misses::cpu.data 161685 # number of demand (read+write) misses
< system.cpu.l2cache.demand_misses::total 179992 # number of demand (read+write) misses
---
> system.cpu.l2cache.demand_misses::cpu.data 161687 # number of demand (read+write) misses
> system.cpu.l2cache.demand_misses::total 179994 # number of demand (read+write) misses
506,507c506,507
< system.cpu.l2cache.overall_misses::cpu.data 161685 # number of overall misses
< system.cpu.l2cache.overall_misses::total 179992 # number of overall misses
---
> system.cpu.l2cache.overall_misses::cpu.data 161687 # number of overall misses
> system.cpu.l2cache.overall_misses::total 179994 # number of overall misses
511,514c511,514
< system.cpu.l2cache.WritebackDirty_accesses::writebacks 682138 # number of WritebackDirty accesses(hits+misses)
< system.cpu.l2cache.WritebackDirty_accesses::total 682138 # number of WritebackDirty accesses(hits+misses)
< system.cpu.l2cache.WritebackClean_accesses::writebacks 1666989 # number of WritebackClean accesses(hits+misses)
< system.cpu.l2cache.WritebackClean_accesses::total 1666989 # number of WritebackClean accesses(hits+misses)
---
> system.cpu.l2cache.WritebackDirty_accesses::writebacks 682141 # number of WritebackDirty accesses(hits+misses)
> system.cpu.l2cache.WritebackDirty_accesses::total 682141 # number of WritebackDirty accesses(hits+misses)
> system.cpu.l2cache.WritebackClean_accesses::writebacks 1666986 # number of WritebackClean accesses(hits+misses)
> system.cpu.l2cache.WritebackClean_accesses::total 1666986 # number of WritebackClean accesses(hits+misses)
519,524c519,524
< system.cpu.l2cache.ReadExReq_accesses::cpu.data 298907 # number of ReadExReq accesses(hits+misses)
< system.cpu.l2cache.ReadExReq_accesses::total 298907 # number of ReadExReq accesses(hits+misses)
< system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 1699489 # number of ReadCleanReq accesses(hits+misses)
< system.cpu.l2cache.ReadCleanReq_accesses::total 1699489 # number of ReadCleanReq accesses(hits+misses)
< system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 521008 # number of ReadSharedReq accesses(hits+misses)
< system.cpu.l2cache.ReadSharedReq_accesses::total 521008 # number of ReadSharedReq accesses(hits+misses)
---
> system.cpu.l2cache.ReadExReq_accesses::cpu.data 298911 # number of ReadExReq accesses(hits+misses)
> system.cpu.l2cache.ReadExReq_accesses::total 298911 # number of ReadExReq accesses(hits+misses)
> system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 1699487 # number of ReadCleanReq accesses(hits+misses)
> system.cpu.l2cache.ReadCleanReq_accesses::total 1699487 # number of ReadCleanReq accesses(hits+misses)
> system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 521001 # number of ReadSharedReq accesses(hits+misses)
> system.cpu.l2cache.ReadSharedReq_accesses::total 521001 # number of ReadSharedReq accesses(hits+misses)
527,529c527,529
< system.cpu.l2cache.demand_accesses::cpu.inst 1699489 # number of demand (read+write) accesses
< system.cpu.l2cache.demand_accesses::cpu.data 819915 # number of demand (read+write) accesses
< system.cpu.l2cache.demand_accesses::total 2527798 # number of demand (read+write) accesses
---
> system.cpu.l2cache.demand_accesses::cpu.inst 1699487 # number of demand (read+write) accesses
> system.cpu.l2cache.demand_accesses::cpu.data 819912 # number of demand (read+write) accesses
> system.cpu.l2cache.demand_accesses::total 2527793 # number of demand (read+write) accesses
532,534c532,534
< system.cpu.l2cache.overall_accesses::cpu.inst 1699489 # number of overall (read+write) accesses
< system.cpu.l2cache.overall_accesses::cpu.data 819915 # number of overall (read+write) accesses
< system.cpu.l2cache.overall_accesses::total 2527798 # number of overall (read+write) accesses
---
> system.cpu.l2cache.overall_accesses::cpu.inst 1699487 # number of overall (read+write) accesses
> system.cpu.l2cache.overall_accesses::cpu.data 819912 # number of overall (read+write) accesses
> system.cpu.l2cache.overall_accesses::total 2527793 # number of overall (read+write) accesses
551,552c551,552
< system.cpu.l2cache.demand_miss_rate::cpu.data 0.197197 # miss rate for demand accesses
< system.cpu.l2cache.demand_miss_rate::total 0.071205 # miss rate for demand accesses
---
> system.cpu.l2cache.demand_miss_rate::cpu.data 0.197200 # miss rate for demand accesses
> system.cpu.l2cache.demand_miss_rate::total 0.071206 # miss rate for demand accesses
556,557c556,557
< system.cpu.l2cache.overall_miss_rate::cpu.data 0.197197 # miss rate for overall accesses
< system.cpu.l2cache.overall_miss_rate::total 0.071205 # miss rate for overall accesses
---
> system.cpu.l2cache.overall_miss_rate::cpu.data 0.197200 # miss rate for overall accesses
> system.cpu.l2cache.overall_miss_rate::total 0.071206 # miss rate for overall accesses
566,570c566,570
< system.cpu.toL2Bus.snoop_filter.tot_requests 5059872 # Total number of requests made to the snoop filter.
< system.cpu.toL2Bus.snoop_filter.hit_single_requests 2540470 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.cpu.toL2Bus.snoop_filter.hit_multi_requests 39261 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.cpu.toL2Bus.snoop_filter.tot_snoops 422 # Total number of snoops made to the snoop filter.
< system.cpu.toL2Bus.snoop_filter.hit_single_snoops 422 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
---
> system.cpu.toL2Bus.snoop_filter.tot_requests 5059862 # Total number of requests made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_requests 2540459 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_requests 39267 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.cpu.toL2Bus.snoop_filter.tot_snoops 427 # Total number of snoops made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_snoops 427 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
572c572
< system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
574c574
< system.cpu.toL2Bus.trans_dist::ReadResp 2288314 # Transaction distribution
---
> system.cpu.toL2Bus.trans_dist::ReadResp 2288305 # Transaction distribution
577,579c577,579
< system.cpu.toL2Bus.trans_dist::WritebackDirty 682138 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::WritebackClean 1698988 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::CleanEvict 137249 # Transaction distribution
---
> system.cpu.toL2Bus.trans_dist::WritebackDirty 682141 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::WritebackClean 1698986 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::CleanEvict 137243 # Transaction distribution
583,588c583,588
< system.cpu.toL2Bus.trans_dist::ReadExReq 298907 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::ReadExResp 298907 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::ReadCleanReq 1699506 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::ReadSharedReq 521008 # Transaction distribution
< system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5116044 # Packet count per connected master and slave (bytes)
< system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2581953 # Packet count per connected master and slave (bytes)
---
> system.cpu.toL2Bus.trans_dist::ReadExReq 298911 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::ReadExResp 298911 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::ReadCleanReq 1699504 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::ReadSharedReq 521001 # Transaction distribution
> system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5116038 # Packet count per connected master and slave (bytes)
> system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2581944 # Packet count per connected master and slave (bytes)
591,592c591,592
< system.cpu.toL2Bus.pkt_count::total 7753423 # Packet count per connected master and slave (bytes)
< system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 217539704 # Cumulative packet size per connected master and slave (bytes)
---
> system.cpu.toL2Bus.pkt_count::total 7753408 # Packet count per connected master and slave (bytes)
> system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 217539448 # Cumulative packet size per connected master and slave (bytes)
596,601c596,601
< system.cpu.toL2Bus.pkt_size::total 313964701 # Cumulative packet size per connected master and slave (bytes)
< system.cpu.toL2Bus.snoops 115326 # Total snoops (count)
< system.cpu.toL2Bus.snoopTraffic 6541312 # Total snoop traffic (bytes)
< system.cpu.toL2Bus.snoop_fanout::samples 5251057 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::mean 0.018717 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::stdev 0.135522 # Request fanout histogram
---
> system.cpu.toL2Bus.pkt_size::total 313964445 # Cumulative packet size per connected master and slave (bytes)
> system.cpu.toL2Bus.snoops 115353 # Total snoops (count)
> system.cpu.toL2Bus.snoopTraffic 6542464 # Total snoop traffic (bytes)
> system.cpu.toL2Bus.snoop_fanout::samples 5251071 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::mean 0.018719 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::stdev 0.135530 # Request fanout histogram
603,604c603,604
< system.cpu.toL2Bus.snoop_fanout::0 5152775 98.13% 98.13% # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::1 98282 1.87% 100.00% # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::0 5152778 98.13% 98.13% # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::1 98293 1.87% 100.00% # Request fanout histogram
609,610c609,610
< system.cpu.toL2Bus.snoop_fanout::total 5251057 # Request fanout histogram
< system.iobus.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.toL2Bus.snoop_fanout::total 5251071 # Request fanout histogram
> system.iobus.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
661c661
< system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
663c663
< system.iocache.tags.tagsinuse 0.909890 # Cycle average of tags in use
---
> system.iocache.tags.tagsinuse 0.909895 # Cycle average of tags in use
668c668
< system.iocache.tags.occ_blocks::realview.ide 0.909890 # Average occupied blocks per requestor
---
> system.iocache.tags.occ_blocks::realview.ide 0.909895 # Average occupied blocks per requestor
676c676
< system.iocache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.iocache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
709,711c709,711
< system.membus.snoop_filter.tot_requests 362809 # Total number of requests made to the snoop filter.
< system.membus.snoop_filter.hit_single_requests 151023 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_requests 488 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
---
> system.membus.snoop_filter.tot_requests 362813 # Total number of requests made to the snoop filter.
> system.membus.snoop_filter.hit_single_requests 151005 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.membus.snoop_filter.hit_multi_requests 526 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
715c715
< system.membus.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.membus.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
721c721
< system.membus.trans_dist::CleanEvict 8203 # Transaction distribution
---
> system.membus.trans_dist::CleanEvict 8205 # Transaction distribution
725,726c725,726
< system.membus.trans_dist::ReadExReq 145996 # Transaction distribution
< system.membus.trans_dist::ReadExResp 145996 # Transaction distribution
---
> system.membus.trans_dist::ReadExReq 145998 # Transaction distribution
> system.membus.trans_dist::ReadExResp 145998 # Transaction distribution
733,734c733,734
< system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 497824 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count_system.cpu.l2cache.mem_side::total 605184 # Packet count per connected master and slave (bytes)
---
> system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 497830 # Packet count per connected master and slave (bytes)
> system.membus.pkt_count_system.cpu.l2cache.mem_side::total 605190 # Packet count per connected master and slave (bytes)
737c737
< system.membus.pkt_count::total 714542 # Packet count per connected master and slave (bytes)
---
> system.membus.pkt_count::total 714548 # Packet count per connected master and slave (bytes)
741,742c741,742
< system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18092348 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18255321 # Cumulative packet size per connected master and slave (bytes)
---
> system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18092476 # Cumulative packet size per connected master and slave (bytes)
> system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18255449 # Cumulative packet size per connected master and slave (bytes)
745c745
< system.membus.pkt_size::total 20586841 # Cumulative packet size per connected master and slave (bytes)
---
> system.membus.pkt_size::total 20586969 # Cumulative packet size per connected master and slave (bytes)
748,750c748,750
< system.membus.snoop_fanout::samples 430442 # Request fanout histogram
< system.membus.snoop_fanout::mean 0.012836 # Request fanout histogram
< system.membus.snoop_fanout::stdev 0.112565 # Request fanout histogram
---
> system.membus.snoop_fanout::samples 430446 # Request fanout histogram
> system.membus.snoop_fanout::mean 0.012887 # Request fanout histogram
> system.membus.snoop_fanout::stdev 0.112786 # Request fanout histogram
752,753c752,753
< system.membus.snoop_fanout::0 424917 98.72% 98.72% # Request fanout histogram
< system.membus.snoop_fanout::1 5525 1.28% 100.00% # Request fanout histogram
---
> system.membus.snoop_fanout::0 424899 98.71% 98.71% # Request fanout histogram
> system.membus.snoop_fanout::1 5547 1.29% 100.00% # Request fanout histogram
758,765c758,765
< system.membus.snoop_fanout::total 430442 # Request fanout histogram
< system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.gic.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.membus.snoop_fanout::total 430446 # Request fanout histogram
> system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.gic.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
772,773c772,773
< system.realview.energy_ctrl.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.ethernet.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.energy_ctrl.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.ethernet.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
805,811c805,811
< system.realview.hdlcd.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.ide.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.kmi0.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.kmi1.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.l2x0_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.lan_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.local_cpu_timer.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.hdlcd.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.ide.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.kmi0.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.kmi1.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.l2x0_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.lan_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.local_cpu_timer.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
816,827c816,827
< system.realview.mmc_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.rtc.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.sp810_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.timer0.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.mmc_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.rtc.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.sp810_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.timer0.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
< sim_seconds 2.783855 # Number of seconds simulated
< sim_ticks 2783854715000 # Number of ticks simulated
< final_tick 2783854715000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
---
> sim_seconds 2.783856 # Number of seconds simulated
> sim_ticks 2783855588000 # Number of ticks simulated
> final_tick 2783855588000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
7,13c7,13
< host_inst_rate 1570014 # Simulator instruction rate (inst/s)
< host_op_rate 1911240 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 30613244357 # Simulator tick rate (ticks/s)
< host_mem_usage 581428 # Number of bytes of host memory used
< host_seconds 90.94 # Real time elapsed on the host
< sim_insts 142771202 # Number of instructions simulated
< sim_ops 173801044 # Number of ops (including micro ops) simulated
---
> host_inst_rate 1539062 # Simulator instruction rate (inst/s)
> host_op_rate 1873561 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 30009675812 # Simulator tick rate (ticks/s)
> host_mem_usage 581968 # Number of bytes of host memory used
> host_seconds 92.77 # Real time elapsed on the host
> sim_insts 142771499 # Number of instructions simulated
> sim_ops 173801409 # Number of ops (including micro ops) simulated
16c16
< system.physmem.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.physmem.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
20c20
< system.physmem.bytes_read::cpu.data 10324772 # Number of bytes read from this memory
---
> system.physmem.bytes_read::cpu.data 10324900 # Number of bytes read from this memory
22c22
< system.physmem.bytes_read::total 11533320 # Number of bytes read from this memory
---
> system.physmem.bytes_read::total 11533448 # Number of bytes read from this memory
31c31
< system.physmem.num_reads::cpu.data 161844 # Number of read requests responded to by this memory
---
> system.physmem.num_reads::cpu.data 161846 # Number of read requests responded to by this memory
33c33
< system.physmem.num_reads::total 189181 # Number of read requests responded to by this memory
---
> system.physmem.num_reads::total 189183 # Number of read requests responded to by this memory
40c40
< system.physmem.bw_read::cpu.data 3708804 # Total read bandwidth from this memory (bytes/s)
---
> system.physmem.bw_read::cpu.data 3708849 # Total read bandwidth from this memory (bytes/s)
42c42
< system.physmem.bw_read::total 4142932 # Total read bandwidth from this memory (bytes/s)
---
> system.physmem.bw_read::total 4142976 # Total read bandwidth from this memory (bytes/s)
45c45
< system.physmem.bw_write::writebacks 3175775 # Write bandwidth from this memory (bytes/s)
---
> system.physmem.bw_write::writebacks 3175774 # Write bandwidth from this memory (bytes/s)
47,48c47,48
< system.physmem.bw_write::total 3182070 # Write bandwidth from this memory (bytes/s)
< system.physmem.bw_total::writebacks 3175775 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_write::total 3182069 # Write bandwidth from this memory (bytes/s)
> system.physmem.bw_total::writebacks 3175774 # Total bandwidth to/from this memory (bytes/s)
52c52
< system.physmem.bw_total::cpu.data 3715099 # Total bandwidth to/from this memory (bytes/s)
---
> system.physmem.bw_total::cpu.data 3715144 # Total bandwidth to/from this memory (bytes/s)
54,55c54,55
< system.physmem.bw_total::total 7325002 # Total bandwidth to/from this memory (bytes/s)
< system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.physmem.bw_total::total 7325045 # Total bandwidth to/from this memory (bytes/s)
> system.realview.nvmem.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
68,70c68,70
< system.realview.vram.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.bridge.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.vram.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.bridge.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
78c78
< system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.dstage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
108c108
< system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.dtb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
129c129
< system.cpu.dtb.read_hits 31525882 # DTB read hits
---
> system.cpu.dtb.read_hits 31525952 # DTB read hits
131c131
< system.cpu.dtb.write_hits 23124079 # DTB write hits
---
> system.cpu.dtb.write_hits 23124113 # DTB write hits
142,143c142,143
< system.cpu.dtb.read_accesses 31534462 # DTB read accesses
< system.cpu.dtb.write_accesses 23125527 # DTB write accesses
---
> system.cpu.dtb.read_accesses 31534532 # DTB read accesses
> system.cpu.dtb.write_accesses 23125561 # DTB write accesses
145c145
< system.cpu.dtb.hits 54649961 # DTB hits
---
> system.cpu.dtb.hits 54650065 # DTB hits
147,148c147,148
< system.cpu.dtb.accesses 54659989 # DTB accesses
< system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.dtb.accesses 54660093 # DTB accesses
> system.cpu.istage2_mmu.stage2_tlb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
178c178
< system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.itb.walker.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
197c197
< system.cpu.itb.inst_hits 147037694 # ITB inst hits
---
> system.cpu.itb.inst_hits 147038008 # ITB inst hits
214,215c214,215
< system.cpu.itb.inst_accesses 147042456 # ITB inst accesses
< system.cpu.itb.hits 147037694 # DTB hits
---
> system.cpu.itb.inst_accesses 147042770 # ITB inst accesses
> system.cpu.itb.hits 147038008 # DTB hits
217c217
< system.cpu.itb.accesses 147042456 # DTB accesses
---
> system.cpu.itb.accesses 147042770 # DTB accesses
220,221c220,221
< system.cpu.pwrStateClkGateDist::mean 874939633.669805 # Distribution of time spent in the clock gated state
< system.cpu.pwrStateClkGateDist::stdev 17329944405.377167 # Distribution of time spent in the clock gated state
---
> system.cpu.pwrStateClkGateDist::mean 874939855.098377 # Distribution of time spent in the clock gated state
> system.cpu.pwrStateClkGateDist::stdev 17329944394.226795 # Distribution of time spent in the clock gated state
231,233c231,233
< system.cpu.pwrStateResidencyTicks::ON 89040643297 # Cumulative time (in ticks) in various power states
< system.cpu.pwrStateResidencyTicks::CLK_GATED 2694814071703 # Cumulative time (in ticks) in various power states
< system.cpu.numCycles 5567712511 # number of cpu cycles simulated
---
> system.cpu.pwrStateResidencyTicks::ON 89040834297 # Cumulative time (in ticks) in various power states
> system.cpu.pwrStateResidencyTicks::CLK_GATED 2694814753703 # Cumulative time (in ticks) in various power states
> system.cpu.numCycles 5567714257 # number of cpu cycles simulated
238,240c238,240
< system.cpu.committedInsts 142771202 # Number of instructions committed
< system.cpu.committedOps 173801044 # Number of ops (including micro ops) committed
< system.cpu.num_int_alu_accesses 153160791 # Number of integer alu accesses
---
> system.cpu.committedInsts 142771499 # Number of instructions committed
> system.cpu.committedOps 173801409 # Number of ops (including micro ops) committed
> system.cpu.num_int_alu_accesses 153161120 # Number of integer alu accesses
242,244c242,244
< system.cpu.num_func_calls 16873864 # number of times a function call or return occured
< system.cpu.num_conditional_control_insts 18730220 # number of instructions that are conditional controls
< system.cpu.num_int_insts 153160791 # number of integer instructions
---
> system.cpu.num_func_calls 16873932 # number of times a function call or return occured
> system.cpu.num_conditional_control_insts 18730256 # number of instructions that are conditional controls
> system.cpu.num_int_insts 153161120 # number of integer instructions
246,247c246,247
< system.cpu.num_int_register_reads 285043206 # number of times the integer registers were read
< system.cpu.num_int_register_writes 107178068 # number of times the integer registers were written
---
> system.cpu.num_int_register_reads 285043874 # number of times the integer registers were read
> system.cpu.num_int_register_writes 107178310 # number of times the integer registers were written
250,256c250,256
< system.cpu.num_cc_register_reads 530847827 # number of times the CC registers were read
< system.cpu.num_cc_register_writes 62363707 # number of times the CC registers were written
< system.cpu.num_mem_refs 55938510 # number of memory refs
< system.cpu.num_load_insts 31855508 # Number of load instructions
< system.cpu.num_store_insts 24083002 # Number of store instructions
< system.cpu.num_idle_cycles 5389631125.859330 # Number of idle cycles
< system.cpu.num_busy_cycles 178081385.140670 # Number of busy cycles
---
> system.cpu.num_cc_register_reads 530848973 # number of times the CC registers were read
> system.cpu.num_cc_register_writes 62363815 # number of times the CC registers were written
> system.cpu.num_mem_refs 55938612 # number of memory refs
> system.cpu.num_load_insts 31855576 # Number of load instructions
> system.cpu.num_store_insts 24083036 # Number of store instructions
> system.cpu.num_idle_cycles 5389632489.859149 # Number of idle cycles
> system.cpu.num_busy_cycles 178081767.140850 # Number of busy cycles
259c259
< system.cpu.Branches 36396820 # Number of branches fetched
---
> system.cpu.Branches 36396926 # Number of branches fetched
261c261
< system.cpu.op_class::IntAlu 121151571 68.36% 68.36% # Class of executed instruction
---
> system.cpu.op_class::IntAlu 121151851 68.36% 68.36% # Class of executed instruction
292,293c292,293
< system.cpu.op_class::MemRead 31852800 17.97% 86.41% # Class of executed instruction
< system.cpu.op_class::MemWrite 24074230 13.58% 99.99% # Class of executed instruction
---
> system.cpu.op_class::MemRead 31852868 17.97% 86.41% # Class of executed instruction
> system.cpu.op_class::MemWrite 24074264 13.58% 99.99% # Class of executed instruction
298,300c298,300
< system.cpu.op_class::total 177217860 # Class of executed instruction
< system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.dcache.tags.replacements 819387 # number of replacements
---
> system.cpu.op_class::total 177218242 # Class of executed instruction
> system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.dcache.tags.replacements 819384 # number of replacements
302,304c302,304
< system.cpu.dcache.tags.total_refs 53783783 # Total number of references to valid blocks.
< system.cpu.dcache.tags.sampled_refs 819899 # Sample count of references to valid blocks.
< system.cpu.dcache.tags.avg_refs 65.598059 # Average number of references to valid blocks.
---
> system.cpu.dcache.tags.total_refs 53783890 # Total number of references to valid blocks.
> system.cpu.dcache.tags.sampled_refs 819896 # Sample count of references to valid blocks.
> system.cpu.dcache.tags.avg_refs 65.598430 # Average number of references to valid blocks.
314,320c314,320
< system.cpu.dcache.tags.tag_accesses 219234707 # Number of tag accesses
< system.cpu.dcache.tags.data_accesses 219234707 # Number of data accesses
< system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.dcache.ReadReq_hits::cpu.data 30128737 # number of ReadReq hits
< system.cpu.dcache.ReadReq_hits::total 30128737 # number of ReadReq hits
< system.cpu.dcache.WriteReq_hits::cpu.data 22339767 # number of WriteReq hits
< system.cpu.dcache.WriteReq_hits::total 22339767 # number of WriteReq hits
---
> system.cpu.dcache.tags.tag_accesses 219235120 # Number of tag accesses
> system.cpu.dcache.tags.data_accesses 219235120 # Number of data accesses
> system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.dcache.ReadReq_hits::cpu.data 30128814 # number of ReadReq hits
> system.cpu.dcache.ReadReq_hits::total 30128814 # number of ReadReq hits
> system.cpu.dcache.WriteReq_hits::cpu.data 22339797 # number of WriteReq hits
> system.cpu.dcache.WriteReq_hits::total 22339797 # number of WriteReq hits
327,334c327,334
< system.cpu.dcache.demand_hits::cpu.data 52468504 # number of demand (read+write) hits
< system.cpu.dcache.demand_hits::total 52468504 # number of demand (read+write) hits
< system.cpu.dcache.overall_hits::cpu.data 52863571 # number of overall hits
< system.cpu.dcache.overall_hits::total 52863571 # number of overall hits
< system.cpu.dcache.ReadReq_misses::cpu.data 396277 # number of ReadReq misses
< system.cpu.dcache.ReadReq_misses::total 396277 # number of ReadReq misses
< system.cpu.dcache.WriteReq_misses::cpu.data 301662 # number of WriteReq misses
< system.cpu.dcache.WriteReq_misses::total 301662 # number of WriteReq misses
---
> system.cpu.dcache.demand_hits::cpu.data 52468611 # number of demand (read+write) hits
> system.cpu.dcache.demand_hits::total 52468611 # number of demand (read+write) hits
> system.cpu.dcache.overall_hits::cpu.data 52863678 # number of overall hits
> system.cpu.dcache.overall_hits::total 52863678 # number of overall hits
> system.cpu.dcache.ReadReq_misses::cpu.data 396270 # number of ReadReq misses
> system.cpu.dcache.ReadReq_misses::total 396270 # number of ReadReq misses
> system.cpu.dcache.WriteReq_misses::cpu.data 301666 # number of WriteReq misses
> system.cpu.dcache.WriteReq_misses::total 301666 # number of WriteReq misses
341,348c341,348
< system.cpu.dcache.demand_misses::cpu.data 697939 # number of demand (read+write) misses
< system.cpu.dcache.demand_misses::total 697939 # number of demand (read+write) misses
< system.cpu.dcache.overall_misses::cpu.data 814058 # number of overall misses
< system.cpu.dcache.overall_misses::total 814058 # number of overall misses
< system.cpu.dcache.ReadReq_accesses::cpu.data 30525014 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.ReadReq_accesses::total 30525014 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::cpu.data 22641429 # number of WriteReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::total 22641429 # number of WriteReq accesses(hits+misses)
---
> system.cpu.dcache.demand_misses::cpu.data 697936 # number of demand (read+write) misses
> system.cpu.dcache.demand_misses::total 697936 # number of demand (read+write) misses
> system.cpu.dcache.overall_misses::cpu.data 814055 # number of overall misses
> system.cpu.dcache.overall_misses::total 814055 # number of overall misses
> system.cpu.dcache.ReadReq_accesses::cpu.data 30525084 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.ReadReq_accesses::total 30525084 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::cpu.data 22641463 # number of WriteReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::total 22641463 # number of WriteReq accesses(hits+misses)
355,358c355,358
< system.cpu.dcache.demand_accesses::cpu.data 53166443 # number of demand (read+write) accesses
< system.cpu.dcache.demand_accesses::total 53166443 # number of demand (read+write) accesses
< system.cpu.dcache.overall_accesses::cpu.data 53677629 # number of overall (read+write) accesses
< system.cpu.dcache.overall_accesses::total 53677629 # number of overall (read+write) accesses
---
> system.cpu.dcache.demand_accesses::cpu.data 53166547 # number of demand (read+write) accesses
> system.cpu.dcache.demand_accesses::total 53166547 # number of demand (read+write) accesses
> system.cpu.dcache.overall_accesses::cpu.data 53677733 # number of overall (read+write) accesses
> system.cpu.dcache.overall_accesses::total 53677733 # number of overall (read+write) accesses
361,362c361,362
< system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013323 # miss rate for WriteReq accesses
< system.cpu.dcache.WriteReq_miss_rate::total 0.013323 # miss rate for WriteReq accesses
---
> system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013324 # miss rate for WriteReq accesses
> system.cpu.dcache.WriteReq_miss_rate::total 0.013324 # miss rate for WriteReq accesses
379,382c379,382
< system.cpu.dcache.writebacks::writebacks 682138 # number of writebacks
< system.cpu.dcache.writebacks::total 682138 # number of writebacks
< system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.icache.tags.replacements 1698988 # number of replacements
---
> system.cpu.dcache.writebacks::writebacks 682141 # number of writebacks
> system.cpu.dcache.writebacks::total 682141 # number of writebacks
> system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.icache.tags.replacements 1698986 # number of replacements
384,386c384,386
< system.cpu.icache.tags.total_refs 145341295 # Total number of references to valid blocks.
< system.cpu.icache.tags.sampled_refs 1699500 # Sample count of references to valid blocks.
< system.cpu.icache.tags.avg_refs 85.520032 # Average number of references to valid blocks.
---
> system.cpu.icache.tags.total_refs 145341611 # Total number of references to valid blocks.
> system.cpu.icache.tags.sampled_refs 1699498 # Sample count of references to valid blocks.
> system.cpu.icache.tags.avg_refs 85.520319 # Average number of references to valid blocks.
397,417c397,417
< system.cpu.icache.tags.tag_accesses 148740307 # Number of tag accesses
< system.cpu.icache.tags.data_accesses 148740307 # Number of data accesses
< system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.icache.ReadReq_hits::cpu.inst 145341295 # number of ReadReq hits
< system.cpu.icache.ReadReq_hits::total 145341295 # number of ReadReq hits
< system.cpu.icache.demand_hits::cpu.inst 145341295 # number of demand (read+write) hits
< system.cpu.icache.demand_hits::total 145341295 # number of demand (read+write) hits
< system.cpu.icache.overall_hits::cpu.inst 145341295 # number of overall hits
< system.cpu.icache.overall_hits::total 145341295 # number of overall hits
< system.cpu.icache.ReadReq_misses::cpu.inst 1699506 # number of ReadReq misses
< system.cpu.icache.ReadReq_misses::total 1699506 # number of ReadReq misses
< system.cpu.icache.demand_misses::cpu.inst 1699506 # number of demand (read+write) misses
< system.cpu.icache.demand_misses::total 1699506 # number of demand (read+write) misses
< system.cpu.icache.overall_misses::cpu.inst 1699506 # number of overall misses
< system.cpu.icache.overall_misses::total 1699506 # number of overall misses
< system.cpu.icache.ReadReq_accesses::cpu.inst 147040801 # number of ReadReq accesses(hits+misses)
< system.cpu.icache.ReadReq_accesses::total 147040801 # number of ReadReq accesses(hits+misses)
< system.cpu.icache.demand_accesses::cpu.inst 147040801 # number of demand (read+write) accesses
< system.cpu.icache.demand_accesses::total 147040801 # number of demand (read+write) accesses
< system.cpu.icache.overall_accesses::cpu.inst 147040801 # number of overall (read+write) accesses
< system.cpu.icache.overall_accesses::total 147040801 # number of overall (read+write) accesses
---
> system.cpu.icache.tags.tag_accesses 148740619 # Number of tag accesses
> system.cpu.icache.tags.data_accesses 148740619 # Number of data accesses
> system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.icache.ReadReq_hits::cpu.inst 145341611 # number of ReadReq hits
> system.cpu.icache.ReadReq_hits::total 145341611 # number of ReadReq hits
> system.cpu.icache.demand_hits::cpu.inst 145341611 # number of demand (read+write) hits
> system.cpu.icache.demand_hits::total 145341611 # number of demand (read+write) hits
> system.cpu.icache.overall_hits::cpu.inst 145341611 # number of overall hits
> system.cpu.icache.overall_hits::total 145341611 # number of overall hits
> system.cpu.icache.ReadReq_misses::cpu.inst 1699504 # number of ReadReq misses
> system.cpu.icache.ReadReq_misses::total 1699504 # number of ReadReq misses
> system.cpu.icache.demand_misses::cpu.inst 1699504 # number of demand (read+write) misses
> system.cpu.icache.demand_misses::total 1699504 # number of demand (read+write) misses
> system.cpu.icache.overall_misses::cpu.inst 1699504 # number of overall misses
> system.cpu.icache.overall_misses::total 1699504 # number of overall misses
> system.cpu.icache.ReadReq_accesses::cpu.inst 147041115 # number of ReadReq accesses(hits+misses)
> system.cpu.icache.ReadReq_accesses::total 147041115 # number of ReadReq accesses(hits+misses)
> system.cpu.icache.demand_accesses::cpu.inst 147041115 # number of demand (read+write) accesses
> system.cpu.icache.demand_accesses::total 147041115 # number of demand (read+write) accesses
> system.cpu.icache.overall_accesses::cpu.inst 147041115 # number of overall (read+write) accesses
> system.cpu.icache.overall_accesses::total 147041115 # number of overall (read+write) accesses
430,437c430,437
< system.cpu.icache.writebacks::writebacks 1698988 # number of writebacks
< system.cpu.icache.writebacks::total 1698988 # number of writebacks
< system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.cpu.l2cache.tags.replacements 109912 # number of replacements
< system.cpu.l2cache.tags.tagsinuse 65246.862245 # Cycle average of tags in use
< system.cpu.l2cache.tags.total_refs 4827688 # Total number of references to valid blocks.
< system.cpu.l2cache.tags.sampled_refs 175338 # Sample count of references to valid blocks.
< system.cpu.l2cache.tags.avg_refs 27.533609 # Average number of references to valid blocks.
---
> system.cpu.icache.writebacks::writebacks 1698986 # number of writebacks
> system.cpu.icache.writebacks::total 1698986 # number of writebacks
> system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.cpu.l2cache.tags.replacements 109914 # number of replacements
> system.cpu.l2cache.tags.tagsinuse 65246.862425 # Cycle average of tags in use
> system.cpu.l2cache.tags.total_refs 4827677 # Total number of references to valid blocks.
> system.cpu.l2cache.tags.sampled_refs 175340 # Sample count of references to valid blocks.
> system.cpu.l2cache.tags.avg_refs 27.533233 # Average number of references to valid blocks.
441,442c441,442
< system.cpu.l2cache.tags.occ_blocks::cpu.inst 9170.132693 # Average occupied blocks per requestor
< system.cpu.l2cache.tags.occ_blocks::cpu.data 56073.734427 # Average occupied blocks per requestor
---
> system.cpu.l2cache.tags.occ_blocks::cpu.inst 9170.133245 # Average occupied blocks per requestor
> system.cpu.l2cache.tags.occ_blocks::cpu.data 56073.734054 # Average occupied blocks per requestor
457,459c457,459
< system.cpu.l2cache.tags.tag_accesses 40257223 # Number of tag accesses
< system.cpu.l2cache.tags.data_accesses 40257223 # Number of data accesses
< system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.l2cache.tags.tag_accesses 40257153 # Number of tag accesses
> system.cpu.l2cache.tags.data_accesses 40257153 # Number of data accesses
> system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
463,466c463,466
< system.cpu.l2cache.WritebackDirty_hits::writebacks 682138 # number of WritebackDirty hits
< system.cpu.l2cache.WritebackDirty_hits::total 682138 # number of WritebackDirty hits
< system.cpu.l2cache.WritebackClean_hits::writebacks 1666989 # number of WritebackClean hits
< system.cpu.l2cache.WritebackClean_hits::total 1666989 # number of WritebackClean hits
---
> system.cpu.l2cache.WritebackDirty_hits::writebacks 682141 # number of WritebackDirty hits
> system.cpu.l2cache.WritebackDirty_hits::total 682141 # number of WritebackDirty hits
> system.cpu.l2cache.WritebackClean_hits::writebacks 1666986 # number of WritebackClean hits
> system.cpu.l2cache.WritebackClean_hits::total 1666986 # number of WritebackClean hits
469,474c469,474
< system.cpu.l2cache.ReadExReq_hits::cpu.data 152790 # number of ReadExReq hits
< system.cpu.l2cache.ReadExReq_hits::total 152790 # number of ReadExReq hits
< system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 1681191 # number of ReadCleanReq hits
< system.cpu.l2cache.ReadCleanReq_hits::total 1681191 # number of ReadCleanReq hits
< system.cpu.l2cache.ReadSharedReq_hits::cpu.data 505440 # number of ReadSharedReq hits
< system.cpu.l2cache.ReadSharedReq_hits::total 505440 # number of ReadSharedReq hits
---
> system.cpu.l2cache.ReadExReq_hits::cpu.data 152792 # number of ReadExReq hits
> system.cpu.l2cache.ReadExReq_hits::total 152792 # number of ReadExReq hits
> system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 1681189 # number of ReadCleanReq hits
> system.cpu.l2cache.ReadCleanReq_hits::total 1681189 # number of ReadCleanReq hits
> system.cpu.l2cache.ReadSharedReq_hits::cpu.data 505433 # number of ReadSharedReq hits
> system.cpu.l2cache.ReadSharedReq_hits::total 505433 # number of ReadSharedReq hits
477,479c477,479
< system.cpu.l2cache.demand_hits::cpu.inst 1681191 # number of demand (read+write) hits
< system.cpu.l2cache.demand_hits::cpu.data 658230 # number of demand (read+write) hits
< system.cpu.l2cache.demand_hits::total 2347806 # number of demand (read+write) hits
---
> system.cpu.l2cache.demand_hits::cpu.inst 1681189 # number of demand (read+write) hits
> system.cpu.l2cache.demand_hits::cpu.data 658225 # number of demand (read+write) hits
> system.cpu.l2cache.demand_hits::total 2347799 # number of demand (read+write) hits
482,484c482,484
< system.cpu.l2cache.overall_hits::cpu.inst 1681191 # number of overall hits
< system.cpu.l2cache.overall_hits::cpu.data 658230 # number of overall hits
< system.cpu.l2cache.overall_hits::total 2347806 # number of overall hits
---
> system.cpu.l2cache.overall_hits::cpu.inst 1681189 # number of overall hits
> system.cpu.l2cache.overall_hits::cpu.data 658225 # number of overall hits
> system.cpu.l2cache.overall_hits::total 2347799 # number of overall hits
492,493c492,493
< system.cpu.l2cache.ReadExReq_misses::cpu.data 146117 # number of ReadExReq misses
< system.cpu.l2cache.ReadExReq_misses::total 146117 # number of ReadExReq misses
---
> system.cpu.l2cache.ReadExReq_misses::cpu.data 146119 # number of ReadExReq misses
> system.cpu.l2cache.ReadExReq_misses::total 146119 # number of ReadExReq misses
501,502c501,502
< system.cpu.l2cache.demand_misses::cpu.data 161685 # number of demand (read+write) misses
< system.cpu.l2cache.demand_misses::total 179992 # number of demand (read+write) misses
---
> system.cpu.l2cache.demand_misses::cpu.data 161687 # number of demand (read+write) misses
> system.cpu.l2cache.demand_misses::total 179994 # number of demand (read+write) misses
506,507c506,507
< system.cpu.l2cache.overall_misses::cpu.data 161685 # number of overall misses
< system.cpu.l2cache.overall_misses::total 179992 # number of overall misses
---
> system.cpu.l2cache.overall_misses::cpu.data 161687 # number of overall misses
> system.cpu.l2cache.overall_misses::total 179994 # number of overall misses
511,514c511,514
< system.cpu.l2cache.WritebackDirty_accesses::writebacks 682138 # number of WritebackDirty accesses(hits+misses)
< system.cpu.l2cache.WritebackDirty_accesses::total 682138 # number of WritebackDirty accesses(hits+misses)
< system.cpu.l2cache.WritebackClean_accesses::writebacks 1666989 # number of WritebackClean accesses(hits+misses)
< system.cpu.l2cache.WritebackClean_accesses::total 1666989 # number of WritebackClean accesses(hits+misses)
---
> system.cpu.l2cache.WritebackDirty_accesses::writebacks 682141 # number of WritebackDirty accesses(hits+misses)
> system.cpu.l2cache.WritebackDirty_accesses::total 682141 # number of WritebackDirty accesses(hits+misses)
> system.cpu.l2cache.WritebackClean_accesses::writebacks 1666986 # number of WritebackClean accesses(hits+misses)
> system.cpu.l2cache.WritebackClean_accesses::total 1666986 # number of WritebackClean accesses(hits+misses)
519,524c519,524
< system.cpu.l2cache.ReadExReq_accesses::cpu.data 298907 # number of ReadExReq accesses(hits+misses)
< system.cpu.l2cache.ReadExReq_accesses::total 298907 # number of ReadExReq accesses(hits+misses)
< system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 1699489 # number of ReadCleanReq accesses(hits+misses)
< system.cpu.l2cache.ReadCleanReq_accesses::total 1699489 # number of ReadCleanReq accesses(hits+misses)
< system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 521008 # number of ReadSharedReq accesses(hits+misses)
< system.cpu.l2cache.ReadSharedReq_accesses::total 521008 # number of ReadSharedReq accesses(hits+misses)
---
> system.cpu.l2cache.ReadExReq_accesses::cpu.data 298911 # number of ReadExReq accesses(hits+misses)
> system.cpu.l2cache.ReadExReq_accesses::total 298911 # number of ReadExReq accesses(hits+misses)
> system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 1699487 # number of ReadCleanReq accesses(hits+misses)
> system.cpu.l2cache.ReadCleanReq_accesses::total 1699487 # number of ReadCleanReq accesses(hits+misses)
> system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 521001 # number of ReadSharedReq accesses(hits+misses)
> system.cpu.l2cache.ReadSharedReq_accesses::total 521001 # number of ReadSharedReq accesses(hits+misses)
527,529c527,529
< system.cpu.l2cache.demand_accesses::cpu.inst 1699489 # number of demand (read+write) accesses
< system.cpu.l2cache.demand_accesses::cpu.data 819915 # number of demand (read+write) accesses
< system.cpu.l2cache.demand_accesses::total 2527798 # number of demand (read+write) accesses
---
> system.cpu.l2cache.demand_accesses::cpu.inst 1699487 # number of demand (read+write) accesses
> system.cpu.l2cache.demand_accesses::cpu.data 819912 # number of demand (read+write) accesses
> system.cpu.l2cache.demand_accesses::total 2527793 # number of demand (read+write) accesses
532,534c532,534
< system.cpu.l2cache.overall_accesses::cpu.inst 1699489 # number of overall (read+write) accesses
< system.cpu.l2cache.overall_accesses::cpu.data 819915 # number of overall (read+write) accesses
< system.cpu.l2cache.overall_accesses::total 2527798 # number of overall (read+write) accesses
---
> system.cpu.l2cache.overall_accesses::cpu.inst 1699487 # number of overall (read+write) accesses
> system.cpu.l2cache.overall_accesses::cpu.data 819912 # number of overall (read+write) accesses
> system.cpu.l2cache.overall_accesses::total 2527793 # number of overall (read+write) accesses
551,552c551,552
< system.cpu.l2cache.demand_miss_rate::cpu.data 0.197197 # miss rate for demand accesses
< system.cpu.l2cache.demand_miss_rate::total 0.071205 # miss rate for demand accesses
---
> system.cpu.l2cache.demand_miss_rate::cpu.data 0.197200 # miss rate for demand accesses
> system.cpu.l2cache.demand_miss_rate::total 0.071206 # miss rate for demand accesses
556,557c556,557
< system.cpu.l2cache.overall_miss_rate::cpu.data 0.197197 # miss rate for overall accesses
< system.cpu.l2cache.overall_miss_rate::total 0.071205 # miss rate for overall accesses
---
> system.cpu.l2cache.overall_miss_rate::cpu.data 0.197200 # miss rate for overall accesses
> system.cpu.l2cache.overall_miss_rate::total 0.071206 # miss rate for overall accesses
566,570c566,570
< system.cpu.toL2Bus.snoop_filter.tot_requests 5059872 # Total number of requests made to the snoop filter.
< system.cpu.toL2Bus.snoop_filter.hit_single_requests 2540470 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.cpu.toL2Bus.snoop_filter.hit_multi_requests 39261 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
< system.cpu.toL2Bus.snoop_filter.tot_snoops 422 # Total number of snoops made to the snoop filter.
< system.cpu.toL2Bus.snoop_filter.hit_single_snoops 422 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
---
> system.cpu.toL2Bus.snoop_filter.tot_requests 5059862 # Total number of requests made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_requests 2540459 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.cpu.toL2Bus.snoop_filter.hit_multi_requests 39267 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
> system.cpu.toL2Bus.snoop_filter.tot_snoops 427 # Total number of snoops made to the snoop filter.
> system.cpu.toL2Bus.snoop_filter.hit_single_snoops 427 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
572c572
< system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
574c574
< system.cpu.toL2Bus.trans_dist::ReadResp 2288314 # Transaction distribution
---
> system.cpu.toL2Bus.trans_dist::ReadResp 2288305 # Transaction distribution
577,579c577,579
< system.cpu.toL2Bus.trans_dist::WritebackDirty 682138 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::WritebackClean 1698988 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::CleanEvict 137249 # Transaction distribution
---
> system.cpu.toL2Bus.trans_dist::WritebackDirty 682141 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::WritebackClean 1698986 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::CleanEvict 137243 # Transaction distribution
583,588c583,588
< system.cpu.toL2Bus.trans_dist::ReadExReq 298907 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::ReadExResp 298907 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::ReadCleanReq 1699506 # Transaction distribution
< system.cpu.toL2Bus.trans_dist::ReadSharedReq 521008 # Transaction distribution
< system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5116044 # Packet count per connected master and slave (bytes)
< system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2581953 # Packet count per connected master and slave (bytes)
---
> system.cpu.toL2Bus.trans_dist::ReadExReq 298911 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::ReadExResp 298911 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::ReadCleanReq 1699504 # Transaction distribution
> system.cpu.toL2Bus.trans_dist::ReadSharedReq 521001 # Transaction distribution
> system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 5116038 # Packet count per connected master and slave (bytes)
> system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2581944 # Packet count per connected master and slave (bytes)
591,592c591,592
< system.cpu.toL2Bus.pkt_count::total 7753423 # Packet count per connected master and slave (bytes)
< system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 217539704 # Cumulative packet size per connected master and slave (bytes)
---
> system.cpu.toL2Bus.pkt_count::total 7753408 # Packet count per connected master and slave (bytes)
> system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 217539448 # Cumulative packet size per connected master and slave (bytes)
596,601c596,601
< system.cpu.toL2Bus.pkt_size::total 313964701 # Cumulative packet size per connected master and slave (bytes)
< system.cpu.toL2Bus.snoops 115326 # Total snoops (count)
< system.cpu.toL2Bus.snoopTraffic 6541312 # Total snoop traffic (bytes)
< system.cpu.toL2Bus.snoop_fanout::samples 5251057 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::mean 0.018717 # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::stdev 0.135522 # Request fanout histogram
---
> system.cpu.toL2Bus.pkt_size::total 313964445 # Cumulative packet size per connected master and slave (bytes)
> system.cpu.toL2Bus.snoops 115353 # Total snoops (count)
> system.cpu.toL2Bus.snoopTraffic 6542464 # Total snoop traffic (bytes)
> system.cpu.toL2Bus.snoop_fanout::samples 5251071 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::mean 0.018719 # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::stdev 0.135530 # Request fanout histogram
603,604c603,604
< system.cpu.toL2Bus.snoop_fanout::0 5152775 98.13% 98.13% # Request fanout histogram
< system.cpu.toL2Bus.snoop_fanout::1 98282 1.87% 100.00% # Request fanout histogram
---
> system.cpu.toL2Bus.snoop_fanout::0 5152778 98.13% 98.13% # Request fanout histogram
> system.cpu.toL2Bus.snoop_fanout::1 98293 1.87% 100.00% # Request fanout histogram
609,610c609,610
< system.cpu.toL2Bus.snoop_fanout::total 5251057 # Request fanout histogram
< system.iobus.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.cpu.toL2Bus.snoop_fanout::total 5251071 # Request fanout histogram
> system.iobus.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
661c661
< system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
663c663
< system.iocache.tags.tagsinuse 0.909890 # Cycle average of tags in use
---
> system.iocache.tags.tagsinuse 0.909895 # Cycle average of tags in use
668c668
< system.iocache.tags.occ_blocks::realview.ide 0.909890 # Average occupied blocks per requestor
---
> system.iocache.tags.occ_blocks::realview.ide 0.909895 # Average occupied blocks per requestor
676c676
< system.iocache.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.iocache.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
709,711c709,711
< system.membus.snoop_filter.tot_requests 362809 # Total number of requests made to the snoop filter.
< system.membus.snoop_filter.hit_single_requests 151023 # Number of requests hitting in the snoop filter with a single holder of the requested data.
< system.membus.snoop_filter.hit_multi_requests 488 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
---
> system.membus.snoop_filter.tot_requests 362813 # Total number of requests made to the snoop filter.
> system.membus.snoop_filter.hit_single_requests 151005 # Number of requests hitting in the snoop filter with a single holder of the requested data.
> system.membus.snoop_filter.hit_multi_requests 526 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
715c715
< system.membus.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.membus.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
721c721
< system.membus.trans_dist::CleanEvict 8203 # Transaction distribution
---
> system.membus.trans_dist::CleanEvict 8205 # Transaction distribution
725,726c725,726
< system.membus.trans_dist::ReadExReq 145996 # Transaction distribution
< system.membus.trans_dist::ReadExResp 145996 # Transaction distribution
---
> system.membus.trans_dist::ReadExReq 145998 # Transaction distribution
> system.membus.trans_dist::ReadExResp 145998 # Transaction distribution
733,734c733,734
< system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 497824 # Packet count per connected master and slave (bytes)
< system.membus.pkt_count_system.cpu.l2cache.mem_side::total 605184 # Packet count per connected master and slave (bytes)
---
> system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 497830 # Packet count per connected master and slave (bytes)
> system.membus.pkt_count_system.cpu.l2cache.mem_side::total 605190 # Packet count per connected master and slave (bytes)
737c737
< system.membus.pkt_count::total 714542 # Packet count per connected master and slave (bytes)
---
> system.membus.pkt_count::total 714548 # Packet count per connected master and slave (bytes)
741,742c741,742
< system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18092348 # Cumulative packet size per connected master and slave (bytes)
< system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18255321 # Cumulative packet size per connected master and slave (bytes)
---
> system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 18092476 # Cumulative packet size per connected master and slave (bytes)
> system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18255449 # Cumulative packet size per connected master and slave (bytes)
745c745
< system.membus.pkt_size::total 20586841 # Cumulative packet size per connected master and slave (bytes)
---
> system.membus.pkt_size::total 20586969 # Cumulative packet size per connected master and slave (bytes)
748,750c748,750
< system.membus.snoop_fanout::samples 430442 # Request fanout histogram
< system.membus.snoop_fanout::mean 0.012836 # Request fanout histogram
< system.membus.snoop_fanout::stdev 0.112565 # Request fanout histogram
---
> system.membus.snoop_fanout::samples 430446 # Request fanout histogram
> system.membus.snoop_fanout::mean 0.012887 # Request fanout histogram
> system.membus.snoop_fanout::stdev 0.112786 # Request fanout histogram
752,753c752,753
< system.membus.snoop_fanout::0 424917 98.72% 98.72% # Request fanout histogram
< system.membus.snoop_fanout::1 5525 1.28% 100.00% # Request fanout histogram
---
> system.membus.snoop_fanout::0 424899 98.71% 98.71% # Request fanout histogram
> system.membus.snoop_fanout::1 5547 1.29% 100.00% # Request fanout histogram
758,765c758,765
< system.membus.snoop_fanout::total 430442 # Request fanout histogram
< system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.gic.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.membus.snoop_fanout::total 430446 # Request fanout histogram
> system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.aaci_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.pci_host.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.cf_ctrl.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.gic.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.clcd.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.realview_io.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
772,773c772,773
< system.realview.energy_ctrl.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.ethernet.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.energy_ctrl.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.ethernet.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
805,811c805,811
< system.realview.hdlcd.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.ide.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.kmi0.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.kmi1.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.l2x0_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.lan_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.local_cpu_timer.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.hdlcd.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.ide.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.kmi0.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.kmi1.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.l2x0_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.lan_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.local_cpu_timer.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
816,827c816,827
< system.realview.mmc_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.rtc.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.sp810_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.timer0.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
< system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 2783854715000 # Cumulative time (in ticks) in various power states
---
> system.realview.mmc_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.rtc.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.sp810_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.timer0.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.timer1.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart1_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart2_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.uart3_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.usb_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.vgic.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states
> system.realview.watchdog_fake.pwrStateResidencyTicks::UNDEFINED 2783855588000 # Cumulative time (in ticks) in various power states