7,11c7,11
< host_inst_rate 888036 # Simulator instruction rate (inst/s)
< host_op_rate 1081042 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 17315504636 # Simulator tick rate (ticks/s)
< host_mem_usage 573724 # Number of bytes of host memory used
< host_seconds 160.77 # Real time elapsed on the host
---
> host_inst_rate 766060 # Simulator instruction rate (inst/s)
> host_op_rate 932555 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 14937129777 # Simulator tick rate (ticks/s)
> host_mem_usage 573732 # Number of bytes of host memory used
> host_seconds 186.37 # Real time elapsed on the host
122c122
< system.cpu.dtb.read_hits 31525949 # DTB read hits
---
> system.cpu.dtb.read_hits 31525950 # DTB read hits
124c124
< system.cpu.dtb.write_hits 23124104 # DTB write hits
---
> system.cpu.dtb.write_hits 23124105 # DTB write hits
135,136c135,136
< system.cpu.dtb.read_accesses 31534529 # DTB read accesses
< system.cpu.dtb.write_accesses 23125552 # DTB write accesses
---
> system.cpu.dtb.read_accesses 31534530 # DTB read accesses
> system.cpu.dtb.write_accesses 23125553 # DTB write accesses
138c138
< system.cpu.dtb.hits 54650053 # DTB hits
---
> system.cpu.dtb.hits 54650055 # DTB hits
140c140
< system.cpu.dtb.accesses 54660081 # DTB accesses
---
> system.cpu.dtb.accesses 54660083 # DTB accesses
223c223
< system.cpu.num_int_register_writes 107178464 # number of times the integer registers were written
---
> system.cpu.num_int_register_writes 107178468 # number of times the integer registers were written
273c273
< system.cpu.dcache.tags.total_refs 53783870 # Total number of references to valid blocks.
---
> system.cpu.dcache.tags.total_refs 53783872 # Total number of references to valid blocks.
275c275
< system.cpu.dcache.tags.avg_refs 65.597765 # Average number of references to valid blocks.
---
> system.cpu.dcache.tags.avg_refs 65.597768 # Average number of references to valid blocks.
285,290c285,290
< system.cpu.dcache.tags.tag_accesses 219235080 # Number of tag accesses
< system.cpu.dcache.tags.data_accesses 219235080 # Number of data accesses
< system.cpu.dcache.ReadReq_hits::cpu.data 30128800 # number of ReadReq hits
< system.cpu.dcache.ReadReq_hits::total 30128800 # number of ReadReq hits
< system.cpu.dcache.WriteReq_hits::cpu.data 22339791 # number of WriteReq hits
< system.cpu.dcache.WriteReq_hits::total 22339791 # number of WriteReq hits
---
> system.cpu.dcache.tags.tag_accesses 219235088 # Number of tag accesses
> system.cpu.dcache.tags.data_accesses 219235088 # Number of data accesses
> system.cpu.dcache.ReadReq_hits::cpu.data 30128801 # number of ReadReq hits
> system.cpu.dcache.ReadReq_hits::total 30128801 # number of ReadReq hits
> system.cpu.dcache.WriteReq_hits::cpu.data 22339792 # number of WriteReq hits
> system.cpu.dcache.WriteReq_hits::total 22339792 # number of WriteReq hits
297,300c297,300
< system.cpu.dcache.demand_hits::cpu.data 52468591 # number of demand (read+write) hits
< system.cpu.dcache.demand_hits::total 52468591 # number of demand (read+write) hits
< system.cpu.dcache.overall_hits::cpu.data 52863656 # number of overall hits
< system.cpu.dcache.overall_hits::total 52863656 # number of overall hits
---
> system.cpu.dcache.demand_hits::cpu.data 52468593 # number of demand (read+write) hits
> system.cpu.dcache.demand_hits::total 52468593 # number of demand (read+write) hits
> system.cpu.dcache.overall_hits::cpu.data 52863658 # number of overall hits
> system.cpu.dcache.overall_hits::total 52863658 # number of overall hits
315,318c315,318
< system.cpu.dcache.ReadReq_accesses::cpu.data 30525081 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.ReadReq_accesses::total 30525081 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::cpu.data 22641454 # number of WriteReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::total 22641454 # number of WriteReq accesses(hits+misses)
---
> system.cpu.dcache.ReadReq_accesses::cpu.data 30525082 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.ReadReq_accesses::total 30525082 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::cpu.data 22641455 # number of WriteReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::total 22641455 # number of WriteReq accesses(hits+misses)
325,328c325,328
< system.cpu.dcache.demand_accesses::cpu.data 53166535 # number of demand (read+write) accesses
< system.cpu.dcache.demand_accesses::total 53166535 # number of demand (read+write) accesses
< system.cpu.dcache.overall_accesses::cpu.data 53677721 # number of overall (read+write) accesses
< system.cpu.dcache.overall_accesses::total 53677721 # number of overall (read+write) accesses
---
> system.cpu.dcache.demand_accesses::cpu.data 53166537 # number of demand (read+write) accesses
> system.cpu.dcache.demand_accesses::total 53166537 # number of demand (read+write) accesses
> system.cpu.dcache.overall_accesses::cpu.data 53677723 # number of overall (read+write) accesses
> system.cpu.dcache.overall_accesses::total 53677723 # number of overall (read+write) accesses
< host_inst_rate 888036 # Simulator instruction rate (inst/s)
< host_op_rate 1081042 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 17315504636 # Simulator tick rate (ticks/s)
< host_mem_usage 573724 # Number of bytes of host memory used
< host_seconds 160.77 # Real time elapsed on the host
---
> host_inst_rate 766060 # Simulator instruction rate (inst/s)
> host_op_rate 932555 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 14937129777 # Simulator tick rate (ticks/s)
> host_mem_usage 573732 # Number of bytes of host memory used
> host_seconds 186.37 # Real time elapsed on the host
122c122
< system.cpu.dtb.read_hits 31525949 # DTB read hits
---
> system.cpu.dtb.read_hits 31525950 # DTB read hits
124c124
< system.cpu.dtb.write_hits 23124104 # DTB write hits
---
> system.cpu.dtb.write_hits 23124105 # DTB write hits
135,136c135,136
< system.cpu.dtb.read_accesses 31534529 # DTB read accesses
< system.cpu.dtb.write_accesses 23125552 # DTB write accesses
---
> system.cpu.dtb.read_accesses 31534530 # DTB read accesses
> system.cpu.dtb.write_accesses 23125553 # DTB write accesses
138c138
< system.cpu.dtb.hits 54650053 # DTB hits
---
> system.cpu.dtb.hits 54650055 # DTB hits
140c140
< system.cpu.dtb.accesses 54660081 # DTB accesses
---
> system.cpu.dtb.accesses 54660083 # DTB accesses
223c223
< system.cpu.num_int_register_writes 107178464 # number of times the integer registers were written
---
> system.cpu.num_int_register_writes 107178468 # number of times the integer registers were written
273c273
< system.cpu.dcache.tags.total_refs 53783870 # Total number of references to valid blocks.
---
> system.cpu.dcache.tags.total_refs 53783872 # Total number of references to valid blocks.
275c275
< system.cpu.dcache.tags.avg_refs 65.597765 # Average number of references to valid blocks.
---
> system.cpu.dcache.tags.avg_refs 65.597768 # Average number of references to valid blocks.
285,290c285,290
< system.cpu.dcache.tags.tag_accesses 219235080 # Number of tag accesses
< system.cpu.dcache.tags.data_accesses 219235080 # Number of data accesses
< system.cpu.dcache.ReadReq_hits::cpu.data 30128800 # number of ReadReq hits
< system.cpu.dcache.ReadReq_hits::total 30128800 # number of ReadReq hits
< system.cpu.dcache.WriteReq_hits::cpu.data 22339791 # number of WriteReq hits
< system.cpu.dcache.WriteReq_hits::total 22339791 # number of WriteReq hits
---
> system.cpu.dcache.tags.tag_accesses 219235088 # Number of tag accesses
> system.cpu.dcache.tags.data_accesses 219235088 # Number of data accesses
> system.cpu.dcache.ReadReq_hits::cpu.data 30128801 # number of ReadReq hits
> system.cpu.dcache.ReadReq_hits::total 30128801 # number of ReadReq hits
> system.cpu.dcache.WriteReq_hits::cpu.data 22339792 # number of WriteReq hits
> system.cpu.dcache.WriteReq_hits::total 22339792 # number of WriteReq hits
297,300c297,300
< system.cpu.dcache.demand_hits::cpu.data 52468591 # number of demand (read+write) hits
< system.cpu.dcache.demand_hits::total 52468591 # number of demand (read+write) hits
< system.cpu.dcache.overall_hits::cpu.data 52863656 # number of overall hits
< system.cpu.dcache.overall_hits::total 52863656 # number of overall hits
---
> system.cpu.dcache.demand_hits::cpu.data 52468593 # number of demand (read+write) hits
> system.cpu.dcache.demand_hits::total 52468593 # number of demand (read+write) hits
> system.cpu.dcache.overall_hits::cpu.data 52863658 # number of overall hits
> system.cpu.dcache.overall_hits::total 52863658 # number of overall hits
315,318c315,318
< system.cpu.dcache.ReadReq_accesses::cpu.data 30525081 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.ReadReq_accesses::total 30525081 # number of ReadReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::cpu.data 22641454 # number of WriteReq accesses(hits+misses)
< system.cpu.dcache.WriteReq_accesses::total 22641454 # number of WriteReq accesses(hits+misses)
---
> system.cpu.dcache.ReadReq_accesses::cpu.data 30525082 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.ReadReq_accesses::total 30525082 # number of ReadReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::cpu.data 22641455 # number of WriteReq accesses(hits+misses)
> system.cpu.dcache.WriteReq_accesses::total 22641455 # number of WriteReq accesses(hits+misses)
325,328c325,328
< system.cpu.dcache.demand_accesses::cpu.data 53166535 # number of demand (read+write) accesses
< system.cpu.dcache.demand_accesses::total 53166535 # number of demand (read+write) accesses
< system.cpu.dcache.overall_accesses::cpu.data 53677721 # number of overall (read+write) accesses
< system.cpu.dcache.overall_accesses::total 53677721 # number of overall (read+write) accesses
---
> system.cpu.dcache.demand_accesses::cpu.data 53166537 # number of demand (read+write) accesses
> system.cpu.dcache.demand_accesses::total 53166537 # number of demand (read+write) accesses
> system.cpu.dcache.overall_accesses::cpu.data 53677723 # number of overall (read+write) accesses
> system.cpu.dcache.overall_accesses::total 53677723 # number of overall (read+write) accesses