40a41
> mmap_using_noreserve=false
179a181
> sys=system
197d198
< port=system.cpu.toL2Bus.slave[5]
290a292
> sys=system
308d309
< port=system.cpu.toL2Bus.slave[4]
367c368,370
< header_cycles=1
---
> forward_latency=0
> frontend_latency=1
> response_latency=1
368a372
> snoop_response_latency=1
373c377
< slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port system.cpu.istage2_mmu.stage2_tlb.walker.port system.cpu.dstage2_mmu.stage2_tlb.walker.port
---
> slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb.walker.port system.cpu.dtb.walker.port
404c408,410
< header_cycles=1
---
> forward_latency=1
> frontend_latency=2
> response_latency=2
406c412
< width=8
---
> width=16
452c458,460
< header_cycles=1
---
> forward_latency=4
> frontend_latency=3
> response_latency=2
453a462
> snoop_response_latency=4
456c465
< width=8
---
> width=16