7,11c7,11
< host_inst_rate 797664 # Simulator instruction rate (inst/s)
< host_op_rate 971941 # Simulator op (including micro ops) rate (op/s)
< host_tick_rate 15227033289 # Simulator tick rate (ticks/s)
< host_mem_usage 590380 # Number of bytes of host memory used
< host_seconds 184.07 # Real time elapsed on the host
---
> host_inst_rate 748827 # Simulator instruction rate (inst/s)
> host_op_rate 912434 # Simulator op (including micro ops) rate (op/s)
> host_tick_rate 14294755935 # Simulator tick rate (ticks/s)
> host_mem_usage 590384 # Number of bytes of host memory used
> host_seconds 196.08 # Real time elapsed on the host
141c141
< system.cpu0.dtb.read_hits 20339693 # DTB read hits
---
> system.cpu0.dtb.read_hits 20339694 # DTB read hits
143c143
< system.cpu0.dtb.write_hits 16391003 # DTB write hits
---
> system.cpu0.dtb.write_hits 16391004 # DTB write hits
154,155c154,155
< system.cpu0.dtb.read_accesses 20346564 # DTB read accesses
< system.cpu0.dtb.write_accesses 16392096 # DTB write accesses
---
> system.cpu0.dtb.read_accesses 20346565 # DTB read accesses
> system.cpu0.dtb.write_accesses 16392097 # DTB write accesses
157c157
< system.cpu0.dtb.hits 36730696 # DTB hits
---
> system.cpu0.dtb.hits 36730698 # DTB hits
159c159
< system.cpu0.dtb.accesses 36738660 # DTB accesses
---
> system.cpu0.dtb.accesses 36738662 # DTB accesses
242c242
< system.cpu0.num_int_register_writes 69135393 # number of times the integer registers were written
---
> system.cpu0.num_int_register_writes 69135397 # number of times the integer registers were written
292c292
< system.cpu0.dcache.tags.total_refs 35932313 # Total number of references to valid blocks.
---
> system.cpu0.dcache.tags.total_refs 35932315 # Total number of references to valid blocks.
294c294
< system.cpu0.dcache.tags.avg_refs 51.776413 # Average number of references to valid blocks.
---
> system.cpu0.dcache.tags.avg_refs 51.776416 # Average number of references to valid blocks.
304,309c304,309
< system.cpu0.dcache.tags.tag_accesses 74113669 # Number of tag accesses
< system.cpu0.dcache.tags.data_accesses 74113669 # Number of data accesses
< system.cpu0.dcache.ReadReq_hits::cpu0.data 19108530 # number of ReadReq hits
< system.cpu0.dcache.ReadReq_hits::total 19108530 # number of ReadReq hits
< system.cpu0.dcache.WriteReq_hits::cpu0.data 15690319 # number of WriteReq hits
< system.cpu0.dcache.WriteReq_hits::total 15690319 # number of WriteReq hits
---
> system.cpu0.dcache.tags.tag_accesses 74113673 # Number of tag accesses
> system.cpu0.dcache.tags.data_accesses 74113673 # Number of data accesses
> system.cpu0.dcache.ReadReq_hits::cpu0.data 19108531 # number of ReadReq hits
> system.cpu0.dcache.ReadReq_hits::total 19108531 # number of ReadReq hits
> system.cpu0.dcache.WriteReq_hits::cpu0.data 15690320 # number of WriteReq hits
> system.cpu0.dcache.WriteReq_hits::total 15690320 # number of WriteReq hits
316,319c316,319
< system.cpu0.dcache.demand_hits::cpu0.data 34798849 # number of demand (read+write) hits
< system.cpu0.dcache.demand_hits::total 34798849 # number of demand (read+write) hits
< system.cpu0.dcache.overall_hits::cpu0.data 35144934 # number of overall hits
< system.cpu0.dcache.overall_hits::total 35144934 # number of overall hits
---
> system.cpu0.dcache.demand_hits::cpu0.data 34798851 # number of demand (read+write) hits
> system.cpu0.dcache.demand_hits::total 34798851 # number of demand (read+write) hits
> system.cpu0.dcache.overall_hits::cpu0.data 35144936 # number of overall hits
> system.cpu0.dcache.overall_hits::total 35144936 # number of overall hits
334,337c334,337
< system.cpu0.dcache.ReadReq_accesses::cpu0.data 19481630 # number of ReadReq accesses(hits+misses)
< system.cpu0.dcache.ReadReq_accesses::total 19481630 # number of ReadReq accesses(hits+misses)
< system.cpu0.dcache.WriteReq_accesses::cpu0.data 15986118 # number of WriteReq accesses(hits+misses)
< system.cpu0.dcache.WriteReq_accesses::total 15986118 # number of WriteReq accesses(hits+misses)
---
> system.cpu0.dcache.ReadReq_accesses::cpu0.data 19481631 # number of ReadReq accesses(hits+misses)
> system.cpu0.dcache.ReadReq_accesses::total 19481631 # number of ReadReq accesses(hits+misses)
> system.cpu0.dcache.WriteReq_accesses::cpu0.data 15986119 # number of WriteReq accesses(hits+misses)
> system.cpu0.dcache.WriteReq_accesses::total 15986119 # number of WriteReq accesses(hits+misses)
344,347c344,347
< system.cpu0.dcache.demand_accesses::cpu0.data 35467748 # number of demand (read+write) accesses
< system.cpu0.dcache.demand_accesses::total 35467748 # number of demand (read+write) accesses
< system.cpu0.dcache.overall_accesses::cpu0.data 35914154 # number of overall (read+write) accesses
< system.cpu0.dcache.overall_accesses::total 35914154 # number of overall (read+write) accesses
---
> system.cpu0.dcache.demand_accesses::cpu0.data 35467750 # number of demand (read+write) accesses
> system.cpu0.dcache.demand_accesses::total 35467750 # number of demand (read+write) accesses
> system.cpu0.dcache.overall_accesses::cpu0.data 35914156 # number of overall (read+write) accesses
> system.cpu0.dcache.overall_accesses::total 35914156 # number of overall (read+write) accesses