| config.ini (9481:b0fa6b872f40) | config.ini (9885:afd9ea6101d9) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem |
| 11children=bridge cpu disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami | 11children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain |
| 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 | 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 |
| 14clock=1000 15console=/scratch/nilay/GEM5/system/binaries/console | 14cache_line_size=64 15clk_domain=system.clk_domain 16console=/dist/m5/system/binaries/console |
| 16init_param=0 | 17init_param=0 |
| 17kernel=/scratch/nilay/GEM5/system/binaries/vmlinux | 18kernel=/dist/m5/system/binaries/vmlinux |
| 18load_addr_mask=1099511627775 19mem_mode=timing 20mem_ranges=0:134217727 21memories=system.physmem 22num_work_ids=16 | 19load_addr_mask=1099511627775 20mem_mode=timing 21mem_ranges=0:134217727 22memories=system.physmem 23num_work_ids=16 |
| 23pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal | 24pal=/dist/m5/system/binaries/ts_osfpal |
| 24readfile=tests/halt.sh 25symbolfile= 26system_rev=1024 27system_type=34 28work_begin_ckpt_count=0 29work_begin_cpu_id_exit=-1 30work_begin_exit_count=0 31work_cpus_ckpt_count=0 32work_end_ckpt_count=0 33work_end_exit_count=0 34work_item_id=-1 35system_port=system.membus.slave[0] 36 37[system.bridge] 38type=Bridge | 25readfile=tests/halt.sh 26symbolfile= 27system_rev=1024 28system_type=34 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[0] 37 38[system.bridge] 39type=Bridge |
| 39clock=1000 | 40clk_domain=system.clk_domain |
| 40delay=50000 41ranges=8796093022208:18446744073709551615 42req_size=16 43resp_size=16 44master=system.iobus.slave[0] 45slave=system.membus.master[0] 46 | 41delay=50000 42ranges=8796093022208:18446744073709551615 43req_size=16 44resp_size=16 45master=system.iobus.slave[0] 46slave=system.membus.master[0] 47 |
| 48[system.clk_domain] 49type=SrcClockDomain 50clock=1000 51voltage_domain=system.voltage_domain 52 |
|
| 47[system.cpu] 48type=TimingSimpleCPU 49children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer | 53[system.cpu] 54type=TimingSimpleCPU 55children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer |
| 50branchPred=Null | |
| 51checker=Null | 56checker=Null |
| 52clock=500 | 57clk_domain=system.cpu_clk_domain |
| 53cpu_id=0 54do_checkpoint_insts=true 55do_quiesce=true 56do_statistics_insts=true 57dtb=system.cpu.dtb 58function_trace=false 59function_trace_start=0 60interrupts=system.cpu.interrupts 61isa=system.cpu.isa 62itb=system.cpu.itb 63max_insts_all_threads=0 64max_insts_any_thread=0 65max_loads_all_threads=0 66max_loads_any_thread=0 67numThreads=1 68profile=0 69progress_interval=0 | 58cpu_id=0 59do_checkpoint_insts=true 60do_quiesce=true 61do_statistics_insts=true 62dtb=system.cpu.dtb 63function_trace=false 64function_trace_start=0 65interrupts=system.cpu.interrupts 66isa=system.cpu.isa 67itb=system.cpu.itb 68max_insts_all_threads=0 69max_insts_any_thread=0 70max_loads_all_threads=0 71max_loads_any_thread=0 72numThreads=1 73profile=0 74progress_interval=0 |
| 75simpoint_start_insts= |
|
| 70switched_out=false 71system=system 72tracer=system.cpu.tracer 73workload= 74dcache_port=system.cpu.dcache.cpu_side 75icache_port=system.cpu.icache.cpu_side 76 77[system.cpu.dcache] 78type=BaseCache | 76switched_out=false 77system=system 78tracer=system.cpu.tracer 79workload= 80dcache_port=system.cpu.dcache.cpu_side 81icache_port=system.cpu.icache.cpu_side 82 83[system.cpu.dcache] 84type=BaseCache |
| 85children=tags |
|
| 79addr_ranges=0:18446744073709551615 80assoc=4 | 86addr_ranges=0:18446744073709551615 87assoc=4 |
| 81block_size=64 82clock=500 | 88clk_domain=system.cpu_clk_domain |
| 83forward_snoops=true 84hit_latency=2 85is_top_level=true 86max_miss_count=0 87mshrs=4 88prefetch_on_access=false 89prefetcher=Null 90response_latency=2 91size=32768 92system=system | 89forward_snoops=true 90hit_latency=2 91is_top_level=true 92max_miss_count=0 93mshrs=4 94prefetch_on_access=false 95prefetcher=Null 96response_latency=2 97size=32768 98system=system |
| 99tags=system.cpu.dcache.tags |
|
| 93tgts_per_mshr=20 94two_queue=false 95write_buffers=8 96cpu_side=system.cpu.dcache_port 97mem_side=system.cpu.toL2Bus.slave[1] 98 | 100tgts_per_mshr=20 101two_queue=false 102write_buffers=8 103cpu_side=system.cpu.dcache_port 104mem_side=system.cpu.toL2Bus.slave[1] 105 |
| 106[system.cpu.dcache.tags] 107type=LRU 108assoc=4 109block_size=64 110clk_domain=system.cpu_clk_domain 111hit_latency=2 112size=32768 113 |
|
| 99[system.cpu.dtb] 100type=AlphaTLB 101size=64 102 103[system.cpu.icache] 104type=BaseCache | 114[system.cpu.dtb] 115type=AlphaTLB 116size=64 117 118[system.cpu.icache] 119type=BaseCache |
| 120children=tags |
|
| 105addr_ranges=0:18446744073709551615 106assoc=1 | 121addr_ranges=0:18446744073709551615 122assoc=1 |
| 107block_size=64 108clock=500 | 123clk_domain=system.cpu_clk_domain |
| 109forward_snoops=true 110hit_latency=2 111is_top_level=true 112max_miss_count=0 113mshrs=4 114prefetch_on_access=false 115prefetcher=Null 116response_latency=2 117size=32768 118system=system | 124forward_snoops=true 125hit_latency=2 126is_top_level=true 127max_miss_count=0 128mshrs=4 129prefetch_on_access=false 130prefetcher=Null 131response_latency=2 132size=32768 133system=system |
| 134tags=system.cpu.icache.tags |
|
| 119tgts_per_mshr=20 120two_queue=false 121write_buffers=8 122cpu_side=system.cpu.icache_port 123mem_side=system.cpu.toL2Bus.slave[0] 124 | 135tgts_per_mshr=20 136two_queue=false 137write_buffers=8 138cpu_side=system.cpu.icache_port 139mem_side=system.cpu.toL2Bus.slave[0] 140 |
| 141[system.cpu.icache.tags] 142type=LRU 143assoc=1 144block_size=64 145clk_domain=system.cpu_clk_domain 146hit_latency=2 147size=32768 148 |
|
| 125[system.cpu.interrupts] 126type=AlphaInterrupts 127 128[system.cpu.isa] 129type=AlphaISA 130 131[system.cpu.itb] 132type=AlphaTLB 133size=48 134 135[system.cpu.l2cache] 136type=BaseCache | 149[system.cpu.interrupts] 150type=AlphaInterrupts 151 152[system.cpu.isa] 153type=AlphaISA 154 155[system.cpu.itb] 156type=AlphaTLB 157size=48 158 159[system.cpu.l2cache] 160type=BaseCache |
| 161children=tags |
|
| 137addr_ranges=0:18446744073709551615 138assoc=8 | 162addr_ranges=0:18446744073709551615 163assoc=8 |
| 139block_size=64 140clock=500 | 164clk_domain=system.cpu_clk_domain |
| 141forward_snoops=true 142hit_latency=20 143is_top_level=false 144max_miss_count=0 145mshrs=20 146prefetch_on_access=false 147prefetcher=Null 148response_latency=20 149size=4194304 150system=system | 165forward_snoops=true 166hit_latency=20 167is_top_level=false 168max_miss_count=0 169mshrs=20 170prefetch_on_access=false 171prefetcher=Null 172response_latency=20 173size=4194304 174system=system |
| 175tags=system.cpu.l2cache.tags |
|
| 151tgts_per_mshr=12 152two_queue=false 153write_buffers=8 154cpu_side=system.cpu.toL2Bus.master[0] 155mem_side=system.membus.slave[1] 156 | 176tgts_per_mshr=12 177two_queue=false 178write_buffers=8 179cpu_side=system.cpu.toL2Bus.master[0] 180mem_side=system.membus.slave[1] 181 |
| 182[system.cpu.l2cache.tags] 183type=LRU 184assoc=8 185block_size=64 186clk_domain=system.cpu_clk_domain 187hit_latency=20 188size=4194304 189 |
|
| 157[system.cpu.toL2Bus] 158type=CoherentBus | 190[system.cpu.toL2Bus] 191type=CoherentBus |
| 159block_size=64 160clock=500 | 192clk_domain=system.cpu_clk_domain |
| 161header_cycles=1 | 193header_cycles=1 |
| 194system=system |
|
| 162use_default_range=false 163width=32 164master=system.cpu.l2cache.cpu_side 165slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 166 167[system.cpu.tracer] 168type=ExeTracer 169 | 195use_default_range=false 196width=32 197master=system.cpu.l2cache.cpu_side 198slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 199 200[system.cpu.tracer] 201type=ExeTracer 202 |
| 203[system.cpu_clk_domain] 204type=SrcClockDomain 205clock=500 206voltage_domain=system.voltage_domain 207 |
|
| 170[system.disk0] 171type=IdeDisk 172children=image 173delay=1000000 174driveID=master 175image=system.disk0.image 176 177[system.disk0.image] 178type=CowDiskImage 179children=child 180child=system.disk0.image.child 181image_file= 182read_only=false 183table_size=65536 184 185[system.disk0.image.child] 186type=RawDiskImage | 208[system.disk0] 209type=IdeDisk 210children=image 211delay=1000000 212driveID=master 213image=system.disk0.image 214 215[system.disk0.image] 216type=CowDiskImage 217children=child 218child=system.disk0.image.child 219image_file= 220read_only=false 221table_size=65536 222 223[system.disk0.image.child] 224type=RawDiskImage |
| 187image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img | 225image_file=/dist/m5/system/disks/linux-latest.img |
| 188read_only=true 189 190[system.disk2] 191type=IdeDisk 192children=image 193delay=1000000 194driveID=master 195image=system.disk2.image 196 197[system.disk2.image] 198type=CowDiskImage 199children=child 200child=system.disk2.image.child 201image_file= 202read_only=false 203table_size=65536 204 205[system.disk2.image.child] 206type=RawDiskImage | 226read_only=true 227 228[system.disk2] 229type=IdeDisk 230children=image 231delay=1000000 232driveID=master 233image=system.disk2.image 234 235[system.disk2.image] 236type=CowDiskImage 237children=child 238child=system.disk2.image.child 239image_file= 240read_only=false 241table_size=65536 242 243[system.disk2.image.child] 244type=RawDiskImage |
| 207image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img | 245image_file=/dist/m5/system/disks/linux-bigswap2.img |
| 208read_only=true 209 210[system.intrctrl] 211type=IntrControl 212sys=system 213 214[system.iobus] 215type=NoncoherentBus | 246read_only=true 247 248[system.intrctrl] 249type=IntrControl 250sys=system 251 252[system.iobus] 253type=NoncoherentBus |
| 216block_size=64 217clock=1000 | 254clk_domain=system.clk_domain |
| 218header_cycles=1 219use_default_range=true 220width=8 221default=system.tsunami.pciconfig.pio 222master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 223slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 224 225[system.iocache] 226type=BaseCache | 255header_cycles=1 256use_default_range=true 257width=8 258default=system.tsunami.pciconfig.pio 259master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 260slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 261 262[system.iocache] 263type=BaseCache |
| 264children=tags |
|
| 227addr_ranges=0:134217727 228assoc=8 | 265addr_ranges=0:134217727 266assoc=8 |
| 229block_size=64 230clock=1000 | 267clk_domain=system.clk_domain |
| 231forward_snoops=false 232hit_latency=50 233is_top_level=true 234max_miss_count=0 235mshrs=20 236prefetch_on_access=false 237prefetcher=Null 238response_latency=50 239size=1024 240system=system | 268forward_snoops=false 269hit_latency=50 270is_top_level=true 271max_miss_count=0 272mshrs=20 273prefetch_on_access=false 274prefetcher=Null 275response_latency=50 276size=1024 277system=system |
| 278tags=system.iocache.tags |
|
| 241tgts_per_mshr=12 242two_queue=false 243write_buffers=8 244cpu_side=system.iobus.master[29] 245mem_side=system.membus.slave[2] 246 | 279tgts_per_mshr=12 280two_queue=false 281write_buffers=8 282cpu_side=system.iobus.master[29] 283mem_side=system.membus.slave[2] 284 |
| 285[system.iocache.tags] 286type=LRU 287assoc=8 288block_size=64 289clk_domain=system.clk_domain 290hit_latency=50 291size=1024 292 |
|
| 247[system.membus] 248type=CoherentBus 249children=badaddr_responder | 293[system.membus] 294type=CoherentBus 295children=badaddr_responder |
| 250block_size=64 251clock=1000 | 296clk_domain=system.clk_domain |
| 252header_cycles=1 | 297header_cycles=1 |
| 298system=system |
|
| 253use_default_range=false 254width=8 255default=system.membus.badaddr_responder.pio 256master=system.bridge.slave system.physmem.port 257slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 258 259[system.membus.badaddr_responder] 260type=IsaFake | 299use_default_range=false 300width=8 301default=system.membus.badaddr_responder.pio 302master=system.bridge.slave system.physmem.port 303slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 304 305[system.membus.badaddr_responder] 306type=IsaFake |
| 261clock=1000 | 307clk_domain=system.clk_domain |
| 262fake_mem=false 263pio_addr=0 264pio_latency=100000 265pio_size=8 266ret_bad_addr=true 267ret_data16=65535 268ret_data32=4294967295 269ret_data64=18446744073709551615 270ret_data8=255 271system=system 272update_data=false 273warn_access= 274pio=system.membus.default 275 276[system.physmem] 277type=SimpleDRAM | 308fake_mem=false 309pio_addr=0 310pio_latency=100000 311pio_size=8 312ret_bad_addr=true 313ret_data16=65535 314ret_data32=4294967295 315ret_data64=18446744073709551615 316ret_data8=255 317system=system 318update_data=false 319warn_access= 320pio=system.membus.default 321 322[system.physmem] 323type=SimpleDRAM |
| 278addr_mapping=openmap | 324activation_limit=4 325addr_mapping=RaBaChCo |
| 279banks_per_rank=8 | 326banks_per_rank=8 |
| 280clock=1000 281conf_table_reported=false | 327burst_length=8 328channels=1 329clk_domain=system.clk_domain 330conf_table_reported=true 331device_bus_width=8 332device_rowbuffer_size=1024 333devices_per_rank=8 |
| 282in_addr_map=true | 334in_addr_map=true |
| 283lines_per_rowbuffer=64 284mem_sched_policy=fcfs | 335mem_sched_policy=frfcfs |
| 285null=false 286page_policy=open 287range=0:134217727 288ranks_per_channel=2 289read_buffer_size=32 | 336null=false 337page_policy=open 338range=0:134217727 339ranks_per_channel=2 340read_buffer_size=32 |
| 290tBURST=4000 291tCL=14000 292tRCD=14000 | 341static_backend_latency=10000 342static_frontend_latency=10000 343tBURST=5000 344tCL=13750 345tRCD=13750 |
| 293tREFI=7800000 294tRFC=300000 | 346tREFI=7800000 347tRFC=300000 |
| 295tRP=14000 296tWTR=1000 | 348tRP=13750 349tWTR=7500 350tXAW=40000 |
| 297write_buffer_size=32 298write_thresh_perc=70 | 351write_buffer_size=32 352write_thresh_perc=70 |
| 299zero=false | |
| 300port=system.membus.master[1] 301 302[system.simple_disk] 303type=SimpleDisk 304children=disk 305disk=system.simple_disk.disk 306system=system 307 308[system.simple_disk.disk] 309type=RawDiskImage | 353port=system.membus.master[1] 354 355[system.simple_disk] 356type=SimpleDisk 357children=disk 358disk=system.simple_disk.disk 359system=system 360 361[system.simple_disk.disk] 362type=RawDiskImage |
| 310image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img | 363image_file=/dist/m5/system/disks/linux-latest.img |
| 311read_only=true 312 313[system.terminal] 314type=Terminal 315intr_control=system.intrctrl 316number=0 317output=true 318port=3456 319 320[system.tsunami] 321type=Tsunami 322children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 323intrctrl=system.intrctrl 324system=system 325 326[system.tsunami.backdoor] 327type=AlphaBackdoor | 364read_only=true 365 366[system.terminal] 367type=Terminal 368intr_control=system.intrctrl 369number=0 370output=true 371port=3456 372 373[system.tsunami] 374type=Tsunami 375children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 376intrctrl=system.intrctrl 377system=system 378 379[system.tsunami.backdoor] 380type=AlphaBackdoor |
| 328clock=1000 | 381clk_domain=system.clk_domain |
| 329cpu=system.cpu 330disk=system.simple_disk 331pio_addr=8804682956800 332pio_latency=100000 333platform=system.tsunami 334system=system 335terminal=system.terminal 336pio=system.iobus.master[24] 337 338[system.tsunami.cchip] 339type=TsunamiCChip | 382cpu=system.cpu 383disk=system.simple_disk 384pio_addr=8804682956800 385pio_latency=100000 386platform=system.tsunami 387system=system 388terminal=system.terminal 389pio=system.iobus.master[24] 390 391[system.tsunami.cchip] 392type=TsunamiCChip |
| 340clock=1000 | 393clk_domain=system.clk_domain |
| 341pio_addr=8803072344064 342pio_latency=100000 343system=system 344tsunami=system.tsunami 345pio=system.iobus.master[0] 346 347[system.tsunami.ethernet] 348type=NSGigE --- 30 unchanged lines hidden (view full) --- 379MinimumGrant=176 380ProgIF=0 381Revision=0 382Status=656 383SubClassCode=0 384SubsystemID=0 385SubsystemVendorID=0 386VendorID=4107 | 394pio_addr=8803072344064 395pio_latency=100000 396system=system 397tsunami=system.tsunami 398pio=system.iobus.master[0] 399 400[system.tsunami.ethernet] 401type=NSGigE --- 30 unchanged lines hidden (view full) --- 432MinimumGrant=176 433ProgIF=0 434Revision=0 435Status=656 436SubClassCode=0 437SubsystemID=0 438SubsystemVendorID=0 439VendorID=4107 |
| 387clock=2000 | 440clk_domain=system.clk_domain |
| 388config_latency=20000 389dma_data_free=false 390dma_desc_free=false 391dma_no_allocate=true 392dma_read_delay=0 393dma_read_factor=0 394dma_write_delay=0 395dma_write_factor=0 --- 14 unchanged lines hidden (view full) --- 410tx_fifo_size=524288 411tx_thread=false 412config=system.iobus.master[28] 413dma=system.iobus.slave[2] 414pio=system.iobus.master[27] 415 416[system.tsunami.fake_OROM] 417type=IsaFake | 441config_latency=20000 442dma_data_free=false 443dma_desc_free=false 444dma_no_allocate=true 445dma_read_delay=0 446dma_read_factor=0 447dma_write_delay=0 448dma_write_factor=0 --- 14 unchanged lines hidden (view full) --- 463tx_fifo_size=524288 464tx_thread=false 465config=system.iobus.master[28] 466dma=system.iobus.slave[2] 467pio=system.iobus.master[27] 468 469[system.tsunami.fake_OROM] 470type=IsaFake |
| 418clock=1000 | 471clk_domain=system.clk_domain |
| 419fake_mem=false 420pio_addr=8796093677568 421pio_latency=100000 422pio_size=393216 423ret_bad_addr=false 424ret_data16=65535 425ret_data32=4294967295 426ret_data64=18446744073709551615 427ret_data8=255 428system=system 429update_data=false 430warn_access= 431pio=system.iobus.master[8] 432 433[system.tsunami.fake_ata0] 434type=IsaFake | 472fake_mem=false 473pio_addr=8796093677568 474pio_latency=100000 475pio_size=393216 476ret_bad_addr=false 477ret_data16=65535 478ret_data32=4294967295 479ret_data64=18446744073709551615 480ret_data8=255 481system=system 482update_data=false 483warn_access= 484pio=system.iobus.master[8] 485 486[system.tsunami.fake_ata0] 487type=IsaFake |
| 435clock=1000 | 488clk_domain=system.clk_domain |
| 436fake_mem=false 437pio_addr=8804615848432 438pio_latency=100000 439pio_size=8 440ret_bad_addr=false 441ret_data16=65535 442ret_data32=4294967295 443ret_data64=18446744073709551615 444ret_data8=255 445system=system 446update_data=false 447warn_access= 448pio=system.iobus.master[19] 449 450[system.tsunami.fake_ata1] 451type=IsaFake | 489fake_mem=false 490pio_addr=8804615848432 491pio_latency=100000 492pio_size=8 493ret_bad_addr=false 494ret_data16=65535 495ret_data32=4294967295 496ret_data64=18446744073709551615 497ret_data8=255 498system=system 499update_data=false 500warn_access= 501pio=system.iobus.master[19] 502 503[system.tsunami.fake_ata1] 504type=IsaFake |
| 452clock=1000 | 505clk_domain=system.clk_domain |
| 453fake_mem=false 454pio_addr=8804615848304 455pio_latency=100000 456pio_size=8 457ret_bad_addr=false 458ret_data16=65535 459ret_data32=4294967295 460ret_data64=18446744073709551615 461ret_data8=255 462system=system 463update_data=false 464warn_access= 465pio=system.iobus.master[20] 466 467[system.tsunami.fake_pnp_addr] 468type=IsaFake | 506fake_mem=false 507pio_addr=8804615848304 508pio_latency=100000 509pio_size=8 510ret_bad_addr=false 511ret_data16=65535 512ret_data32=4294967295 513ret_data64=18446744073709551615 514ret_data8=255 515system=system 516update_data=false 517warn_access= 518pio=system.iobus.master[20] 519 520[system.tsunami.fake_pnp_addr] 521type=IsaFake |
| 469clock=1000 | 522clk_domain=system.clk_domain |
| 470fake_mem=false 471pio_addr=8804615848569 472pio_latency=100000 473pio_size=8 474ret_bad_addr=false 475ret_data16=65535 476ret_data32=4294967295 477ret_data64=18446744073709551615 478ret_data8=255 479system=system 480update_data=false 481warn_access= 482pio=system.iobus.master[9] 483 484[system.tsunami.fake_pnp_read0] 485type=IsaFake | 523fake_mem=false 524pio_addr=8804615848569 525pio_latency=100000 526pio_size=8 527ret_bad_addr=false 528ret_data16=65535 529ret_data32=4294967295 530ret_data64=18446744073709551615 531ret_data8=255 532system=system 533update_data=false 534warn_access= 535pio=system.iobus.master[9] 536 537[system.tsunami.fake_pnp_read0] 538type=IsaFake |
| 486clock=1000 | 539clk_domain=system.clk_domain |
| 487fake_mem=false 488pio_addr=8804615848451 489pio_latency=100000 490pio_size=8 491ret_bad_addr=false 492ret_data16=65535 493ret_data32=4294967295 494ret_data64=18446744073709551615 495ret_data8=255 496system=system 497update_data=false 498warn_access= 499pio=system.iobus.master[11] 500 501[system.tsunami.fake_pnp_read1] 502type=IsaFake | 540fake_mem=false 541pio_addr=8804615848451 542pio_latency=100000 543pio_size=8 544ret_bad_addr=false 545ret_data16=65535 546ret_data32=4294967295 547ret_data64=18446744073709551615 548ret_data8=255 549system=system 550update_data=false 551warn_access= 552pio=system.iobus.master[11] 553 554[system.tsunami.fake_pnp_read1] 555type=IsaFake |
| 503clock=1000 | 556clk_domain=system.clk_domain |
| 504fake_mem=false 505pio_addr=8804615848515 506pio_latency=100000 507pio_size=8 508ret_bad_addr=false 509ret_data16=65535 510ret_data32=4294967295 511ret_data64=18446744073709551615 512ret_data8=255 513system=system 514update_data=false 515warn_access= 516pio=system.iobus.master[12] 517 518[system.tsunami.fake_pnp_read2] 519type=IsaFake | 557fake_mem=false 558pio_addr=8804615848515 559pio_latency=100000 560pio_size=8 561ret_bad_addr=false 562ret_data16=65535 563ret_data32=4294967295 564ret_data64=18446744073709551615 565ret_data8=255 566system=system 567update_data=false 568warn_access= 569pio=system.iobus.master[12] 570 571[system.tsunami.fake_pnp_read2] 572type=IsaFake |
| 520clock=1000 | 573clk_domain=system.clk_domain |
| 521fake_mem=false 522pio_addr=8804615848579 523pio_latency=100000 524pio_size=8 525ret_bad_addr=false 526ret_data16=65535 527ret_data32=4294967295 528ret_data64=18446744073709551615 529ret_data8=255 530system=system 531update_data=false 532warn_access= 533pio=system.iobus.master[13] 534 535[system.tsunami.fake_pnp_read3] 536type=IsaFake | 574fake_mem=false 575pio_addr=8804615848579 576pio_latency=100000 577pio_size=8 578ret_bad_addr=false 579ret_data16=65535 580ret_data32=4294967295 581ret_data64=18446744073709551615 582ret_data8=255 583system=system 584update_data=false 585warn_access= 586pio=system.iobus.master[13] 587 588[system.tsunami.fake_pnp_read3] 589type=IsaFake |
| 537clock=1000 | 590clk_domain=system.clk_domain |
| 538fake_mem=false 539pio_addr=8804615848643 540pio_latency=100000 541pio_size=8 542ret_bad_addr=false 543ret_data16=65535 544ret_data32=4294967295 545ret_data64=18446744073709551615 546ret_data8=255 547system=system 548update_data=false 549warn_access= 550pio=system.iobus.master[14] 551 552[system.tsunami.fake_pnp_read4] 553type=IsaFake | 591fake_mem=false 592pio_addr=8804615848643 593pio_latency=100000 594pio_size=8 595ret_bad_addr=false 596ret_data16=65535 597ret_data32=4294967295 598ret_data64=18446744073709551615 599ret_data8=255 600system=system 601update_data=false 602warn_access= 603pio=system.iobus.master[14] 604 605[system.tsunami.fake_pnp_read4] 606type=IsaFake |
| 554clock=1000 | 607clk_domain=system.clk_domain |
| 555fake_mem=false 556pio_addr=8804615848707 557pio_latency=100000 558pio_size=8 559ret_bad_addr=false 560ret_data16=65535 561ret_data32=4294967295 562ret_data64=18446744073709551615 563ret_data8=255 564system=system 565update_data=false 566warn_access= 567pio=system.iobus.master[15] 568 569[system.tsunami.fake_pnp_read5] 570type=IsaFake | 608fake_mem=false 609pio_addr=8804615848707 610pio_latency=100000 611pio_size=8 612ret_bad_addr=false 613ret_data16=65535 614ret_data32=4294967295 615ret_data64=18446744073709551615 616ret_data8=255 617system=system 618update_data=false 619warn_access= 620pio=system.iobus.master[15] 621 622[system.tsunami.fake_pnp_read5] 623type=IsaFake |
| 571clock=1000 | 624clk_domain=system.clk_domain |
| 572fake_mem=false 573pio_addr=8804615848771 574pio_latency=100000 575pio_size=8 576ret_bad_addr=false 577ret_data16=65535 578ret_data32=4294967295 579ret_data64=18446744073709551615 580ret_data8=255 581system=system 582update_data=false 583warn_access= 584pio=system.iobus.master[16] 585 586[system.tsunami.fake_pnp_read6] 587type=IsaFake | 625fake_mem=false 626pio_addr=8804615848771 627pio_latency=100000 628pio_size=8 629ret_bad_addr=false 630ret_data16=65535 631ret_data32=4294967295 632ret_data64=18446744073709551615 633ret_data8=255 634system=system 635update_data=false 636warn_access= 637pio=system.iobus.master[16] 638 639[system.tsunami.fake_pnp_read6] 640type=IsaFake |
| 588clock=1000 | 641clk_domain=system.clk_domain |
| 589fake_mem=false 590pio_addr=8804615848835 591pio_latency=100000 592pio_size=8 593ret_bad_addr=false 594ret_data16=65535 595ret_data32=4294967295 596ret_data64=18446744073709551615 597ret_data8=255 598system=system 599update_data=false 600warn_access= 601pio=system.iobus.master[17] 602 603[system.tsunami.fake_pnp_read7] 604type=IsaFake | 642fake_mem=false 643pio_addr=8804615848835 644pio_latency=100000 645pio_size=8 646ret_bad_addr=false 647ret_data16=65535 648ret_data32=4294967295 649ret_data64=18446744073709551615 650ret_data8=255 651system=system 652update_data=false 653warn_access= 654pio=system.iobus.master[17] 655 656[system.tsunami.fake_pnp_read7] 657type=IsaFake |
| 605clock=1000 | 658clk_domain=system.clk_domain |
| 606fake_mem=false 607pio_addr=8804615848899 608pio_latency=100000 609pio_size=8 610ret_bad_addr=false 611ret_data16=65535 612ret_data32=4294967295 613ret_data64=18446744073709551615 614ret_data8=255 615system=system 616update_data=false 617warn_access= 618pio=system.iobus.master[18] 619 620[system.tsunami.fake_pnp_write] 621type=IsaFake | 659fake_mem=false 660pio_addr=8804615848899 661pio_latency=100000 662pio_size=8 663ret_bad_addr=false 664ret_data16=65535 665ret_data32=4294967295 666ret_data64=18446744073709551615 667ret_data8=255 668system=system 669update_data=false 670warn_access= 671pio=system.iobus.master[18] 672 673[system.tsunami.fake_pnp_write] 674type=IsaFake |
| 622clock=1000 | 675clk_domain=system.clk_domain |
| 623fake_mem=false 624pio_addr=8804615850617 625pio_latency=100000 626pio_size=8 627ret_bad_addr=false 628ret_data16=65535 629ret_data32=4294967295 630ret_data64=18446744073709551615 631ret_data8=255 632system=system 633update_data=false 634warn_access= 635pio=system.iobus.master[10] 636 637[system.tsunami.fake_ppc] 638type=IsaFake | 676fake_mem=false 677pio_addr=8804615850617 678pio_latency=100000 679pio_size=8 680ret_bad_addr=false 681ret_data16=65535 682ret_data32=4294967295 683ret_data64=18446744073709551615 684ret_data8=255 685system=system 686update_data=false 687warn_access= 688pio=system.iobus.master[10] 689 690[system.tsunami.fake_ppc] 691type=IsaFake |
| 639clock=1000 | 692clk_domain=system.clk_domain |
| 640fake_mem=false 641pio_addr=8804615848891 642pio_latency=100000 643pio_size=8 644ret_bad_addr=false 645ret_data16=65535 646ret_data32=4294967295 647ret_data64=18446744073709551615 648ret_data8=255 649system=system 650update_data=false 651warn_access= 652pio=system.iobus.master[7] 653 654[system.tsunami.fake_sm_chip] 655type=IsaFake | 693fake_mem=false 694pio_addr=8804615848891 695pio_latency=100000 696pio_size=8 697ret_bad_addr=false 698ret_data16=65535 699ret_data32=4294967295 700ret_data64=18446744073709551615 701ret_data8=255 702system=system 703update_data=false 704warn_access= 705pio=system.iobus.master[7] 706 707[system.tsunami.fake_sm_chip] 708type=IsaFake |
| 656clock=1000 | 709clk_domain=system.clk_domain |
| 657fake_mem=false 658pio_addr=8804615848816 659pio_latency=100000 660pio_size=8 661ret_bad_addr=false 662ret_data16=65535 663ret_data32=4294967295 664ret_data64=18446744073709551615 665ret_data8=255 666system=system 667update_data=false 668warn_access= 669pio=system.iobus.master[2] 670 671[system.tsunami.fake_uart1] 672type=IsaFake | 710fake_mem=false 711pio_addr=8804615848816 712pio_latency=100000 713pio_size=8 714ret_bad_addr=false 715ret_data16=65535 716ret_data32=4294967295 717ret_data64=18446744073709551615 718ret_data8=255 719system=system 720update_data=false 721warn_access= 722pio=system.iobus.master[2] 723 724[system.tsunami.fake_uart1] 725type=IsaFake |
| 673clock=1000 | 726clk_domain=system.clk_domain |
| 674fake_mem=false 675pio_addr=8804615848696 676pio_latency=100000 677pio_size=8 678ret_bad_addr=false 679ret_data16=65535 680ret_data32=4294967295 681ret_data64=18446744073709551615 682ret_data8=255 683system=system 684update_data=false 685warn_access= 686pio=system.iobus.master[3] 687 688[system.tsunami.fake_uart2] 689type=IsaFake | 727fake_mem=false 728pio_addr=8804615848696 729pio_latency=100000 730pio_size=8 731ret_bad_addr=false 732ret_data16=65535 733ret_data32=4294967295 734ret_data64=18446744073709551615 735ret_data8=255 736system=system 737update_data=false 738warn_access= 739pio=system.iobus.master[3] 740 741[system.tsunami.fake_uart2] 742type=IsaFake |
| 690clock=1000 | 743clk_domain=system.clk_domain |
| 691fake_mem=false 692pio_addr=8804615848936 693pio_latency=100000 694pio_size=8 695ret_bad_addr=false 696ret_data16=65535 697ret_data32=4294967295 698ret_data64=18446744073709551615 699ret_data8=255 700system=system 701update_data=false 702warn_access= 703pio=system.iobus.master[4] 704 705[system.tsunami.fake_uart3] 706type=IsaFake | 744fake_mem=false 745pio_addr=8804615848936 746pio_latency=100000 747pio_size=8 748ret_bad_addr=false 749ret_data16=65535 750ret_data32=4294967295 751ret_data64=18446744073709551615 752ret_data8=255 753system=system 754update_data=false 755warn_access= 756pio=system.iobus.master[4] 757 758[system.tsunami.fake_uart3] 759type=IsaFake |
| 707clock=1000 | 760clk_domain=system.clk_domain |
| 708fake_mem=false 709pio_addr=8804615848680 710pio_latency=100000 711pio_size=8 712ret_bad_addr=false 713ret_data16=65535 714ret_data32=4294967295 715ret_data64=18446744073709551615 716ret_data8=255 717system=system 718update_data=false 719warn_access= 720pio=system.iobus.master[5] 721 722[system.tsunami.fake_uart4] 723type=IsaFake | 761fake_mem=false 762pio_addr=8804615848680 763pio_latency=100000 764pio_size=8 765ret_bad_addr=false 766ret_data16=65535 767ret_data32=4294967295 768ret_data64=18446744073709551615 769ret_data8=255 770system=system 771update_data=false 772warn_access= 773pio=system.iobus.master[5] 774 775[system.tsunami.fake_uart4] 776type=IsaFake |
| 724clock=1000 | 777clk_domain=system.clk_domain |
| 725fake_mem=false 726pio_addr=8804615848944 727pio_latency=100000 728pio_size=8 729ret_bad_addr=false 730ret_data16=65535 731ret_data32=4294967295 732ret_data64=18446744073709551615 733ret_data8=255 734system=system 735update_data=false 736warn_access= 737pio=system.iobus.master[6] 738 739[system.tsunami.fb] 740type=BadDevice | 778fake_mem=false 779pio_addr=8804615848944 780pio_latency=100000 781pio_size=8 782ret_bad_addr=false 783ret_data16=65535 784ret_data32=4294967295 785ret_data64=18446744073709551615 786ret_data8=255 787system=system 788update_data=false 789warn_access= 790pio=system.iobus.master[6] 791 792[system.tsunami.fb] 793type=BadDevice |
| 741clock=1000 | 794clk_domain=system.clk_domain |
| 742devicename=FrameBuffer 743pio_addr=8804615848912 744pio_latency=100000 745system=system 746pio=system.iobus.master[21] 747 748[system.tsunami.ide] 749type=IdeController --- 30 unchanged lines hidden (view full) --- 780MinimumGrant=0 781ProgIF=133 782Revision=0 783Status=640 784SubClassCode=1 785SubsystemID=0 786SubsystemVendorID=0 787VendorID=32902 | 795devicename=FrameBuffer 796pio_addr=8804615848912 797pio_latency=100000 798system=system 799pio=system.iobus.master[21] 800 801[system.tsunami.ide] 802type=IdeController --- 30 unchanged lines hidden (view full) --- 833MinimumGrant=0 834ProgIF=133 835Revision=0 836Status=640 837SubClassCode=1 838SubsystemID=0 839SubsystemVendorID=0 840VendorID=32902 |
| 788clock=1000 | 841clk_domain=system.clk_domain |
| 789config_latency=20000 790ctrl_offset=0 791disks=system.disk0 system.disk2 792io_shift=0 793pci_bus=0 794pci_dev=0 795pci_func=0 796pio_latency=30000 797platform=system.tsunami 798system=system 799config=system.iobus.master[26] 800dma=system.iobus.slave[1] 801pio=system.iobus.master[25] 802 803[system.tsunami.io] 804type=TsunamiIO | 842config_latency=20000 843ctrl_offset=0 844disks=system.disk0 system.disk2 845io_shift=0 846pci_bus=0 847pci_dev=0 848pci_func=0 849pio_latency=30000 850platform=system.tsunami 851system=system 852config=system.iobus.master[26] 853dma=system.iobus.slave[1] 854pio=system.iobus.master[25] 855 856[system.tsunami.io] 857type=TsunamiIO |
| 805clock=1000 | 858clk_domain=system.clk_domain |
| 806frequency=976562500 807pio_addr=8804615847936 808pio_latency=100000 809system=system 810time=Thu Jan 1 00:00:00 2009 811tsunami=system.tsunami 812year_is_bcd=false 813pio=system.iobus.master[22] 814 815[system.tsunami.pchip] 816type=TsunamiPChip | 859frequency=976562500 860pio_addr=8804615847936 861pio_latency=100000 862system=system 863time=Thu Jan 1 00:00:00 2009 864tsunami=system.tsunami 865year_is_bcd=false 866pio=system.iobus.master[22] 867 868[system.tsunami.pchip] 869type=TsunamiPChip |
| 817clock=1000 | 870clk_domain=system.clk_domain |
| 818pio_addr=8802535473152 819pio_latency=100000 820system=system 821tsunami=system.tsunami 822pio=system.iobus.master[1] 823 824[system.tsunami.pciconfig] 825type=PciConfigAll 826bus=0 | 871pio_addr=8802535473152 872pio_latency=100000 873system=system 874tsunami=system.tsunami 875pio=system.iobus.master[1] 876 877[system.tsunami.pciconfig] 878type=PciConfigAll 879bus=0 |
| 827clock=1000 | 880clk_domain=system.clk_domain 881pio_addr=0 |
| 828pio_latency=30000 829platform=system.tsunami 830size=16777216 831system=system 832pio=system.iobus.default 833 834[system.tsunami.uart] 835type=Uart8250 | 882pio_latency=30000 883platform=system.tsunami 884size=16777216 885system=system 886pio=system.iobus.default 887 888[system.tsunami.uart] 889type=Uart8250 |
| 836clock=1000 | 890clk_domain=system.clk_domain |
| 837pio_addr=8804615848952 838pio_latency=100000 839platform=system.tsunami 840system=system 841terminal=system.terminal 842pio=system.iobus.master[23] 843 | 891pio_addr=8804615848952 892pio_latency=100000 893platform=system.tsunami 894system=system 895terminal=system.terminal 896pio=system.iobus.master[23] 897 |
| 898[system.voltage_domain] 899type=VoltageDomain 900voltage=1.000000 901 |
|