| config.ini (9055:38f1926fb599) | config.ini (9096:8971a998190a) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 172 unchanged lines hidden (view full) --- 181sys=system 182 183[system.iobus] 184type=NoncoherentBus 185block_size=64 186clock=1000 187header_cycles=1 188use_default_range=true | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 172 unchanged lines hidden (view full) --- 181sys=system 182 183[system.iobus] 184type=NoncoherentBus 185block_size=64 186clock=1000 187header_cycles=1 188use_default_range=true |
| 189width=64 | 189width=8 |
| 190default=system.tsunami.pciconfig.pio 191master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 192slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 193 194[system.iocache] 195type=BaseCache 196addr_ranges=0:8589934591 197assoc=8 --- 45 unchanged lines hidden (view full) --- 243 244[system.membus] 245type=CoherentBus 246children=badaddr_responder 247block_size=64 248clock=1000 249header_cycles=1 250use_default_range=false | 190default=system.tsunami.pciconfig.pio 191master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 192slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 193 194[system.iocache] 195type=BaseCache 196addr_ranges=0:8589934591 197assoc=8 --- 45 unchanged lines hidden (view full) --- 243 244[system.membus] 245type=CoherentBus 246children=badaddr_responder 247block_size=64 248clock=1000 249header_cycles=1 250use_default_range=false |
| 251width=64 | 251width=8 |
| 252default=system.membus.badaddr_responder.pio 253master=system.bridge.slave system.physmem.port[0] 254slave=system.system_port system.iocache.mem_side system.l2c.mem_side 255 256[system.membus.badaddr_responder] 257type=IsaFake 258fake_mem=false 259pio_addr=0 --- 40 unchanged lines hidden (view full) --- 300port=3456 301 302[system.toL2Bus] 303type=CoherentBus 304block_size=64 305clock=1000 306header_cycles=1 307use_default_range=false | 252default=system.membus.badaddr_responder.pio 253master=system.bridge.slave system.physmem.port[0] 254slave=system.system_port system.iocache.mem_side system.l2c.mem_side 255 256[system.membus.badaddr_responder] 257type=IsaFake 258fake_mem=false 259pio_addr=0 --- 40 unchanged lines hidden (view full) --- 300port=3456 301 302[system.toL2Bus] 303type=CoherentBus 304block_size=64 305clock=1000 306header_cycles=1 307use_default_range=false |
| 308width=64 | 308width=8 |
| 309master=system.l2c.cpu_side 310slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 311 312[system.tsunami] 313type=Tsunami 314children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 315intrctrl=system.intrctrl 316system=system --- 496 unchanged lines hidden --- | 309master=system.l2c.cpu_side 310slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 311 312[system.tsunami] 313type=Tsunami 314children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 315intrctrl=system.intrctrl 316system=system --- 496 unchanged lines hidden --- |