| config.ini (8835:7c68f84d7c4e) | config.ini (8983:8800b05e1cb3) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 5 unchanged lines hidden (view full) --- 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=timing 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 5 unchanged lines hidden (view full) --- 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=timing 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal |
| 22physmem=system.physmem | |
| 23readfile=tests/halt.sh 24symbolfile= 25system_rev=1024 26system_type=34 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1 | 22readfile=tests/halt.sh 23symbolfile= 24system_rev=1024 25system_type=34 26work_begin_ckpt_count=0 27work_begin_cpu_id_exit=-1 28work_begin_exit_count=0 29work_cpus_ckpt_count=0 30work_end_ckpt_count=0 31work_end_exit_count=0 32work_item_id=-1 |
| 34system_port=system.membus.port[2] | 33system_port=system.membus.slave[0] |
| 35 36[system.bridge] 37type=Bridge 38delay=50000 39nack_delay=4000 40ranges=8796093022208:18446744073709551615 41req_size=16 42resp_size=16 43write_ack=false | 34 35[system.bridge] 36type=Bridge 37delay=50000 38nack_delay=4000 39ranges=8796093022208:18446744073709551615 40req_size=16 41resp_size=16 42write_ack=false |
| 44master=system.iobus.port[0] 45slave=system.membus.port[0] | 43master=system.iobus.slave[0] 44slave=system.membus.master[0] |
| 46 47[system.cpu] 48type=TimingSimpleCPU 49children=dcache dtb icache interrupts itb tracer 50checker=Null 51clock=500 52cpu_id=0 53defer_registration=false --- 16 unchanged lines hidden (view full) --- 70system=system 71tracer=system.cpu.tracer 72workload= 73dcache_port=system.cpu.dcache.cpu_side 74icache_port=system.cpu.icache.cpu_side 75 76[system.cpu.dcache] 77type=BaseCache | 45 46[system.cpu] 47type=TimingSimpleCPU 48children=dcache dtb icache interrupts itb tracer 49checker=Null 50clock=500 51cpu_id=0 52defer_registration=false --- 16 unchanged lines hidden (view full) --- 69system=system 70tracer=system.cpu.tracer 71workload= 72dcache_port=system.cpu.dcache.cpu_side 73icache_port=system.cpu.icache.cpu_side 74 75[system.cpu.dcache] 76type=BaseCache |
| 78addr_range=0:18446744073709551615 | 77addr_ranges=0:18446744073709551615 |
| 79assoc=4 80block_size=64 81forward_snoops=true 82hash_delay=1 83is_top_level=true 84latency=1000 85max_miss_count=0 86mshrs=4 --- 4 unchanged lines hidden (view full) --- 91size=32768 92subblock_size=0 93system=system 94tgts_per_mshr=8 95trace_addr=0 96two_queue=false 97write_buffers=8 98cpu_side=system.cpu.dcache_port | 78assoc=4 79block_size=64 80forward_snoops=true 81hash_delay=1 82is_top_level=true 83latency=1000 84max_miss_count=0 85mshrs=4 --- 4 unchanged lines hidden (view full) --- 90size=32768 91subblock_size=0 92system=system 93tgts_per_mshr=8 94trace_addr=0 95two_queue=false 96write_buffers=8 97cpu_side=system.cpu.dcache_port |
| 99mem_side=system.toL2Bus.port[2] | 98mem_side=system.toL2Bus.slave[1] |
| 100 101[system.cpu.dtb] 102type=AlphaTLB 103size=64 104 105[system.cpu.icache] 106type=BaseCache | 99 100[system.cpu.dtb] 101type=AlphaTLB 102size=64 103 104[system.cpu.icache] 105type=BaseCache |
| 107addr_range=0:18446744073709551615 | 106addr_ranges=0:18446744073709551615 |
| 108assoc=1 109block_size=64 110forward_snoops=true 111hash_delay=1 112is_top_level=true 113latency=1000 114max_miss_count=0 115mshrs=4 --- 4 unchanged lines hidden (view full) --- 120size=32768 121subblock_size=0 122system=system 123tgts_per_mshr=8 124trace_addr=0 125two_queue=false 126write_buffers=8 127cpu_side=system.cpu.icache_port | 107assoc=1 108block_size=64 109forward_snoops=true 110hash_delay=1 111is_top_level=true 112latency=1000 113max_miss_count=0 114mshrs=4 --- 4 unchanged lines hidden (view full) --- 119size=32768 120subblock_size=0 121system=system 122tgts_per_mshr=8 123trace_addr=0 124two_queue=false 125write_buffers=8 126cpu_side=system.cpu.icache_port |
| 128mem_side=system.toL2Bus.port[1] | 127mem_side=system.toL2Bus.slave[0] |
| 129 130[system.cpu.interrupts] 131type=AlphaInterrupts 132 133[system.cpu.itb] 134type=AlphaTLB 135size=48 136 --- 48 unchanged lines hidden (view full) --- 185type=Bus 186block_size=64 187bus_id=0 188clock=1000 189header_cycles=1 190use_default_range=true 191width=64 192default=system.tsunami.pciconfig.pio | 128 129[system.cpu.interrupts] 130type=AlphaInterrupts 131 132[system.cpu.itb] 133type=AlphaTLB 134size=48 135 --- 48 unchanged lines hidden (view full) --- 184type=Bus 185block_size=64 186bus_id=0 187clock=1000 188header_cycles=1 189use_default_range=true 190width=64 191default=system.tsunami.pciconfig.pio |
| 193port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side | 192master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 193slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma |
| 194 195[system.iocache] 196type=BaseCache | 194 195[system.iocache] 196type=BaseCache |
| 197addr_range=0:8589934591 | 197addr_ranges=0:8589934591 |
| 198assoc=8 199block_size=64 200forward_snoops=false 201hash_delay=1 202is_top_level=true 203latency=50000 204max_miss_count=0 205mshrs=20 206prefetch_on_access=false 207prefetcher=Null 208prioritizeRequests=false 209repl=Null 210size=1024 211subblock_size=0 212system=system 213tgts_per_mshr=12 214trace_addr=0 215two_queue=false 216write_buffers=8 | 198assoc=8 199block_size=64 200forward_snoops=false 201hash_delay=1 202is_top_level=true 203latency=50000 204max_miss_count=0 205mshrs=20 206prefetch_on_access=false 207prefetcher=Null 208prioritizeRequests=false 209repl=Null 210size=1024 211subblock_size=0 212system=system 213tgts_per_mshr=12 214trace_addr=0 215two_queue=false 216write_buffers=8 |
| 217cpu_side=system.iobus.port[32] 218mem_side=system.membus.port[3] | 217cpu_side=system.iobus.master[29] 218mem_side=system.membus.slave[1] |
| 219 220[system.l2c] 221type=BaseCache | 219 220[system.l2c] 221type=BaseCache |
| 222addr_range=0:18446744073709551615 | 222addr_ranges=0:18446744073709551615 |
| 223assoc=8 224block_size=64 225forward_snoops=true 226hash_delay=1 227is_top_level=false 228latency=10000 229max_miss_count=0 230mshrs=92 231prefetch_on_access=false 232prefetcher=Null 233prioritizeRequests=false 234repl=Null 235size=4194304 236subblock_size=0 237system=system 238tgts_per_mshr=16 239trace_addr=0 240two_queue=false 241write_buffers=8 | 223assoc=8 224block_size=64 225forward_snoops=true 226hash_delay=1 227is_top_level=false 228latency=10000 229max_miss_count=0 230mshrs=92 231prefetch_on_access=false 232prefetcher=Null 233prioritizeRequests=false 234repl=Null 235size=4194304 236subblock_size=0 237system=system 238tgts_per_mshr=16 239trace_addr=0 240two_queue=false 241write_buffers=8 |
| 242cpu_side=system.toL2Bus.port[0] 243mem_side=system.membus.port[4] | 242cpu_side=system.toL2Bus.master[0] 243mem_side=system.membus.slave[2] |
| 244 245[system.membus] 246type=Bus 247children=badaddr_responder 248block_size=64 249bus_id=1 250clock=1000 251header_cycles=1 252use_default_range=false 253width=64 254default=system.membus.badaddr_responder.pio | 244 245[system.membus] 246type=Bus 247children=badaddr_responder 248block_size=64 249bus_id=1 250clock=1000 251header_cycles=1 252use_default_range=false 253width=64 254default=system.membus.badaddr_responder.pio |
| 255port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side | 255master=system.bridge.slave system.physmem.port[0] 256slave=system.system_port system.iocache.mem_side system.l2c.mem_side |
| 256 257[system.membus.badaddr_responder] 258type=IsaFake 259fake_mem=false 260pio_addr=0 261pio_latency=1000 262pio_size=8 263ret_bad_addr=true 264ret_data16=65535 265ret_data32=4294967295 266ret_data64=18446744073709551615 267ret_data8=255 268system=system 269update_data=false 270warn_access= 271pio=system.membus.default 272 273[system.physmem] | 257 258[system.membus.badaddr_responder] 259type=IsaFake 260fake_mem=false 261pio_addr=0 262pio_latency=1000 263pio_size=8 264ret_bad_addr=true 265ret_data16=65535 266ret_data32=4294967295 267ret_data64=18446744073709551615 268ret_data8=255 269system=system 270update_data=false 271warn_access= 272pio=system.membus.default 273 274[system.physmem] |
| 274type=PhysicalMemory | 275type=SimpleMemory 276conf_table_reported=false |
| 275file= | 277file= |
| 278in_addr_map=true |
|
| 276latency=30000 277latency_var=0 278null=false 279range=0:134217727 280zero=false | 279latency=30000 280latency_var=0 281null=false 282range=0:134217727 283zero=false |
| 281port=system.membus.port[1] | 284port=system.membus.master[1] |
| 282 283[system.simple_disk] 284type=SimpleDisk 285children=disk 286disk=system.simple_disk.disk 287system=system 288 289[system.simple_disk.disk] --- 11 unchanged lines hidden (view full) --- 301[system.toL2Bus] 302type=Bus 303block_size=64 304bus_id=0 305clock=1000 306header_cycles=1 307use_default_range=false 308width=64 | 285 286[system.simple_disk] 287type=SimpleDisk 288children=disk 289disk=system.simple_disk.disk 290system=system 291 292[system.simple_disk.disk] --- 11 unchanged lines hidden (view full) --- 304[system.toL2Bus] 305type=Bus 306block_size=64 307bus_id=0 308clock=1000 309header_cycles=1 310use_default_range=false 311width=64 |
| 309port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side | 312master=system.l2c.cpu_side 313slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side |
| 310 311[system.tsunami] 312type=Tsunami 313children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 314intrctrl=system.intrctrl 315system=system 316 317[system.tsunami.backdoor] 318type=AlphaBackdoor 319cpu=system.cpu 320disk=system.simple_disk 321pio_addr=8804682956800 322pio_latency=1000 323platform=system.tsunami 324system=system 325terminal=system.terminal | 314 315[system.tsunami] 316type=Tsunami 317children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 318intrctrl=system.intrctrl 319system=system 320 321[system.tsunami.backdoor] 322type=AlphaBackdoor 323cpu=system.cpu 324disk=system.simple_disk 325pio_addr=8804682956800 326pio_latency=1000 327platform=system.tsunami 328system=system 329terminal=system.terminal |
| 326pio=system.iobus.port[25] | 330pio=system.iobus.master[24] |
| 327 328[system.tsunami.cchip] 329type=TsunamiCChip 330pio_addr=8803072344064 331pio_latency=1000 332system=system 333tsunami=system.tsunami | 331 332[system.tsunami.cchip] 333type=TsunamiCChip 334pio_addr=8803072344064 335pio_latency=1000 336system=system 337tsunami=system.tsunami |
| 334pio=system.iobus.port[1] | 338pio=system.iobus.master[0] |
| 335 336[system.tsunami.ethernet] 337type=NSGigE 338BAR0=1 339BAR0LegacyIO=false 340BAR0Size=256 341BAR1=0 342BAR1LegacyIO=false --- 52 unchanged lines hidden (view full) --- 395rx_delay=1000000 396rx_fifo_size=524288 397rx_filter=true 398rx_thread=false 399system=system 400tx_delay=1000000 401tx_fifo_size=524288 402tx_thread=false | 339 340[system.tsunami.ethernet] 341type=NSGigE 342BAR0=1 343BAR0LegacyIO=false 344BAR0Size=256 345BAR1=0 346BAR1LegacyIO=false --- 52 unchanged lines hidden (view full) --- 399rx_delay=1000000 400rx_fifo_size=524288 401rx_filter=true 402rx_thread=false 403system=system 404tx_delay=1000000 405tx_fifo_size=524288 406tx_thread=false |
| 403config=system.iobus.port[30] 404dma=system.iobus.port[31] 405pio=system.iobus.port[29] | 407config=system.iobus.master[28] 408dma=system.iobus.slave[2] 409pio=system.iobus.master[27] |
| 406 407[system.tsunami.fake_OROM] 408type=IsaFake 409fake_mem=false 410pio_addr=8796093677568 411pio_latency=1000 412pio_size=393216 413ret_bad_addr=false 414ret_data16=65535 415ret_data32=4294967295 416ret_data64=18446744073709551615 417ret_data8=255 418system=system 419update_data=false 420warn_access= | 410 411[system.tsunami.fake_OROM] 412type=IsaFake 413fake_mem=false 414pio_addr=8796093677568 415pio_latency=1000 416pio_size=393216 417ret_bad_addr=false 418ret_data16=65535 419ret_data32=4294967295 420ret_data64=18446744073709551615 421ret_data8=255 422system=system 423update_data=false 424warn_access= |
| 421pio=system.iobus.port[9] | 425pio=system.iobus.master[8] |
| 422 423[system.tsunami.fake_ata0] 424type=IsaFake 425fake_mem=false 426pio_addr=8804615848432 427pio_latency=1000 428pio_size=8 429ret_bad_addr=false 430ret_data16=65535 431ret_data32=4294967295 432ret_data64=18446744073709551615 433ret_data8=255 434system=system 435update_data=false 436warn_access= | 426 427[system.tsunami.fake_ata0] 428type=IsaFake 429fake_mem=false 430pio_addr=8804615848432 431pio_latency=1000 432pio_size=8 433ret_bad_addr=false 434ret_data16=65535 435ret_data32=4294967295 436ret_data64=18446744073709551615 437ret_data8=255 438system=system 439update_data=false 440warn_access= |
| 437pio=system.iobus.port[20] | 441pio=system.iobus.master[19] |
| 438 439[system.tsunami.fake_ata1] 440type=IsaFake 441fake_mem=false 442pio_addr=8804615848304 443pio_latency=1000 444pio_size=8 445ret_bad_addr=false 446ret_data16=65535 447ret_data32=4294967295 448ret_data64=18446744073709551615 449ret_data8=255 450system=system 451update_data=false 452warn_access= | 442 443[system.tsunami.fake_ata1] 444type=IsaFake 445fake_mem=false 446pio_addr=8804615848304 447pio_latency=1000 448pio_size=8 449ret_bad_addr=false 450ret_data16=65535 451ret_data32=4294967295 452ret_data64=18446744073709551615 453ret_data8=255 454system=system 455update_data=false 456warn_access= |
| 453pio=system.iobus.port[21] | 457pio=system.iobus.master[20] |
| 454 455[system.tsunami.fake_pnp_addr] 456type=IsaFake 457fake_mem=false 458pio_addr=8804615848569 459pio_latency=1000 460pio_size=8 461ret_bad_addr=false 462ret_data16=65535 463ret_data32=4294967295 464ret_data64=18446744073709551615 465ret_data8=255 466system=system 467update_data=false 468warn_access= | 458 459[system.tsunami.fake_pnp_addr] 460type=IsaFake 461fake_mem=false 462pio_addr=8804615848569 463pio_latency=1000 464pio_size=8 465ret_bad_addr=false 466ret_data16=65535 467ret_data32=4294967295 468ret_data64=18446744073709551615 469ret_data8=255 470system=system 471update_data=false 472warn_access= |
| 469pio=system.iobus.port[10] | 473pio=system.iobus.master[9] |
| 470 471[system.tsunami.fake_pnp_read0] 472type=IsaFake 473fake_mem=false 474pio_addr=8804615848451 475pio_latency=1000 476pio_size=8 477ret_bad_addr=false 478ret_data16=65535 479ret_data32=4294967295 480ret_data64=18446744073709551615 481ret_data8=255 482system=system 483update_data=false 484warn_access= | 474 475[system.tsunami.fake_pnp_read0] 476type=IsaFake 477fake_mem=false 478pio_addr=8804615848451 479pio_latency=1000 480pio_size=8 481ret_bad_addr=false 482ret_data16=65535 483ret_data32=4294967295 484ret_data64=18446744073709551615 485ret_data8=255 486system=system 487update_data=false 488warn_access= |
| 485pio=system.iobus.port[12] | 489pio=system.iobus.master[11] |
| 486 487[system.tsunami.fake_pnp_read1] 488type=IsaFake 489fake_mem=false 490pio_addr=8804615848515 491pio_latency=1000 492pio_size=8 493ret_bad_addr=false 494ret_data16=65535 495ret_data32=4294967295 496ret_data64=18446744073709551615 497ret_data8=255 498system=system 499update_data=false 500warn_access= | 490 491[system.tsunami.fake_pnp_read1] 492type=IsaFake 493fake_mem=false 494pio_addr=8804615848515 495pio_latency=1000 496pio_size=8 497ret_bad_addr=false 498ret_data16=65535 499ret_data32=4294967295 500ret_data64=18446744073709551615 501ret_data8=255 502system=system 503update_data=false 504warn_access= |
| 501pio=system.iobus.port[13] | 505pio=system.iobus.master[12] |
| 502 503[system.tsunami.fake_pnp_read2] 504type=IsaFake 505fake_mem=false 506pio_addr=8804615848579 507pio_latency=1000 508pio_size=8 509ret_bad_addr=false 510ret_data16=65535 511ret_data32=4294967295 512ret_data64=18446744073709551615 513ret_data8=255 514system=system 515update_data=false 516warn_access= | 506 507[system.tsunami.fake_pnp_read2] 508type=IsaFake 509fake_mem=false 510pio_addr=8804615848579 511pio_latency=1000 512pio_size=8 513ret_bad_addr=false 514ret_data16=65535 515ret_data32=4294967295 516ret_data64=18446744073709551615 517ret_data8=255 518system=system 519update_data=false 520warn_access= |
| 517pio=system.iobus.port[14] | 521pio=system.iobus.master[13] |
| 518 519[system.tsunami.fake_pnp_read3] 520type=IsaFake 521fake_mem=false 522pio_addr=8804615848643 523pio_latency=1000 524pio_size=8 525ret_bad_addr=false 526ret_data16=65535 527ret_data32=4294967295 528ret_data64=18446744073709551615 529ret_data8=255 530system=system 531update_data=false 532warn_access= | 522 523[system.tsunami.fake_pnp_read3] 524type=IsaFake 525fake_mem=false 526pio_addr=8804615848643 527pio_latency=1000 528pio_size=8 529ret_bad_addr=false 530ret_data16=65535 531ret_data32=4294967295 532ret_data64=18446744073709551615 533ret_data8=255 534system=system 535update_data=false 536warn_access= |
| 533pio=system.iobus.port[15] | 537pio=system.iobus.master[14] |
| 534 535[system.tsunami.fake_pnp_read4] 536type=IsaFake 537fake_mem=false 538pio_addr=8804615848707 539pio_latency=1000 540pio_size=8 541ret_bad_addr=false 542ret_data16=65535 543ret_data32=4294967295 544ret_data64=18446744073709551615 545ret_data8=255 546system=system 547update_data=false 548warn_access= | 538 539[system.tsunami.fake_pnp_read4] 540type=IsaFake 541fake_mem=false 542pio_addr=8804615848707 543pio_latency=1000 544pio_size=8 545ret_bad_addr=false 546ret_data16=65535 547ret_data32=4294967295 548ret_data64=18446744073709551615 549ret_data8=255 550system=system 551update_data=false 552warn_access= |
| 549pio=system.iobus.port[16] | 553pio=system.iobus.master[15] |
| 550 551[system.tsunami.fake_pnp_read5] 552type=IsaFake 553fake_mem=false 554pio_addr=8804615848771 555pio_latency=1000 556pio_size=8 557ret_bad_addr=false 558ret_data16=65535 559ret_data32=4294967295 560ret_data64=18446744073709551615 561ret_data8=255 562system=system 563update_data=false 564warn_access= | 554 555[system.tsunami.fake_pnp_read5] 556type=IsaFake 557fake_mem=false 558pio_addr=8804615848771 559pio_latency=1000 560pio_size=8 561ret_bad_addr=false 562ret_data16=65535 563ret_data32=4294967295 564ret_data64=18446744073709551615 565ret_data8=255 566system=system 567update_data=false 568warn_access= |
| 565pio=system.iobus.port[17] | 569pio=system.iobus.master[16] |
| 566 567[system.tsunami.fake_pnp_read6] 568type=IsaFake 569fake_mem=false 570pio_addr=8804615848835 571pio_latency=1000 572pio_size=8 573ret_bad_addr=false 574ret_data16=65535 575ret_data32=4294967295 576ret_data64=18446744073709551615 577ret_data8=255 578system=system 579update_data=false 580warn_access= | 570 571[system.tsunami.fake_pnp_read6] 572type=IsaFake 573fake_mem=false 574pio_addr=8804615848835 575pio_latency=1000 576pio_size=8 577ret_bad_addr=false 578ret_data16=65535 579ret_data32=4294967295 580ret_data64=18446744073709551615 581ret_data8=255 582system=system 583update_data=false 584warn_access= |
| 581pio=system.iobus.port[18] | 585pio=system.iobus.master[17] |
| 582 583[system.tsunami.fake_pnp_read7] 584type=IsaFake 585fake_mem=false 586pio_addr=8804615848899 587pio_latency=1000 588pio_size=8 589ret_bad_addr=false 590ret_data16=65535 591ret_data32=4294967295 592ret_data64=18446744073709551615 593ret_data8=255 594system=system 595update_data=false 596warn_access= | 586 587[system.tsunami.fake_pnp_read7] 588type=IsaFake 589fake_mem=false 590pio_addr=8804615848899 591pio_latency=1000 592pio_size=8 593ret_bad_addr=false 594ret_data16=65535 595ret_data32=4294967295 596ret_data64=18446744073709551615 597ret_data8=255 598system=system 599update_data=false 600warn_access= |
| 597pio=system.iobus.port[19] | 601pio=system.iobus.master[18] |
| 598 599[system.tsunami.fake_pnp_write] 600type=IsaFake 601fake_mem=false 602pio_addr=8804615850617 603pio_latency=1000 604pio_size=8 605ret_bad_addr=false 606ret_data16=65535 607ret_data32=4294967295 608ret_data64=18446744073709551615 609ret_data8=255 610system=system 611update_data=false 612warn_access= | 602 603[system.tsunami.fake_pnp_write] 604type=IsaFake 605fake_mem=false 606pio_addr=8804615850617 607pio_latency=1000 608pio_size=8 609ret_bad_addr=false 610ret_data16=65535 611ret_data32=4294967295 612ret_data64=18446744073709551615 613ret_data8=255 614system=system 615update_data=false 616warn_access= |
| 613pio=system.iobus.port[11] | 617pio=system.iobus.master[10] |
| 614 615[system.tsunami.fake_ppc] 616type=IsaFake 617fake_mem=false 618pio_addr=8804615848891 619pio_latency=1000 620pio_size=8 621ret_bad_addr=false 622ret_data16=65535 623ret_data32=4294967295 624ret_data64=18446744073709551615 625ret_data8=255 626system=system 627update_data=false 628warn_access= | 618 619[system.tsunami.fake_ppc] 620type=IsaFake 621fake_mem=false 622pio_addr=8804615848891 623pio_latency=1000 624pio_size=8 625ret_bad_addr=false 626ret_data16=65535 627ret_data32=4294967295 628ret_data64=18446744073709551615 629ret_data8=255 630system=system 631update_data=false 632warn_access= |
| 629pio=system.iobus.port[8] | 633pio=system.iobus.master[7] |
| 630 631[system.tsunami.fake_sm_chip] 632type=IsaFake 633fake_mem=false 634pio_addr=8804615848816 635pio_latency=1000 636pio_size=8 637ret_bad_addr=false 638ret_data16=65535 639ret_data32=4294967295 640ret_data64=18446744073709551615 641ret_data8=255 642system=system 643update_data=false 644warn_access= | 634 635[system.tsunami.fake_sm_chip] 636type=IsaFake 637fake_mem=false 638pio_addr=8804615848816 639pio_latency=1000 640pio_size=8 641ret_bad_addr=false 642ret_data16=65535 643ret_data32=4294967295 644ret_data64=18446744073709551615 645ret_data8=255 646system=system 647update_data=false 648warn_access= |
| 645pio=system.iobus.port[3] | 649pio=system.iobus.master[2] |
| 646 647[system.tsunami.fake_uart1] 648type=IsaFake 649fake_mem=false 650pio_addr=8804615848696 651pio_latency=1000 652pio_size=8 653ret_bad_addr=false 654ret_data16=65535 655ret_data32=4294967295 656ret_data64=18446744073709551615 657ret_data8=255 658system=system 659update_data=false 660warn_access= | 650 651[system.tsunami.fake_uart1] 652type=IsaFake 653fake_mem=false 654pio_addr=8804615848696 655pio_latency=1000 656pio_size=8 657ret_bad_addr=false 658ret_data16=65535 659ret_data32=4294967295 660ret_data64=18446744073709551615 661ret_data8=255 662system=system 663update_data=false 664warn_access= |
| 661pio=system.iobus.port[4] | 665pio=system.iobus.master[3] |
| 662 663[system.tsunami.fake_uart2] 664type=IsaFake 665fake_mem=false 666pio_addr=8804615848936 667pio_latency=1000 668pio_size=8 669ret_bad_addr=false 670ret_data16=65535 671ret_data32=4294967295 672ret_data64=18446744073709551615 673ret_data8=255 674system=system 675update_data=false 676warn_access= | 666 667[system.tsunami.fake_uart2] 668type=IsaFake 669fake_mem=false 670pio_addr=8804615848936 671pio_latency=1000 672pio_size=8 673ret_bad_addr=false 674ret_data16=65535 675ret_data32=4294967295 676ret_data64=18446744073709551615 677ret_data8=255 678system=system 679update_data=false 680warn_access= |
| 677pio=system.iobus.port[5] | 681pio=system.iobus.master[4] |
| 678 679[system.tsunami.fake_uart3] 680type=IsaFake 681fake_mem=false 682pio_addr=8804615848680 683pio_latency=1000 684pio_size=8 685ret_bad_addr=false 686ret_data16=65535 687ret_data32=4294967295 688ret_data64=18446744073709551615 689ret_data8=255 690system=system 691update_data=false 692warn_access= | 682 683[system.tsunami.fake_uart3] 684type=IsaFake 685fake_mem=false 686pio_addr=8804615848680 687pio_latency=1000 688pio_size=8 689ret_bad_addr=false 690ret_data16=65535 691ret_data32=4294967295 692ret_data64=18446744073709551615 693ret_data8=255 694system=system 695update_data=false 696warn_access= |
| 693pio=system.iobus.port[6] | 697pio=system.iobus.master[5] |
| 694 695[system.tsunami.fake_uart4] 696type=IsaFake 697fake_mem=false 698pio_addr=8804615848944 699pio_latency=1000 700pio_size=8 701ret_bad_addr=false 702ret_data16=65535 703ret_data32=4294967295 704ret_data64=18446744073709551615 705ret_data8=255 706system=system 707update_data=false 708warn_access= | 698 699[system.tsunami.fake_uart4] 700type=IsaFake 701fake_mem=false 702pio_addr=8804615848944 703pio_latency=1000 704pio_size=8 705ret_bad_addr=false 706ret_data16=65535 707ret_data32=4294967295 708ret_data64=18446744073709551615 709ret_data8=255 710system=system 711update_data=false 712warn_access= |
| 709pio=system.iobus.port[7] | 713pio=system.iobus.master[6] |
| 710 711[system.tsunami.fb] 712type=BadDevice 713devicename=FrameBuffer 714pio_addr=8804615848912 715pio_latency=1000 716system=system | 714 715[system.tsunami.fb] 716type=BadDevice 717devicename=FrameBuffer 718pio_addr=8804615848912 719pio_latency=1000 720system=system |
| 717pio=system.iobus.port[22] | 721pio=system.iobus.master[21] |
| 718 719[system.tsunami.ide] 720type=IdeController 721BAR0=1 722BAR0LegacyIO=false 723BAR0Size=8 724BAR1=1 725BAR1LegacyIO=false --- 37 unchanged lines hidden (view full) --- 763max_backoff_delay=10000000 764min_backoff_delay=4000 765pci_bus=0 766pci_dev=0 767pci_func=0 768pio_latency=1000 769platform=system.tsunami 770system=system | 722 723[system.tsunami.ide] 724type=IdeController 725BAR0=1 726BAR0LegacyIO=false 727BAR0Size=8 728BAR1=1 729BAR1LegacyIO=false --- 37 unchanged lines hidden (view full) --- 767max_backoff_delay=10000000 768min_backoff_delay=4000 769pci_bus=0 770pci_dev=0 771pci_func=0 772pio_latency=1000 773platform=system.tsunami 774system=system |
| 771config=system.iobus.port[27] 772dma=system.iobus.port[28] 773pio=system.iobus.port[26] | 775config=system.iobus.master[26] 776dma=system.iobus.slave[1] 777pio=system.iobus.master[25] |
| 774 775[system.tsunami.io] 776type=TsunamiIO 777frequency=976562500 778pio_addr=8804615847936 779pio_latency=1000 780system=system 781time=Thu Jan 1 00:00:00 2009 782tsunami=system.tsunami 783year_is_bcd=false | 778 779[system.tsunami.io] 780type=TsunamiIO 781frequency=976562500 782pio_addr=8804615847936 783pio_latency=1000 784system=system 785time=Thu Jan 1 00:00:00 2009 786tsunami=system.tsunami 787year_is_bcd=false |
| 784pio=system.iobus.port[23] | 788pio=system.iobus.master[22] |
| 785 786[system.tsunami.pchip] 787type=TsunamiPChip 788pio_addr=8802535473152 789pio_latency=1000 790system=system 791tsunami=system.tsunami | 789 790[system.tsunami.pchip] 791type=TsunamiPChip 792pio_addr=8802535473152 793pio_latency=1000 794system=system 795tsunami=system.tsunami |
| 792pio=system.iobus.port[2] | 796pio=system.iobus.master[1] |
| 793 794[system.tsunami.pciconfig] 795type=PciConfigAll 796bus=0 797pio_latency=1 798platform=system.tsunami 799size=16777216 800system=system 801pio=system.iobus.default 802 803[system.tsunami.uart] 804type=Uart8250 805pio_addr=8804615848952 806pio_latency=1000 807platform=system.tsunami 808system=system 809terminal=system.terminal | 797 798[system.tsunami.pciconfig] 799type=PciConfigAll 800bus=0 801pio_latency=1 802platform=system.tsunami 803size=16777216 804system=system 805pio=system.iobus.default 806 807[system.tsunami.uart] 808type=Uart8250 809pio_addr=8804615848952 810pio_latency=1000 811platform=system.tsunami 812system=system 813terminal=system.terminal |
| 810pio=system.iobus.port[24] | 814pio=system.iobus.master[23] |
| 811 | 815 |