1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxAlphaSystem
13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
14boot_cpu_frequency=500
15boot_osflags=root=/dev/hda1 console=ttyS0
16cache_line_size=64
17clk_domain=system.clk_domain
18console=/arm/projectscratch/randd/systems/dist/binaries/console
19default_p_state=UNDEFINED
20eventq_index=0
21exit_on_work_items=false
22init_param=0
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
24kernel_addr_check=true
25load_addr_mask=1099511627775
26load_offset=0
27mem_mode=timing
| 1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxAlphaSystem
13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain
14boot_cpu_frequency=500
15boot_osflags=root=/dev/hda1 console=ttyS0
16cache_line_size=64
17clk_domain=system.clk_domain
18console=/arm/projectscratch/randd/systems/dist/binaries/console
19default_p_state=UNDEFINED
20eventq_index=0
21exit_on_work_items=false
22init_param=0
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
24kernel_addr_check=true
25load_addr_mask=1099511627775
26load_offset=0
27mem_mode=timing
|
28mem_ranges=0:134217727
| 28mem_ranges=0:134217727:0:0:0:0
|
29memories=system.physmem
30mmap_using_noreserve=false
31multi_thread=false
32num_work_ids=16
33p_state_clk_gate_bins=20
34p_state_clk_gate_max=1000000000000
35p_state_clk_gate_min=1000
36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
37power_model=Null
38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
39symbolfile=
40system_rev=1024
41system_type=34
42thermal_components=
43thermal_model=Null
44work_begin_ckpt_count=0
45work_begin_cpu_id_exit=-1
46work_begin_exit_count=0
47work_cpus_ckpt_count=0
48work_end_ckpt_count=0
49work_end_exit_count=0
50work_item_id=-1
51system_port=system.membus.slave[0]
52
53[system.bridge]
54type=Bridge
55clk_domain=system.clk_domain
56default_p_state=UNDEFINED
57delay=50000
58eventq_index=0
59p_state_clk_gate_bins=20
60p_state_clk_gate_max=1000000000000
61p_state_clk_gate_min=1000
62power_model=Null
| 29memories=system.physmem
30mmap_using_noreserve=false
31multi_thread=false
32num_work_ids=16
33p_state_clk_gate_bins=20
34p_state_clk_gate_max=1000000000000
35p_state_clk_gate_min=1000
36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
37power_model=Null
38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
39symbolfile=
40system_rev=1024
41system_type=34
42thermal_components=
43thermal_model=Null
44work_begin_ckpt_count=0
45work_begin_cpu_id_exit=-1
46work_begin_exit_count=0
47work_cpus_ckpt_count=0
48work_end_ckpt_count=0
49work_end_exit_count=0
50work_item_id=-1
51system_port=system.membus.slave[0]
52
53[system.bridge]
54type=Bridge
55clk_domain=system.clk_domain
56default_p_state=UNDEFINED
57delay=50000
58eventq_index=0
59p_state_clk_gate_bins=20
60p_state_clk_gate_max=1000000000000
61p_state_clk_gate_min=1000
62power_model=Null
|
63ranges=8796093022208:18446744073709551615
| 63ranges=8796093022208:18446744073709551615:0:0:0:0
|
64req_size=16
65resp_size=16
66master=system.iobus.slave[0]
67slave=system.membus.master[0]
68
69[system.clk_domain]
70type=SrcClockDomain
71clock=1000
72domain_id=-1
73eventq_index=0
74init_perf_level=0
75voltage_domain=system.voltage_domain
76
77[system.cpu]
78type=TimingSimpleCPU
79children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer
80branchPred=Null
81checker=Null
82clk_domain=system.cpu_clk_domain
83cpu_id=0
84default_p_state=UNDEFINED
85do_checkpoint_insts=true
86do_quiesce=true
87do_statistics_insts=true
88dtb=system.cpu.dtb
89eventq_index=0
90function_trace=false
91function_trace_start=0
92interrupts=system.cpu.interrupts
93isa=system.cpu.isa
94itb=system.cpu.itb
95max_insts_all_threads=0
96max_insts_any_thread=0
97max_loads_all_threads=0
98max_loads_any_thread=0
99numThreads=1
100p_state_clk_gate_bins=20
101p_state_clk_gate_max=1000000000000
102p_state_clk_gate_min=1000
103power_model=Null
104profile=0
105progress_interval=0
106simpoint_start_insts=
107socket_id=0
108switched_out=false
109system=system
110tracer=system.cpu.tracer
111workload=
112dcache_port=system.cpu.dcache.cpu_side
113icache_port=system.cpu.icache.cpu_side
114
115[system.cpu.dcache]
116type=Cache
117children=tags
| 64req_size=16
65resp_size=16
66master=system.iobus.slave[0]
67slave=system.membus.master[0]
68
69[system.clk_domain]
70type=SrcClockDomain
71clock=1000
72domain_id=-1
73eventq_index=0
74init_perf_level=0
75voltage_domain=system.voltage_domain
76
77[system.cpu]
78type=TimingSimpleCPU
79children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer
80branchPred=Null
81checker=Null
82clk_domain=system.cpu_clk_domain
83cpu_id=0
84default_p_state=UNDEFINED
85do_checkpoint_insts=true
86do_quiesce=true
87do_statistics_insts=true
88dtb=system.cpu.dtb
89eventq_index=0
90function_trace=false
91function_trace_start=0
92interrupts=system.cpu.interrupts
93isa=system.cpu.isa
94itb=system.cpu.itb
95max_insts_all_threads=0
96max_insts_any_thread=0
97max_loads_all_threads=0
98max_loads_any_thread=0
99numThreads=1
100p_state_clk_gate_bins=20
101p_state_clk_gate_max=1000000000000
102p_state_clk_gate_min=1000
103power_model=Null
104profile=0
105progress_interval=0
106simpoint_start_insts=
107socket_id=0
108switched_out=false
109system=system
110tracer=system.cpu.tracer
111workload=
112dcache_port=system.cpu.dcache.cpu_side
113icache_port=system.cpu.icache.cpu_side
114
115[system.cpu.dcache]
116type=Cache
117children=tags
|
118addr_ranges=0:18446744073709551615
| 118addr_ranges=0:18446744073709551615:0:0:0:0
|
119assoc=4
120clk_domain=system.cpu_clk_domain
121clusivity=mostly_incl
122default_p_state=UNDEFINED
123demand_mshr_reserve=1
124eventq_index=0
125hit_latency=2
126is_read_only=false
127max_miss_count=0
128mshrs=4
129p_state_clk_gate_bins=20
130p_state_clk_gate_max=1000000000000
131p_state_clk_gate_min=1000
132power_model=Null
133prefetch_on_access=false
134prefetcher=Null
135response_latency=2
136sequential_access=false
137size=32768
138system=system
139tags=system.cpu.dcache.tags
140tgts_per_mshr=20
141write_buffers=8
142writeback_clean=false
143cpu_side=system.cpu.dcache_port
144mem_side=system.cpu.toL2Bus.slave[1]
145
146[system.cpu.dcache.tags]
147type=LRU
148assoc=4
149block_size=64
150clk_domain=system.cpu_clk_domain
151default_p_state=UNDEFINED
152eventq_index=0
153hit_latency=2
154p_state_clk_gate_bins=20
155p_state_clk_gate_max=1000000000000
156p_state_clk_gate_min=1000
157power_model=Null
158sequential_access=false
159size=32768
160
161[system.cpu.dtb]
162type=AlphaTLB
163eventq_index=0
164size=64
165
166[system.cpu.icache]
167type=Cache
168children=tags
| 119assoc=4
120clk_domain=system.cpu_clk_domain
121clusivity=mostly_incl
122default_p_state=UNDEFINED
123demand_mshr_reserve=1
124eventq_index=0
125hit_latency=2
126is_read_only=false
127max_miss_count=0
128mshrs=4
129p_state_clk_gate_bins=20
130p_state_clk_gate_max=1000000000000
131p_state_clk_gate_min=1000
132power_model=Null
133prefetch_on_access=false
134prefetcher=Null
135response_latency=2
136sequential_access=false
137size=32768
138system=system
139tags=system.cpu.dcache.tags
140tgts_per_mshr=20
141write_buffers=8
142writeback_clean=false
143cpu_side=system.cpu.dcache_port
144mem_side=system.cpu.toL2Bus.slave[1]
145
146[system.cpu.dcache.tags]
147type=LRU
148assoc=4
149block_size=64
150clk_domain=system.cpu_clk_domain
151default_p_state=UNDEFINED
152eventq_index=0
153hit_latency=2
154p_state_clk_gate_bins=20
155p_state_clk_gate_max=1000000000000
156p_state_clk_gate_min=1000
157power_model=Null
158sequential_access=false
159size=32768
160
161[system.cpu.dtb]
162type=AlphaTLB
163eventq_index=0
164size=64
165
166[system.cpu.icache]
167type=Cache
168children=tags
|
169addr_ranges=0:18446744073709551615
| 169addr_ranges=0:18446744073709551615:0:0:0:0
|
170assoc=1
171clk_domain=system.cpu_clk_domain
172clusivity=mostly_incl
173default_p_state=UNDEFINED
174demand_mshr_reserve=1
175eventq_index=0
176hit_latency=2
177is_read_only=true
178max_miss_count=0
179mshrs=4
180p_state_clk_gate_bins=20
181p_state_clk_gate_max=1000000000000
182p_state_clk_gate_min=1000
183power_model=Null
184prefetch_on_access=false
185prefetcher=Null
186response_latency=2
187sequential_access=false
188size=32768
189system=system
190tags=system.cpu.icache.tags
191tgts_per_mshr=20
192write_buffers=8
193writeback_clean=true
194cpu_side=system.cpu.icache_port
195mem_side=system.cpu.toL2Bus.slave[0]
196
197[system.cpu.icache.tags]
198type=LRU
199assoc=1
200block_size=64
201clk_domain=system.cpu_clk_domain
202default_p_state=UNDEFINED
203eventq_index=0
204hit_latency=2
205p_state_clk_gate_bins=20
206p_state_clk_gate_max=1000000000000
207p_state_clk_gate_min=1000
208power_model=Null
209sequential_access=false
210size=32768
211
212[system.cpu.interrupts]
213type=AlphaInterrupts
214eventq_index=0
215
216[system.cpu.isa]
217type=AlphaISA
218eventq_index=0
219system=system
220
221[system.cpu.itb]
222type=AlphaTLB
223eventq_index=0
224size=48
225
226[system.cpu.l2cache]
227type=Cache
228children=tags
| 170assoc=1
171clk_domain=system.cpu_clk_domain
172clusivity=mostly_incl
173default_p_state=UNDEFINED
174demand_mshr_reserve=1
175eventq_index=0
176hit_latency=2
177is_read_only=true
178max_miss_count=0
179mshrs=4
180p_state_clk_gate_bins=20
181p_state_clk_gate_max=1000000000000
182p_state_clk_gate_min=1000
183power_model=Null
184prefetch_on_access=false
185prefetcher=Null
186response_latency=2
187sequential_access=false
188size=32768
189system=system
190tags=system.cpu.icache.tags
191tgts_per_mshr=20
192write_buffers=8
193writeback_clean=true
194cpu_side=system.cpu.icache_port
195mem_side=system.cpu.toL2Bus.slave[0]
196
197[system.cpu.icache.tags]
198type=LRU
199assoc=1
200block_size=64
201clk_domain=system.cpu_clk_domain
202default_p_state=UNDEFINED
203eventq_index=0
204hit_latency=2
205p_state_clk_gate_bins=20
206p_state_clk_gate_max=1000000000000
207p_state_clk_gate_min=1000
208power_model=Null
209sequential_access=false
210size=32768
211
212[system.cpu.interrupts]
213type=AlphaInterrupts
214eventq_index=0
215
216[system.cpu.isa]
217type=AlphaISA
218eventq_index=0
219system=system
220
221[system.cpu.itb]
222type=AlphaTLB
223eventq_index=0
224size=48
225
226[system.cpu.l2cache]
227type=Cache
228children=tags
|
229addr_ranges=0:18446744073709551615
| 229addr_ranges=0:18446744073709551615:0:0:0:0
|
230assoc=8
231clk_domain=system.cpu_clk_domain
232clusivity=mostly_incl
233default_p_state=UNDEFINED
234demand_mshr_reserve=1
235eventq_index=0
236hit_latency=20
237is_read_only=false
238max_miss_count=0
239mshrs=20
240p_state_clk_gate_bins=20
241p_state_clk_gate_max=1000000000000
242p_state_clk_gate_min=1000
243power_model=Null
244prefetch_on_access=false
245prefetcher=Null
246response_latency=20
247sequential_access=false
248size=4194304
249system=system
250tags=system.cpu.l2cache.tags
251tgts_per_mshr=12
252write_buffers=8
253writeback_clean=false
254cpu_side=system.cpu.toL2Bus.master[0]
255mem_side=system.membus.slave[1]
256
257[system.cpu.l2cache.tags]
258type=LRU
259assoc=8
260block_size=64
261clk_domain=system.cpu_clk_domain
262default_p_state=UNDEFINED
263eventq_index=0
264hit_latency=20
265p_state_clk_gate_bins=20
266p_state_clk_gate_max=1000000000000
267p_state_clk_gate_min=1000
268power_model=Null
269sequential_access=false
270size=4194304
271
272[system.cpu.toL2Bus]
273type=CoherentXBar
274children=snoop_filter
275clk_domain=system.cpu_clk_domain
276default_p_state=UNDEFINED
277eventq_index=0
278forward_latency=0
279frontend_latency=1
280p_state_clk_gate_bins=20
281p_state_clk_gate_max=1000000000000
282p_state_clk_gate_min=1000
283point_of_coherency=false
284power_model=Null
285response_latency=1
286snoop_filter=system.cpu.toL2Bus.snoop_filter
287snoop_response_latency=1
288system=system
289use_default_range=false
290width=32
291master=system.cpu.l2cache.cpu_side
292slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
293
294[system.cpu.toL2Bus.snoop_filter]
295type=SnoopFilter
296eventq_index=0
297lookup_latency=0
298max_capacity=8388608
299system=system
300
301[system.cpu.tracer]
302type=ExeTracer
303eventq_index=0
304
305[system.cpu_clk_domain]
306type=SrcClockDomain
307clock=500
308domain_id=-1
309eventq_index=0
310init_perf_level=0
311voltage_domain=system.voltage_domain
312
313[system.disk0]
314type=IdeDisk
315children=image
316delay=1000000
317driveID=master
318eventq_index=0
319image=system.disk0.image
320
321[system.disk0.image]
322type=CowDiskImage
323children=child
324child=system.disk0.image.child
325eventq_index=0
326image_file=
327read_only=false
328table_size=65536
329
330[system.disk0.image.child]
331type=RawDiskImage
332eventq_index=0
333image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
334read_only=true
335
336[system.disk2]
337type=IdeDisk
338children=image
339delay=1000000
340driveID=master
341eventq_index=0
342image=system.disk2.image
343
344[system.disk2.image]
345type=CowDiskImage
346children=child
347child=system.disk2.image.child
348eventq_index=0
349image_file=
350read_only=false
351table_size=65536
352
353[system.disk2.image.child]
354type=RawDiskImage
355eventq_index=0
356image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
357read_only=true
358
359[system.dvfs_handler]
360type=DVFSHandler
361domains=
362enable=false
363eventq_index=0
364sys_clk_domain=system.clk_domain
365transition_latency=100000000
366
367[system.intrctrl]
368type=IntrControl
369eventq_index=0
370sys=system
371
372[system.iobus]
373type=NoncoherentXBar
374clk_domain=system.clk_domain
375default_p_state=UNDEFINED
376eventq_index=0
377forward_latency=1
378frontend_latency=2
379p_state_clk_gate_bins=20
380p_state_clk_gate_max=1000000000000
381p_state_clk_gate_min=1000
382power_model=Null
383response_latency=2
384use_default_range=false
385width=16
386master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
387slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
388
389[system.iocache]
390type=Cache
391children=tags
| 230assoc=8
231clk_domain=system.cpu_clk_domain
232clusivity=mostly_incl
233default_p_state=UNDEFINED
234demand_mshr_reserve=1
235eventq_index=0
236hit_latency=20
237is_read_only=false
238max_miss_count=0
239mshrs=20
240p_state_clk_gate_bins=20
241p_state_clk_gate_max=1000000000000
242p_state_clk_gate_min=1000
243power_model=Null
244prefetch_on_access=false
245prefetcher=Null
246response_latency=20
247sequential_access=false
248size=4194304
249system=system
250tags=system.cpu.l2cache.tags
251tgts_per_mshr=12
252write_buffers=8
253writeback_clean=false
254cpu_side=system.cpu.toL2Bus.master[0]
255mem_side=system.membus.slave[1]
256
257[system.cpu.l2cache.tags]
258type=LRU
259assoc=8
260block_size=64
261clk_domain=system.cpu_clk_domain
262default_p_state=UNDEFINED
263eventq_index=0
264hit_latency=20
265p_state_clk_gate_bins=20
266p_state_clk_gate_max=1000000000000
267p_state_clk_gate_min=1000
268power_model=Null
269sequential_access=false
270size=4194304
271
272[system.cpu.toL2Bus]
273type=CoherentXBar
274children=snoop_filter
275clk_domain=system.cpu_clk_domain
276default_p_state=UNDEFINED
277eventq_index=0
278forward_latency=0
279frontend_latency=1
280p_state_clk_gate_bins=20
281p_state_clk_gate_max=1000000000000
282p_state_clk_gate_min=1000
283point_of_coherency=false
284power_model=Null
285response_latency=1
286snoop_filter=system.cpu.toL2Bus.snoop_filter
287snoop_response_latency=1
288system=system
289use_default_range=false
290width=32
291master=system.cpu.l2cache.cpu_side
292slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
293
294[system.cpu.toL2Bus.snoop_filter]
295type=SnoopFilter
296eventq_index=0
297lookup_latency=0
298max_capacity=8388608
299system=system
300
301[system.cpu.tracer]
302type=ExeTracer
303eventq_index=0
304
305[system.cpu_clk_domain]
306type=SrcClockDomain
307clock=500
308domain_id=-1
309eventq_index=0
310init_perf_level=0
311voltage_domain=system.voltage_domain
312
313[system.disk0]
314type=IdeDisk
315children=image
316delay=1000000
317driveID=master
318eventq_index=0
319image=system.disk0.image
320
321[system.disk0.image]
322type=CowDiskImage
323children=child
324child=system.disk0.image.child
325eventq_index=0
326image_file=
327read_only=false
328table_size=65536
329
330[system.disk0.image.child]
331type=RawDiskImage
332eventq_index=0
333image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
334read_only=true
335
336[system.disk2]
337type=IdeDisk
338children=image
339delay=1000000
340driveID=master
341eventq_index=0
342image=system.disk2.image
343
344[system.disk2.image]
345type=CowDiskImage
346children=child
347child=system.disk2.image.child
348eventq_index=0
349image_file=
350read_only=false
351table_size=65536
352
353[system.disk2.image.child]
354type=RawDiskImage
355eventq_index=0
356image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
357read_only=true
358
359[system.dvfs_handler]
360type=DVFSHandler
361domains=
362enable=false
363eventq_index=0
364sys_clk_domain=system.clk_domain
365transition_latency=100000000
366
367[system.intrctrl]
368type=IntrControl
369eventq_index=0
370sys=system
371
372[system.iobus]
373type=NoncoherentXBar
374clk_domain=system.clk_domain
375default_p_state=UNDEFINED
376eventq_index=0
377forward_latency=1
378frontend_latency=2
379p_state_clk_gate_bins=20
380p_state_clk_gate_max=1000000000000
381p_state_clk_gate_min=1000
382power_model=Null
383response_latency=2
384use_default_range=false
385width=16
386master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
387slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
388
389[system.iocache]
390type=Cache
391children=tags
|
392addr_ranges=0:134217727
| 392addr_ranges=0:134217727:0:0:0:0
|
393assoc=8
394clk_domain=system.clk_domain
395clusivity=mostly_incl
396default_p_state=UNDEFINED
397demand_mshr_reserve=1
398eventq_index=0
399hit_latency=50
400is_read_only=false
401max_miss_count=0
402mshrs=20
403p_state_clk_gate_bins=20
404p_state_clk_gate_max=1000000000000
405p_state_clk_gate_min=1000
406power_model=Null
407prefetch_on_access=false
408prefetcher=Null
409response_latency=50
410sequential_access=false
411size=1024
412system=system
413tags=system.iocache.tags
414tgts_per_mshr=12
415write_buffers=8
416writeback_clean=false
417cpu_side=system.iobus.master[27]
418mem_side=system.membus.slave[2]
419
420[system.iocache.tags]
421type=LRU
422assoc=8
423block_size=64
424clk_domain=system.clk_domain
425default_p_state=UNDEFINED
426eventq_index=0
427hit_latency=50
428p_state_clk_gate_bins=20
429p_state_clk_gate_max=1000000000000
430p_state_clk_gate_min=1000
431power_model=Null
432sequential_access=false
433size=1024
434
435[system.membus]
436type=CoherentXBar
| 393assoc=8
394clk_domain=system.clk_domain
395clusivity=mostly_incl
396default_p_state=UNDEFINED
397demand_mshr_reserve=1
398eventq_index=0
399hit_latency=50
400is_read_only=false
401max_miss_count=0
402mshrs=20
403p_state_clk_gate_bins=20
404p_state_clk_gate_max=1000000000000
405p_state_clk_gate_min=1000
406power_model=Null
407prefetch_on_access=false
408prefetcher=Null
409response_latency=50
410sequential_access=false
411size=1024
412system=system
413tags=system.iocache.tags
414tgts_per_mshr=12
415write_buffers=8
416writeback_clean=false
417cpu_side=system.iobus.master[27]
418mem_side=system.membus.slave[2]
419
420[system.iocache.tags]
421type=LRU
422assoc=8
423block_size=64
424clk_domain=system.clk_domain
425default_p_state=UNDEFINED
426eventq_index=0
427hit_latency=50
428p_state_clk_gate_bins=20
429p_state_clk_gate_max=1000000000000
430p_state_clk_gate_min=1000
431power_model=Null
432sequential_access=false
433size=1024
434
435[system.membus]
436type=CoherentXBar
|
437children=badaddr_responder
| 437children=badaddr_responder snoop_filter
|
438clk_domain=system.clk_domain
439default_p_state=UNDEFINED
440eventq_index=0
441forward_latency=4
442frontend_latency=3
443p_state_clk_gate_bins=20
444p_state_clk_gate_max=1000000000000
445p_state_clk_gate_min=1000
446point_of_coherency=true
447power_model=Null
448response_latency=2
| 438clk_domain=system.clk_domain
439default_p_state=UNDEFINED
440eventq_index=0
441forward_latency=4
442frontend_latency=3
443p_state_clk_gate_bins=20
444p_state_clk_gate_max=1000000000000
445p_state_clk_gate_min=1000
446point_of_coherency=true
447power_model=Null
448response_latency=2
|
449snoop_filter=Null
| 449snoop_filter=system.membus.snoop_filter
|
450snoop_response_latency=4
451system=system
452use_default_range=false
453width=16
454default=system.membus.badaddr_responder.pio
455master=system.bridge.slave system.physmem.port
456slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
457
458[system.membus.badaddr_responder]
459type=IsaFake
460clk_domain=system.clk_domain
461default_p_state=UNDEFINED
462eventq_index=0
463fake_mem=false
464p_state_clk_gate_bins=20
465p_state_clk_gate_max=1000000000000
466p_state_clk_gate_min=1000
467pio_addr=0
468pio_latency=100000
469pio_size=8
470power_model=Null
471ret_bad_addr=true
472ret_data16=65535
473ret_data32=4294967295
474ret_data64=18446744073709551615
475ret_data8=255
476system=system
477update_data=false
478warn_access=
479pio=system.membus.default
480
| 450snoop_response_latency=4
451system=system
452use_default_range=false
453width=16
454default=system.membus.badaddr_responder.pio
455master=system.bridge.slave system.physmem.port
456slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
457
458[system.membus.badaddr_responder]
459type=IsaFake
460clk_domain=system.clk_domain
461default_p_state=UNDEFINED
462eventq_index=0
463fake_mem=false
464p_state_clk_gate_bins=20
465p_state_clk_gate_max=1000000000000
466p_state_clk_gate_min=1000
467pio_addr=0
468pio_latency=100000
469pio_size=8
470power_model=Null
471ret_bad_addr=true
472ret_data16=65535
473ret_data32=4294967295
474ret_data64=18446744073709551615
475ret_data8=255
476system=system
477update_data=false
478warn_access=
479pio=system.membus.default
480
|
| 481[system.membus.snoop_filter]
482type=SnoopFilter
483eventq_index=0
484lookup_latency=1
485max_capacity=8388608
486system=system
487
|
481[system.physmem]
482type=DRAMCtrl
| 488[system.physmem]
489type=DRAMCtrl
|
483IDD0=0.075000
| 490IDD0=0.055000
|
484IDD02=0.000000
| 491IDD02=0.000000
|
485IDD2N=0.050000
| 492IDD2N=0.032000
|
486IDD2N2=0.000000
487IDD2P0=0.000000
488IDD2P02=0.000000
| 493IDD2N2=0.000000
494IDD2P0=0.000000
495IDD2P02=0.000000
|
489IDD2P1=0.000000
| 496IDD2P1=0.032000
|
490IDD2P12=0.000000
| 497IDD2P12=0.000000
|
491IDD3N=0.057000
| 498IDD3N=0.038000
|
492IDD3N2=0.000000
493IDD3P0=0.000000
494IDD3P02=0.000000
| 499IDD3N2=0.000000
500IDD3P0=0.000000
501IDD3P02=0.000000
|
495IDD3P1=0.000000
| 502IDD3P1=0.038000
|
496IDD3P12=0.000000
| 503IDD3P12=0.000000
|
497IDD4R=0.187000
| 504IDD4R=0.157000
|
498IDD4R2=0.000000
| 505IDD4R2=0.000000
|
499IDD4W=0.165000
| 506IDD4W=0.125000
|
500IDD4W2=0.000000
| 507IDD4W2=0.000000
|
501IDD5=0.220000
| 508IDD5=0.235000
|
502IDD52=0.000000
| 509IDD52=0.000000
|
503IDD6=0.000000
| 510IDD6=0.020000
|
504IDD62=0.000000
505VDD=1.500000
506VDD2=0.000000
507activation_limit=4
508addr_mapping=RoRaBaCoCh
509bank_groups_per_rank=0
510banks_per_rank=8
511burst_length=8
512channels=1
513clk_domain=system.clk_domain
514conf_table_reported=true
515default_p_state=UNDEFINED
516device_bus_width=8
517device_rowbuffer_size=1024
518device_size=536870912
519devices_per_rank=8
520dll=true
521eventq_index=0
522in_addr_map=true
| 511IDD62=0.000000
512VDD=1.500000
513VDD2=0.000000
514activation_limit=4
515addr_mapping=RoRaBaCoCh
516bank_groups_per_rank=0
517banks_per_rank=8
518burst_length=8
519channels=1
520clk_domain=system.clk_domain
521conf_table_reported=true
522default_p_state=UNDEFINED
523device_bus_width=8
524device_rowbuffer_size=1024
525device_size=536870912
526devices_per_rank=8
527dll=true
528eventq_index=0
529in_addr_map=true
|
| 530kvm_map=true
|
523max_accesses_per_row=16
524mem_sched_policy=frfcfs
525min_writes_per_switch=16
526null=false
527p_state_clk_gate_bins=20
528p_state_clk_gate_max=1000000000000
529p_state_clk_gate_min=1000
530page_policy=open_adaptive
531power_model=Null
| 531max_accesses_per_row=16
532mem_sched_policy=frfcfs
533min_writes_per_switch=16
534null=false
535p_state_clk_gate_bins=20
536p_state_clk_gate_max=1000000000000
537p_state_clk_gate_min=1000
538page_policy=open_adaptive
539power_model=Null
|
532range=0:134217727
| 540range=0:134217727:0:0:0:0
|
533ranks_per_channel=2
534read_buffer_size=32
535static_backend_latency=10000
536static_frontend_latency=10000
537tBURST=5000
538tCCD_L=0
539tCK=1250
540tCL=13750
541tCS=2500
542tRAS=35000
543tRCD=13750
544tREFI=7800000
545tRFC=260000
546tRP=13750
547tRRD=6000
548tRRD_L=0
549tRTP=7500
550tRTW=2500
551tWR=15000
552tWTR=7500
553tXAW=30000
| 541ranks_per_channel=2
542read_buffer_size=32
543static_backend_latency=10000
544static_frontend_latency=10000
545tBURST=5000
546tCCD_L=0
547tCK=1250
548tCL=13750
549tCS=2500
550tRAS=35000
551tRCD=13750
552tREFI=7800000
553tRFC=260000
554tRP=13750
555tRRD=6000
556tRRD_L=0
557tRTP=7500
558tRTW=2500
559tWR=15000
560tWTR=7500
561tXAW=30000
|
554tXP=0
| 562tXP=6000
|
555tXPDLL=0
| 563tXPDLL=0
|
556tXS=0
| 564tXS=270000
|
557tXSDLL=0
558write_buffer_size=64
559write_high_thresh_perc=85
560write_low_thresh_perc=50
561port=system.membus.master[1]
562
563[system.simple_disk]
564type=SimpleDisk
565children=disk
566disk=system.simple_disk.disk
567eventq_index=0
568system=system
569
570[system.simple_disk.disk]
571type=RawDiskImage
572eventq_index=0
573image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
574read_only=true
575
576[system.terminal]
577type=Terminal
578eventq_index=0
579intr_control=system.intrctrl
580number=0
581output=true
582port=3456
583
584[system.tsunami]
585type=Tsunami
586children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
587eventq_index=0
588intrctrl=system.intrctrl
589system=system
590
591[system.tsunami.backdoor]
592type=AlphaBackdoor
593clk_domain=system.clk_domain
594cpu=system.cpu
595default_p_state=UNDEFINED
596disk=system.simple_disk
597eventq_index=0
598p_state_clk_gate_bins=20
599p_state_clk_gate_max=1000000000000
600p_state_clk_gate_min=1000
601pio_addr=8804682956800
602pio_latency=100000
603platform=system.tsunami
604power_model=Null
605system=system
606terminal=system.terminal
607pio=system.iobus.master[24]
608
609[system.tsunami.cchip]
610type=TsunamiCChip
611clk_domain=system.clk_domain
612default_p_state=UNDEFINED
613eventq_index=0
614p_state_clk_gate_bins=20
615p_state_clk_gate_max=1000000000000
616p_state_clk_gate_min=1000
617pio_addr=8803072344064
618pio_latency=100000
619power_model=Null
620system=system
621tsunami=system.tsunami
622pio=system.iobus.master[0]
623
624[system.tsunami.ethernet]
625type=NSGigE
626BAR0=1
627BAR0LegacyIO=false
628BAR0Size=256
629BAR1=0
630BAR1LegacyIO=false
631BAR1Size=4096
632BAR2=0
633BAR2LegacyIO=false
634BAR2Size=0
635BAR3=0
636BAR3LegacyIO=false
637BAR3Size=0
638BAR4=0
639BAR4LegacyIO=false
640BAR4Size=0
641BAR5=0
642BAR5LegacyIO=false
643BAR5Size=0
644BIST=0
645CacheLineSize=0
646CapabilityPtr=0
647CardbusCIS=0
648ClassCode=2
649Command=0
650DeviceID=34
651ExpansionROM=0
652HeaderType=0
653InterruptLine=30
654InterruptPin=1
655LatencyTimer=0
656LegacyIOBase=0
657MSICAPBaseOffset=0
658MSICAPCapId=0
659MSICAPMaskBits=0
660MSICAPMsgAddr=0
661MSICAPMsgCtrl=0
662MSICAPMsgData=0
663MSICAPMsgUpperAddr=0
664MSICAPNextCapability=0
665MSICAPPendingBits=0
666MSIXCAPBaseOffset=0
667MSIXCAPCapId=0
668MSIXCAPNextCapability=0
669MSIXMsgCtrl=0
670MSIXPbaOffset=0
671MSIXTableOffset=0
672MaximumLatency=52
673MinimumGrant=176
674PMCAPBaseOffset=0
675PMCAPCapId=0
676PMCAPCapabilities=0
677PMCAPCtrlStatus=0
678PMCAPNextCapability=0
679PXCAPBaseOffset=0
680PXCAPCapId=0
681PXCAPCapabilities=0
682PXCAPDevCap2=0
683PXCAPDevCapabilities=0
684PXCAPDevCtrl=0
685PXCAPDevCtrl2=0
686PXCAPDevStatus=0
687PXCAPLinkCap=0
688PXCAPLinkCtrl=0
689PXCAPLinkStatus=0
690PXCAPNextCapability=0
691ProgIF=0
692Revision=0
693Status=656
694SubClassCode=0
695SubsystemID=0
696SubsystemVendorID=0
697VendorID=4107
698clk_domain=system.clk_domain
699config_latency=20000
700default_p_state=UNDEFINED
701dma_data_free=false
702dma_desc_free=false
703dma_no_allocate=true
704dma_read_delay=0
705dma_read_factor=0
706dma_write_delay=0
707dma_write_factor=0
708eventq_index=0
709hardware_address=00:90:00:00:00:01
710host=system.tsunami.pchip
711intr_delay=10000000
712p_state_clk_gate_bins=20
713p_state_clk_gate_max=1000000000000
714p_state_clk_gate_min=1000
715pci_bus=0
716pci_dev=1
717pci_func=0
718pio_latency=30000
719power_model=Null
720rss=false
721rx_delay=1000000
722rx_fifo_size=524288
723rx_filter=true
724rx_thread=false
725system=system
726tx_delay=1000000
727tx_fifo_size=524288
728tx_thread=false
729dma=system.iobus.slave[2]
730pio=system.iobus.master[26]
731
732[system.tsunami.fake_OROM]
733type=IsaFake
734clk_domain=system.clk_domain
735default_p_state=UNDEFINED
736eventq_index=0
737fake_mem=false
738p_state_clk_gate_bins=20
739p_state_clk_gate_max=1000000000000
740p_state_clk_gate_min=1000
741pio_addr=8796093677568
742pio_latency=100000
743pio_size=393216
744power_model=Null
745ret_bad_addr=false
746ret_data16=65535
747ret_data32=4294967295
748ret_data64=18446744073709551615
749ret_data8=255
750system=system
751update_data=false
752warn_access=
753pio=system.iobus.master[8]
754
755[system.tsunami.fake_ata0]
756type=IsaFake
757clk_domain=system.clk_domain
758default_p_state=UNDEFINED
759eventq_index=0
760fake_mem=false
761p_state_clk_gate_bins=20
762p_state_clk_gate_max=1000000000000
763p_state_clk_gate_min=1000
764pio_addr=8804615848432
765pio_latency=100000
766pio_size=8
767power_model=Null
768ret_bad_addr=false
769ret_data16=65535
770ret_data32=4294967295
771ret_data64=18446744073709551615
772ret_data8=255
773system=system
774update_data=false
775warn_access=
776pio=system.iobus.master[19]
777
778[system.tsunami.fake_ata1]
779type=IsaFake
780clk_domain=system.clk_domain
781default_p_state=UNDEFINED
782eventq_index=0
783fake_mem=false
784p_state_clk_gate_bins=20
785p_state_clk_gate_max=1000000000000
786p_state_clk_gate_min=1000
787pio_addr=8804615848304
788pio_latency=100000
789pio_size=8
790power_model=Null
791ret_bad_addr=false
792ret_data16=65535
793ret_data32=4294967295
794ret_data64=18446744073709551615
795ret_data8=255
796system=system
797update_data=false
798warn_access=
799pio=system.iobus.master[20]
800
801[system.tsunami.fake_pnp_addr]
802type=IsaFake
803clk_domain=system.clk_domain
804default_p_state=UNDEFINED
805eventq_index=0
806fake_mem=false
807p_state_clk_gate_bins=20
808p_state_clk_gate_max=1000000000000
809p_state_clk_gate_min=1000
810pio_addr=8804615848569
811pio_latency=100000
812pio_size=8
813power_model=Null
814ret_bad_addr=false
815ret_data16=65535
816ret_data32=4294967295
817ret_data64=18446744073709551615
818ret_data8=255
819system=system
820update_data=false
821warn_access=
822pio=system.iobus.master[9]
823
824[system.tsunami.fake_pnp_read0]
825type=IsaFake
826clk_domain=system.clk_domain
827default_p_state=UNDEFINED
828eventq_index=0
829fake_mem=false
830p_state_clk_gate_bins=20
831p_state_clk_gate_max=1000000000000
832p_state_clk_gate_min=1000
833pio_addr=8804615848451
834pio_latency=100000
835pio_size=8
836power_model=Null
837ret_bad_addr=false
838ret_data16=65535
839ret_data32=4294967295
840ret_data64=18446744073709551615
841ret_data8=255
842system=system
843update_data=false
844warn_access=
845pio=system.iobus.master[11]
846
847[system.tsunami.fake_pnp_read1]
848type=IsaFake
849clk_domain=system.clk_domain
850default_p_state=UNDEFINED
851eventq_index=0
852fake_mem=false
853p_state_clk_gate_bins=20
854p_state_clk_gate_max=1000000000000
855p_state_clk_gate_min=1000
856pio_addr=8804615848515
857pio_latency=100000
858pio_size=8
859power_model=Null
860ret_bad_addr=false
861ret_data16=65535
862ret_data32=4294967295
863ret_data64=18446744073709551615
864ret_data8=255
865system=system
866update_data=false
867warn_access=
868pio=system.iobus.master[12]
869
870[system.tsunami.fake_pnp_read2]
871type=IsaFake
872clk_domain=system.clk_domain
873default_p_state=UNDEFINED
874eventq_index=0
875fake_mem=false
876p_state_clk_gate_bins=20
877p_state_clk_gate_max=1000000000000
878p_state_clk_gate_min=1000
879pio_addr=8804615848579
880pio_latency=100000
881pio_size=8
882power_model=Null
883ret_bad_addr=false
884ret_data16=65535
885ret_data32=4294967295
886ret_data64=18446744073709551615
887ret_data8=255
888system=system
889update_data=false
890warn_access=
891pio=system.iobus.master[13]
892
893[system.tsunami.fake_pnp_read3]
894type=IsaFake
895clk_domain=system.clk_domain
896default_p_state=UNDEFINED
897eventq_index=0
898fake_mem=false
899p_state_clk_gate_bins=20
900p_state_clk_gate_max=1000000000000
901p_state_clk_gate_min=1000
902pio_addr=8804615848643
903pio_latency=100000
904pio_size=8
905power_model=Null
906ret_bad_addr=false
907ret_data16=65535
908ret_data32=4294967295
909ret_data64=18446744073709551615
910ret_data8=255
911system=system
912update_data=false
913warn_access=
914pio=system.iobus.master[14]
915
916[system.tsunami.fake_pnp_read4]
917type=IsaFake
918clk_domain=system.clk_domain
919default_p_state=UNDEFINED
920eventq_index=0
921fake_mem=false
922p_state_clk_gate_bins=20
923p_state_clk_gate_max=1000000000000
924p_state_clk_gate_min=1000
925pio_addr=8804615848707
926pio_latency=100000
927pio_size=8
928power_model=Null
929ret_bad_addr=false
930ret_data16=65535
931ret_data32=4294967295
932ret_data64=18446744073709551615
933ret_data8=255
934system=system
935update_data=false
936warn_access=
937pio=system.iobus.master[15]
938
939[system.tsunami.fake_pnp_read5]
940type=IsaFake
941clk_domain=system.clk_domain
942default_p_state=UNDEFINED
943eventq_index=0
944fake_mem=false
945p_state_clk_gate_bins=20
946p_state_clk_gate_max=1000000000000
947p_state_clk_gate_min=1000
948pio_addr=8804615848771
949pio_latency=100000
950pio_size=8
951power_model=Null
952ret_bad_addr=false
953ret_data16=65535
954ret_data32=4294967295
955ret_data64=18446744073709551615
956ret_data8=255
957system=system
958update_data=false
959warn_access=
960pio=system.iobus.master[16]
961
962[system.tsunami.fake_pnp_read6]
963type=IsaFake
964clk_domain=system.clk_domain
965default_p_state=UNDEFINED
966eventq_index=0
967fake_mem=false
968p_state_clk_gate_bins=20
969p_state_clk_gate_max=1000000000000
970p_state_clk_gate_min=1000
971pio_addr=8804615848835
972pio_latency=100000
973pio_size=8
974power_model=Null
975ret_bad_addr=false
976ret_data16=65535
977ret_data32=4294967295
978ret_data64=18446744073709551615
979ret_data8=255
980system=system
981update_data=false
982warn_access=
983pio=system.iobus.master[17]
984
985[system.tsunami.fake_pnp_read7]
986type=IsaFake
987clk_domain=system.clk_domain
988default_p_state=UNDEFINED
989eventq_index=0
990fake_mem=false
991p_state_clk_gate_bins=20
992p_state_clk_gate_max=1000000000000
993p_state_clk_gate_min=1000
994pio_addr=8804615848899
995pio_latency=100000
996pio_size=8
997power_model=Null
998ret_bad_addr=false
999ret_data16=65535
1000ret_data32=4294967295
1001ret_data64=18446744073709551615
1002ret_data8=255
1003system=system
1004update_data=false
1005warn_access=
1006pio=system.iobus.master[18]
1007
1008[system.tsunami.fake_pnp_write]
1009type=IsaFake
1010clk_domain=system.clk_domain
1011default_p_state=UNDEFINED
1012eventq_index=0
1013fake_mem=false
1014p_state_clk_gate_bins=20
1015p_state_clk_gate_max=1000000000000
1016p_state_clk_gate_min=1000
1017pio_addr=8804615850617
1018pio_latency=100000
1019pio_size=8
1020power_model=Null
1021ret_bad_addr=false
1022ret_data16=65535
1023ret_data32=4294967295
1024ret_data64=18446744073709551615
1025ret_data8=255
1026system=system
1027update_data=false
1028warn_access=
1029pio=system.iobus.master[10]
1030
1031[system.tsunami.fake_ppc]
1032type=IsaFake
1033clk_domain=system.clk_domain
1034default_p_state=UNDEFINED
1035eventq_index=0
1036fake_mem=false
1037p_state_clk_gate_bins=20
1038p_state_clk_gate_max=1000000000000
1039p_state_clk_gate_min=1000
1040pio_addr=8804615848891
1041pio_latency=100000
1042pio_size=8
1043power_model=Null
1044ret_bad_addr=false
1045ret_data16=65535
1046ret_data32=4294967295
1047ret_data64=18446744073709551615
1048ret_data8=255
1049system=system
1050update_data=false
1051warn_access=
1052pio=system.iobus.master[7]
1053
1054[system.tsunami.fake_sm_chip]
1055type=IsaFake
1056clk_domain=system.clk_domain
1057default_p_state=UNDEFINED
1058eventq_index=0
1059fake_mem=false
1060p_state_clk_gate_bins=20
1061p_state_clk_gate_max=1000000000000
1062p_state_clk_gate_min=1000
1063pio_addr=8804615848816
1064pio_latency=100000
1065pio_size=8
1066power_model=Null
1067ret_bad_addr=false
1068ret_data16=65535
1069ret_data32=4294967295
1070ret_data64=18446744073709551615
1071ret_data8=255
1072system=system
1073update_data=false
1074warn_access=
1075pio=system.iobus.master[2]
1076
1077[system.tsunami.fake_uart1]
1078type=IsaFake
1079clk_domain=system.clk_domain
1080default_p_state=UNDEFINED
1081eventq_index=0
1082fake_mem=false
1083p_state_clk_gate_bins=20
1084p_state_clk_gate_max=1000000000000
1085p_state_clk_gate_min=1000
1086pio_addr=8804615848696
1087pio_latency=100000
1088pio_size=8
1089power_model=Null
1090ret_bad_addr=false
1091ret_data16=65535
1092ret_data32=4294967295
1093ret_data64=18446744073709551615
1094ret_data8=255
1095system=system
1096update_data=false
1097warn_access=
1098pio=system.iobus.master[3]
1099
1100[system.tsunami.fake_uart2]
1101type=IsaFake
1102clk_domain=system.clk_domain
1103default_p_state=UNDEFINED
1104eventq_index=0
1105fake_mem=false
1106p_state_clk_gate_bins=20
1107p_state_clk_gate_max=1000000000000
1108p_state_clk_gate_min=1000
1109pio_addr=8804615848936
1110pio_latency=100000
1111pio_size=8
1112power_model=Null
1113ret_bad_addr=false
1114ret_data16=65535
1115ret_data32=4294967295
1116ret_data64=18446744073709551615
1117ret_data8=255
1118system=system
1119update_data=false
1120warn_access=
1121pio=system.iobus.master[4]
1122
1123[system.tsunami.fake_uart3]
1124type=IsaFake
1125clk_domain=system.clk_domain
1126default_p_state=UNDEFINED
1127eventq_index=0
1128fake_mem=false
1129p_state_clk_gate_bins=20
1130p_state_clk_gate_max=1000000000000
1131p_state_clk_gate_min=1000
1132pio_addr=8804615848680
1133pio_latency=100000
1134pio_size=8
1135power_model=Null
1136ret_bad_addr=false
1137ret_data16=65535
1138ret_data32=4294967295
1139ret_data64=18446744073709551615
1140ret_data8=255
1141system=system
1142update_data=false
1143warn_access=
1144pio=system.iobus.master[5]
1145
1146[system.tsunami.fake_uart4]
1147type=IsaFake
1148clk_domain=system.clk_domain
1149default_p_state=UNDEFINED
1150eventq_index=0
1151fake_mem=false
1152p_state_clk_gate_bins=20
1153p_state_clk_gate_max=1000000000000
1154p_state_clk_gate_min=1000
1155pio_addr=8804615848944
1156pio_latency=100000
1157pio_size=8
1158power_model=Null
1159ret_bad_addr=false
1160ret_data16=65535
1161ret_data32=4294967295
1162ret_data64=18446744073709551615
1163ret_data8=255
1164system=system
1165update_data=false
1166warn_access=
1167pio=system.iobus.master[6]
1168
1169[system.tsunami.fb]
1170type=BadDevice
1171clk_domain=system.clk_domain
1172default_p_state=UNDEFINED
1173devicename=FrameBuffer
1174eventq_index=0
1175p_state_clk_gate_bins=20
1176p_state_clk_gate_max=1000000000000
1177p_state_clk_gate_min=1000
1178pio_addr=8804615848912
1179pio_latency=100000
1180power_model=Null
1181system=system
1182pio=system.iobus.master[21]
1183
1184[system.tsunami.ide]
1185type=IdeController
1186BAR0=1
1187BAR0LegacyIO=false
1188BAR0Size=8
1189BAR1=1
1190BAR1LegacyIO=false
1191BAR1Size=4
1192BAR2=1
1193BAR2LegacyIO=false
1194BAR2Size=8
1195BAR3=1
1196BAR3LegacyIO=false
1197BAR3Size=4
1198BAR4=1
1199BAR4LegacyIO=false
1200BAR4Size=16
1201BAR5=1
1202BAR5LegacyIO=false
1203BAR5Size=0
1204BIST=0
1205CacheLineSize=0
1206CapabilityPtr=0
1207CardbusCIS=0
1208ClassCode=1
1209Command=0
1210DeviceID=28945
1211ExpansionROM=0
1212HeaderType=0
1213InterruptLine=31
1214InterruptPin=1
1215LatencyTimer=0
1216LegacyIOBase=0
1217MSICAPBaseOffset=0
1218MSICAPCapId=0
1219MSICAPMaskBits=0
1220MSICAPMsgAddr=0
1221MSICAPMsgCtrl=0
1222MSICAPMsgData=0
1223MSICAPMsgUpperAddr=0
1224MSICAPNextCapability=0
1225MSICAPPendingBits=0
1226MSIXCAPBaseOffset=0
1227MSIXCAPCapId=0
1228MSIXCAPNextCapability=0
1229MSIXMsgCtrl=0
1230MSIXPbaOffset=0
1231MSIXTableOffset=0
1232MaximumLatency=0
1233MinimumGrant=0
1234PMCAPBaseOffset=0
1235PMCAPCapId=0
1236PMCAPCapabilities=0
1237PMCAPCtrlStatus=0
1238PMCAPNextCapability=0
1239PXCAPBaseOffset=0
1240PXCAPCapId=0
1241PXCAPCapabilities=0
1242PXCAPDevCap2=0
1243PXCAPDevCapabilities=0
1244PXCAPDevCtrl=0
1245PXCAPDevCtrl2=0
1246PXCAPDevStatus=0
1247PXCAPLinkCap=0
1248PXCAPLinkCtrl=0
1249PXCAPLinkStatus=0
1250PXCAPNextCapability=0
1251ProgIF=133
1252Revision=0
1253Status=640
1254SubClassCode=1
1255SubsystemID=0
1256SubsystemVendorID=0
1257VendorID=32902
1258clk_domain=system.clk_domain
1259config_latency=20000
1260ctrl_offset=0
1261default_p_state=UNDEFINED
1262disks=system.disk0 system.disk2
1263eventq_index=0
1264host=system.tsunami.pchip
1265io_shift=0
1266p_state_clk_gate_bins=20
1267p_state_clk_gate_max=1000000000000
1268p_state_clk_gate_min=1000
1269pci_bus=0
1270pci_dev=0
1271pci_func=0
1272pio_latency=30000
1273power_model=Null
1274system=system
1275dma=system.iobus.slave[1]
1276pio=system.iobus.master[25]
1277
1278[system.tsunami.io]
1279type=TsunamiIO
1280clk_domain=system.clk_domain
1281default_p_state=UNDEFINED
1282eventq_index=0
1283frequency=976562500
1284p_state_clk_gate_bins=20
1285p_state_clk_gate_max=1000000000000
1286p_state_clk_gate_min=1000
1287pio_addr=8804615847936
1288pio_latency=100000
1289power_model=Null
1290system=system
1291time=Thu Jan 1 00:00:00 2009
1292tsunami=system.tsunami
1293year_is_bcd=false
1294pio=system.iobus.master[22]
1295
1296[system.tsunami.pchip]
1297type=TsunamiPChip
1298clk_domain=system.clk_domain
1299conf_base=8804649402368
1300conf_device_bits=8
1301conf_size=16777216
1302default_p_state=UNDEFINED
1303eventq_index=0
1304p_state_clk_gate_bins=20
1305p_state_clk_gate_max=1000000000000
1306p_state_clk_gate_min=1000
1307pci_dma_base=0
1308pci_mem_base=8796093022208
1309pci_pio_base=8804615847936
1310pio_addr=8802535473152
1311pio_latency=100000
1312platform=system.tsunami
1313power_model=Null
1314system=system
1315tsunami=system.tsunami
1316pio=system.iobus.master[1]
1317
1318[system.tsunami.uart]
1319type=Uart8250
1320clk_domain=system.clk_domain
1321default_p_state=UNDEFINED
1322eventq_index=0
1323p_state_clk_gate_bins=20
1324p_state_clk_gate_max=1000000000000
1325p_state_clk_gate_min=1000
1326pio_addr=8804615848952
1327pio_latency=100000
1328platform=system.tsunami
1329power_model=Null
1330system=system
1331terminal=system.terminal
1332pio=system.iobus.master[23]
1333
1334[system.voltage_domain]
1335type=VoltageDomain
1336eventq_index=0
1337voltage=1.000000
1338
| 565tXSDLL=0
566write_buffer_size=64
567write_high_thresh_perc=85
568write_low_thresh_perc=50
569port=system.membus.master[1]
570
571[system.simple_disk]
572type=SimpleDisk
573children=disk
574disk=system.simple_disk.disk
575eventq_index=0
576system=system
577
578[system.simple_disk.disk]
579type=RawDiskImage
580eventq_index=0
581image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
582read_only=true
583
584[system.terminal]
585type=Terminal
586eventq_index=0
587intr_control=system.intrctrl
588number=0
589output=true
590port=3456
591
592[system.tsunami]
593type=Tsunami
594children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
595eventq_index=0
596intrctrl=system.intrctrl
597system=system
598
599[system.tsunami.backdoor]
600type=AlphaBackdoor
601clk_domain=system.clk_domain
602cpu=system.cpu
603default_p_state=UNDEFINED
604disk=system.simple_disk
605eventq_index=0
606p_state_clk_gate_bins=20
607p_state_clk_gate_max=1000000000000
608p_state_clk_gate_min=1000
609pio_addr=8804682956800
610pio_latency=100000
611platform=system.tsunami
612power_model=Null
613system=system
614terminal=system.terminal
615pio=system.iobus.master[24]
616
617[system.tsunami.cchip]
618type=TsunamiCChip
619clk_domain=system.clk_domain
620default_p_state=UNDEFINED
621eventq_index=0
622p_state_clk_gate_bins=20
623p_state_clk_gate_max=1000000000000
624p_state_clk_gate_min=1000
625pio_addr=8803072344064
626pio_latency=100000
627power_model=Null
628system=system
629tsunami=system.tsunami
630pio=system.iobus.master[0]
631
632[system.tsunami.ethernet]
633type=NSGigE
634BAR0=1
635BAR0LegacyIO=false
636BAR0Size=256
637BAR1=0
638BAR1LegacyIO=false
639BAR1Size=4096
640BAR2=0
641BAR2LegacyIO=false
642BAR2Size=0
643BAR3=0
644BAR3LegacyIO=false
645BAR3Size=0
646BAR4=0
647BAR4LegacyIO=false
648BAR4Size=0
649BAR5=0
650BAR5LegacyIO=false
651BAR5Size=0
652BIST=0
653CacheLineSize=0
654CapabilityPtr=0
655CardbusCIS=0
656ClassCode=2
657Command=0
658DeviceID=34
659ExpansionROM=0
660HeaderType=0
661InterruptLine=30
662InterruptPin=1
663LatencyTimer=0
664LegacyIOBase=0
665MSICAPBaseOffset=0
666MSICAPCapId=0
667MSICAPMaskBits=0
668MSICAPMsgAddr=0
669MSICAPMsgCtrl=0
670MSICAPMsgData=0
671MSICAPMsgUpperAddr=0
672MSICAPNextCapability=0
673MSICAPPendingBits=0
674MSIXCAPBaseOffset=0
675MSIXCAPCapId=0
676MSIXCAPNextCapability=0
677MSIXMsgCtrl=0
678MSIXPbaOffset=0
679MSIXTableOffset=0
680MaximumLatency=52
681MinimumGrant=176
682PMCAPBaseOffset=0
683PMCAPCapId=0
684PMCAPCapabilities=0
685PMCAPCtrlStatus=0
686PMCAPNextCapability=0
687PXCAPBaseOffset=0
688PXCAPCapId=0
689PXCAPCapabilities=0
690PXCAPDevCap2=0
691PXCAPDevCapabilities=0
692PXCAPDevCtrl=0
693PXCAPDevCtrl2=0
694PXCAPDevStatus=0
695PXCAPLinkCap=0
696PXCAPLinkCtrl=0
697PXCAPLinkStatus=0
698PXCAPNextCapability=0
699ProgIF=0
700Revision=0
701Status=656
702SubClassCode=0
703SubsystemID=0
704SubsystemVendorID=0
705VendorID=4107
706clk_domain=system.clk_domain
707config_latency=20000
708default_p_state=UNDEFINED
709dma_data_free=false
710dma_desc_free=false
711dma_no_allocate=true
712dma_read_delay=0
713dma_read_factor=0
714dma_write_delay=0
715dma_write_factor=0
716eventq_index=0
717hardware_address=00:90:00:00:00:01
718host=system.tsunami.pchip
719intr_delay=10000000
720p_state_clk_gate_bins=20
721p_state_clk_gate_max=1000000000000
722p_state_clk_gate_min=1000
723pci_bus=0
724pci_dev=1
725pci_func=0
726pio_latency=30000
727power_model=Null
728rss=false
729rx_delay=1000000
730rx_fifo_size=524288
731rx_filter=true
732rx_thread=false
733system=system
734tx_delay=1000000
735tx_fifo_size=524288
736tx_thread=false
737dma=system.iobus.slave[2]
738pio=system.iobus.master[26]
739
740[system.tsunami.fake_OROM]
741type=IsaFake
742clk_domain=system.clk_domain
743default_p_state=UNDEFINED
744eventq_index=0
745fake_mem=false
746p_state_clk_gate_bins=20
747p_state_clk_gate_max=1000000000000
748p_state_clk_gate_min=1000
749pio_addr=8796093677568
750pio_latency=100000
751pio_size=393216
752power_model=Null
753ret_bad_addr=false
754ret_data16=65535
755ret_data32=4294967295
756ret_data64=18446744073709551615
757ret_data8=255
758system=system
759update_data=false
760warn_access=
761pio=system.iobus.master[8]
762
763[system.tsunami.fake_ata0]
764type=IsaFake
765clk_domain=system.clk_domain
766default_p_state=UNDEFINED
767eventq_index=0
768fake_mem=false
769p_state_clk_gate_bins=20
770p_state_clk_gate_max=1000000000000
771p_state_clk_gate_min=1000
772pio_addr=8804615848432
773pio_latency=100000
774pio_size=8
775power_model=Null
776ret_bad_addr=false
777ret_data16=65535
778ret_data32=4294967295
779ret_data64=18446744073709551615
780ret_data8=255
781system=system
782update_data=false
783warn_access=
784pio=system.iobus.master[19]
785
786[system.tsunami.fake_ata1]
787type=IsaFake
788clk_domain=system.clk_domain
789default_p_state=UNDEFINED
790eventq_index=0
791fake_mem=false
792p_state_clk_gate_bins=20
793p_state_clk_gate_max=1000000000000
794p_state_clk_gate_min=1000
795pio_addr=8804615848304
796pio_latency=100000
797pio_size=8
798power_model=Null
799ret_bad_addr=false
800ret_data16=65535
801ret_data32=4294967295
802ret_data64=18446744073709551615
803ret_data8=255
804system=system
805update_data=false
806warn_access=
807pio=system.iobus.master[20]
808
809[system.tsunami.fake_pnp_addr]
810type=IsaFake
811clk_domain=system.clk_domain
812default_p_state=UNDEFINED
813eventq_index=0
814fake_mem=false
815p_state_clk_gate_bins=20
816p_state_clk_gate_max=1000000000000
817p_state_clk_gate_min=1000
818pio_addr=8804615848569
819pio_latency=100000
820pio_size=8
821power_model=Null
822ret_bad_addr=false
823ret_data16=65535
824ret_data32=4294967295
825ret_data64=18446744073709551615
826ret_data8=255
827system=system
828update_data=false
829warn_access=
830pio=system.iobus.master[9]
831
832[system.tsunami.fake_pnp_read0]
833type=IsaFake
834clk_domain=system.clk_domain
835default_p_state=UNDEFINED
836eventq_index=0
837fake_mem=false
838p_state_clk_gate_bins=20
839p_state_clk_gate_max=1000000000000
840p_state_clk_gate_min=1000
841pio_addr=8804615848451
842pio_latency=100000
843pio_size=8
844power_model=Null
845ret_bad_addr=false
846ret_data16=65535
847ret_data32=4294967295
848ret_data64=18446744073709551615
849ret_data8=255
850system=system
851update_data=false
852warn_access=
853pio=system.iobus.master[11]
854
855[system.tsunami.fake_pnp_read1]
856type=IsaFake
857clk_domain=system.clk_domain
858default_p_state=UNDEFINED
859eventq_index=0
860fake_mem=false
861p_state_clk_gate_bins=20
862p_state_clk_gate_max=1000000000000
863p_state_clk_gate_min=1000
864pio_addr=8804615848515
865pio_latency=100000
866pio_size=8
867power_model=Null
868ret_bad_addr=false
869ret_data16=65535
870ret_data32=4294967295
871ret_data64=18446744073709551615
872ret_data8=255
873system=system
874update_data=false
875warn_access=
876pio=system.iobus.master[12]
877
878[system.tsunami.fake_pnp_read2]
879type=IsaFake
880clk_domain=system.clk_domain
881default_p_state=UNDEFINED
882eventq_index=0
883fake_mem=false
884p_state_clk_gate_bins=20
885p_state_clk_gate_max=1000000000000
886p_state_clk_gate_min=1000
887pio_addr=8804615848579
888pio_latency=100000
889pio_size=8
890power_model=Null
891ret_bad_addr=false
892ret_data16=65535
893ret_data32=4294967295
894ret_data64=18446744073709551615
895ret_data8=255
896system=system
897update_data=false
898warn_access=
899pio=system.iobus.master[13]
900
901[system.tsunami.fake_pnp_read3]
902type=IsaFake
903clk_domain=system.clk_domain
904default_p_state=UNDEFINED
905eventq_index=0
906fake_mem=false
907p_state_clk_gate_bins=20
908p_state_clk_gate_max=1000000000000
909p_state_clk_gate_min=1000
910pio_addr=8804615848643
911pio_latency=100000
912pio_size=8
913power_model=Null
914ret_bad_addr=false
915ret_data16=65535
916ret_data32=4294967295
917ret_data64=18446744073709551615
918ret_data8=255
919system=system
920update_data=false
921warn_access=
922pio=system.iobus.master[14]
923
924[system.tsunami.fake_pnp_read4]
925type=IsaFake
926clk_domain=system.clk_domain
927default_p_state=UNDEFINED
928eventq_index=0
929fake_mem=false
930p_state_clk_gate_bins=20
931p_state_clk_gate_max=1000000000000
932p_state_clk_gate_min=1000
933pio_addr=8804615848707
934pio_latency=100000
935pio_size=8
936power_model=Null
937ret_bad_addr=false
938ret_data16=65535
939ret_data32=4294967295
940ret_data64=18446744073709551615
941ret_data8=255
942system=system
943update_data=false
944warn_access=
945pio=system.iobus.master[15]
946
947[system.tsunami.fake_pnp_read5]
948type=IsaFake
949clk_domain=system.clk_domain
950default_p_state=UNDEFINED
951eventq_index=0
952fake_mem=false
953p_state_clk_gate_bins=20
954p_state_clk_gate_max=1000000000000
955p_state_clk_gate_min=1000
956pio_addr=8804615848771
957pio_latency=100000
958pio_size=8
959power_model=Null
960ret_bad_addr=false
961ret_data16=65535
962ret_data32=4294967295
963ret_data64=18446744073709551615
964ret_data8=255
965system=system
966update_data=false
967warn_access=
968pio=system.iobus.master[16]
969
970[system.tsunami.fake_pnp_read6]
971type=IsaFake
972clk_domain=system.clk_domain
973default_p_state=UNDEFINED
974eventq_index=0
975fake_mem=false
976p_state_clk_gate_bins=20
977p_state_clk_gate_max=1000000000000
978p_state_clk_gate_min=1000
979pio_addr=8804615848835
980pio_latency=100000
981pio_size=8
982power_model=Null
983ret_bad_addr=false
984ret_data16=65535
985ret_data32=4294967295
986ret_data64=18446744073709551615
987ret_data8=255
988system=system
989update_data=false
990warn_access=
991pio=system.iobus.master[17]
992
993[system.tsunami.fake_pnp_read7]
994type=IsaFake
995clk_domain=system.clk_domain
996default_p_state=UNDEFINED
997eventq_index=0
998fake_mem=false
999p_state_clk_gate_bins=20
1000p_state_clk_gate_max=1000000000000
1001p_state_clk_gate_min=1000
1002pio_addr=8804615848899
1003pio_latency=100000
1004pio_size=8
1005power_model=Null
1006ret_bad_addr=false
1007ret_data16=65535
1008ret_data32=4294967295
1009ret_data64=18446744073709551615
1010ret_data8=255
1011system=system
1012update_data=false
1013warn_access=
1014pio=system.iobus.master[18]
1015
1016[system.tsunami.fake_pnp_write]
1017type=IsaFake
1018clk_domain=system.clk_domain
1019default_p_state=UNDEFINED
1020eventq_index=0
1021fake_mem=false
1022p_state_clk_gate_bins=20
1023p_state_clk_gate_max=1000000000000
1024p_state_clk_gate_min=1000
1025pio_addr=8804615850617
1026pio_latency=100000
1027pio_size=8
1028power_model=Null
1029ret_bad_addr=false
1030ret_data16=65535
1031ret_data32=4294967295
1032ret_data64=18446744073709551615
1033ret_data8=255
1034system=system
1035update_data=false
1036warn_access=
1037pio=system.iobus.master[10]
1038
1039[system.tsunami.fake_ppc]
1040type=IsaFake
1041clk_domain=system.clk_domain
1042default_p_state=UNDEFINED
1043eventq_index=0
1044fake_mem=false
1045p_state_clk_gate_bins=20
1046p_state_clk_gate_max=1000000000000
1047p_state_clk_gate_min=1000
1048pio_addr=8804615848891
1049pio_latency=100000
1050pio_size=8
1051power_model=Null
1052ret_bad_addr=false
1053ret_data16=65535
1054ret_data32=4294967295
1055ret_data64=18446744073709551615
1056ret_data8=255
1057system=system
1058update_data=false
1059warn_access=
1060pio=system.iobus.master[7]
1061
1062[system.tsunami.fake_sm_chip]
1063type=IsaFake
1064clk_domain=system.clk_domain
1065default_p_state=UNDEFINED
1066eventq_index=0
1067fake_mem=false
1068p_state_clk_gate_bins=20
1069p_state_clk_gate_max=1000000000000
1070p_state_clk_gate_min=1000
1071pio_addr=8804615848816
1072pio_latency=100000
1073pio_size=8
1074power_model=Null
1075ret_bad_addr=false
1076ret_data16=65535
1077ret_data32=4294967295
1078ret_data64=18446744073709551615
1079ret_data8=255
1080system=system
1081update_data=false
1082warn_access=
1083pio=system.iobus.master[2]
1084
1085[system.tsunami.fake_uart1]
1086type=IsaFake
1087clk_domain=system.clk_domain
1088default_p_state=UNDEFINED
1089eventq_index=0
1090fake_mem=false
1091p_state_clk_gate_bins=20
1092p_state_clk_gate_max=1000000000000
1093p_state_clk_gate_min=1000
1094pio_addr=8804615848696
1095pio_latency=100000
1096pio_size=8
1097power_model=Null
1098ret_bad_addr=false
1099ret_data16=65535
1100ret_data32=4294967295
1101ret_data64=18446744073709551615
1102ret_data8=255
1103system=system
1104update_data=false
1105warn_access=
1106pio=system.iobus.master[3]
1107
1108[system.tsunami.fake_uart2]
1109type=IsaFake
1110clk_domain=system.clk_domain
1111default_p_state=UNDEFINED
1112eventq_index=0
1113fake_mem=false
1114p_state_clk_gate_bins=20
1115p_state_clk_gate_max=1000000000000
1116p_state_clk_gate_min=1000
1117pio_addr=8804615848936
1118pio_latency=100000
1119pio_size=8
1120power_model=Null
1121ret_bad_addr=false
1122ret_data16=65535
1123ret_data32=4294967295
1124ret_data64=18446744073709551615
1125ret_data8=255
1126system=system
1127update_data=false
1128warn_access=
1129pio=system.iobus.master[4]
1130
1131[system.tsunami.fake_uart3]
1132type=IsaFake
1133clk_domain=system.clk_domain
1134default_p_state=UNDEFINED
1135eventq_index=0
1136fake_mem=false
1137p_state_clk_gate_bins=20
1138p_state_clk_gate_max=1000000000000
1139p_state_clk_gate_min=1000
1140pio_addr=8804615848680
1141pio_latency=100000
1142pio_size=8
1143power_model=Null
1144ret_bad_addr=false
1145ret_data16=65535
1146ret_data32=4294967295
1147ret_data64=18446744073709551615
1148ret_data8=255
1149system=system
1150update_data=false
1151warn_access=
1152pio=system.iobus.master[5]
1153
1154[system.tsunami.fake_uart4]
1155type=IsaFake
1156clk_domain=system.clk_domain
1157default_p_state=UNDEFINED
1158eventq_index=0
1159fake_mem=false
1160p_state_clk_gate_bins=20
1161p_state_clk_gate_max=1000000000000
1162p_state_clk_gate_min=1000
1163pio_addr=8804615848944
1164pio_latency=100000
1165pio_size=8
1166power_model=Null
1167ret_bad_addr=false
1168ret_data16=65535
1169ret_data32=4294967295
1170ret_data64=18446744073709551615
1171ret_data8=255
1172system=system
1173update_data=false
1174warn_access=
1175pio=system.iobus.master[6]
1176
1177[system.tsunami.fb]
1178type=BadDevice
1179clk_domain=system.clk_domain
1180default_p_state=UNDEFINED
1181devicename=FrameBuffer
1182eventq_index=0
1183p_state_clk_gate_bins=20
1184p_state_clk_gate_max=1000000000000
1185p_state_clk_gate_min=1000
1186pio_addr=8804615848912
1187pio_latency=100000
1188power_model=Null
1189system=system
1190pio=system.iobus.master[21]
1191
1192[system.tsunami.ide]
1193type=IdeController
1194BAR0=1
1195BAR0LegacyIO=false
1196BAR0Size=8
1197BAR1=1
1198BAR1LegacyIO=false
1199BAR1Size=4
1200BAR2=1
1201BAR2LegacyIO=false
1202BAR2Size=8
1203BAR3=1
1204BAR3LegacyIO=false
1205BAR3Size=4
1206BAR4=1
1207BAR4LegacyIO=false
1208BAR4Size=16
1209BAR5=1
1210BAR5LegacyIO=false
1211BAR5Size=0
1212BIST=0
1213CacheLineSize=0
1214CapabilityPtr=0
1215CardbusCIS=0
1216ClassCode=1
1217Command=0
1218DeviceID=28945
1219ExpansionROM=0
1220HeaderType=0
1221InterruptLine=31
1222InterruptPin=1
1223LatencyTimer=0
1224LegacyIOBase=0
1225MSICAPBaseOffset=0
1226MSICAPCapId=0
1227MSICAPMaskBits=0
1228MSICAPMsgAddr=0
1229MSICAPMsgCtrl=0
1230MSICAPMsgData=0
1231MSICAPMsgUpperAddr=0
1232MSICAPNextCapability=0
1233MSICAPPendingBits=0
1234MSIXCAPBaseOffset=0
1235MSIXCAPCapId=0
1236MSIXCAPNextCapability=0
1237MSIXMsgCtrl=0
1238MSIXPbaOffset=0
1239MSIXTableOffset=0
1240MaximumLatency=0
1241MinimumGrant=0
1242PMCAPBaseOffset=0
1243PMCAPCapId=0
1244PMCAPCapabilities=0
1245PMCAPCtrlStatus=0
1246PMCAPNextCapability=0
1247PXCAPBaseOffset=0
1248PXCAPCapId=0
1249PXCAPCapabilities=0
1250PXCAPDevCap2=0
1251PXCAPDevCapabilities=0
1252PXCAPDevCtrl=0
1253PXCAPDevCtrl2=0
1254PXCAPDevStatus=0
1255PXCAPLinkCap=0
1256PXCAPLinkCtrl=0
1257PXCAPLinkStatus=0
1258PXCAPNextCapability=0
1259ProgIF=133
1260Revision=0
1261Status=640
1262SubClassCode=1
1263SubsystemID=0
1264SubsystemVendorID=0
1265VendorID=32902
1266clk_domain=system.clk_domain
1267config_latency=20000
1268ctrl_offset=0
1269default_p_state=UNDEFINED
1270disks=system.disk0 system.disk2
1271eventq_index=0
1272host=system.tsunami.pchip
1273io_shift=0
1274p_state_clk_gate_bins=20
1275p_state_clk_gate_max=1000000000000
1276p_state_clk_gate_min=1000
1277pci_bus=0
1278pci_dev=0
1279pci_func=0
1280pio_latency=30000
1281power_model=Null
1282system=system
1283dma=system.iobus.slave[1]
1284pio=system.iobus.master[25]
1285
1286[system.tsunami.io]
1287type=TsunamiIO
1288clk_domain=system.clk_domain
1289default_p_state=UNDEFINED
1290eventq_index=0
1291frequency=976562500
1292p_state_clk_gate_bins=20
1293p_state_clk_gate_max=1000000000000
1294p_state_clk_gate_min=1000
1295pio_addr=8804615847936
1296pio_latency=100000
1297power_model=Null
1298system=system
1299time=Thu Jan 1 00:00:00 2009
1300tsunami=system.tsunami
1301year_is_bcd=false
1302pio=system.iobus.master[22]
1303
1304[system.tsunami.pchip]
1305type=TsunamiPChip
1306clk_domain=system.clk_domain
1307conf_base=8804649402368
1308conf_device_bits=8
1309conf_size=16777216
1310default_p_state=UNDEFINED
1311eventq_index=0
1312p_state_clk_gate_bins=20
1313p_state_clk_gate_max=1000000000000
1314p_state_clk_gate_min=1000
1315pci_dma_base=0
1316pci_mem_base=8796093022208
1317pci_pio_base=8804615847936
1318pio_addr=8802535473152
1319pio_latency=100000
1320platform=system.tsunami
1321power_model=Null
1322system=system
1323tsunami=system.tsunami
1324pio=system.iobus.master[1]
1325
1326[system.tsunami.uart]
1327type=Uart8250
1328clk_domain=system.clk_domain
1329default_p_state=UNDEFINED
1330eventq_index=0
1331p_state_clk_gate_bins=20
1332p_state_clk_gate_max=1000000000000
1333p_state_clk_gate_min=1000
1334pio_addr=8804615848952
1335pio_latency=100000
1336platform=system.tsunami
1337power_model=Null
1338system=system
1339terminal=system.terminal
1340pio=system.iobus.master[23]
1341
1342[system.voltage_domain]
1343type=VoltageDomain
1344eventq_index=0
1345voltage=1.000000
1346
|