1
2---------- Begin Simulation Statistics ----------
3sim_seconds 1.963613 # Number of seconds simulated
4sim_ticks 1963612574000 # Number of ticks simulated
5final_tick 1963612574000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 993881 # Simulator instruction rate (inst/s)
8host_op_rate 993880 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 32036346352 # Simulator tick rate (ticks/s)
10host_mem_usage 331076 # Number of bytes of host memory used
11host_seconds 61.29 # Real time elapsed on the host
12sim_insts 60918165 # Number of instructions simulated
13sim_ops 60918165 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu0.inst 830784 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu0.data 24731648 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu1.inst 28416 # Number of bytes read from this memory
19system.physmem.bytes_read::cpu1.data 436224 # Number of bytes read from this memory
20system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
21system.physmem.bytes_read::total 26028032 # Number of bytes read from this memory
22system.physmem.bytes_inst_read::cpu0.inst 830784 # Number of instructions bytes read from this memory
23system.physmem.bytes_inst_read::cpu1.inst 28416 # Number of instructions bytes read from this memory
--- 281 unchanged lines hidden (view full) ---
305system.physmem_1.preBackEnergy 1119766169250 # Energy for precharge background per rank (pJ)
306system.physmem_1.totalEnergy 1316973612660 # Total energy per rank (pJ)
307system.physmem_1.averagePower 670.691088 # Core power per rank (mW)
308system.physmem_1.memoryStateTime::IDLE 1862592163500 # Time in different power states
309system.physmem_1.memoryStateTime::REF 65569140000 # Time in different power states
310system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
311system.physmem_1.memoryStateTime::ACT 35445557750 # Time in different power states
312system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
313system.cpu_clk_domain.clock 500 # Clock period in ticks
314system.cpu0.dtb.fetch_hits 0 # ITB hits
315system.cpu0.dtb.fetch_misses 0 # ITB misses
316system.cpu0.dtb.fetch_acv 0 # ITB acv
317system.cpu0.dtb.fetch_accesses 0 # ITB accesses
318system.cpu0.dtb.read_hits 7494168 # DTB read hits
319system.cpu0.dtb.read_misses 7443 # DTB read misses
320system.cpu0.dtb.read_acv 210 # DTB read access violations
--- 17 unchanged lines hidden (view full) ---
338system.cpu0.itb.write_hits 0 # DTB write hits
339system.cpu0.itb.write_misses 0 # DTB write misses
340system.cpu0.itb.write_acv 0 # DTB write access violations
341system.cpu0.itb.write_accesses 0 # DTB write accesses
342system.cpu0.itb.data_hits 0 # DTB hits
343system.cpu0.itb.data_misses 0 # DTB misses
344system.cpu0.itb.data_acv 0 # DTB access violations
345system.cpu0.itb.data_accesses 0 # DTB accesses
346system.cpu0.numCycles 3925790590 # number of cpu cycles simulated
347system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
348system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
349system.cpu0.kern.inst.arm 0 # number of arm instructions executed
350system.cpu0.kern.inst.quiesce 6796 # number of quiesce instructions executed
351system.cpu0.kern.inst.hwrei 164911 # number of hwrei instructions executed
352system.cpu0.kern.ipl_count::0 56822 40.19% 40.19% # number of times we switched to this ipl
353system.cpu0.kern.ipl_count::21 131 0.09% 40.28% # number of times we switched to this ipl
--- 131 unchanged lines hidden (view full) ---
485system.cpu0.op_class::SimdFloatMult 0 0.00% 71.70% # Class of executed instruction
486system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 71.70% # Class of executed instruction
487system.cpu0.op_class::SimdFloatSqrt 0 0.00% 71.70% # Class of executed instruction
488system.cpu0.op_class::MemRead 7696642 16.11% 87.81% # Class of executed instruction
489system.cpu0.op_class::MemWrite 5084839 10.65% 98.46% # Class of executed instruction
490system.cpu0.op_class::IprAccess 735920 1.54% 100.00% # Class of executed instruction
491system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
492system.cpu0.op_class::total 47764191 # Class of executed instruction
493system.cpu0.dcache.tags.replacements 1179864 # number of replacements
494system.cpu0.dcache.tags.tagsinuse 505.229406 # Cycle average of tags in use
495system.cpu0.dcache.tags.total_refs 11369687 # Total number of references to valid blocks.
496system.cpu0.dcache.tags.sampled_refs 1180280 # Sample count of references to valid blocks.
497system.cpu0.dcache.tags.avg_refs 9.633042 # Average number of references to valid blocks.
498system.cpu0.dcache.tags.warmup_cycle 114940500 # Cycle when the warmup percentage was hit.
499system.cpu0.dcache.tags.occ_blocks::cpu0.data 505.229406 # Average occupied blocks per requestor
500system.cpu0.dcache.tags.occ_percent::cpu0.data 0.986776 # Average percentage of cache occupancy
501system.cpu0.dcache.tags.occ_percent::total 0.986776 # Average percentage of cache occupancy
502system.cpu0.dcache.tags.occ_task_id_blocks::1024 416 # Occupied blocks per task id
503system.cpu0.dcache.tags.age_task_id_blocks_1024::2 369 # Occupied blocks per task id
504system.cpu0.dcache.tags.age_task_id_blocks_1024::3 47 # Occupied blocks per task id
505system.cpu0.dcache.tags.occ_task_id_percent::1024 0.812500 # Percentage of cache occupancy per task id
506system.cpu0.dcache.tags.tag_accesses 51471495 # Number of tag accesses
507system.cpu0.dcache.tags.data_accesses 51471495 # Number of data accesses
508system.cpu0.dcache.ReadReq_hits::cpu0.data 6411173 # number of ReadReq hits
509system.cpu0.dcache.ReadReq_hits::total 6411173 # number of ReadReq hits
510system.cpu0.dcache.WriteReq_hits::cpu0.data 4657733 # number of WriteReq hits
511system.cpu0.dcache.WriteReq_hits::total 4657733 # number of WriteReq hits
512system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 143918 # number of LoadLockedReq hits
513system.cpu0.dcache.LoadLockedReq_hits::total 143918 # number of LoadLockedReq hits
514system.cpu0.dcache.StoreCondReq_hits::cpu0.data 147952 # number of StoreCondReq hits
515system.cpu0.dcache.StoreCondReq_hits::total 147952 # number of StoreCondReq hits
--- 126 unchanged lines hidden (view full) ---
642system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 32733.272176 # average overall mshr miss latency
643system.cpu0.dcache.demand_avg_mshr_miss_latency::total 32733.272176 # average overall mshr miss latency
644system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu0.data 32733.272176 # average overall mshr miss latency
645system.cpu0.dcache.overall_avg_mshr_miss_latency::total 32733.272176 # average overall mshr miss latency
646system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 222006.821378 # average ReadReq mshr uncacheable latency
647system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 222006.821378 # average ReadReq mshr uncacheable latency
648system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 87951.663231 # average overall mshr uncacheable latency
649system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 87951.663231 # average overall mshr uncacheable latency
650system.cpu0.icache.tags.replacements 698162 # number of replacements
651system.cpu0.icache.tags.tagsinuse 508.148952 # Cycle average of tags in use
652system.cpu0.icache.tags.total_refs 47065399 # Total number of references to valid blocks.
653system.cpu0.icache.tags.sampled_refs 698674 # Sample count of references to valid blocks.
654system.cpu0.icache.tags.avg_refs 67.363891 # Average number of references to valid blocks.
655system.cpu0.icache.tags.warmup_cycle 42439448500 # Cycle when the warmup percentage was hit.
656system.cpu0.icache.tags.occ_blocks::cpu0.inst 508.148952 # Average occupied blocks per requestor
657system.cpu0.icache.tags.occ_percent::cpu0.inst 0.992478 # Average percentage of cache occupancy
658system.cpu0.icache.tags.occ_percent::total 0.992478 # Average percentage of cache occupancy
659system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
660system.cpu0.icache.tags.age_task_id_blocks_1024::2 351 # Occupied blocks per task id
661system.cpu0.icache.tags.age_task_id_blocks_1024::3 161 # Occupied blocks per task id
662system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
663system.cpu0.icache.tags.tag_accesses 48462983 # Number of tag accesses
664system.cpu0.icache.tags.data_accesses 48462983 # Number of data accesses
665system.cpu0.icache.ReadReq_hits::cpu0.inst 47065399 # number of ReadReq hits
666system.cpu0.icache.ReadReq_hits::total 47065399 # number of ReadReq hits
667system.cpu0.icache.demand_hits::cpu0.inst 47065399 # number of demand (read+write) hits
668system.cpu0.icache.demand_hits::total 47065399 # number of demand (read+write) hits
669system.cpu0.icache.overall_hits::cpu0.inst 47065399 # number of overall hits
670system.cpu0.icache.overall_hits::total 47065399 # number of overall hits
671system.cpu0.icache.ReadReq_misses::cpu0.inst 698792 # number of ReadReq misses
672system.cpu0.icache.ReadReq_misses::total 698792 # number of ReadReq misses
--- 84 unchanged lines hidden (view full) ---
757system.cpu1.itb.write_hits 0 # DTB write hits
758system.cpu1.itb.write_misses 0 # DTB write misses
759system.cpu1.itb.write_acv 0 # DTB write access violations
760system.cpu1.itb.write_accesses 0 # DTB write accesses
761system.cpu1.itb.data_hits 0 # DTB hits
762system.cpu1.itb.data_misses 0 # DTB misses
763system.cpu1.itb.data_acv 0 # DTB access violations
764system.cpu1.itb.data_accesses 0 # DTB accesses
765system.cpu1.numCycles 3927225148 # number of cpu cycles simulated
766system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
767system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
768system.cpu1.kern.inst.arm 0 # number of arm instructions executed
769system.cpu1.kern.inst.quiesce 2740 # number of quiesce instructions executed
770system.cpu1.kern.inst.hwrei 78631 # number of hwrei instructions executed
771system.cpu1.kern.ipl_count::0 26567 38.35% 38.35% # number of times we switched to this ipl
772system.cpu1.kern.ipl_count::22 1968 2.84% 41.19% # number of times we switched to this ipl
--- 110 unchanged lines hidden (view full) ---
883system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction
884system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction
885system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction
886system.cpu1.op_class::MemRead 2507774 19.05% 83.79% # Class of executed instruction
887system.cpu1.op_class::MemWrite 1769717 13.44% 97.23% # Class of executed instruction
888system.cpu1.op_class::IprAccess 364421 2.77% 100.00% # Class of executed instruction
889system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
890system.cpu1.op_class::total 13165936 # Class of executed instruction
891system.cpu1.dcache.tags.replacements 166516 # number of replacements
892system.cpu1.dcache.tags.tagsinuse 486.373615 # Cycle average of tags in use
893system.cpu1.dcache.tags.total_refs 4012325 # Total number of references to valid blocks.
894system.cpu1.dcache.tags.sampled_refs 167028 # Sample count of references to valid blocks.
895system.cpu1.dcache.tags.avg_refs 24.021871 # Average number of references to valid blocks.
896system.cpu1.dcache.tags.warmup_cycle 70707818000 # Cycle when the warmup percentage was hit.
897system.cpu1.dcache.tags.occ_blocks::cpu1.data 486.373615 # Average occupied blocks per requestor
898system.cpu1.dcache.tags.occ_percent::cpu1.data 0.949948 # Average percentage of cache occupancy
899system.cpu1.dcache.tags.occ_percent::total 0.949948 # Average percentage of cache occupancy
900system.cpu1.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
901system.cpu1.dcache.tags.age_task_id_blocks_1024::0 192 # Occupied blocks per task id
902system.cpu1.dcache.tags.age_task_id_blocks_1024::1 255 # Occupied blocks per task id
903system.cpu1.dcache.tags.age_task_id_blocks_1024::2 65 # Occupied blocks per task id
904system.cpu1.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
905system.cpu1.dcache.tags.tag_accesses 16958396 # Number of tag accesses
906system.cpu1.dcache.tags.data_accesses 16958396 # Number of data accesses
907system.cpu1.dcache.ReadReq_hits::cpu1.data 2257201 # number of ReadReq hits
908system.cpu1.dcache.ReadReq_hits::total 2257201 # number of ReadReq hits
909system.cpu1.dcache.WriteReq_hits::cpu1.data 1642023 # number of WriteReq hits
910system.cpu1.dcache.WriteReq_hits::total 1642023 # number of WriteReq hits
911system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 48215 # number of LoadLockedReq hits
912system.cpu1.dcache.LoadLockedReq_hits::total 48215 # number of LoadLockedReq hits
913system.cpu1.dcache.StoreCondReq_hits::cpu1.data 50821 # number of StoreCondReq hits
914system.cpu1.dcache.StoreCondReq_hits::total 50821 # number of StoreCondReq hits
--- 134 unchanged lines hidden (view full) ---
1049system.cpu1.dcache.demand_avg_mshr_miss_latency::cpu1.data 14022.507897 # average overall mshr miss latency
1050system.cpu1.dcache.demand_avg_mshr_miss_latency::total 14022.507897 # average overall mshr miss latency
1051system.cpu1.dcache.overall_avg_mshr_miss_latency::cpu1.data 14022.507897 # average overall mshr miss latency
1052system.cpu1.dcache.overall_avg_mshr_miss_latency::total 14022.507897 # average overall mshr miss latency
1053system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 226674.157303 # average ReadReq mshr uncacheable latency
1054system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total 226674.157303 # average ReadReq mshr uncacheable latency
1055system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 6094.864048 # average overall mshr uncacheable latency
1056system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total 6094.864048 # average overall mshr uncacheable latency
1057system.cpu1.icache.tags.replacements 316153 # number of replacements
1058system.cpu1.icache.tags.tagsinuse 445.936315 # Cycle average of tags in use
1059system.cpu1.icache.tags.total_refs 12849230 # Total number of references to valid blocks.
1060system.cpu1.icache.tags.sampled_refs 316665 # Sample count of references to valid blocks.
1061system.cpu1.icache.tags.avg_refs 40.576729 # Average number of references to valid blocks.
1062system.cpu1.icache.tags.warmup_cycle 1962762014000 # Cycle when the warmup percentage was hit.
1063system.cpu1.icache.tags.occ_blocks::cpu1.inst 445.936315 # Average occupied blocks per requestor
1064system.cpu1.icache.tags.occ_percent::cpu1.inst 0.870969 # Average percentage of cache occupancy
1065system.cpu1.icache.tags.occ_percent::total 0.870969 # Average percentage of cache occupancy
1066system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
1067system.cpu1.icache.tags.age_task_id_blocks_1024::0 52 # Occupied blocks per task id
1068system.cpu1.icache.tags.age_task_id_blocks_1024::1 3 # Occupied blocks per task id
1069system.cpu1.icache.tags.age_task_id_blocks_1024::2 444 # Occupied blocks per task id
1070system.cpu1.icache.tags.age_task_id_blocks_1024::3 13 # Occupied blocks per task id
1071system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
1072system.cpu1.icache.tags.tag_accesses 13482644 # Number of tag accesses
1073system.cpu1.icache.tags.data_accesses 13482644 # Number of data accesses
1074system.cpu1.icache.ReadReq_hits::cpu1.inst 12849230 # number of ReadReq hits
1075system.cpu1.icache.ReadReq_hits::total 12849230 # number of ReadReq hits
1076system.cpu1.icache.demand_hits::cpu1.inst 12849230 # number of demand (read+write) hits
1077system.cpu1.icache.demand_hits::total 12849230 # number of demand (read+write) hits
1078system.cpu1.icache.overall_hits::cpu1.inst 12849230 # number of overall hits
1079system.cpu1.icache.overall_hits::total 12849230 # number of overall hits
1080system.cpu1.icache.ReadReq_misses::cpu1.inst 316707 # number of ReadReq misses
1081system.cpu1.icache.ReadReq_misses::total 316707 # number of ReadReq misses
--- 64 unchanged lines hidden (view full) ---
1146system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
1147system.disk0.dma_write_txs 395 # Number of DMA write transactions.
1148system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
1149system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
1150system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
1151system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
1152system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
1153system.disk2.dma_write_txs 1 # Number of DMA write transactions.
1154system.iobus.trans_dist::ReadReq 7373 # Transaction distribution
1155system.iobus.trans_dist::ReadResp 7373 # Transaction distribution
1156system.iobus.trans_dist::WriteReq 55610 # Transaction distribution
1157system.iobus.trans_dist::WriteResp 55610 # Transaction distribution
1158system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 13904 # Packet count per connected master and slave (bytes)
1159system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes)
1160system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes)
1161system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes)
--- 38 unchanged lines hidden (view full) ---
1200system.iobus.reqLayer26.occupancy 82500 # Layer occupancy (ticks)
1201system.iobus.reqLayer26.utilization 0.0 # Layer utilization (%)
1202system.iobus.reqLayer27.occupancy 216128057 # Layer occupancy (ticks)
1203system.iobus.reqLayer27.utilization 0.0 # Layer utilization (%)
1204system.iobus.respLayer0.occupancy 28456000 # Layer occupancy (ticks)
1205system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
1206system.iobus.respLayer1.occupancy 41948000 # Layer occupancy (ticks)
1207system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
1208system.iocache.tags.replacements 41694 # number of replacements
1209system.iocache.tags.tagsinuse 0.569299 # Cycle average of tags in use
1210system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
1211system.iocache.tags.sampled_refs 41710 # Sample count of references to valid blocks.
1212system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
1213system.iocache.tags.warmup_cycle 1756488432000 # Cycle when the warmup percentage was hit.
1214system.iocache.tags.occ_blocks::tsunami.ide 0.569299 # Average occupied blocks per requestor
1215system.iocache.tags.occ_percent::tsunami.ide 0.035581 # Average percentage of cache occupancy
1216system.iocache.tags.occ_percent::total 0.035581 # Average percentage of cache occupancy
1217system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
1218system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
1219system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
1220system.iocache.tags.tag_accesses 375534 # Number of tag accesses
1221system.iocache.tags.data_accesses 375534 # Number of data accesses
1222system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses
1223system.iocache.ReadReq_misses::total 174 # number of ReadReq misses
1224system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
1225system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses
1226system.iocache.demand_misses::tsunami.ide 41726 # number of demand (read+write) misses
1227system.iocache.demand_misses::total 41726 # number of demand (read+write) misses
1228system.iocache.overall_misses::tsunami.ide 41726 # number of overall misses
1229system.iocache.overall_misses::total 41726 # number of overall misses
--- 64 unchanged lines hidden (view full) ---
1294system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 75602.775862 # average ReadReq mshr miss latency
1295system.iocache.ReadReq_avg_mshr_miss_latency::total 75602.775862 # average ReadReq mshr miss latency
1296system.iocache.WriteLineReq_avg_mshr_miss_latency::tsunami.ide 66863.800924 # average WriteLineReq mshr miss latency
1297system.iocache.WriteLineReq_avg_mshr_miss_latency::total 66863.800924 # average WriteLineReq mshr miss latency
1298system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 66900.242990 # average overall mshr miss latency
1299system.iocache.demand_avg_mshr_miss_latency::total 66900.242990 # average overall mshr miss latency
1300system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 66900.242990 # average overall mshr miss latency
1301system.iocache.overall_avg_mshr_miss_latency::total 66900.242990 # average overall mshr miss latency
1302system.l2c.tags.replacements 341504 # number of replacements
1303system.l2c.tags.tagsinuse 65213.029486 # Cycle average of tags in use
1304system.l2c.tags.total_refs 3680110 # Total number of references to valid blocks.
1305system.l2c.tags.sampled_refs 406507 # Sample count of references to valid blocks.
1306system.l2c.tags.avg_refs 9.053005 # Average number of references to valid blocks.
1307system.l2c.tags.warmup_cycle 9200946000 # Cycle when the warmup percentage was hit.
1308system.l2c.tags.occ_blocks::writebacks 55179.216512 # Average occupied blocks per requestor
1309system.l2c.tags.occ_blocks::cpu0.inst 4842.215722 # Average occupied blocks per requestor
--- 10 unchanged lines hidden (view full) ---
1320system.l2c.tags.age_task_id_blocks_1024::0 184 # Occupied blocks per task id
1321system.l2c.tags.age_task_id_blocks_1024::1 1114 # Occupied blocks per task id
1322system.l2c.tags.age_task_id_blocks_1024::2 5002 # Occupied blocks per task id
1323system.l2c.tags.age_task_id_blocks_1024::3 6095 # Occupied blocks per task id
1324system.l2c.tags.age_task_id_blocks_1024::4 52608 # Occupied blocks per task id
1325system.l2c.tags.occ_task_id_percent::1024 0.991867 # Percentage of cache occupancy per task id
1326system.l2c.tags.tag_accesses 35882279 # Number of tag accesses
1327system.l2c.tags.data_accesses 35882279 # Number of data accesses
1328system.l2c.WritebackDirty_hits::writebacks 792706 # number of WritebackDirty hits
1329system.l2c.WritebackDirty_hits::total 792706 # number of WritebackDirty hits
1330system.l2c.WritebackClean_hits::writebacks 747201 # number of WritebackClean hits
1331system.l2c.WritebackClean_hits::total 747201 # number of WritebackClean hits
1332system.l2c.UpgradeReq_hits::cpu0.data 175 # number of UpgradeReq hits
1333system.l2c.UpgradeReq_hits::cpu1.data 534 # number of UpgradeReq hits
1334system.l2c.UpgradeReq_hits::total 709 # number of UpgradeReq hits
1335system.l2c.SCUpgradeReq_hits::cpu0.data 33 # number of SCUpgradeReq hits
--- 287 unchanged lines hidden (view full) ---
1623system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 5758.610272 # average overall mshr uncacheable latency
1624system.l2c.overall_avg_mshr_uncacheable_latency::total 70970.527356 # average overall mshr uncacheable latency
1625system.membus.snoop_filter.tot_requests 859272 # Total number of requests made to the snoop filter.
1626system.membus.snoop_filter.hit_single_requests 411340 # Number of requests hitting in the snoop filter with a single holder of the requested data.
1627system.membus.snoop_filter.hit_multi_requests 409 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
1628system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
1629system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
1630system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
1631system.membus.trans_dist::ReadReq 7199 # Transaction distribution
1632system.membus.trans_dist::ReadResp 292676 # Transaction distribution
1633system.membus.trans_dist::WriteReq 14058 # Transaction distribution
1634system.membus.trans_dist::WriteResp 14058 # Transaction distribution
1635system.membus.trans_dist::WritebackDirty 120457 # Transaction distribution
1636system.membus.trans_dist::CleanEvict 261938 # Transaction distribution
1637system.membus.trans_dist::UpgradeReq 16120 # Transaction distribution
1638system.membus.trans_dist::SCUpgradeReq 11242 # Transaction distribution
--- 29 unchanged lines hidden (view full) ---
1668system.membus.reqLayer0.occupancy 40353000 # Layer occupancy (ticks)
1669system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
1670system.membus.reqLayer1.occupancy 1324238537 # Layer occupancy (ticks)
1671system.membus.reqLayer1.utilization 0.1 # Layer utilization (%)
1672system.membus.respLayer1.occupancy 2174676250 # Layer occupancy (ticks)
1673system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
1674system.membus.respLayer2.occupancy 893117 # Layer occupancy (ticks)
1675system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
1676system.toL2Bus.snoop_filter.tot_requests 4780466 # Total number of requests made to the snoop filter.
1677system.toL2Bus.snoop_filter.hit_single_requests 2390280 # Number of requests hitting in the snoop filter with a single holder of the requested data.
1678system.toL2Bus.snoop_filter.hit_multi_requests 355276 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
1679system.toL2Bus.snoop_filter.tot_snoops 975 # Total number of snoops made to the snoop filter.
1680system.toL2Bus.snoop_filter.hit_single_snoops 915 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
1681system.toL2Bus.snoop_filter.hit_multi_snoops 60 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
1682system.toL2Bus.trans_dist::ReadReq 7199 # Transaction distribution
1683system.toL2Bus.trans_dist::ReadResp 2101675 # Transaction distribution
1684system.toL2Bus.trans_dist::WriteReq 14058 # Transaction distribution
1685system.toL2Bus.trans_dist::WriteResp 14058 # Transaction distribution
1686system.toL2Bus.trans_dist::WritebackDirty 871643 # Transaction distribution
1687system.toL2Bus.trans_dist::WritebackClean 1014315 # Transaction distribution
1688system.toL2Bus.trans_dist::CleanEvict 816241 # Transaction distribution
1689system.toL2Bus.trans_dist::UpgradeReq 16314 # Transaction distribution
--- 37 unchanged lines hidden (view full) ---
1727system.toL2Bus.respLayer0.occupancy 1048435504 # Layer occupancy (ticks)
1728system.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
1729system.toL2Bus.respLayer1.occupancy 1811762602 # Layer occupancy (ticks)
1730system.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%)
1731system.toL2Bus.respLayer2.occupancy 476230655 # Layer occupancy (ticks)
1732system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
1733system.toL2Bus.respLayer3.occupancy 281513896 # Layer occupancy (ticks)
1734system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
1735system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
1736system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
1737system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
1738system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
1739system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
1740system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
1741system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
1742system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
--- 15 unchanged lines hidden (view full) ---
1758system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
1759system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
1760system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
1761system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
1762system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
1763system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
1764system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
1765system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
1766
1767---------- End Simulation Statistics ----------
2---------- Begin Simulation Statistics ----------
3sim_seconds 1.963613 # Number of seconds simulated
4sim_ticks 1963612574000 # Number of ticks simulated
5final_tick 1963612574000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 993881 # Simulator instruction rate (inst/s)
8host_op_rate 993880 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 32036346352 # Simulator tick rate (ticks/s)
10host_mem_usage 331076 # Number of bytes of host memory used
11host_seconds 61.29 # Real time elapsed on the host
12sim_insts 60918165 # Number of instructions simulated
13sim_ops 60918165 # Number of ops (including micro ops) simulated
14system.voltage_domain.voltage 1 # Voltage in Volts
15system.clk_domain.clock 1000 # Clock period in ticks
16system.physmem.bytes_read::cpu0.inst 830784 # Number of bytes read from this memory
17system.physmem.bytes_read::cpu0.data 24731648 # Number of bytes read from this memory
18system.physmem.bytes_read::cpu1.inst 28416 # Number of bytes read from this memory
19system.physmem.bytes_read::cpu1.data 436224 # Number of bytes read from this memory
20system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory
21system.physmem.bytes_read::total 26028032 # Number of bytes read from this memory
22system.physmem.bytes_inst_read::cpu0.inst 830784 # Number of instructions bytes read from this memory
23system.physmem.bytes_inst_read::cpu1.inst 28416 # Number of instructions bytes read from this memory
--- 281 unchanged lines hidden (view full) ---
305system.physmem_1.preBackEnergy 1119766169250 # Energy for precharge background per rank (pJ)
306system.physmem_1.totalEnergy 1316973612660 # Total energy per rank (pJ)
307system.physmem_1.averagePower 670.691088 # Core power per rank (mW)
308system.physmem_1.memoryStateTime::IDLE 1862592163500 # Time in different power states
309system.physmem_1.memoryStateTime::REF 65569140000 # Time in different power states
310system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states
311system.physmem_1.memoryStateTime::ACT 35445557750 # Time in different power states
312system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states
313system.cpu_clk_domain.clock 500 # Clock period in ticks
314system.cpu0.dtb.fetch_hits 0 # ITB hits
315system.cpu0.dtb.fetch_misses 0 # ITB misses
316system.cpu0.dtb.fetch_acv 0 # ITB acv
317system.cpu0.dtb.fetch_accesses 0 # ITB accesses
318system.cpu0.dtb.read_hits 7494168 # DTB read hits
319system.cpu0.dtb.read_misses 7443 # DTB read misses
320system.cpu0.dtb.read_acv 210 # DTB read access violations
--- 17 unchanged lines hidden (view full) ---
338system.cpu0.itb.write_hits 0 # DTB write hits
339system.cpu0.itb.write_misses 0 # DTB write misses
340system.cpu0.itb.write_acv 0 # DTB write access violations
341system.cpu0.itb.write_accesses 0 # DTB write accesses
342system.cpu0.itb.data_hits 0 # DTB hits
343system.cpu0.itb.data_misses 0 # DTB misses
344system.cpu0.itb.data_acv 0 # DTB access violations
345system.cpu0.itb.data_accesses 0 # DTB accesses
346system.cpu0.numCycles 3925790590 # number of cpu cycles simulated
347system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
348system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
349system.cpu0.kern.inst.arm 0 # number of arm instructions executed
350system.cpu0.kern.inst.quiesce 6796 # number of quiesce instructions executed
351system.cpu0.kern.inst.hwrei 164911 # number of hwrei instructions executed
352system.cpu0.kern.ipl_count::0 56822 40.19% 40.19% # number of times we switched to this ipl
353system.cpu0.kern.ipl_count::21 131 0.09% 40.28% # number of times we switched to this ipl
--- 131 unchanged lines hidden (view full) ---
485system.cpu0.op_class::SimdFloatMult 0 0.00% 71.70% # Class of executed instruction
486system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 71.70% # Class of executed instruction
487system.cpu0.op_class::SimdFloatSqrt 0 0.00% 71.70% # Class of executed instruction
488system.cpu0.op_class::MemRead 7696642 16.11% 87.81% # Class of executed instruction
489system.cpu0.op_class::MemWrite 5084839 10.65% 98.46% # Class of executed instruction
490system.cpu0.op_class::IprAccess 735920 1.54% 100.00% # Class of executed instruction
491system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
492system.cpu0.op_class::total 47764191 # Class of executed instruction
493system.cpu0.dcache.tags.replacements 1179864 # number of replacements
494system.cpu0.dcache.tags.tagsinuse 505.229406 # Cycle average of tags in use
495system.cpu0.dcache.tags.total_refs 11369687 # Total number of references to valid blocks.
496system.cpu0.dcache.tags.sampled_refs 1180280 # Sample count of references to valid blocks.
497system.cpu0.dcache.tags.avg_refs 9.633042 # Average number of references to valid blocks.
498system.cpu0.dcache.tags.warmup_cycle 114940500 # Cycle when the warmup percentage was hit.
499system.cpu0.dcache.tags.occ_blocks::cpu0.data 505.229406 # Average occupied blocks per requestor
500system.cpu0.dcache.tags.occ_percent::cpu0.data 0.986776 # Average percentage of cache occupancy
501system.cpu0.dcache.tags.occ_percent::total 0.986776 # Average percentage of cache occupancy
502system.cpu0.dcache.tags.occ_task_id_blocks::1024 416 # Occupied blocks per task id
503system.cpu0.dcache.tags.age_task_id_blocks_1024::2 369 # Occupied blocks per task id
504system.cpu0.dcache.tags.age_task_id_blocks_1024::3 47 # Occupied blocks per task id
505system.cpu0.dcache.tags.occ_task_id_percent::1024 0.812500 # Percentage of cache occupancy per task id
506system.cpu0.dcache.tags.tag_accesses 51471495 # Number of tag accesses
507system.cpu0.dcache.tags.data_accesses 51471495 # Number of data accesses
508system.cpu0.dcache.ReadReq_hits::cpu0.data 6411173 # number of ReadReq hits
509system.cpu0.dcache.ReadReq_hits::total 6411173 # number of ReadReq hits
510system.cpu0.dcache.WriteReq_hits::cpu0.data 4657733 # number of WriteReq hits
511system.cpu0.dcache.WriteReq_hits::total 4657733 # number of WriteReq hits
512system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 143918 # number of LoadLockedReq hits
513system.cpu0.dcache.LoadLockedReq_hits::total 143918 # number of LoadLockedReq hits
514system.cpu0.dcache.StoreCondReq_hits::cpu0.data 147952 # number of StoreCondReq hits
515system.cpu0.dcache.StoreCondReq_hits::total 147952 # number of StoreCondReq hits
--- 126 unchanged lines hidden (view full) ---
642system.cpu0.dcache.demand_avg_mshr_miss_latency::cpu0.data 32733.272176 # average overall mshr miss latency
643system.cpu0.dcache.demand_avg_mshr_miss_latency::total 32733.272176 # average overall mshr miss latency
644system.cpu0.dcache.overall_avg_mshr_miss_latency::cpu0.data 32733.272176 # average overall mshr miss latency
645system.cpu0.dcache.overall_avg_mshr_miss_latency::total 32733.272176 # average overall mshr miss latency
646system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu0.data 222006.821378 # average ReadReq mshr uncacheable latency
647system.cpu0.dcache.ReadReq_avg_mshr_uncacheable_latency::total 222006.821378 # average ReadReq mshr uncacheable latency
648system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::cpu0.data 87951.663231 # average overall mshr uncacheable latency
649system.cpu0.dcache.overall_avg_mshr_uncacheable_latency::total 87951.663231 # average overall mshr uncacheable latency
650system.cpu0.icache.tags.replacements 698162 # number of replacements
651system.cpu0.icache.tags.tagsinuse 508.148952 # Cycle average of tags in use
652system.cpu0.icache.tags.total_refs 47065399 # Total number of references to valid blocks.
653system.cpu0.icache.tags.sampled_refs 698674 # Sample count of references to valid blocks.
654system.cpu0.icache.tags.avg_refs 67.363891 # Average number of references to valid blocks.
655system.cpu0.icache.tags.warmup_cycle 42439448500 # Cycle when the warmup percentage was hit.
656system.cpu0.icache.tags.occ_blocks::cpu0.inst 508.148952 # Average occupied blocks per requestor
657system.cpu0.icache.tags.occ_percent::cpu0.inst 0.992478 # Average percentage of cache occupancy
658system.cpu0.icache.tags.occ_percent::total 0.992478 # Average percentage of cache occupancy
659system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
660system.cpu0.icache.tags.age_task_id_blocks_1024::2 351 # Occupied blocks per task id
661system.cpu0.icache.tags.age_task_id_blocks_1024::3 161 # Occupied blocks per task id
662system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
663system.cpu0.icache.tags.tag_accesses 48462983 # Number of tag accesses
664system.cpu0.icache.tags.data_accesses 48462983 # Number of data accesses
665system.cpu0.icache.ReadReq_hits::cpu0.inst 47065399 # number of ReadReq hits
666system.cpu0.icache.ReadReq_hits::total 47065399 # number of ReadReq hits
667system.cpu0.icache.demand_hits::cpu0.inst 47065399 # number of demand (read+write) hits
668system.cpu0.icache.demand_hits::total 47065399 # number of demand (read+write) hits
669system.cpu0.icache.overall_hits::cpu0.inst 47065399 # number of overall hits
670system.cpu0.icache.overall_hits::total 47065399 # number of overall hits
671system.cpu0.icache.ReadReq_misses::cpu0.inst 698792 # number of ReadReq misses
672system.cpu0.icache.ReadReq_misses::total 698792 # number of ReadReq misses
--- 84 unchanged lines hidden (view full) ---
757system.cpu1.itb.write_hits 0 # DTB write hits
758system.cpu1.itb.write_misses 0 # DTB write misses
759system.cpu1.itb.write_acv 0 # DTB write access violations
760system.cpu1.itb.write_accesses 0 # DTB write accesses
761system.cpu1.itb.data_hits 0 # DTB hits
762system.cpu1.itb.data_misses 0 # DTB misses
763system.cpu1.itb.data_acv 0 # DTB access violations
764system.cpu1.itb.data_accesses 0 # DTB accesses
765system.cpu1.numCycles 3927225148 # number of cpu cycles simulated
766system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
767system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
768system.cpu1.kern.inst.arm 0 # number of arm instructions executed
769system.cpu1.kern.inst.quiesce 2740 # number of quiesce instructions executed
770system.cpu1.kern.inst.hwrei 78631 # number of hwrei instructions executed
771system.cpu1.kern.ipl_count::0 26567 38.35% 38.35% # number of times we switched to this ipl
772system.cpu1.kern.ipl_count::22 1968 2.84% 41.19% # number of times we switched to this ipl
--- 110 unchanged lines hidden (view full) ---
883system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction
884system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction
885system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction
886system.cpu1.op_class::MemRead 2507774 19.05% 83.79% # Class of executed instruction
887system.cpu1.op_class::MemWrite 1769717 13.44% 97.23% # Class of executed instruction
888system.cpu1.op_class::IprAccess 364421 2.77% 100.00% # Class of executed instruction
889system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
890system.cpu1.op_class::total 13165936 # Class of executed instruction
891system.cpu1.dcache.tags.replacements 166516 # number of replacements
892system.cpu1.dcache.tags.tagsinuse 486.373615 # Cycle average of tags in use
893system.cpu1.dcache.tags.total_refs 4012325 # Total number of references to valid blocks.
894system.cpu1.dcache.tags.sampled_refs 167028 # Sample count of references to valid blocks.
895system.cpu1.dcache.tags.avg_refs 24.021871 # Average number of references to valid blocks.
896system.cpu1.dcache.tags.warmup_cycle 70707818000 # Cycle when the warmup percentage was hit.
897system.cpu1.dcache.tags.occ_blocks::cpu1.data 486.373615 # Average occupied blocks per requestor
898system.cpu1.dcache.tags.occ_percent::cpu1.data 0.949948 # Average percentage of cache occupancy
899system.cpu1.dcache.tags.occ_percent::total 0.949948 # Average percentage of cache occupancy
900system.cpu1.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
901system.cpu1.dcache.tags.age_task_id_blocks_1024::0 192 # Occupied blocks per task id
902system.cpu1.dcache.tags.age_task_id_blocks_1024::1 255 # Occupied blocks per task id
903system.cpu1.dcache.tags.age_task_id_blocks_1024::2 65 # Occupied blocks per task id
904system.cpu1.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
905system.cpu1.dcache.tags.tag_accesses 16958396 # Number of tag accesses
906system.cpu1.dcache.tags.data_accesses 16958396 # Number of data accesses
907system.cpu1.dcache.ReadReq_hits::cpu1.data 2257201 # number of ReadReq hits
908system.cpu1.dcache.ReadReq_hits::total 2257201 # number of ReadReq hits
909system.cpu1.dcache.WriteReq_hits::cpu1.data 1642023 # number of WriteReq hits
910system.cpu1.dcache.WriteReq_hits::total 1642023 # number of WriteReq hits
911system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 48215 # number of LoadLockedReq hits
912system.cpu1.dcache.LoadLockedReq_hits::total 48215 # number of LoadLockedReq hits
913system.cpu1.dcache.StoreCondReq_hits::cpu1.data 50821 # number of StoreCondReq hits
914system.cpu1.dcache.StoreCondReq_hits::total 50821 # number of StoreCondReq hits
--- 134 unchanged lines hidden (view full) ---
1049system.cpu1.dcache.demand_avg_mshr_miss_latency::cpu1.data 14022.507897 # average overall mshr miss latency
1050system.cpu1.dcache.demand_avg_mshr_miss_latency::total 14022.507897 # average overall mshr miss latency
1051system.cpu1.dcache.overall_avg_mshr_miss_latency::cpu1.data 14022.507897 # average overall mshr miss latency
1052system.cpu1.dcache.overall_avg_mshr_miss_latency::total 14022.507897 # average overall mshr miss latency
1053system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu1.data 226674.157303 # average ReadReq mshr uncacheable latency
1054system.cpu1.dcache.ReadReq_avg_mshr_uncacheable_latency::total 226674.157303 # average ReadReq mshr uncacheable latency
1055system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::cpu1.data 6094.864048 # average overall mshr uncacheable latency
1056system.cpu1.dcache.overall_avg_mshr_uncacheable_latency::total 6094.864048 # average overall mshr uncacheable latency
1057system.cpu1.icache.tags.replacements 316153 # number of replacements
1058system.cpu1.icache.tags.tagsinuse 445.936315 # Cycle average of tags in use
1059system.cpu1.icache.tags.total_refs 12849230 # Total number of references to valid blocks.
1060system.cpu1.icache.tags.sampled_refs 316665 # Sample count of references to valid blocks.
1061system.cpu1.icache.tags.avg_refs 40.576729 # Average number of references to valid blocks.
1062system.cpu1.icache.tags.warmup_cycle 1962762014000 # Cycle when the warmup percentage was hit.
1063system.cpu1.icache.tags.occ_blocks::cpu1.inst 445.936315 # Average occupied blocks per requestor
1064system.cpu1.icache.tags.occ_percent::cpu1.inst 0.870969 # Average percentage of cache occupancy
1065system.cpu1.icache.tags.occ_percent::total 0.870969 # Average percentage of cache occupancy
1066system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
1067system.cpu1.icache.tags.age_task_id_blocks_1024::0 52 # Occupied blocks per task id
1068system.cpu1.icache.tags.age_task_id_blocks_1024::1 3 # Occupied blocks per task id
1069system.cpu1.icache.tags.age_task_id_blocks_1024::2 444 # Occupied blocks per task id
1070system.cpu1.icache.tags.age_task_id_blocks_1024::3 13 # Occupied blocks per task id
1071system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
1072system.cpu1.icache.tags.tag_accesses 13482644 # Number of tag accesses
1073system.cpu1.icache.tags.data_accesses 13482644 # Number of data accesses
1074system.cpu1.icache.ReadReq_hits::cpu1.inst 12849230 # number of ReadReq hits
1075system.cpu1.icache.ReadReq_hits::total 12849230 # number of ReadReq hits
1076system.cpu1.icache.demand_hits::cpu1.inst 12849230 # number of demand (read+write) hits
1077system.cpu1.icache.demand_hits::total 12849230 # number of demand (read+write) hits
1078system.cpu1.icache.overall_hits::cpu1.inst 12849230 # number of overall hits
1079system.cpu1.icache.overall_hits::total 12849230 # number of overall hits
1080system.cpu1.icache.ReadReq_misses::cpu1.inst 316707 # number of ReadReq misses
1081system.cpu1.icache.ReadReq_misses::total 316707 # number of ReadReq misses
--- 64 unchanged lines hidden (view full) ---
1146system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
1147system.disk0.dma_write_txs 395 # Number of DMA write transactions.
1148system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
1149system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
1150system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
1151system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
1152system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
1153system.disk2.dma_write_txs 1 # Number of DMA write transactions.
1154system.iobus.trans_dist::ReadReq 7373 # Transaction distribution
1155system.iobus.trans_dist::ReadResp 7373 # Transaction distribution
1156system.iobus.trans_dist::WriteReq 55610 # Transaction distribution
1157system.iobus.trans_dist::WriteResp 55610 # Transaction distribution
1158system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 13904 # Packet count per connected master and slave (bytes)
1159system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes)
1160system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes)
1161system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes)
--- 38 unchanged lines hidden (view full) ---
1200system.iobus.reqLayer26.occupancy 82500 # Layer occupancy (ticks)
1201system.iobus.reqLayer26.utilization 0.0 # Layer utilization (%)
1202system.iobus.reqLayer27.occupancy 216128057 # Layer occupancy (ticks)
1203system.iobus.reqLayer27.utilization 0.0 # Layer utilization (%)
1204system.iobus.respLayer0.occupancy 28456000 # Layer occupancy (ticks)
1205system.iobus.respLayer0.utilization 0.0 # Layer utilization (%)
1206system.iobus.respLayer1.occupancy 41948000 # Layer occupancy (ticks)
1207system.iobus.respLayer1.utilization 0.0 # Layer utilization (%)
1208system.iocache.tags.replacements 41694 # number of replacements
1209system.iocache.tags.tagsinuse 0.569299 # Cycle average of tags in use
1210system.iocache.tags.total_refs 0 # Total number of references to valid blocks.
1211system.iocache.tags.sampled_refs 41710 # Sample count of references to valid blocks.
1212system.iocache.tags.avg_refs 0 # Average number of references to valid blocks.
1213system.iocache.tags.warmup_cycle 1756488432000 # Cycle when the warmup percentage was hit.
1214system.iocache.tags.occ_blocks::tsunami.ide 0.569299 # Average occupied blocks per requestor
1215system.iocache.tags.occ_percent::tsunami.ide 0.035581 # Average percentage of cache occupancy
1216system.iocache.tags.occ_percent::total 0.035581 # Average percentage of cache occupancy
1217system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id
1218system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id
1219system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id
1220system.iocache.tags.tag_accesses 375534 # Number of tag accesses
1221system.iocache.tags.data_accesses 375534 # Number of data accesses
1222system.iocache.ReadReq_misses::tsunami.ide 174 # number of ReadReq misses
1223system.iocache.ReadReq_misses::total 174 # number of ReadReq misses
1224system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses
1225system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses
1226system.iocache.demand_misses::tsunami.ide 41726 # number of demand (read+write) misses
1227system.iocache.demand_misses::total 41726 # number of demand (read+write) misses
1228system.iocache.overall_misses::tsunami.ide 41726 # number of overall misses
1229system.iocache.overall_misses::total 41726 # number of overall misses
--- 64 unchanged lines hidden (view full) ---
1294system.iocache.ReadReq_avg_mshr_miss_latency::tsunami.ide 75602.775862 # average ReadReq mshr miss latency
1295system.iocache.ReadReq_avg_mshr_miss_latency::total 75602.775862 # average ReadReq mshr miss latency
1296system.iocache.WriteLineReq_avg_mshr_miss_latency::tsunami.ide 66863.800924 # average WriteLineReq mshr miss latency
1297system.iocache.WriteLineReq_avg_mshr_miss_latency::total 66863.800924 # average WriteLineReq mshr miss latency
1298system.iocache.demand_avg_mshr_miss_latency::tsunami.ide 66900.242990 # average overall mshr miss latency
1299system.iocache.demand_avg_mshr_miss_latency::total 66900.242990 # average overall mshr miss latency
1300system.iocache.overall_avg_mshr_miss_latency::tsunami.ide 66900.242990 # average overall mshr miss latency
1301system.iocache.overall_avg_mshr_miss_latency::total 66900.242990 # average overall mshr miss latency
1302system.l2c.tags.replacements 341504 # number of replacements
1303system.l2c.tags.tagsinuse 65213.029486 # Cycle average of tags in use
1304system.l2c.tags.total_refs 3680110 # Total number of references to valid blocks.
1305system.l2c.tags.sampled_refs 406507 # Sample count of references to valid blocks.
1306system.l2c.tags.avg_refs 9.053005 # Average number of references to valid blocks.
1307system.l2c.tags.warmup_cycle 9200946000 # Cycle when the warmup percentage was hit.
1308system.l2c.tags.occ_blocks::writebacks 55179.216512 # Average occupied blocks per requestor
1309system.l2c.tags.occ_blocks::cpu0.inst 4842.215722 # Average occupied blocks per requestor
--- 10 unchanged lines hidden (view full) ---
1320system.l2c.tags.age_task_id_blocks_1024::0 184 # Occupied blocks per task id
1321system.l2c.tags.age_task_id_blocks_1024::1 1114 # Occupied blocks per task id
1322system.l2c.tags.age_task_id_blocks_1024::2 5002 # Occupied blocks per task id
1323system.l2c.tags.age_task_id_blocks_1024::3 6095 # Occupied blocks per task id
1324system.l2c.tags.age_task_id_blocks_1024::4 52608 # Occupied blocks per task id
1325system.l2c.tags.occ_task_id_percent::1024 0.991867 # Percentage of cache occupancy per task id
1326system.l2c.tags.tag_accesses 35882279 # Number of tag accesses
1327system.l2c.tags.data_accesses 35882279 # Number of data accesses
1328system.l2c.WritebackDirty_hits::writebacks 792706 # number of WritebackDirty hits
1329system.l2c.WritebackDirty_hits::total 792706 # number of WritebackDirty hits
1330system.l2c.WritebackClean_hits::writebacks 747201 # number of WritebackClean hits
1331system.l2c.WritebackClean_hits::total 747201 # number of WritebackClean hits
1332system.l2c.UpgradeReq_hits::cpu0.data 175 # number of UpgradeReq hits
1333system.l2c.UpgradeReq_hits::cpu1.data 534 # number of UpgradeReq hits
1334system.l2c.UpgradeReq_hits::total 709 # number of UpgradeReq hits
1335system.l2c.SCUpgradeReq_hits::cpu0.data 33 # number of SCUpgradeReq hits
--- 287 unchanged lines hidden (view full) ---
1623system.l2c.overall_avg_mshr_uncacheable_latency::cpu1.data 5758.610272 # average overall mshr uncacheable latency
1624system.l2c.overall_avg_mshr_uncacheable_latency::total 70970.527356 # average overall mshr uncacheable latency
1625system.membus.snoop_filter.tot_requests 859272 # Total number of requests made to the snoop filter.
1626system.membus.snoop_filter.hit_single_requests 411340 # Number of requests hitting in the snoop filter with a single holder of the requested data.
1627system.membus.snoop_filter.hit_multi_requests 409 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
1628system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter.
1629system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
1630system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
1631system.membus.trans_dist::ReadReq 7199 # Transaction distribution
1632system.membus.trans_dist::ReadResp 292676 # Transaction distribution
1633system.membus.trans_dist::WriteReq 14058 # Transaction distribution
1634system.membus.trans_dist::WriteResp 14058 # Transaction distribution
1635system.membus.trans_dist::WritebackDirty 120457 # Transaction distribution
1636system.membus.trans_dist::CleanEvict 261938 # Transaction distribution
1637system.membus.trans_dist::UpgradeReq 16120 # Transaction distribution
1638system.membus.trans_dist::SCUpgradeReq 11242 # Transaction distribution
--- 29 unchanged lines hidden (view full) ---
1668system.membus.reqLayer0.occupancy 40353000 # Layer occupancy (ticks)
1669system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
1670system.membus.reqLayer1.occupancy 1324238537 # Layer occupancy (ticks)
1671system.membus.reqLayer1.utilization 0.1 # Layer utilization (%)
1672system.membus.respLayer1.occupancy 2174676250 # Layer occupancy (ticks)
1673system.membus.respLayer1.utilization 0.1 # Layer utilization (%)
1674system.membus.respLayer2.occupancy 893117 # Layer occupancy (ticks)
1675system.membus.respLayer2.utilization 0.0 # Layer utilization (%)
1676system.toL2Bus.snoop_filter.tot_requests 4780466 # Total number of requests made to the snoop filter.
1677system.toL2Bus.snoop_filter.hit_single_requests 2390280 # Number of requests hitting in the snoop filter with a single holder of the requested data.
1678system.toL2Bus.snoop_filter.hit_multi_requests 355276 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data.
1679system.toL2Bus.snoop_filter.tot_snoops 975 # Total number of snoops made to the snoop filter.
1680system.toL2Bus.snoop_filter.hit_single_snoops 915 # Number of snoops hitting in the snoop filter with a single holder of the requested data.
1681system.toL2Bus.snoop_filter.hit_multi_snoops 60 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
1682system.toL2Bus.trans_dist::ReadReq 7199 # Transaction distribution
1683system.toL2Bus.trans_dist::ReadResp 2101675 # Transaction distribution
1684system.toL2Bus.trans_dist::WriteReq 14058 # Transaction distribution
1685system.toL2Bus.trans_dist::WriteResp 14058 # Transaction distribution
1686system.toL2Bus.trans_dist::WritebackDirty 871643 # Transaction distribution
1687system.toL2Bus.trans_dist::WritebackClean 1014315 # Transaction distribution
1688system.toL2Bus.trans_dist::CleanEvict 816241 # Transaction distribution
1689system.toL2Bus.trans_dist::UpgradeReq 16314 # Transaction distribution
--- 37 unchanged lines hidden (view full) ---
1727system.toL2Bus.respLayer0.occupancy 1048435504 # Layer occupancy (ticks)
1728system.toL2Bus.respLayer0.utilization 0.1 # Layer utilization (%)
1729system.toL2Bus.respLayer1.occupancy 1811762602 # Layer occupancy (ticks)
1730system.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%)
1731system.toL2Bus.respLayer2.occupancy 476230655 # Layer occupancy (ticks)
1732system.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
1733system.toL2Bus.respLayer3.occupancy 281513896 # Layer occupancy (ticks)
1734system.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
1735system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
1736system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
1737system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
1738system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
1739system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
1740system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
1741system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
1742system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
--- 15 unchanged lines hidden (view full) ---
1758system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
1759system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
1760system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
1761system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
1762system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
1763system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
1764system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
1765system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
1766
1767---------- End Simulation Statistics ----------