config.ini (9055:38f1926fb599) | config.ini (9096:8971a998190a) |
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1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 265 unchanged lines hidden (view full) --- 274sys=system 275 276[system.iobus] 277type=NoncoherentBus 278block_size=64 279clock=1000 280header_cycles=1 281use_default_range=true | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 265 unchanged lines hidden (view full) --- 274sys=system 275 276[system.iobus] 277type=NoncoherentBus 278block_size=64 279clock=1000 280header_cycles=1 281use_default_range=true |
282width=64 | 282width=8 |
283default=system.tsunami.pciconfig.pio 284master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 285slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 286 287[system.iocache] 288type=BaseCache 289addr_ranges=0:8589934591 290assoc=8 --- 45 unchanged lines hidden (view full) --- 336 337[system.membus] 338type=CoherentBus 339children=badaddr_responder 340block_size=64 341clock=1000 342header_cycles=1 343use_default_range=false | 283default=system.tsunami.pciconfig.pio 284master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 285slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 286 287[system.iocache] 288type=BaseCache 289addr_ranges=0:8589934591 290assoc=8 --- 45 unchanged lines hidden (view full) --- 336 337[system.membus] 338type=CoherentBus 339children=badaddr_responder 340block_size=64 341clock=1000 342header_cycles=1 343use_default_range=false |
344width=64 | 344width=8 |
345default=system.membus.badaddr_responder.pio 346master=system.bridge.slave system.physmem.port[0] 347slave=system.system_port system.iocache.mem_side system.l2c.mem_side 348 349[system.membus.badaddr_responder] 350type=IsaFake 351fake_mem=false 352pio_addr=0 --- 40 unchanged lines hidden (view full) --- 393port=3456 394 395[system.toL2Bus] 396type=CoherentBus 397block_size=64 398clock=1000 399header_cycles=1 400use_default_range=false | 345default=system.membus.badaddr_responder.pio 346master=system.bridge.slave system.physmem.port[0] 347slave=system.system_port system.iocache.mem_side system.l2c.mem_side 348 349[system.membus.badaddr_responder] 350type=IsaFake 351fake_mem=false 352pio_addr=0 --- 40 unchanged lines hidden (view full) --- 393port=3456 394 395[system.toL2Bus] 396type=CoherentBus 397block_size=64 398clock=1000 399header_cycles=1 400use_default_range=false |
401width=64 | 401width=8 |
402master=system.l2c.cpu_side 403slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 404 405[system.tsunami] 406type=Tsunami 407children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 408intrctrl=system.intrctrl 409system=system --- 496 unchanged lines hidden --- | 402master=system.l2c.cpu_side 403slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side 404 405[system.tsunami] 406type=Tsunami 407children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 408intrctrl=system.intrctrl 409system=system --- 496 unchanged lines hidden --- |