1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxAlphaSystem
13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain
14boot_cpu_frequency=500
15boot_osflags=root=/dev/hda1 console=ttyS0
16cache_line_size=64
17clk_domain=system.clk_domain
18console=/arm/projectscratch/randd/systems/dist/binaries/console
19default_p_state=UNDEFINED
20eventq_index=0
21exit_on_work_items=false
22init_param=0
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
24kernel_addr_check=true
25load_addr_mask=1099511627775
26load_offset=0
27mem_mode=timing
| 1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000
9time_sync_spin_threshold=100000000
10
11[system]
12type=LinuxAlphaSystem
13children=bridge clk_domain cpu0 cpu1 cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache l2c membus physmem simple_disk terminal toL2Bus tsunami voltage_domain
14boot_cpu_frequency=500
15boot_osflags=root=/dev/hda1 console=ttyS0
16cache_line_size=64
17clk_domain=system.clk_domain
18console=/arm/projectscratch/randd/systems/dist/binaries/console
19default_p_state=UNDEFINED
20eventq_index=0
21exit_on_work_items=false
22init_param=0
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux
24kernel_addr_check=true
25load_addr_mask=1099511627775
26load_offset=0
27mem_mode=timing
|
28mem_ranges=0:134217727
| 28mem_ranges=0:134217727:0:0:0:0
|
29memories=system.physmem
30mmap_using_noreserve=false
31multi_thread=false
32num_work_ids=16
33p_state_clk_gate_bins=20
34p_state_clk_gate_max=1000000000000
35p_state_clk_gate_min=1000
36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
37power_model=Null
38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
39symbolfile=
40system_rev=1024
41system_type=34
42thermal_components=
43thermal_model=Null
44work_begin_ckpt_count=0
45work_begin_cpu_id_exit=-1
46work_begin_exit_count=0
47work_cpus_ckpt_count=0
48work_end_ckpt_count=0
49work_end_exit_count=0
50work_item_id=-1
51system_port=system.membus.slave[0]
52
53[system.bridge]
54type=Bridge
55clk_domain=system.clk_domain
56default_p_state=UNDEFINED
57delay=50000
58eventq_index=0
59p_state_clk_gate_bins=20
60p_state_clk_gate_max=1000000000000
61p_state_clk_gate_min=1000
62power_model=Null
| 29memories=system.physmem
30mmap_using_noreserve=false
31multi_thread=false
32num_work_ids=16
33p_state_clk_gate_bins=20
34p_state_clk_gate_max=1000000000000
35p_state_clk_gate_min=1000
36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal
37power_model=Null
38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh
39symbolfile=
40system_rev=1024
41system_type=34
42thermal_components=
43thermal_model=Null
44work_begin_ckpt_count=0
45work_begin_cpu_id_exit=-1
46work_begin_exit_count=0
47work_cpus_ckpt_count=0
48work_end_ckpt_count=0
49work_end_exit_count=0
50work_item_id=-1
51system_port=system.membus.slave[0]
52
53[system.bridge]
54type=Bridge
55clk_domain=system.clk_domain
56default_p_state=UNDEFINED
57delay=50000
58eventq_index=0
59p_state_clk_gate_bins=20
60p_state_clk_gate_max=1000000000000
61p_state_clk_gate_min=1000
62power_model=Null
|
63ranges=8796093022208:18446744073709551615
| 63ranges=8796093022208:18446744073709551615:0:0:0:0
|
64req_size=16
65resp_size=16
66master=system.iobus.slave[0]
67slave=system.membus.master[0]
68
69[system.clk_domain]
70type=SrcClockDomain
71clock=1000
72domain_id=-1
73eventq_index=0
74init_perf_level=0
75voltage_domain=system.voltage_domain
76
77[system.cpu0]
78type=TimingSimpleCPU
79children=dcache dtb icache interrupts isa itb tracer
80branchPred=Null
81checker=Null
82clk_domain=system.cpu_clk_domain
83cpu_id=0
84default_p_state=UNDEFINED
85do_checkpoint_insts=true
86do_quiesce=true
87do_statistics_insts=true
88dtb=system.cpu0.dtb
89eventq_index=0
90function_trace=false
91function_trace_start=0
92interrupts=system.cpu0.interrupts
93isa=system.cpu0.isa
94itb=system.cpu0.itb
95max_insts_all_threads=0
96max_insts_any_thread=0
97max_loads_all_threads=0
98max_loads_any_thread=0
99numThreads=1
100p_state_clk_gate_bins=20
101p_state_clk_gate_max=1000000000000
102p_state_clk_gate_min=1000
103power_model=Null
104profile=0
105progress_interval=0
106simpoint_start_insts=
107socket_id=0
108switched_out=false
109system=system
110tracer=system.cpu0.tracer
111workload=
112dcache_port=system.cpu0.dcache.cpu_side
113icache_port=system.cpu0.icache.cpu_side
114
115[system.cpu0.dcache]
116type=Cache
117children=tags
| 64req_size=16
65resp_size=16
66master=system.iobus.slave[0]
67slave=system.membus.master[0]
68
69[system.clk_domain]
70type=SrcClockDomain
71clock=1000
72domain_id=-1
73eventq_index=0
74init_perf_level=0
75voltage_domain=system.voltage_domain
76
77[system.cpu0]
78type=TimingSimpleCPU
79children=dcache dtb icache interrupts isa itb tracer
80branchPred=Null
81checker=Null
82clk_domain=system.cpu_clk_domain
83cpu_id=0
84default_p_state=UNDEFINED
85do_checkpoint_insts=true
86do_quiesce=true
87do_statistics_insts=true
88dtb=system.cpu0.dtb
89eventq_index=0
90function_trace=false
91function_trace_start=0
92interrupts=system.cpu0.interrupts
93isa=system.cpu0.isa
94itb=system.cpu0.itb
95max_insts_all_threads=0
96max_insts_any_thread=0
97max_loads_all_threads=0
98max_loads_any_thread=0
99numThreads=1
100p_state_clk_gate_bins=20
101p_state_clk_gate_max=1000000000000
102p_state_clk_gate_min=1000
103power_model=Null
104profile=0
105progress_interval=0
106simpoint_start_insts=
107socket_id=0
108switched_out=false
109system=system
110tracer=system.cpu0.tracer
111workload=
112dcache_port=system.cpu0.dcache.cpu_side
113icache_port=system.cpu0.icache.cpu_side
114
115[system.cpu0.dcache]
116type=Cache
117children=tags
|
118addr_ranges=0:18446744073709551615
| 118addr_ranges=0:18446744073709551615:0:0:0:0
|
119assoc=4
120clk_domain=system.cpu_clk_domain
121clusivity=mostly_incl
122default_p_state=UNDEFINED
123demand_mshr_reserve=1
124eventq_index=0
125hit_latency=2
126is_read_only=false
127max_miss_count=0
128mshrs=4
129p_state_clk_gate_bins=20
130p_state_clk_gate_max=1000000000000
131p_state_clk_gate_min=1000
132power_model=Null
133prefetch_on_access=false
134prefetcher=Null
135response_latency=2
136sequential_access=false
137size=32768
138system=system
139tags=system.cpu0.dcache.tags
140tgts_per_mshr=20
141write_buffers=8
142writeback_clean=false
143cpu_side=system.cpu0.dcache_port
144mem_side=system.toL2Bus.slave[1]
145
146[system.cpu0.dcache.tags]
147type=LRU
148assoc=4
149block_size=64
150clk_domain=system.cpu_clk_domain
151default_p_state=UNDEFINED
152eventq_index=0
153hit_latency=2
154p_state_clk_gate_bins=20
155p_state_clk_gate_max=1000000000000
156p_state_clk_gate_min=1000
157power_model=Null
158sequential_access=false
159size=32768
160
161[system.cpu0.dtb]
162type=AlphaTLB
163eventq_index=0
164size=64
165
166[system.cpu0.icache]
167type=Cache
168children=tags
| 119assoc=4
120clk_domain=system.cpu_clk_domain
121clusivity=mostly_incl
122default_p_state=UNDEFINED
123demand_mshr_reserve=1
124eventq_index=0
125hit_latency=2
126is_read_only=false
127max_miss_count=0
128mshrs=4
129p_state_clk_gate_bins=20
130p_state_clk_gate_max=1000000000000
131p_state_clk_gate_min=1000
132power_model=Null
133prefetch_on_access=false
134prefetcher=Null
135response_latency=2
136sequential_access=false
137size=32768
138system=system
139tags=system.cpu0.dcache.tags
140tgts_per_mshr=20
141write_buffers=8
142writeback_clean=false
143cpu_side=system.cpu0.dcache_port
144mem_side=system.toL2Bus.slave[1]
145
146[system.cpu0.dcache.tags]
147type=LRU
148assoc=4
149block_size=64
150clk_domain=system.cpu_clk_domain
151default_p_state=UNDEFINED
152eventq_index=0
153hit_latency=2
154p_state_clk_gate_bins=20
155p_state_clk_gate_max=1000000000000
156p_state_clk_gate_min=1000
157power_model=Null
158sequential_access=false
159size=32768
160
161[system.cpu0.dtb]
162type=AlphaTLB
163eventq_index=0
164size=64
165
166[system.cpu0.icache]
167type=Cache
168children=tags
|
169addr_ranges=0:18446744073709551615
| 169addr_ranges=0:18446744073709551615:0:0:0:0
|
170assoc=1
171clk_domain=system.cpu_clk_domain
172clusivity=mostly_incl
173default_p_state=UNDEFINED
174demand_mshr_reserve=1
175eventq_index=0
176hit_latency=2
177is_read_only=true
178max_miss_count=0
179mshrs=4
180p_state_clk_gate_bins=20
181p_state_clk_gate_max=1000000000000
182p_state_clk_gate_min=1000
183power_model=Null
184prefetch_on_access=false
185prefetcher=Null
186response_latency=2
187sequential_access=false
188size=32768
189system=system
190tags=system.cpu0.icache.tags
191tgts_per_mshr=20
192write_buffers=8
193writeback_clean=true
194cpu_side=system.cpu0.icache_port
195mem_side=system.toL2Bus.slave[0]
196
197[system.cpu0.icache.tags]
198type=LRU
199assoc=1
200block_size=64
201clk_domain=system.cpu_clk_domain
202default_p_state=UNDEFINED
203eventq_index=0
204hit_latency=2
205p_state_clk_gate_bins=20
206p_state_clk_gate_max=1000000000000
207p_state_clk_gate_min=1000
208power_model=Null
209sequential_access=false
210size=32768
211
212[system.cpu0.interrupts]
213type=AlphaInterrupts
214eventq_index=0
215
216[system.cpu0.isa]
217type=AlphaISA
218eventq_index=0
219system=system
220
221[system.cpu0.itb]
222type=AlphaTLB
223eventq_index=0
224size=48
225
226[system.cpu0.tracer]
227type=ExeTracer
228eventq_index=0
229
230[system.cpu1]
231type=TimingSimpleCPU
232children=dcache dtb icache interrupts isa itb tracer
233branchPred=Null
234checker=Null
235clk_domain=system.cpu_clk_domain
236cpu_id=1
237default_p_state=UNDEFINED
238do_checkpoint_insts=true
239do_quiesce=true
240do_statistics_insts=true
241dtb=system.cpu1.dtb
242eventq_index=0
243function_trace=false
244function_trace_start=0
245interrupts=system.cpu1.interrupts
246isa=system.cpu1.isa
247itb=system.cpu1.itb
248max_insts_all_threads=0
249max_insts_any_thread=0
250max_loads_all_threads=0
251max_loads_any_thread=0
252numThreads=1
253p_state_clk_gate_bins=20
254p_state_clk_gate_max=1000000000000
255p_state_clk_gate_min=1000
256power_model=Null
257profile=0
258progress_interval=0
259simpoint_start_insts=
260socket_id=0
261switched_out=false
262system=system
263tracer=system.cpu1.tracer
264workload=
265dcache_port=system.cpu1.dcache.cpu_side
266icache_port=system.cpu1.icache.cpu_side
267
268[system.cpu1.dcache]
269type=Cache
270children=tags
| 170assoc=1
171clk_domain=system.cpu_clk_domain
172clusivity=mostly_incl
173default_p_state=UNDEFINED
174demand_mshr_reserve=1
175eventq_index=0
176hit_latency=2
177is_read_only=true
178max_miss_count=0
179mshrs=4
180p_state_clk_gate_bins=20
181p_state_clk_gate_max=1000000000000
182p_state_clk_gate_min=1000
183power_model=Null
184prefetch_on_access=false
185prefetcher=Null
186response_latency=2
187sequential_access=false
188size=32768
189system=system
190tags=system.cpu0.icache.tags
191tgts_per_mshr=20
192write_buffers=8
193writeback_clean=true
194cpu_side=system.cpu0.icache_port
195mem_side=system.toL2Bus.slave[0]
196
197[system.cpu0.icache.tags]
198type=LRU
199assoc=1
200block_size=64
201clk_domain=system.cpu_clk_domain
202default_p_state=UNDEFINED
203eventq_index=0
204hit_latency=2
205p_state_clk_gate_bins=20
206p_state_clk_gate_max=1000000000000
207p_state_clk_gate_min=1000
208power_model=Null
209sequential_access=false
210size=32768
211
212[system.cpu0.interrupts]
213type=AlphaInterrupts
214eventq_index=0
215
216[system.cpu0.isa]
217type=AlphaISA
218eventq_index=0
219system=system
220
221[system.cpu0.itb]
222type=AlphaTLB
223eventq_index=0
224size=48
225
226[system.cpu0.tracer]
227type=ExeTracer
228eventq_index=0
229
230[system.cpu1]
231type=TimingSimpleCPU
232children=dcache dtb icache interrupts isa itb tracer
233branchPred=Null
234checker=Null
235clk_domain=system.cpu_clk_domain
236cpu_id=1
237default_p_state=UNDEFINED
238do_checkpoint_insts=true
239do_quiesce=true
240do_statistics_insts=true
241dtb=system.cpu1.dtb
242eventq_index=0
243function_trace=false
244function_trace_start=0
245interrupts=system.cpu1.interrupts
246isa=system.cpu1.isa
247itb=system.cpu1.itb
248max_insts_all_threads=0
249max_insts_any_thread=0
250max_loads_all_threads=0
251max_loads_any_thread=0
252numThreads=1
253p_state_clk_gate_bins=20
254p_state_clk_gate_max=1000000000000
255p_state_clk_gate_min=1000
256power_model=Null
257profile=0
258progress_interval=0
259simpoint_start_insts=
260socket_id=0
261switched_out=false
262system=system
263tracer=system.cpu1.tracer
264workload=
265dcache_port=system.cpu1.dcache.cpu_side
266icache_port=system.cpu1.icache.cpu_side
267
268[system.cpu1.dcache]
269type=Cache
270children=tags
|
271addr_ranges=0:18446744073709551615
| 271addr_ranges=0:18446744073709551615:0:0:0:0
|
272assoc=4
273clk_domain=system.cpu_clk_domain
274clusivity=mostly_incl
275default_p_state=UNDEFINED
276demand_mshr_reserve=1
277eventq_index=0
278hit_latency=2
279is_read_only=false
280max_miss_count=0
281mshrs=4
282p_state_clk_gate_bins=20
283p_state_clk_gate_max=1000000000000
284p_state_clk_gate_min=1000
285power_model=Null
286prefetch_on_access=false
287prefetcher=Null
288response_latency=2
289sequential_access=false
290size=32768
291system=system
292tags=system.cpu1.dcache.tags
293tgts_per_mshr=20
294write_buffers=8
295writeback_clean=false
296cpu_side=system.cpu1.dcache_port
297mem_side=system.toL2Bus.slave[3]
298
299[system.cpu1.dcache.tags]
300type=LRU
301assoc=4
302block_size=64
303clk_domain=system.cpu_clk_domain
304default_p_state=UNDEFINED
305eventq_index=0
306hit_latency=2
307p_state_clk_gate_bins=20
308p_state_clk_gate_max=1000000000000
309p_state_clk_gate_min=1000
310power_model=Null
311sequential_access=false
312size=32768
313
314[system.cpu1.dtb]
315type=AlphaTLB
316eventq_index=0
317size=64
318
319[system.cpu1.icache]
320type=Cache
321children=tags
| 272assoc=4
273clk_domain=system.cpu_clk_domain
274clusivity=mostly_incl
275default_p_state=UNDEFINED
276demand_mshr_reserve=1
277eventq_index=0
278hit_latency=2
279is_read_only=false
280max_miss_count=0
281mshrs=4
282p_state_clk_gate_bins=20
283p_state_clk_gate_max=1000000000000
284p_state_clk_gate_min=1000
285power_model=Null
286prefetch_on_access=false
287prefetcher=Null
288response_latency=2
289sequential_access=false
290size=32768
291system=system
292tags=system.cpu1.dcache.tags
293tgts_per_mshr=20
294write_buffers=8
295writeback_clean=false
296cpu_side=system.cpu1.dcache_port
297mem_side=system.toL2Bus.slave[3]
298
299[system.cpu1.dcache.tags]
300type=LRU
301assoc=4
302block_size=64
303clk_domain=system.cpu_clk_domain
304default_p_state=UNDEFINED
305eventq_index=0
306hit_latency=2
307p_state_clk_gate_bins=20
308p_state_clk_gate_max=1000000000000
309p_state_clk_gate_min=1000
310power_model=Null
311sequential_access=false
312size=32768
313
314[system.cpu1.dtb]
315type=AlphaTLB
316eventq_index=0
317size=64
318
319[system.cpu1.icache]
320type=Cache
321children=tags
|
322addr_ranges=0:18446744073709551615
| 322addr_ranges=0:18446744073709551615:0:0:0:0
|
323assoc=1
324clk_domain=system.cpu_clk_domain
325clusivity=mostly_incl
326default_p_state=UNDEFINED
327demand_mshr_reserve=1
328eventq_index=0
329hit_latency=2
330is_read_only=true
331max_miss_count=0
332mshrs=4
333p_state_clk_gate_bins=20
334p_state_clk_gate_max=1000000000000
335p_state_clk_gate_min=1000
336power_model=Null
337prefetch_on_access=false
338prefetcher=Null
339response_latency=2
340sequential_access=false
341size=32768
342system=system
343tags=system.cpu1.icache.tags
344tgts_per_mshr=20
345write_buffers=8
346writeback_clean=true
347cpu_side=system.cpu1.icache_port
348mem_side=system.toL2Bus.slave[2]
349
350[system.cpu1.icache.tags]
351type=LRU
352assoc=1
353block_size=64
354clk_domain=system.cpu_clk_domain
355default_p_state=UNDEFINED
356eventq_index=0
357hit_latency=2
358p_state_clk_gate_bins=20
359p_state_clk_gate_max=1000000000000
360p_state_clk_gate_min=1000
361power_model=Null
362sequential_access=false
363size=32768
364
365[system.cpu1.interrupts]
366type=AlphaInterrupts
367eventq_index=0
368
369[system.cpu1.isa]
370type=AlphaISA
371eventq_index=0
372system=system
373
374[system.cpu1.itb]
375type=AlphaTLB
376eventq_index=0
377size=48
378
379[system.cpu1.tracer]
380type=ExeTracer
381eventq_index=0
382
383[system.cpu_clk_domain]
384type=SrcClockDomain
385clock=500
386domain_id=-1
387eventq_index=0
388init_perf_level=0
389voltage_domain=system.voltage_domain
390
391[system.disk0]
392type=IdeDisk
393children=image
394delay=1000000
395driveID=master
396eventq_index=0
397image=system.disk0.image
398
399[system.disk0.image]
400type=CowDiskImage
401children=child
402child=system.disk0.image.child
403eventq_index=0
404image_file=
405read_only=false
406table_size=65536
407
408[system.disk0.image.child]
409type=RawDiskImage
410eventq_index=0
411image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
412read_only=true
413
414[system.disk2]
415type=IdeDisk
416children=image
417delay=1000000
418driveID=master
419eventq_index=0
420image=system.disk2.image
421
422[system.disk2.image]
423type=CowDiskImage
424children=child
425child=system.disk2.image.child
426eventq_index=0
427image_file=
428read_only=false
429table_size=65536
430
431[system.disk2.image.child]
432type=RawDiskImage
433eventq_index=0
434image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
435read_only=true
436
437[system.dvfs_handler]
438type=DVFSHandler
439domains=
440enable=false
441eventq_index=0
442sys_clk_domain=system.clk_domain
443transition_latency=100000000
444
445[system.intrctrl]
446type=IntrControl
447eventq_index=0
448sys=system
449
450[system.iobus]
451type=NoncoherentXBar
452clk_domain=system.clk_domain
453default_p_state=UNDEFINED
454eventq_index=0
455forward_latency=1
456frontend_latency=2
457p_state_clk_gate_bins=20
458p_state_clk_gate_max=1000000000000
459p_state_clk_gate_min=1000
460power_model=Null
461response_latency=2
462use_default_range=false
463width=16
464master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
465slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
466
467[system.iocache]
468type=Cache
469children=tags
| 323assoc=1
324clk_domain=system.cpu_clk_domain
325clusivity=mostly_incl
326default_p_state=UNDEFINED
327demand_mshr_reserve=1
328eventq_index=0
329hit_latency=2
330is_read_only=true
331max_miss_count=0
332mshrs=4
333p_state_clk_gate_bins=20
334p_state_clk_gate_max=1000000000000
335p_state_clk_gate_min=1000
336power_model=Null
337prefetch_on_access=false
338prefetcher=Null
339response_latency=2
340sequential_access=false
341size=32768
342system=system
343tags=system.cpu1.icache.tags
344tgts_per_mshr=20
345write_buffers=8
346writeback_clean=true
347cpu_side=system.cpu1.icache_port
348mem_side=system.toL2Bus.slave[2]
349
350[system.cpu1.icache.tags]
351type=LRU
352assoc=1
353block_size=64
354clk_domain=system.cpu_clk_domain
355default_p_state=UNDEFINED
356eventq_index=0
357hit_latency=2
358p_state_clk_gate_bins=20
359p_state_clk_gate_max=1000000000000
360p_state_clk_gate_min=1000
361power_model=Null
362sequential_access=false
363size=32768
364
365[system.cpu1.interrupts]
366type=AlphaInterrupts
367eventq_index=0
368
369[system.cpu1.isa]
370type=AlphaISA
371eventq_index=0
372system=system
373
374[system.cpu1.itb]
375type=AlphaTLB
376eventq_index=0
377size=48
378
379[system.cpu1.tracer]
380type=ExeTracer
381eventq_index=0
382
383[system.cpu_clk_domain]
384type=SrcClockDomain
385clock=500
386domain_id=-1
387eventq_index=0
388init_perf_level=0
389voltage_domain=system.voltage_domain
390
391[system.disk0]
392type=IdeDisk
393children=image
394delay=1000000
395driveID=master
396eventq_index=0
397image=system.disk0.image
398
399[system.disk0.image]
400type=CowDiskImage
401children=child
402child=system.disk0.image.child
403eventq_index=0
404image_file=
405read_only=false
406table_size=65536
407
408[system.disk0.image.child]
409type=RawDiskImage
410eventq_index=0
411image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
412read_only=true
413
414[system.disk2]
415type=IdeDisk
416children=image
417delay=1000000
418driveID=master
419eventq_index=0
420image=system.disk2.image
421
422[system.disk2.image]
423type=CowDiskImage
424children=child
425child=system.disk2.image.child
426eventq_index=0
427image_file=
428read_only=false
429table_size=65536
430
431[system.disk2.image.child]
432type=RawDiskImage
433eventq_index=0
434image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img
435read_only=true
436
437[system.dvfs_handler]
438type=DVFSHandler
439domains=
440enable=false
441eventq_index=0
442sys_clk_domain=system.clk_domain
443transition_latency=100000000
444
445[system.intrctrl]
446type=IntrControl
447eventq_index=0
448sys=system
449
450[system.iobus]
451type=NoncoherentXBar
452clk_domain=system.clk_domain
453default_p_state=UNDEFINED
454eventq_index=0
455forward_latency=1
456frontend_latency=2
457p_state_clk_gate_bins=20
458p_state_clk_gate_max=1000000000000
459p_state_clk_gate_min=1000
460power_model=Null
461response_latency=2
462use_default_range=false
463width=16
464master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side
465slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
466
467[system.iocache]
468type=Cache
469children=tags
|
470addr_ranges=0:134217727
| 470addr_ranges=0:134217727:0:0:0:0
|
471assoc=8
472clk_domain=system.clk_domain
473clusivity=mostly_incl
474default_p_state=UNDEFINED
475demand_mshr_reserve=1
476eventq_index=0
477hit_latency=50
478is_read_only=false
479max_miss_count=0
480mshrs=20
481p_state_clk_gate_bins=20
482p_state_clk_gate_max=1000000000000
483p_state_clk_gate_min=1000
484power_model=Null
485prefetch_on_access=false
486prefetcher=Null
487response_latency=50
488sequential_access=false
489size=1024
490system=system
491tags=system.iocache.tags
492tgts_per_mshr=12
493write_buffers=8
494writeback_clean=false
495cpu_side=system.iobus.master[27]
496mem_side=system.membus.slave[2]
497
498[system.iocache.tags]
499type=LRU
500assoc=8
501block_size=64
502clk_domain=system.clk_domain
503default_p_state=UNDEFINED
504eventq_index=0
505hit_latency=50
506p_state_clk_gate_bins=20
507p_state_clk_gate_max=1000000000000
508p_state_clk_gate_min=1000
509power_model=Null
510sequential_access=false
511size=1024
512
513[system.l2c]
514type=Cache
515children=tags
| 471assoc=8
472clk_domain=system.clk_domain
473clusivity=mostly_incl
474default_p_state=UNDEFINED
475demand_mshr_reserve=1
476eventq_index=0
477hit_latency=50
478is_read_only=false
479max_miss_count=0
480mshrs=20
481p_state_clk_gate_bins=20
482p_state_clk_gate_max=1000000000000
483p_state_clk_gate_min=1000
484power_model=Null
485prefetch_on_access=false
486prefetcher=Null
487response_latency=50
488sequential_access=false
489size=1024
490system=system
491tags=system.iocache.tags
492tgts_per_mshr=12
493write_buffers=8
494writeback_clean=false
495cpu_side=system.iobus.master[27]
496mem_side=system.membus.slave[2]
497
498[system.iocache.tags]
499type=LRU
500assoc=8
501block_size=64
502clk_domain=system.clk_domain
503default_p_state=UNDEFINED
504eventq_index=0
505hit_latency=50
506p_state_clk_gate_bins=20
507p_state_clk_gate_max=1000000000000
508p_state_clk_gate_min=1000
509power_model=Null
510sequential_access=false
511size=1024
512
513[system.l2c]
514type=Cache
515children=tags
|
516addr_ranges=0:18446744073709551615
| 516addr_ranges=0:18446744073709551615:0:0:0:0
|
517assoc=8
518clk_domain=system.cpu_clk_domain
519clusivity=mostly_incl
520default_p_state=UNDEFINED
521demand_mshr_reserve=1
522eventq_index=0
523hit_latency=20
524is_read_only=false
525max_miss_count=0
526mshrs=20
527p_state_clk_gate_bins=20
528p_state_clk_gate_max=1000000000000
529p_state_clk_gate_min=1000
530power_model=Null
531prefetch_on_access=false
532prefetcher=Null
533response_latency=20
534sequential_access=false
535size=4194304
536system=system
537tags=system.l2c.tags
538tgts_per_mshr=12
539write_buffers=8
540writeback_clean=false
541cpu_side=system.toL2Bus.master[0]
542mem_side=system.membus.slave[1]
543
544[system.l2c.tags]
545type=LRU
546assoc=8
547block_size=64
548clk_domain=system.cpu_clk_domain
549default_p_state=UNDEFINED
550eventq_index=0
551hit_latency=20
552p_state_clk_gate_bins=20
553p_state_clk_gate_max=1000000000000
554p_state_clk_gate_min=1000
555power_model=Null
556sequential_access=false
557size=4194304
558
559[system.membus]
560type=CoherentXBar
561children=badaddr_responder snoop_filter
562clk_domain=system.clk_domain
563default_p_state=UNDEFINED
564eventq_index=0
565forward_latency=4
566frontend_latency=3
567p_state_clk_gate_bins=20
568p_state_clk_gate_max=1000000000000
569p_state_clk_gate_min=1000
570point_of_coherency=true
571power_model=Null
572response_latency=2
573snoop_filter=system.membus.snoop_filter
574snoop_response_latency=4
575system=system
576use_default_range=false
577width=16
578default=system.membus.badaddr_responder.pio
579master=system.bridge.slave system.physmem.port
580slave=system.system_port system.l2c.mem_side system.iocache.mem_side
581
582[system.membus.badaddr_responder]
583type=IsaFake
584clk_domain=system.clk_domain
585default_p_state=UNDEFINED
586eventq_index=0
587fake_mem=false
588p_state_clk_gate_bins=20
589p_state_clk_gate_max=1000000000000
590p_state_clk_gate_min=1000
591pio_addr=0
592pio_latency=100000
593pio_size=8
594power_model=Null
595ret_bad_addr=true
596ret_data16=65535
597ret_data32=4294967295
598ret_data64=18446744073709551615
599ret_data8=255
600system=system
601update_data=false
602warn_access=
603pio=system.membus.default
604
605[system.membus.snoop_filter]
606type=SnoopFilter
607eventq_index=0
608lookup_latency=1
609max_capacity=8388608
610system=system
611
612[system.physmem]
613type=DRAMCtrl
| 517assoc=8
518clk_domain=system.cpu_clk_domain
519clusivity=mostly_incl
520default_p_state=UNDEFINED
521demand_mshr_reserve=1
522eventq_index=0
523hit_latency=20
524is_read_only=false
525max_miss_count=0
526mshrs=20
527p_state_clk_gate_bins=20
528p_state_clk_gate_max=1000000000000
529p_state_clk_gate_min=1000
530power_model=Null
531prefetch_on_access=false
532prefetcher=Null
533response_latency=20
534sequential_access=false
535size=4194304
536system=system
537tags=system.l2c.tags
538tgts_per_mshr=12
539write_buffers=8
540writeback_clean=false
541cpu_side=system.toL2Bus.master[0]
542mem_side=system.membus.slave[1]
543
544[system.l2c.tags]
545type=LRU
546assoc=8
547block_size=64
548clk_domain=system.cpu_clk_domain
549default_p_state=UNDEFINED
550eventq_index=0
551hit_latency=20
552p_state_clk_gate_bins=20
553p_state_clk_gate_max=1000000000000
554p_state_clk_gate_min=1000
555power_model=Null
556sequential_access=false
557size=4194304
558
559[system.membus]
560type=CoherentXBar
561children=badaddr_responder snoop_filter
562clk_domain=system.clk_domain
563default_p_state=UNDEFINED
564eventq_index=0
565forward_latency=4
566frontend_latency=3
567p_state_clk_gate_bins=20
568p_state_clk_gate_max=1000000000000
569p_state_clk_gate_min=1000
570point_of_coherency=true
571power_model=Null
572response_latency=2
573snoop_filter=system.membus.snoop_filter
574snoop_response_latency=4
575system=system
576use_default_range=false
577width=16
578default=system.membus.badaddr_responder.pio
579master=system.bridge.slave system.physmem.port
580slave=system.system_port system.l2c.mem_side system.iocache.mem_side
581
582[system.membus.badaddr_responder]
583type=IsaFake
584clk_domain=system.clk_domain
585default_p_state=UNDEFINED
586eventq_index=0
587fake_mem=false
588p_state_clk_gate_bins=20
589p_state_clk_gate_max=1000000000000
590p_state_clk_gate_min=1000
591pio_addr=0
592pio_latency=100000
593pio_size=8
594power_model=Null
595ret_bad_addr=true
596ret_data16=65535
597ret_data32=4294967295
598ret_data64=18446744073709551615
599ret_data8=255
600system=system
601update_data=false
602warn_access=
603pio=system.membus.default
604
605[system.membus.snoop_filter]
606type=SnoopFilter
607eventq_index=0
608lookup_latency=1
609max_capacity=8388608
610system=system
611
612[system.physmem]
613type=DRAMCtrl
|
614IDD0=0.075000
| 614IDD0=0.055000
|
615IDD02=0.000000
| 615IDD02=0.000000
|
616IDD2N=0.050000
| 616IDD2N=0.032000
|
617IDD2N2=0.000000
618IDD2P0=0.000000
619IDD2P02=0.000000
| 617IDD2N2=0.000000
618IDD2P0=0.000000
619IDD2P02=0.000000
|
620IDD2P1=0.000000
| 620IDD2P1=0.032000
|
621IDD2P12=0.000000
| 621IDD2P12=0.000000
|
622IDD3N=0.057000
| 622IDD3N=0.038000
|
623IDD3N2=0.000000
624IDD3P0=0.000000
625IDD3P02=0.000000
| 623IDD3N2=0.000000
624IDD3P0=0.000000
625IDD3P02=0.000000
|
626IDD3P1=0.000000
| 626IDD3P1=0.038000
|
627IDD3P12=0.000000
| 627IDD3P12=0.000000
|
628IDD4R=0.187000
| 628IDD4R=0.157000
|
629IDD4R2=0.000000
| 629IDD4R2=0.000000
|
630IDD4W=0.165000
| 630IDD4W=0.125000
|
631IDD4W2=0.000000
| 631IDD4W2=0.000000
|
632IDD5=0.220000
| 632IDD5=0.235000
|
633IDD52=0.000000
| 633IDD52=0.000000
|
634IDD6=0.000000
| 634IDD6=0.020000
|
635IDD62=0.000000
636VDD=1.500000
637VDD2=0.000000
638activation_limit=4
639addr_mapping=RoRaBaCoCh
640bank_groups_per_rank=0
641banks_per_rank=8
642burst_length=8
643channels=1
644clk_domain=system.clk_domain
645conf_table_reported=true
646default_p_state=UNDEFINED
647device_bus_width=8
648device_rowbuffer_size=1024
649device_size=536870912
650devices_per_rank=8
651dll=true
652eventq_index=0
653in_addr_map=true
| 635IDD62=0.000000
636VDD=1.500000
637VDD2=0.000000
638activation_limit=4
639addr_mapping=RoRaBaCoCh
640bank_groups_per_rank=0
641banks_per_rank=8
642burst_length=8
643channels=1
644clk_domain=system.clk_domain
645conf_table_reported=true
646default_p_state=UNDEFINED
647device_bus_width=8
648device_rowbuffer_size=1024
649device_size=536870912
650devices_per_rank=8
651dll=true
652eventq_index=0
653in_addr_map=true
|
| 654kvm_map=true
|
654max_accesses_per_row=16
655mem_sched_policy=frfcfs
656min_writes_per_switch=16
657null=false
658p_state_clk_gate_bins=20
659p_state_clk_gate_max=1000000000000
660p_state_clk_gate_min=1000
661page_policy=open_adaptive
662power_model=Null
| 655max_accesses_per_row=16
656mem_sched_policy=frfcfs
657min_writes_per_switch=16
658null=false
659p_state_clk_gate_bins=20
660p_state_clk_gate_max=1000000000000
661p_state_clk_gate_min=1000
662page_policy=open_adaptive
663power_model=Null
|
663range=0:134217727
| 664range=0:134217727:0:0:0:0
|
664ranks_per_channel=2
665read_buffer_size=32
666static_backend_latency=10000
667static_frontend_latency=10000
668tBURST=5000
669tCCD_L=0
670tCK=1250
671tCL=13750
672tCS=2500
673tRAS=35000
674tRCD=13750
675tREFI=7800000
676tRFC=260000
677tRP=13750
678tRRD=6000
679tRRD_L=0
680tRTP=7500
681tRTW=2500
682tWR=15000
683tWTR=7500
684tXAW=30000
| 665ranks_per_channel=2
666read_buffer_size=32
667static_backend_latency=10000
668static_frontend_latency=10000
669tBURST=5000
670tCCD_L=0
671tCK=1250
672tCL=13750
673tCS=2500
674tRAS=35000
675tRCD=13750
676tREFI=7800000
677tRFC=260000
678tRP=13750
679tRRD=6000
680tRRD_L=0
681tRTP=7500
682tRTW=2500
683tWR=15000
684tWTR=7500
685tXAW=30000
|
685tXP=0
| 686tXP=6000
|
686tXPDLL=0
| 687tXPDLL=0
|
687tXS=0
| 688tXS=270000
|
688tXSDLL=0
689write_buffer_size=64
690write_high_thresh_perc=85
691write_low_thresh_perc=50
692port=system.membus.master[1]
693
694[system.simple_disk]
695type=SimpleDisk
696children=disk
697disk=system.simple_disk.disk
698eventq_index=0
699system=system
700
701[system.simple_disk.disk]
702type=RawDiskImage
703eventq_index=0
704image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
705read_only=true
706
707[system.terminal]
708type=Terminal
709eventq_index=0
710intr_control=system.intrctrl
711number=0
712output=true
713port=3456
714
715[system.toL2Bus]
716type=CoherentXBar
717children=snoop_filter
718clk_domain=system.cpu_clk_domain
719default_p_state=UNDEFINED
720eventq_index=0
721forward_latency=0
722frontend_latency=1
723p_state_clk_gate_bins=20
724p_state_clk_gate_max=1000000000000
725p_state_clk_gate_min=1000
726point_of_coherency=false
727power_model=Null
728response_latency=1
729snoop_filter=system.toL2Bus.snoop_filter
730snoop_response_latency=1
731system=system
732use_default_range=false
733width=32
734master=system.l2c.cpu_side
735slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
736
737[system.toL2Bus.snoop_filter]
738type=SnoopFilter
739eventq_index=0
740lookup_latency=0
741max_capacity=8388608
742system=system
743
744[system.tsunami]
745type=Tsunami
746children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
747eventq_index=0
748intrctrl=system.intrctrl
749system=system
750
751[system.tsunami.backdoor]
752type=AlphaBackdoor
753clk_domain=system.clk_domain
754cpu=system.cpu0
755default_p_state=UNDEFINED
756disk=system.simple_disk
757eventq_index=0
758p_state_clk_gate_bins=20
759p_state_clk_gate_max=1000000000000
760p_state_clk_gate_min=1000
761pio_addr=8804682956800
762pio_latency=100000
763platform=system.tsunami
764power_model=Null
765system=system
766terminal=system.terminal
767pio=system.iobus.master[24]
768
769[system.tsunami.cchip]
770type=TsunamiCChip
771clk_domain=system.clk_domain
772default_p_state=UNDEFINED
773eventq_index=0
774p_state_clk_gate_bins=20
775p_state_clk_gate_max=1000000000000
776p_state_clk_gate_min=1000
777pio_addr=8803072344064
778pio_latency=100000
779power_model=Null
780system=system
781tsunami=system.tsunami
782pio=system.iobus.master[0]
783
784[system.tsunami.ethernet]
785type=NSGigE
786BAR0=1
787BAR0LegacyIO=false
788BAR0Size=256
789BAR1=0
790BAR1LegacyIO=false
791BAR1Size=4096
792BAR2=0
793BAR2LegacyIO=false
794BAR2Size=0
795BAR3=0
796BAR3LegacyIO=false
797BAR3Size=0
798BAR4=0
799BAR4LegacyIO=false
800BAR4Size=0
801BAR5=0
802BAR5LegacyIO=false
803BAR5Size=0
804BIST=0
805CacheLineSize=0
806CapabilityPtr=0
807CardbusCIS=0
808ClassCode=2
809Command=0
810DeviceID=34
811ExpansionROM=0
812HeaderType=0
813InterruptLine=30
814InterruptPin=1
815LatencyTimer=0
816LegacyIOBase=0
817MSICAPBaseOffset=0
818MSICAPCapId=0
819MSICAPMaskBits=0
820MSICAPMsgAddr=0
821MSICAPMsgCtrl=0
822MSICAPMsgData=0
823MSICAPMsgUpperAddr=0
824MSICAPNextCapability=0
825MSICAPPendingBits=0
826MSIXCAPBaseOffset=0
827MSIXCAPCapId=0
828MSIXCAPNextCapability=0
829MSIXMsgCtrl=0
830MSIXPbaOffset=0
831MSIXTableOffset=0
832MaximumLatency=52
833MinimumGrant=176
834PMCAPBaseOffset=0
835PMCAPCapId=0
836PMCAPCapabilities=0
837PMCAPCtrlStatus=0
838PMCAPNextCapability=0
839PXCAPBaseOffset=0
840PXCAPCapId=0
841PXCAPCapabilities=0
842PXCAPDevCap2=0
843PXCAPDevCapabilities=0
844PXCAPDevCtrl=0
845PXCAPDevCtrl2=0
846PXCAPDevStatus=0
847PXCAPLinkCap=0
848PXCAPLinkCtrl=0
849PXCAPLinkStatus=0
850PXCAPNextCapability=0
851ProgIF=0
852Revision=0
853Status=656
854SubClassCode=0
855SubsystemID=0
856SubsystemVendorID=0
857VendorID=4107
858clk_domain=system.clk_domain
859config_latency=20000
860default_p_state=UNDEFINED
861dma_data_free=false
862dma_desc_free=false
863dma_no_allocate=true
864dma_read_delay=0
865dma_read_factor=0
866dma_write_delay=0
867dma_write_factor=0
868eventq_index=0
869hardware_address=00:90:00:00:00:01
870host=system.tsunami.pchip
871intr_delay=10000000
872p_state_clk_gate_bins=20
873p_state_clk_gate_max=1000000000000
874p_state_clk_gate_min=1000
875pci_bus=0
876pci_dev=1
877pci_func=0
878pio_latency=30000
879power_model=Null
880rss=false
881rx_delay=1000000
882rx_fifo_size=524288
883rx_filter=true
884rx_thread=false
885system=system
886tx_delay=1000000
887tx_fifo_size=524288
888tx_thread=false
889dma=system.iobus.slave[2]
890pio=system.iobus.master[26]
891
892[system.tsunami.fake_OROM]
893type=IsaFake
894clk_domain=system.clk_domain
895default_p_state=UNDEFINED
896eventq_index=0
897fake_mem=false
898p_state_clk_gate_bins=20
899p_state_clk_gate_max=1000000000000
900p_state_clk_gate_min=1000
901pio_addr=8796093677568
902pio_latency=100000
903pio_size=393216
904power_model=Null
905ret_bad_addr=false
906ret_data16=65535
907ret_data32=4294967295
908ret_data64=18446744073709551615
909ret_data8=255
910system=system
911update_data=false
912warn_access=
913pio=system.iobus.master[8]
914
915[system.tsunami.fake_ata0]
916type=IsaFake
917clk_domain=system.clk_domain
918default_p_state=UNDEFINED
919eventq_index=0
920fake_mem=false
921p_state_clk_gate_bins=20
922p_state_clk_gate_max=1000000000000
923p_state_clk_gate_min=1000
924pio_addr=8804615848432
925pio_latency=100000
926pio_size=8
927power_model=Null
928ret_bad_addr=false
929ret_data16=65535
930ret_data32=4294967295
931ret_data64=18446744073709551615
932ret_data8=255
933system=system
934update_data=false
935warn_access=
936pio=system.iobus.master[19]
937
938[system.tsunami.fake_ata1]
939type=IsaFake
940clk_domain=system.clk_domain
941default_p_state=UNDEFINED
942eventq_index=0
943fake_mem=false
944p_state_clk_gate_bins=20
945p_state_clk_gate_max=1000000000000
946p_state_clk_gate_min=1000
947pio_addr=8804615848304
948pio_latency=100000
949pio_size=8
950power_model=Null
951ret_bad_addr=false
952ret_data16=65535
953ret_data32=4294967295
954ret_data64=18446744073709551615
955ret_data8=255
956system=system
957update_data=false
958warn_access=
959pio=system.iobus.master[20]
960
961[system.tsunami.fake_pnp_addr]
962type=IsaFake
963clk_domain=system.clk_domain
964default_p_state=UNDEFINED
965eventq_index=0
966fake_mem=false
967p_state_clk_gate_bins=20
968p_state_clk_gate_max=1000000000000
969p_state_clk_gate_min=1000
970pio_addr=8804615848569
971pio_latency=100000
972pio_size=8
973power_model=Null
974ret_bad_addr=false
975ret_data16=65535
976ret_data32=4294967295
977ret_data64=18446744073709551615
978ret_data8=255
979system=system
980update_data=false
981warn_access=
982pio=system.iobus.master[9]
983
984[system.tsunami.fake_pnp_read0]
985type=IsaFake
986clk_domain=system.clk_domain
987default_p_state=UNDEFINED
988eventq_index=0
989fake_mem=false
990p_state_clk_gate_bins=20
991p_state_clk_gate_max=1000000000000
992p_state_clk_gate_min=1000
993pio_addr=8804615848451
994pio_latency=100000
995pio_size=8
996power_model=Null
997ret_bad_addr=false
998ret_data16=65535
999ret_data32=4294967295
1000ret_data64=18446744073709551615
1001ret_data8=255
1002system=system
1003update_data=false
1004warn_access=
1005pio=system.iobus.master[11]
1006
1007[system.tsunami.fake_pnp_read1]
1008type=IsaFake
1009clk_domain=system.clk_domain
1010default_p_state=UNDEFINED
1011eventq_index=0
1012fake_mem=false
1013p_state_clk_gate_bins=20
1014p_state_clk_gate_max=1000000000000
1015p_state_clk_gate_min=1000
1016pio_addr=8804615848515
1017pio_latency=100000
1018pio_size=8
1019power_model=Null
1020ret_bad_addr=false
1021ret_data16=65535
1022ret_data32=4294967295
1023ret_data64=18446744073709551615
1024ret_data8=255
1025system=system
1026update_data=false
1027warn_access=
1028pio=system.iobus.master[12]
1029
1030[system.tsunami.fake_pnp_read2]
1031type=IsaFake
1032clk_domain=system.clk_domain
1033default_p_state=UNDEFINED
1034eventq_index=0
1035fake_mem=false
1036p_state_clk_gate_bins=20
1037p_state_clk_gate_max=1000000000000
1038p_state_clk_gate_min=1000
1039pio_addr=8804615848579
1040pio_latency=100000
1041pio_size=8
1042power_model=Null
1043ret_bad_addr=false
1044ret_data16=65535
1045ret_data32=4294967295
1046ret_data64=18446744073709551615
1047ret_data8=255
1048system=system
1049update_data=false
1050warn_access=
1051pio=system.iobus.master[13]
1052
1053[system.tsunami.fake_pnp_read3]
1054type=IsaFake
1055clk_domain=system.clk_domain
1056default_p_state=UNDEFINED
1057eventq_index=0
1058fake_mem=false
1059p_state_clk_gate_bins=20
1060p_state_clk_gate_max=1000000000000
1061p_state_clk_gate_min=1000
1062pio_addr=8804615848643
1063pio_latency=100000
1064pio_size=8
1065power_model=Null
1066ret_bad_addr=false
1067ret_data16=65535
1068ret_data32=4294967295
1069ret_data64=18446744073709551615
1070ret_data8=255
1071system=system
1072update_data=false
1073warn_access=
1074pio=system.iobus.master[14]
1075
1076[system.tsunami.fake_pnp_read4]
1077type=IsaFake
1078clk_domain=system.clk_domain
1079default_p_state=UNDEFINED
1080eventq_index=0
1081fake_mem=false
1082p_state_clk_gate_bins=20
1083p_state_clk_gate_max=1000000000000
1084p_state_clk_gate_min=1000
1085pio_addr=8804615848707
1086pio_latency=100000
1087pio_size=8
1088power_model=Null
1089ret_bad_addr=false
1090ret_data16=65535
1091ret_data32=4294967295
1092ret_data64=18446744073709551615
1093ret_data8=255
1094system=system
1095update_data=false
1096warn_access=
1097pio=system.iobus.master[15]
1098
1099[system.tsunami.fake_pnp_read5]
1100type=IsaFake
1101clk_domain=system.clk_domain
1102default_p_state=UNDEFINED
1103eventq_index=0
1104fake_mem=false
1105p_state_clk_gate_bins=20
1106p_state_clk_gate_max=1000000000000
1107p_state_clk_gate_min=1000
1108pio_addr=8804615848771
1109pio_latency=100000
1110pio_size=8
1111power_model=Null
1112ret_bad_addr=false
1113ret_data16=65535
1114ret_data32=4294967295
1115ret_data64=18446744073709551615
1116ret_data8=255
1117system=system
1118update_data=false
1119warn_access=
1120pio=system.iobus.master[16]
1121
1122[system.tsunami.fake_pnp_read6]
1123type=IsaFake
1124clk_domain=system.clk_domain
1125default_p_state=UNDEFINED
1126eventq_index=0
1127fake_mem=false
1128p_state_clk_gate_bins=20
1129p_state_clk_gate_max=1000000000000
1130p_state_clk_gate_min=1000
1131pio_addr=8804615848835
1132pio_latency=100000
1133pio_size=8
1134power_model=Null
1135ret_bad_addr=false
1136ret_data16=65535
1137ret_data32=4294967295
1138ret_data64=18446744073709551615
1139ret_data8=255
1140system=system
1141update_data=false
1142warn_access=
1143pio=system.iobus.master[17]
1144
1145[system.tsunami.fake_pnp_read7]
1146type=IsaFake
1147clk_domain=system.clk_domain
1148default_p_state=UNDEFINED
1149eventq_index=0
1150fake_mem=false
1151p_state_clk_gate_bins=20
1152p_state_clk_gate_max=1000000000000
1153p_state_clk_gate_min=1000
1154pio_addr=8804615848899
1155pio_latency=100000
1156pio_size=8
1157power_model=Null
1158ret_bad_addr=false
1159ret_data16=65535
1160ret_data32=4294967295
1161ret_data64=18446744073709551615
1162ret_data8=255
1163system=system
1164update_data=false
1165warn_access=
1166pio=system.iobus.master[18]
1167
1168[system.tsunami.fake_pnp_write]
1169type=IsaFake
1170clk_domain=system.clk_domain
1171default_p_state=UNDEFINED
1172eventq_index=0
1173fake_mem=false
1174p_state_clk_gate_bins=20
1175p_state_clk_gate_max=1000000000000
1176p_state_clk_gate_min=1000
1177pio_addr=8804615850617
1178pio_latency=100000
1179pio_size=8
1180power_model=Null
1181ret_bad_addr=false
1182ret_data16=65535
1183ret_data32=4294967295
1184ret_data64=18446744073709551615
1185ret_data8=255
1186system=system
1187update_data=false
1188warn_access=
1189pio=system.iobus.master[10]
1190
1191[system.tsunami.fake_ppc]
1192type=IsaFake
1193clk_domain=system.clk_domain
1194default_p_state=UNDEFINED
1195eventq_index=0
1196fake_mem=false
1197p_state_clk_gate_bins=20
1198p_state_clk_gate_max=1000000000000
1199p_state_clk_gate_min=1000
1200pio_addr=8804615848891
1201pio_latency=100000
1202pio_size=8
1203power_model=Null
1204ret_bad_addr=false
1205ret_data16=65535
1206ret_data32=4294967295
1207ret_data64=18446744073709551615
1208ret_data8=255
1209system=system
1210update_data=false
1211warn_access=
1212pio=system.iobus.master[7]
1213
1214[system.tsunami.fake_sm_chip]
1215type=IsaFake
1216clk_domain=system.clk_domain
1217default_p_state=UNDEFINED
1218eventq_index=0
1219fake_mem=false
1220p_state_clk_gate_bins=20
1221p_state_clk_gate_max=1000000000000
1222p_state_clk_gate_min=1000
1223pio_addr=8804615848816
1224pio_latency=100000
1225pio_size=8
1226power_model=Null
1227ret_bad_addr=false
1228ret_data16=65535
1229ret_data32=4294967295
1230ret_data64=18446744073709551615
1231ret_data8=255
1232system=system
1233update_data=false
1234warn_access=
1235pio=system.iobus.master[2]
1236
1237[system.tsunami.fake_uart1]
1238type=IsaFake
1239clk_domain=system.clk_domain
1240default_p_state=UNDEFINED
1241eventq_index=0
1242fake_mem=false
1243p_state_clk_gate_bins=20
1244p_state_clk_gate_max=1000000000000
1245p_state_clk_gate_min=1000
1246pio_addr=8804615848696
1247pio_latency=100000
1248pio_size=8
1249power_model=Null
1250ret_bad_addr=false
1251ret_data16=65535
1252ret_data32=4294967295
1253ret_data64=18446744073709551615
1254ret_data8=255
1255system=system
1256update_data=false
1257warn_access=
1258pio=system.iobus.master[3]
1259
1260[system.tsunami.fake_uart2]
1261type=IsaFake
1262clk_domain=system.clk_domain
1263default_p_state=UNDEFINED
1264eventq_index=0
1265fake_mem=false
1266p_state_clk_gate_bins=20
1267p_state_clk_gate_max=1000000000000
1268p_state_clk_gate_min=1000
1269pio_addr=8804615848936
1270pio_latency=100000
1271pio_size=8
1272power_model=Null
1273ret_bad_addr=false
1274ret_data16=65535
1275ret_data32=4294967295
1276ret_data64=18446744073709551615
1277ret_data8=255
1278system=system
1279update_data=false
1280warn_access=
1281pio=system.iobus.master[4]
1282
1283[system.tsunami.fake_uart3]
1284type=IsaFake
1285clk_domain=system.clk_domain
1286default_p_state=UNDEFINED
1287eventq_index=0
1288fake_mem=false
1289p_state_clk_gate_bins=20
1290p_state_clk_gate_max=1000000000000
1291p_state_clk_gate_min=1000
1292pio_addr=8804615848680
1293pio_latency=100000
1294pio_size=8
1295power_model=Null
1296ret_bad_addr=false
1297ret_data16=65535
1298ret_data32=4294967295
1299ret_data64=18446744073709551615
1300ret_data8=255
1301system=system
1302update_data=false
1303warn_access=
1304pio=system.iobus.master[5]
1305
1306[system.tsunami.fake_uart4]
1307type=IsaFake
1308clk_domain=system.clk_domain
1309default_p_state=UNDEFINED
1310eventq_index=0
1311fake_mem=false
1312p_state_clk_gate_bins=20
1313p_state_clk_gate_max=1000000000000
1314p_state_clk_gate_min=1000
1315pio_addr=8804615848944
1316pio_latency=100000
1317pio_size=8
1318power_model=Null
1319ret_bad_addr=false
1320ret_data16=65535
1321ret_data32=4294967295
1322ret_data64=18446744073709551615
1323ret_data8=255
1324system=system
1325update_data=false
1326warn_access=
1327pio=system.iobus.master[6]
1328
1329[system.tsunami.fb]
1330type=BadDevice
1331clk_domain=system.clk_domain
1332default_p_state=UNDEFINED
1333devicename=FrameBuffer
1334eventq_index=0
1335p_state_clk_gate_bins=20
1336p_state_clk_gate_max=1000000000000
1337p_state_clk_gate_min=1000
1338pio_addr=8804615848912
1339pio_latency=100000
1340power_model=Null
1341system=system
1342pio=system.iobus.master[21]
1343
1344[system.tsunami.ide]
1345type=IdeController
1346BAR0=1
1347BAR0LegacyIO=false
1348BAR0Size=8
1349BAR1=1
1350BAR1LegacyIO=false
1351BAR1Size=4
1352BAR2=1
1353BAR2LegacyIO=false
1354BAR2Size=8
1355BAR3=1
1356BAR3LegacyIO=false
1357BAR3Size=4
1358BAR4=1
1359BAR4LegacyIO=false
1360BAR4Size=16
1361BAR5=1
1362BAR5LegacyIO=false
1363BAR5Size=0
1364BIST=0
1365CacheLineSize=0
1366CapabilityPtr=0
1367CardbusCIS=0
1368ClassCode=1
1369Command=0
1370DeviceID=28945
1371ExpansionROM=0
1372HeaderType=0
1373InterruptLine=31
1374InterruptPin=1
1375LatencyTimer=0
1376LegacyIOBase=0
1377MSICAPBaseOffset=0
1378MSICAPCapId=0
1379MSICAPMaskBits=0
1380MSICAPMsgAddr=0
1381MSICAPMsgCtrl=0
1382MSICAPMsgData=0
1383MSICAPMsgUpperAddr=0
1384MSICAPNextCapability=0
1385MSICAPPendingBits=0
1386MSIXCAPBaseOffset=0
1387MSIXCAPCapId=0
1388MSIXCAPNextCapability=0
1389MSIXMsgCtrl=0
1390MSIXPbaOffset=0
1391MSIXTableOffset=0
1392MaximumLatency=0
1393MinimumGrant=0
1394PMCAPBaseOffset=0
1395PMCAPCapId=0
1396PMCAPCapabilities=0
1397PMCAPCtrlStatus=0
1398PMCAPNextCapability=0
1399PXCAPBaseOffset=0
1400PXCAPCapId=0
1401PXCAPCapabilities=0
1402PXCAPDevCap2=0
1403PXCAPDevCapabilities=0
1404PXCAPDevCtrl=0
1405PXCAPDevCtrl2=0
1406PXCAPDevStatus=0
1407PXCAPLinkCap=0
1408PXCAPLinkCtrl=0
1409PXCAPLinkStatus=0
1410PXCAPNextCapability=0
1411ProgIF=133
1412Revision=0
1413Status=640
1414SubClassCode=1
1415SubsystemID=0
1416SubsystemVendorID=0
1417VendorID=32902
1418clk_domain=system.clk_domain
1419config_latency=20000
1420ctrl_offset=0
1421default_p_state=UNDEFINED
1422disks=system.disk0 system.disk2
1423eventq_index=0
1424host=system.tsunami.pchip
1425io_shift=0
1426p_state_clk_gate_bins=20
1427p_state_clk_gate_max=1000000000000
1428p_state_clk_gate_min=1000
1429pci_bus=0
1430pci_dev=0
1431pci_func=0
1432pio_latency=30000
1433power_model=Null
1434system=system
1435dma=system.iobus.slave[1]
1436pio=system.iobus.master[25]
1437
1438[system.tsunami.io]
1439type=TsunamiIO
1440clk_domain=system.clk_domain
1441default_p_state=UNDEFINED
1442eventq_index=0
1443frequency=976562500
1444p_state_clk_gate_bins=20
1445p_state_clk_gate_max=1000000000000
1446p_state_clk_gate_min=1000
1447pio_addr=8804615847936
1448pio_latency=100000
1449power_model=Null
1450system=system
1451time=Thu Jan 1 00:00:00 2009
1452tsunami=system.tsunami
1453year_is_bcd=false
1454pio=system.iobus.master[22]
1455
1456[system.tsunami.pchip]
1457type=TsunamiPChip
1458clk_domain=system.clk_domain
1459conf_base=8804649402368
1460conf_device_bits=8
1461conf_size=16777216
1462default_p_state=UNDEFINED
1463eventq_index=0
1464p_state_clk_gate_bins=20
1465p_state_clk_gate_max=1000000000000
1466p_state_clk_gate_min=1000
1467pci_dma_base=0
1468pci_mem_base=8796093022208
1469pci_pio_base=8804615847936
1470pio_addr=8802535473152
1471pio_latency=100000
1472platform=system.tsunami
1473power_model=Null
1474system=system
1475tsunami=system.tsunami
1476pio=system.iobus.master[1]
1477
1478[system.tsunami.uart]
1479type=Uart8250
1480clk_domain=system.clk_domain
1481default_p_state=UNDEFINED
1482eventq_index=0
1483p_state_clk_gate_bins=20
1484p_state_clk_gate_max=1000000000000
1485p_state_clk_gate_min=1000
1486pio_addr=8804615848952
1487pio_latency=100000
1488platform=system.tsunami
1489power_model=Null
1490system=system
1491terminal=system.terminal
1492pio=system.iobus.master[23]
1493
1494[system.voltage_domain]
1495type=VoltageDomain
1496eventq_index=0
1497voltage=1.000000
1498
| 689tXSDLL=0
690write_buffer_size=64
691write_high_thresh_perc=85
692write_low_thresh_perc=50
693port=system.membus.master[1]
694
695[system.simple_disk]
696type=SimpleDisk
697children=disk
698disk=system.simple_disk.disk
699eventq_index=0
700system=system
701
702[system.simple_disk.disk]
703type=RawDiskImage
704eventq_index=0
705image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img
706read_only=true
707
708[system.terminal]
709type=Terminal
710eventq_index=0
711intr_control=system.intrctrl
712number=0
713output=true
714port=3456
715
716[system.toL2Bus]
717type=CoherentXBar
718children=snoop_filter
719clk_domain=system.cpu_clk_domain
720default_p_state=UNDEFINED
721eventq_index=0
722forward_latency=0
723frontend_latency=1
724p_state_clk_gate_bins=20
725p_state_clk_gate_max=1000000000000
726p_state_clk_gate_min=1000
727point_of_coherency=false
728power_model=Null
729response_latency=1
730snoop_filter=system.toL2Bus.snoop_filter
731snoop_response_latency=1
732system=system
733use_default_range=false
734width=32
735master=system.l2c.cpu_side
736slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
737
738[system.toL2Bus.snoop_filter]
739type=SnoopFilter
740eventq_index=0
741lookup_latency=0
742max_capacity=8388608
743system=system
744
745[system.tsunami]
746type=Tsunami
747children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip uart
748eventq_index=0
749intrctrl=system.intrctrl
750system=system
751
752[system.tsunami.backdoor]
753type=AlphaBackdoor
754clk_domain=system.clk_domain
755cpu=system.cpu0
756default_p_state=UNDEFINED
757disk=system.simple_disk
758eventq_index=0
759p_state_clk_gate_bins=20
760p_state_clk_gate_max=1000000000000
761p_state_clk_gate_min=1000
762pio_addr=8804682956800
763pio_latency=100000
764platform=system.tsunami
765power_model=Null
766system=system
767terminal=system.terminal
768pio=system.iobus.master[24]
769
770[system.tsunami.cchip]
771type=TsunamiCChip
772clk_domain=system.clk_domain
773default_p_state=UNDEFINED
774eventq_index=0
775p_state_clk_gate_bins=20
776p_state_clk_gate_max=1000000000000
777p_state_clk_gate_min=1000
778pio_addr=8803072344064
779pio_latency=100000
780power_model=Null
781system=system
782tsunami=system.tsunami
783pio=system.iobus.master[0]
784
785[system.tsunami.ethernet]
786type=NSGigE
787BAR0=1
788BAR0LegacyIO=false
789BAR0Size=256
790BAR1=0
791BAR1LegacyIO=false
792BAR1Size=4096
793BAR2=0
794BAR2LegacyIO=false
795BAR2Size=0
796BAR3=0
797BAR3LegacyIO=false
798BAR3Size=0
799BAR4=0
800BAR4LegacyIO=false
801BAR4Size=0
802BAR5=0
803BAR5LegacyIO=false
804BAR5Size=0
805BIST=0
806CacheLineSize=0
807CapabilityPtr=0
808CardbusCIS=0
809ClassCode=2
810Command=0
811DeviceID=34
812ExpansionROM=0
813HeaderType=0
814InterruptLine=30
815InterruptPin=1
816LatencyTimer=0
817LegacyIOBase=0
818MSICAPBaseOffset=0
819MSICAPCapId=0
820MSICAPMaskBits=0
821MSICAPMsgAddr=0
822MSICAPMsgCtrl=0
823MSICAPMsgData=0
824MSICAPMsgUpperAddr=0
825MSICAPNextCapability=0
826MSICAPPendingBits=0
827MSIXCAPBaseOffset=0
828MSIXCAPCapId=0
829MSIXCAPNextCapability=0
830MSIXMsgCtrl=0
831MSIXPbaOffset=0
832MSIXTableOffset=0
833MaximumLatency=52
834MinimumGrant=176
835PMCAPBaseOffset=0
836PMCAPCapId=0
837PMCAPCapabilities=0
838PMCAPCtrlStatus=0
839PMCAPNextCapability=0
840PXCAPBaseOffset=0
841PXCAPCapId=0
842PXCAPCapabilities=0
843PXCAPDevCap2=0
844PXCAPDevCapabilities=0
845PXCAPDevCtrl=0
846PXCAPDevCtrl2=0
847PXCAPDevStatus=0
848PXCAPLinkCap=0
849PXCAPLinkCtrl=0
850PXCAPLinkStatus=0
851PXCAPNextCapability=0
852ProgIF=0
853Revision=0
854Status=656
855SubClassCode=0
856SubsystemID=0
857SubsystemVendorID=0
858VendorID=4107
859clk_domain=system.clk_domain
860config_latency=20000
861default_p_state=UNDEFINED
862dma_data_free=false
863dma_desc_free=false
864dma_no_allocate=true
865dma_read_delay=0
866dma_read_factor=0
867dma_write_delay=0
868dma_write_factor=0
869eventq_index=0
870hardware_address=00:90:00:00:00:01
871host=system.tsunami.pchip
872intr_delay=10000000
873p_state_clk_gate_bins=20
874p_state_clk_gate_max=1000000000000
875p_state_clk_gate_min=1000
876pci_bus=0
877pci_dev=1
878pci_func=0
879pio_latency=30000
880power_model=Null
881rss=false
882rx_delay=1000000
883rx_fifo_size=524288
884rx_filter=true
885rx_thread=false
886system=system
887tx_delay=1000000
888tx_fifo_size=524288
889tx_thread=false
890dma=system.iobus.slave[2]
891pio=system.iobus.master[26]
892
893[system.tsunami.fake_OROM]
894type=IsaFake
895clk_domain=system.clk_domain
896default_p_state=UNDEFINED
897eventq_index=0
898fake_mem=false
899p_state_clk_gate_bins=20
900p_state_clk_gate_max=1000000000000
901p_state_clk_gate_min=1000
902pio_addr=8796093677568
903pio_latency=100000
904pio_size=393216
905power_model=Null
906ret_bad_addr=false
907ret_data16=65535
908ret_data32=4294967295
909ret_data64=18446744073709551615
910ret_data8=255
911system=system
912update_data=false
913warn_access=
914pio=system.iobus.master[8]
915
916[system.tsunami.fake_ata0]
917type=IsaFake
918clk_domain=system.clk_domain
919default_p_state=UNDEFINED
920eventq_index=0
921fake_mem=false
922p_state_clk_gate_bins=20
923p_state_clk_gate_max=1000000000000
924p_state_clk_gate_min=1000
925pio_addr=8804615848432
926pio_latency=100000
927pio_size=8
928power_model=Null
929ret_bad_addr=false
930ret_data16=65535
931ret_data32=4294967295
932ret_data64=18446744073709551615
933ret_data8=255
934system=system
935update_data=false
936warn_access=
937pio=system.iobus.master[19]
938
939[system.tsunami.fake_ata1]
940type=IsaFake
941clk_domain=system.clk_domain
942default_p_state=UNDEFINED
943eventq_index=0
944fake_mem=false
945p_state_clk_gate_bins=20
946p_state_clk_gate_max=1000000000000
947p_state_clk_gate_min=1000
948pio_addr=8804615848304
949pio_latency=100000
950pio_size=8
951power_model=Null
952ret_bad_addr=false
953ret_data16=65535
954ret_data32=4294967295
955ret_data64=18446744073709551615
956ret_data8=255
957system=system
958update_data=false
959warn_access=
960pio=system.iobus.master[20]
961
962[system.tsunami.fake_pnp_addr]
963type=IsaFake
964clk_domain=system.clk_domain
965default_p_state=UNDEFINED
966eventq_index=0
967fake_mem=false
968p_state_clk_gate_bins=20
969p_state_clk_gate_max=1000000000000
970p_state_clk_gate_min=1000
971pio_addr=8804615848569
972pio_latency=100000
973pio_size=8
974power_model=Null
975ret_bad_addr=false
976ret_data16=65535
977ret_data32=4294967295
978ret_data64=18446744073709551615
979ret_data8=255
980system=system
981update_data=false
982warn_access=
983pio=system.iobus.master[9]
984
985[system.tsunami.fake_pnp_read0]
986type=IsaFake
987clk_domain=system.clk_domain
988default_p_state=UNDEFINED
989eventq_index=0
990fake_mem=false
991p_state_clk_gate_bins=20
992p_state_clk_gate_max=1000000000000
993p_state_clk_gate_min=1000
994pio_addr=8804615848451
995pio_latency=100000
996pio_size=8
997power_model=Null
998ret_bad_addr=false
999ret_data16=65535
1000ret_data32=4294967295
1001ret_data64=18446744073709551615
1002ret_data8=255
1003system=system
1004update_data=false
1005warn_access=
1006pio=system.iobus.master[11]
1007
1008[system.tsunami.fake_pnp_read1]
1009type=IsaFake
1010clk_domain=system.clk_domain
1011default_p_state=UNDEFINED
1012eventq_index=0
1013fake_mem=false
1014p_state_clk_gate_bins=20
1015p_state_clk_gate_max=1000000000000
1016p_state_clk_gate_min=1000
1017pio_addr=8804615848515
1018pio_latency=100000
1019pio_size=8
1020power_model=Null
1021ret_bad_addr=false
1022ret_data16=65535
1023ret_data32=4294967295
1024ret_data64=18446744073709551615
1025ret_data8=255
1026system=system
1027update_data=false
1028warn_access=
1029pio=system.iobus.master[12]
1030
1031[system.tsunami.fake_pnp_read2]
1032type=IsaFake
1033clk_domain=system.clk_domain
1034default_p_state=UNDEFINED
1035eventq_index=0
1036fake_mem=false
1037p_state_clk_gate_bins=20
1038p_state_clk_gate_max=1000000000000
1039p_state_clk_gate_min=1000
1040pio_addr=8804615848579
1041pio_latency=100000
1042pio_size=8
1043power_model=Null
1044ret_bad_addr=false
1045ret_data16=65535
1046ret_data32=4294967295
1047ret_data64=18446744073709551615
1048ret_data8=255
1049system=system
1050update_data=false
1051warn_access=
1052pio=system.iobus.master[13]
1053
1054[system.tsunami.fake_pnp_read3]
1055type=IsaFake
1056clk_domain=system.clk_domain
1057default_p_state=UNDEFINED
1058eventq_index=0
1059fake_mem=false
1060p_state_clk_gate_bins=20
1061p_state_clk_gate_max=1000000000000
1062p_state_clk_gate_min=1000
1063pio_addr=8804615848643
1064pio_latency=100000
1065pio_size=8
1066power_model=Null
1067ret_bad_addr=false
1068ret_data16=65535
1069ret_data32=4294967295
1070ret_data64=18446744073709551615
1071ret_data8=255
1072system=system
1073update_data=false
1074warn_access=
1075pio=system.iobus.master[14]
1076
1077[system.tsunami.fake_pnp_read4]
1078type=IsaFake
1079clk_domain=system.clk_domain
1080default_p_state=UNDEFINED
1081eventq_index=0
1082fake_mem=false
1083p_state_clk_gate_bins=20
1084p_state_clk_gate_max=1000000000000
1085p_state_clk_gate_min=1000
1086pio_addr=8804615848707
1087pio_latency=100000
1088pio_size=8
1089power_model=Null
1090ret_bad_addr=false
1091ret_data16=65535
1092ret_data32=4294967295
1093ret_data64=18446744073709551615
1094ret_data8=255
1095system=system
1096update_data=false
1097warn_access=
1098pio=system.iobus.master[15]
1099
1100[system.tsunami.fake_pnp_read5]
1101type=IsaFake
1102clk_domain=system.clk_domain
1103default_p_state=UNDEFINED
1104eventq_index=0
1105fake_mem=false
1106p_state_clk_gate_bins=20
1107p_state_clk_gate_max=1000000000000
1108p_state_clk_gate_min=1000
1109pio_addr=8804615848771
1110pio_latency=100000
1111pio_size=8
1112power_model=Null
1113ret_bad_addr=false
1114ret_data16=65535
1115ret_data32=4294967295
1116ret_data64=18446744073709551615
1117ret_data8=255
1118system=system
1119update_data=false
1120warn_access=
1121pio=system.iobus.master[16]
1122
1123[system.tsunami.fake_pnp_read6]
1124type=IsaFake
1125clk_domain=system.clk_domain
1126default_p_state=UNDEFINED
1127eventq_index=0
1128fake_mem=false
1129p_state_clk_gate_bins=20
1130p_state_clk_gate_max=1000000000000
1131p_state_clk_gate_min=1000
1132pio_addr=8804615848835
1133pio_latency=100000
1134pio_size=8
1135power_model=Null
1136ret_bad_addr=false
1137ret_data16=65535
1138ret_data32=4294967295
1139ret_data64=18446744073709551615
1140ret_data8=255
1141system=system
1142update_data=false
1143warn_access=
1144pio=system.iobus.master[17]
1145
1146[system.tsunami.fake_pnp_read7]
1147type=IsaFake
1148clk_domain=system.clk_domain
1149default_p_state=UNDEFINED
1150eventq_index=0
1151fake_mem=false
1152p_state_clk_gate_bins=20
1153p_state_clk_gate_max=1000000000000
1154p_state_clk_gate_min=1000
1155pio_addr=8804615848899
1156pio_latency=100000
1157pio_size=8
1158power_model=Null
1159ret_bad_addr=false
1160ret_data16=65535
1161ret_data32=4294967295
1162ret_data64=18446744073709551615
1163ret_data8=255
1164system=system
1165update_data=false
1166warn_access=
1167pio=system.iobus.master[18]
1168
1169[system.tsunami.fake_pnp_write]
1170type=IsaFake
1171clk_domain=system.clk_domain
1172default_p_state=UNDEFINED
1173eventq_index=0
1174fake_mem=false
1175p_state_clk_gate_bins=20
1176p_state_clk_gate_max=1000000000000
1177p_state_clk_gate_min=1000
1178pio_addr=8804615850617
1179pio_latency=100000
1180pio_size=8
1181power_model=Null
1182ret_bad_addr=false
1183ret_data16=65535
1184ret_data32=4294967295
1185ret_data64=18446744073709551615
1186ret_data8=255
1187system=system
1188update_data=false
1189warn_access=
1190pio=system.iobus.master[10]
1191
1192[system.tsunami.fake_ppc]
1193type=IsaFake
1194clk_domain=system.clk_domain
1195default_p_state=UNDEFINED
1196eventq_index=0
1197fake_mem=false
1198p_state_clk_gate_bins=20
1199p_state_clk_gate_max=1000000000000
1200p_state_clk_gate_min=1000
1201pio_addr=8804615848891
1202pio_latency=100000
1203pio_size=8
1204power_model=Null
1205ret_bad_addr=false
1206ret_data16=65535
1207ret_data32=4294967295
1208ret_data64=18446744073709551615
1209ret_data8=255
1210system=system
1211update_data=false
1212warn_access=
1213pio=system.iobus.master[7]
1214
1215[system.tsunami.fake_sm_chip]
1216type=IsaFake
1217clk_domain=system.clk_domain
1218default_p_state=UNDEFINED
1219eventq_index=0
1220fake_mem=false
1221p_state_clk_gate_bins=20
1222p_state_clk_gate_max=1000000000000
1223p_state_clk_gate_min=1000
1224pio_addr=8804615848816
1225pio_latency=100000
1226pio_size=8
1227power_model=Null
1228ret_bad_addr=false
1229ret_data16=65535
1230ret_data32=4294967295
1231ret_data64=18446744073709551615
1232ret_data8=255
1233system=system
1234update_data=false
1235warn_access=
1236pio=system.iobus.master[2]
1237
1238[system.tsunami.fake_uart1]
1239type=IsaFake
1240clk_domain=system.clk_domain
1241default_p_state=UNDEFINED
1242eventq_index=0
1243fake_mem=false
1244p_state_clk_gate_bins=20
1245p_state_clk_gate_max=1000000000000
1246p_state_clk_gate_min=1000
1247pio_addr=8804615848696
1248pio_latency=100000
1249pio_size=8
1250power_model=Null
1251ret_bad_addr=false
1252ret_data16=65535
1253ret_data32=4294967295
1254ret_data64=18446744073709551615
1255ret_data8=255
1256system=system
1257update_data=false
1258warn_access=
1259pio=system.iobus.master[3]
1260
1261[system.tsunami.fake_uart2]
1262type=IsaFake
1263clk_domain=system.clk_domain
1264default_p_state=UNDEFINED
1265eventq_index=0
1266fake_mem=false
1267p_state_clk_gate_bins=20
1268p_state_clk_gate_max=1000000000000
1269p_state_clk_gate_min=1000
1270pio_addr=8804615848936
1271pio_latency=100000
1272pio_size=8
1273power_model=Null
1274ret_bad_addr=false
1275ret_data16=65535
1276ret_data32=4294967295
1277ret_data64=18446744073709551615
1278ret_data8=255
1279system=system
1280update_data=false
1281warn_access=
1282pio=system.iobus.master[4]
1283
1284[system.tsunami.fake_uart3]
1285type=IsaFake
1286clk_domain=system.clk_domain
1287default_p_state=UNDEFINED
1288eventq_index=0
1289fake_mem=false
1290p_state_clk_gate_bins=20
1291p_state_clk_gate_max=1000000000000
1292p_state_clk_gate_min=1000
1293pio_addr=8804615848680
1294pio_latency=100000
1295pio_size=8
1296power_model=Null
1297ret_bad_addr=false
1298ret_data16=65535
1299ret_data32=4294967295
1300ret_data64=18446744073709551615
1301ret_data8=255
1302system=system
1303update_data=false
1304warn_access=
1305pio=system.iobus.master[5]
1306
1307[system.tsunami.fake_uart4]
1308type=IsaFake
1309clk_domain=system.clk_domain
1310default_p_state=UNDEFINED
1311eventq_index=0
1312fake_mem=false
1313p_state_clk_gate_bins=20
1314p_state_clk_gate_max=1000000000000
1315p_state_clk_gate_min=1000
1316pio_addr=8804615848944
1317pio_latency=100000
1318pio_size=8
1319power_model=Null
1320ret_bad_addr=false
1321ret_data16=65535
1322ret_data32=4294967295
1323ret_data64=18446744073709551615
1324ret_data8=255
1325system=system
1326update_data=false
1327warn_access=
1328pio=system.iobus.master[6]
1329
1330[system.tsunami.fb]
1331type=BadDevice
1332clk_domain=system.clk_domain
1333default_p_state=UNDEFINED
1334devicename=FrameBuffer
1335eventq_index=0
1336p_state_clk_gate_bins=20
1337p_state_clk_gate_max=1000000000000
1338p_state_clk_gate_min=1000
1339pio_addr=8804615848912
1340pio_latency=100000
1341power_model=Null
1342system=system
1343pio=system.iobus.master[21]
1344
1345[system.tsunami.ide]
1346type=IdeController
1347BAR0=1
1348BAR0LegacyIO=false
1349BAR0Size=8
1350BAR1=1
1351BAR1LegacyIO=false
1352BAR1Size=4
1353BAR2=1
1354BAR2LegacyIO=false
1355BAR2Size=8
1356BAR3=1
1357BAR3LegacyIO=false
1358BAR3Size=4
1359BAR4=1
1360BAR4LegacyIO=false
1361BAR4Size=16
1362BAR5=1
1363BAR5LegacyIO=false
1364BAR5Size=0
1365BIST=0
1366CacheLineSize=0
1367CapabilityPtr=0
1368CardbusCIS=0
1369ClassCode=1
1370Command=0
1371DeviceID=28945
1372ExpansionROM=0
1373HeaderType=0
1374InterruptLine=31
1375InterruptPin=1
1376LatencyTimer=0
1377LegacyIOBase=0
1378MSICAPBaseOffset=0
1379MSICAPCapId=0
1380MSICAPMaskBits=0
1381MSICAPMsgAddr=0
1382MSICAPMsgCtrl=0
1383MSICAPMsgData=0
1384MSICAPMsgUpperAddr=0
1385MSICAPNextCapability=0
1386MSICAPPendingBits=0
1387MSIXCAPBaseOffset=0
1388MSIXCAPCapId=0
1389MSIXCAPNextCapability=0
1390MSIXMsgCtrl=0
1391MSIXPbaOffset=0
1392MSIXTableOffset=0
1393MaximumLatency=0
1394MinimumGrant=0
1395PMCAPBaseOffset=0
1396PMCAPCapId=0
1397PMCAPCapabilities=0
1398PMCAPCtrlStatus=0
1399PMCAPNextCapability=0
1400PXCAPBaseOffset=0
1401PXCAPCapId=0
1402PXCAPCapabilities=0
1403PXCAPDevCap2=0
1404PXCAPDevCapabilities=0
1405PXCAPDevCtrl=0
1406PXCAPDevCtrl2=0
1407PXCAPDevStatus=0
1408PXCAPLinkCap=0
1409PXCAPLinkCtrl=0
1410PXCAPLinkStatus=0
1411PXCAPNextCapability=0
1412ProgIF=133
1413Revision=0
1414Status=640
1415SubClassCode=1
1416SubsystemID=0
1417SubsystemVendorID=0
1418VendorID=32902
1419clk_domain=system.clk_domain
1420config_latency=20000
1421ctrl_offset=0
1422default_p_state=UNDEFINED
1423disks=system.disk0 system.disk2
1424eventq_index=0
1425host=system.tsunami.pchip
1426io_shift=0
1427p_state_clk_gate_bins=20
1428p_state_clk_gate_max=1000000000000
1429p_state_clk_gate_min=1000
1430pci_bus=0
1431pci_dev=0
1432pci_func=0
1433pio_latency=30000
1434power_model=Null
1435system=system
1436dma=system.iobus.slave[1]
1437pio=system.iobus.master[25]
1438
1439[system.tsunami.io]
1440type=TsunamiIO
1441clk_domain=system.clk_domain
1442default_p_state=UNDEFINED
1443eventq_index=0
1444frequency=976562500
1445p_state_clk_gate_bins=20
1446p_state_clk_gate_max=1000000000000
1447p_state_clk_gate_min=1000
1448pio_addr=8804615847936
1449pio_latency=100000
1450power_model=Null
1451system=system
1452time=Thu Jan 1 00:00:00 2009
1453tsunami=system.tsunami
1454year_is_bcd=false
1455pio=system.iobus.master[22]
1456
1457[system.tsunami.pchip]
1458type=TsunamiPChip
1459clk_domain=system.clk_domain
1460conf_base=8804649402368
1461conf_device_bits=8
1462conf_size=16777216
1463default_p_state=UNDEFINED
1464eventq_index=0
1465p_state_clk_gate_bins=20
1466p_state_clk_gate_max=1000000000000
1467p_state_clk_gate_min=1000
1468pci_dma_base=0
1469pci_mem_base=8796093022208
1470pci_pio_base=8804615847936
1471pio_addr=8802535473152
1472pio_latency=100000
1473platform=system.tsunami
1474power_model=Null
1475system=system
1476tsunami=system.tsunami
1477pio=system.iobus.master[1]
1478
1479[system.tsunami.uart]
1480type=Uart8250
1481clk_domain=system.clk_domain
1482default_p_state=UNDEFINED
1483eventq_index=0
1484p_state_clk_gate_bins=20
1485p_state_clk_gate_max=1000000000000
1486p_state_clk_gate_min=1000
1487pio_addr=8804615848952
1488pio_latency=100000
1489platform=system.tsunami
1490power_model=Null
1491system=system
1492terminal=system.terminal
1493pio=system.iobus.master[23]
1494
1495[system.voltage_domain]
1496type=VoltageDomain
1497eventq_index=0
1498voltage=1.000000
1499
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