1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 11 unchanged lines hidden (view full) ---

20init_param=0
21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=timing
26mem_ranges=0:134217727
27memories=system.physmem
28num_work_ids=16
29pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
30readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
31symbolfile=
32system_rev=1024
33system_type=34
34work_begin_ckpt_count=0
35work_begin_cpu_id_exit=-1

--- 345 unchanged lines hidden (view full) ---

381type=IntrControl
382eventq_index=0
383sys=system
384
385[system.iobus]
386type=NoncoherentXBar
387clk_domain=system.clk_domain
388eventq_index=0
389header_cycles=1
390use_default_range=true
391width=8
392default=system.tsunami.pciconfig.pio
393master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
394slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
395
396[system.iocache]
397type=BaseCache
398children=tags
399addr_ranges=0:134217727

--- 65 unchanged lines hidden (view full) ---

465sequential_access=false
466size=4194304
467
468[system.membus]
469type=CoherentXBar
470children=badaddr_responder
471clk_domain=system.clk_domain
472eventq_index=0
473header_cycles=1
474snoop_filter=Null
475system=system
476use_default_range=false
477width=8
478default=system.membus.badaddr_responder.pio
479master=system.bridge.slave system.physmem.port
480slave=system.system_port system.l2c.mem_side system.iocache.mem_side
481
482[system.membus.badaddr_responder]
483type=IsaFake
484clk_domain=system.clk_domain
485eventq_index=0

--- 33 unchanged lines hidden (view full) ---

519IDD4W2=0.000000
520IDD5=0.220000
521IDD52=0.000000
522IDD6=0.000000
523IDD62=0.000000
524VDD=1.500000
525VDD2=0.000000
526activation_limit=4
527addr_mapping=RoRaBaChCo
528bank_groups_per_rank=0
529banks_per_rank=8
530burst_length=8
531channels=1
532clk_domain=system.clk_domain
533conf_table_reported=true
534device_bus_width=8
535device_rowbuffer_size=1024

--- 58 unchanged lines hidden (view full) ---

594number=0
595output=true
596port=3456
597
598[system.toL2Bus]
599type=CoherentXBar
600clk_domain=system.cpu_clk_domain
601eventq_index=0
602header_cycles=1
603snoop_filter=Null
604system=system
605use_default_range=false
606width=8
607master=system.l2c.cpu_side
608slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
609
610[system.tsunami]
611type=Tsunami
612children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
613eventq_index=0
614intrctrl=system.intrctrl

--- 622 unchanged lines hidden ---