| config.ini (9885:afd9ea6101d9) | config.ini (9988:0b2e590c85be) |
|---|---|
| 1[root] 2type=Root 3children=system | 1[root] 2type=Root 3children=system |
| 4eventq_index=0 |
|
| 4full_system=true | 5full_system=true |
| 6sim_quantum=0 |
|
| 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 9[system] 10type=LinuxAlphaSystem 11children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 12boot_cpu_frequency=500 13boot_osflags=root=/dev/hda1 console=ttyS0 14cache_line_size=64 15clk_domain=system.clk_domain | 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain |
| 16console=/dist/m5/system/binaries/console | 18console=/scratch/nilay/GEM5/system/binaries/console 19eventq_index=0 |
| 17init_param=0 | 20init_param=0 |
| 18kernel=/dist/m5/system/binaries/vmlinux | 21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux |
| 19load_addr_mask=1099511627775 20mem_mode=atomic 21mem_ranges=0:134217727 22memories=system.physmem 23num_work_ids=16 | 22load_addr_mask=1099511627775 23mem_mode=atomic 24mem_ranges=0:134217727 25memories=system.physmem 26num_work_ids=16 |
| 24pal=/dist/m5/system/binaries/ts_osfpal | 27pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal |
| 25readfile=tests/halt.sh 26symbolfile= 27system_rev=1024 28system_type=34 29work_begin_ckpt_count=0 30work_begin_cpu_id_exit=-1 31work_begin_exit_count=0 32work_cpus_ckpt_count=0 33work_end_ckpt_count=0 34work_end_exit_count=0 35work_item_id=-1 36system_port=system.membus.slave[0] 37 38[system.bridge] 39type=Bridge 40clk_domain=system.clk_domain 41delay=50000 | 28readfile=tests/halt.sh 29symbolfile= 30system_rev=1024 31system_type=34 32work_begin_ckpt_count=0 33work_begin_cpu_id_exit=-1 34work_begin_exit_count=0 35work_cpus_ckpt_count=0 36work_end_ckpt_count=0 37work_end_exit_count=0 38work_item_id=-1 39system_port=system.membus.slave[0] 40 41[system.bridge] 42type=Bridge 43clk_domain=system.clk_domain 44delay=50000 |
| 45eventq_index=0 |
|
| 42ranges=8796093022208:18446744073709551615 43req_size=16 44resp_size=16 45master=system.iobus.slave[0] 46slave=system.membus.master[0] 47 48[system.clk_domain] 49type=SrcClockDomain 50clock=1000 | 46ranges=8796093022208:18446744073709551615 47req_size=16 48resp_size=16 49master=system.iobus.slave[0] 50slave=system.membus.master[0] 51 52[system.clk_domain] 53type=SrcClockDomain 54clock=1000 |
| 55eventq_index=0 |
|
| 51voltage_domain=system.voltage_domain 52 53[system.cpu] 54type=AtomicSimpleCPU 55children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer 56checker=Null 57clk_domain=system.cpu_clk_domain 58cpu_id=0 59do_checkpoint_insts=true 60do_quiesce=true 61do_statistics_insts=true 62dtb=system.cpu.dtb | 56voltage_domain=system.voltage_domain 57 58[system.cpu] 59type=AtomicSimpleCPU 60children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer 61checker=Null 62clk_domain=system.cpu_clk_domain 63cpu_id=0 64do_checkpoint_insts=true 65do_quiesce=true 66do_statistics_insts=true 67dtb=system.cpu.dtb |
| 68eventq_index=0 |
|
| 63fastmem=false 64function_trace=false 65function_trace_start=0 66interrupts=system.cpu.interrupts 67isa=system.cpu.isa 68itb=system.cpu.itb 69max_insts_all_threads=0 70max_insts_any_thread=0 --- 17 unchanged lines hidden (view full) --- 88icache_port=system.cpu.icache.cpu_side 89 90[system.cpu.dcache] 91type=BaseCache 92children=tags 93addr_ranges=0:18446744073709551615 94assoc=4 95clk_domain=system.cpu_clk_domain | 69fastmem=false 70function_trace=false 71function_trace_start=0 72interrupts=system.cpu.interrupts 73isa=system.cpu.isa 74itb=system.cpu.itb 75max_insts_all_threads=0 76max_insts_any_thread=0 --- 17 unchanged lines hidden (view full) --- 94icache_port=system.cpu.icache.cpu_side 95 96[system.cpu.dcache] 97type=BaseCache 98children=tags 99addr_ranges=0:18446744073709551615 100assoc=4 101clk_domain=system.cpu_clk_domain |
| 102eventq_index=0 |
|
| 96forward_snoops=true 97hit_latency=2 98is_top_level=true 99max_miss_count=0 100mshrs=4 101prefetch_on_access=false 102prefetcher=Null 103response_latency=2 --- 6 unchanged lines hidden (view full) --- 110cpu_side=system.cpu.dcache_port 111mem_side=system.cpu.toL2Bus.slave[1] 112 113[system.cpu.dcache.tags] 114type=LRU 115assoc=4 116block_size=64 117clk_domain=system.cpu_clk_domain | 103forward_snoops=true 104hit_latency=2 105is_top_level=true 106max_miss_count=0 107mshrs=4 108prefetch_on_access=false 109prefetcher=Null 110response_latency=2 --- 6 unchanged lines hidden (view full) --- 117cpu_side=system.cpu.dcache_port 118mem_side=system.cpu.toL2Bus.slave[1] 119 120[system.cpu.dcache.tags] 121type=LRU 122assoc=4 123block_size=64 124clk_domain=system.cpu_clk_domain |
| 125eventq_index=0 |
|
| 118hit_latency=2 119size=32768 120 121[system.cpu.dtb] 122type=AlphaTLB | 126hit_latency=2 127size=32768 128 129[system.cpu.dtb] 130type=AlphaTLB |
| 131eventq_index=0 |
|
| 123size=64 124 125[system.cpu.icache] 126type=BaseCache 127children=tags 128addr_ranges=0:18446744073709551615 129assoc=1 130clk_domain=system.cpu_clk_domain | 132size=64 133 134[system.cpu.icache] 135type=BaseCache 136children=tags 137addr_ranges=0:18446744073709551615 138assoc=1 139clk_domain=system.cpu_clk_domain |
| 140eventq_index=0 |
|
| 131forward_snoops=true 132hit_latency=2 133is_top_level=true 134max_miss_count=0 135mshrs=4 136prefetch_on_access=false 137prefetcher=Null 138response_latency=2 --- 6 unchanged lines hidden (view full) --- 145cpu_side=system.cpu.icache_port 146mem_side=system.cpu.toL2Bus.slave[0] 147 148[system.cpu.icache.tags] 149type=LRU 150assoc=1 151block_size=64 152clk_domain=system.cpu_clk_domain | 141forward_snoops=true 142hit_latency=2 143is_top_level=true 144max_miss_count=0 145mshrs=4 146prefetch_on_access=false 147prefetcher=Null 148response_latency=2 --- 6 unchanged lines hidden (view full) --- 155cpu_side=system.cpu.icache_port 156mem_side=system.cpu.toL2Bus.slave[0] 157 158[system.cpu.icache.tags] 159type=LRU 160assoc=1 161block_size=64 162clk_domain=system.cpu_clk_domain |
| 163eventq_index=0 |
|
| 153hit_latency=2 154size=32768 155 156[system.cpu.interrupts] 157type=AlphaInterrupts | 164hit_latency=2 165size=32768 166 167[system.cpu.interrupts] 168type=AlphaInterrupts |
| 169eventq_index=0 |
|
| 158 159[system.cpu.isa] 160type=AlphaISA | 170 171[system.cpu.isa] 172type=AlphaISA |
| 173eventq_index=0 |
|
| 161 162[system.cpu.itb] 163type=AlphaTLB | 174 175[system.cpu.itb] 176type=AlphaTLB |
| 177eventq_index=0 |
|
| 164size=48 165 166[system.cpu.l2cache] 167type=BaseCache 168children=tags 169addr_ranges=0:18446744073709551615 170assoc=8 171clk_domain=system.cpu_clk_domain | 178size=48 179 180[system.cpu.l2cache] 181type=BaseCache 182children=tags 183addr_ranges=0:18446744073709551615 184assoc=8 185clk_domain=system.cpu_clk_domain |
| 186eventq_index=0 |
|
| 172forward_snoops=true 173hit_latency=20 174is_top_level=false 175max_miss_count=0 176mshrs=20 177prefetch_on_access=false 178prefetcher=Null 179response_latency=20 --- 6 unchanged lines hidden (view full) --- 186cpu_side=system.cpu.toL2Bus.master[0] 187mem_side=system.membus.slave[1] 188 189[system.cpu.l2cache.tags] 190type=LRU 191assoc=8 192block_size=64 193clk_domain=system.cpu_clk_domain | 187forward_snoops=true 188hit_latency=20 189is_top_level=false 190max_miss_count=0 191mshrs=20 192prefetch_on_access=false 193prefetcher=Null 194response_latency=20 --- 6 unchanged lines hidden (view full) --- 201cpu_side=system.cpu.toL2Bus.master[0] 202mem_side=system.membus.slave[1] 203 204[system.cpu.l2cache.tags] 205type=LRU 206assoc=8 207block_size=64 208clk_domain=system.cpu_clk_domain |
| 209eventq_index=0 |
|
| 194hit_latency=20 195size=4194304 196 197[system.cpu.toL2Bus] 198type=CoherentBus 199clk_domain=system.cpu_clk_domain | 210hit_latency=20 211size=4194304 212 213[system.cpu.toL2Bus] 214type=CoherentBus 215clk_domain=system.cpu_clk_domain |
| 216eventq_index=0 |
|
| 200header_cycles=1 201system=system 202use_default_range=false 203width=32 204master=system.cpu.l2cache.cpu_side 205slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 206 207[system.cpu.tracer] 208type=ExeTracer | 217header_cycles=1 218system=system 219use_default_range=false 220width=32 221master=system.cpu.l2cache.cpu_side 222slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 223 224[system.cpu.tracer] 225type=ExeTracer |
| 226eventq_index=0 |
|
| 209 210[system.cpu_clk_domain] 211type=SrcClockDomain 212clock=500 | 227 228[system.cpu_clk_domain] 229type=SrcClockDomain 230clock=500 |
| 231eventq_index=0 |
|
| 213voltage_domain=system.voltage_domain 214 215[system.disk0] 216type=IdeDisk 217children=image 218delay=1000000 219driveID=master | 232voltage_domain=system.voltage_domain 233 234[system.disk0] 235type=IdeDisk 236children=image 237delay=1000000 238driveID=master |
| 239eventq_index=0 |
|
| 220image=system.disk0.image 221 222[system.disk0.image] 223type=CowDiskImage 224children=child 225child=system.disk0.image.child | 240image=system.disk0.image 241 242[system.disk0.image] 243type=CowDiskImage 244children=child 245child=system.disk0.image.child |
| 246eventq_index=0 |
|
| 226image_file= 227read_only=false 228table_size=65536 229 230[system.disk0.image.child] 231type=RawDiskImage | 247image_file= 248read_only=false 249table_size=65536 250 251[system.disk0.image.child] 252type=RawDiskImage |
| 232image_file=/dist/m5/system/disks/linux-latest.img | 253eventq_index=0 254image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img |
| 233read_only=true 234 235[system.disk2] 236type=IdeDisk 237children=image 238delay=1000000 239driveID=master | 255read_only=true 256 257[system.disk2] 258type=IdeDisk 259children=image 260delay=1000000 261driveID=master |
| 262eventq_index=0 |
|
| 240image=system.disk2.image 241 242[system.disk2.image] 243type=CowDiskImage 244children=child 245child=system.disk2.image.child | 263image=system.disk2.image 264 265[system.disk2.image] 266type=CowDiskImage 267children=child 268child=system.disk2.image.child |
| 269eventq_index=0 |
|
| 246image_file= 247read_only=false 248table_size=65536 249 250[system.disk2.image.child] 251type=RawDiskImage | 270image_file= 271read_only=false 272table_size=65536 273 274[system.disk2.image.child] 275type=RawDiskImage |
| 252image_file=/dist/m5/system/disks/linux-bigswap2.img | 276eventq_index=0 277image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img |
| 253read_only=true 254 255[system.intrctrl] 256type=IntrControl | 278read_only=true 279 280[system.intrctrl] 281type=IntrControl |
| 282eventq_index=0 |
|
| 257sys=system 258 259[system.iobus] 260type=NoncoherentBus 261clk_domain=system.clk_domain | 283sys=system 284 285[system.iobus] 286type=NoncoherentBus 287clk_domain=system.clk_domain |
| 288eventq_index=0 |
|
| 262header_cycles=1 263use_default_range=true 264width=8 265default=system.tsunami.pciconfig.pio 266master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 267slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 268 269[system.iocache] 270type=BaseCache 271children=tags 272addr_ranges=0:134217727 273assoc=8 274clk_domain=system.clk_domain | 289header_cycles=1 290use_default_range=true 291width=8 292default=system.tsunami.pciconfig.pio 293master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 294slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 295 296[system.iocache] 297type=BaseCache 298children=tags 299addr_ranges=0:134217727 300assoc=8 301clk_domain=system.clk_domain |
| 302eventq_index=0 |
|
| 275forward_snoops=false 276hit_latency=50 277is_top_level=true 278max_miss_count=0 279mshrs=20 280prefetch_on_access=false 281prefetcher=Null 282response_latency=50 --- 6 unchanged lines hidden (view full) --- 289cpu_side=system.iobus.master[29] 290mem_side=system.membus.slave[2] 291 292[system.iocache.tags] 293type=LRU 294assoc=8 295block_size=64 296clk_domain=system.clk_domain | 303forward_snoops=false 304hit_latency=50 305is_top_level=true 306max_miss_count=0 307mshrs=20 308prefetch_on_access=false 309prefetcher=Null 310response_latency=50 --- 6 unchanged lines hidden (view full) --- 317cpu_side=system.iobus.master[29] 318mem_side=system.membus.slave[2] 319 320[system.iocache.tags] 321type=LRU 322assoc=8 323block_size=64 324clk_domain=system.clk_domain |
| 325eventq_index=0 |
|
| 297hit_latency=50 298size=1024 299 300[system.membus] 301type=CoherentBus 302children=badaddr_responder 303clk_domain=system.clk_domain | 326hit_latency=50 327size=1024 328 329[system.membus] 330type=CoherentBus 331children=badaddr_responder 332clk_domain=system.clk_domain |
| 333eventq_index=0 |
|
| 304header_cycles=1 305system=system 306use_default_range=false 307width=8 308default=system.membus.badaddr_responder.pio 309master=system.bridge.slave system.physmem.port 310slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 311 312[system.membus.badaddr_responder] 313type=IsaFake 314clk_domain=system.clk_domain | 334header_cycles=1 335system=system 336use_default_range=false 337width=8 338default=system.membus.badaddr_responder.pio 339master=system.bridge.slave system.physmem.port 340slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 341 342[system.membus.badaddr_responder] 343type=IsaFake 344clk_domain=system.clk_domain |
| 345eventq_index=0 |
|
| 315fake_mem=false 316pio_addr=0 317pio_latency=100000 318pio_size=8 319ret_bad_addr=true 320ret_data16=65535 321ret_data32=4294967295 322ret_data64=18446744073709551615 323ret_data8=255 324system=system 325update_data=false 326warn_access= 327pio=system.membus.default 328 329[system.physmem] | 346fake_mem=false 347pio_addr=0 348pio_latency=100000 349pio_size=8 350ret_bad_addr=true 351ret_data16=65535 352ret_data32=4294967295 353ret_data64=18446744073709551615 354ret_data8=255 355system=system 356update_data=false 357warn_access= 358pio=system.membus.default 359 360[system.physmem] |
| 330type=SimpleDRAM 331activation_limit=4 332addr_mapping=RaBaChCo 333banks_per_rank=8 334burst_length=8 335channels=1 | 361type=SimpleMemory 362bandwidth=73.000000 |
| 336clk_domain=system.clk_domain 337conf_table_reported=true | 363clk_domain=system.clk_domain 364conf_table_reported=true |
| 338device_bus_width=8 339device_rowbuffer_size=1024 340devices_per_rank=8 | 365eventq_index=0 |
| 341in_addr_map=true | 366in_addr_map=true |
| 342mem_sched_policy=frfcfs | 367latency=30000 368latency_var=0 |
| 343null=false | 369null=false |
| 344page_policy=open | |
| 345range=0:134217727 | 370range=0:134217727 |
| 346ranks_per_channel=2 347read_buffer_size=32 348static_backend_latency=10000 349static_frontend_latency=10000 350tBURST=5000 351tCL=13750 352tRCD=13750 353tREFI=7800000 354tRFC=300000 355tRP=13750 356tWTR=7500 357tXAW=40000 358write_buffer_size=32 359write_thresh_perc=70 | |
| 360port=system.membus.master[1] 361 362[system.simple_disk] 363type=SimpleDisk 364children=disk 365disk=system.simple_disk.disk | 371port=system.membus.master[1] 372 373[system.simple_disk] 374type=SimpleDisk 375children=disk 376disk=system.simple_disk.disk |
| 377eventq_index=0 |
|
| 366system=system 367 368[system.simple_disk.disk] 369type=RawDiskImage | 378system=system 379 380[system.simple_disk.disk] 381type=RawDiskImage |
| 370image_file=/dist/m5/system/disks/linux-latest.img | 382eventq_index=0 383image_file=/scratch/nilay/GEM5/system/disks/linux-latest.img |
| 371read_only=true 372 373[system.terminal] 374type=Terminal | 384read_only=true 385 386[system.terminal] 387type=Terminal |
| 388eventq_index=0 |
|
| 375intr_control=system.intrctrl 376number=0 377output=true 378port=3456 379 380[system.tsunami] 381type=Tsunami 382children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart | 389intr_control=system.intrctrl 390number=0 391output=true 392port=3456 393 394[system.tsunami] 395type=Tsunami 396children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart |
| 397eventq_index=0 |
|
| 383intrctrl=system.intrctrl 384system=system 385 386[system.tsunami.backdoor] 387type=AlphaBackdoor 388clk_domain=system.clk_domain 389cpu=system.cpu 390disk=system.simple_disk | 398intrctrl=system.intrctrl 399system=system 400 401[system.tsunami.backdoor] 402type=AlphaBackdoor 403clk_domain=system.clk_domain 404cpu=system.cpu 405disk=system.simple_disk |
| 406eventq_index=0 |
|
| 391pio_addr=8804682956800 392pio_latency=100000 393platform=system.tsunami 394system=system 395terminal=system.terminal 396pio=system.iobus.master[24] 397 398[system.tsunami.cchip] 399type=TsunamiCChip 400clk_domain=system.clk_domain | 407pio_addr=8804682956800 408pio_latency=100000 409platform=system.tsunami 410system=system 411terminal=system.terminal 412pio=system.iobus.master[24] 413 414[system.tsunami.cchip] 415type=TsunamiCChip 416clk_domain=system.clk_domain |
| 417eventq_index=0 |
|
| 401pio_addr=8803072344064 402pio_latency=100000 403system=system 404tsunami=system.tsunami 405pio=system.iobus.master[0] 406 407[system.tsunami.ethernet] 408type=NSGigE --- 12 unchanged lines hidden (view full) --- 421BAR4=0 422BAR4LegacyIO=false 423BAR4Size=0 424BAR5=0 425BAR5LegacyIO=false 426BAR5Size=0 427BIST=0 428CacheLineSize=0 | 418pio_addr=8803072344064 419pio_latency=100000 420system=system 421tsunami=system.tsunami 422pio=system.iobus.master[0] 423 424[system.tsunami.ethernet] 425type=NSGigE --- 12 unchanged lines hidden (view full) --- 438BAR4=0 439BAR4LegacyIO=false 440BAR4Size=0 441BAR5=0 442BAR5LegacyIO=false 443BAR5Size=0 444BIST=0 445CacheLineSize=0 |
| 446CapabilityPtr=0 |
|
| 429CardbusCIS=0 430ClassCode=2 431Command=0 432DeviceID=34 433ExpansionROM=0 434HeaderType=0 435InterruptLine=30 436InterruptPin=1 437LatencyTimer=0 | 447CardbusCIS=0 448ClassCode=2 449Command=0 450DeviceID=34 451ExpansionROM=0 452HeaderType=0 453InterruptLine=30 454InterruptPin=1 455LatencyTimer=0 |
| 456MSICAPBaseOffset=0 457MSICAPCapId=0 458MSICAPMaskBits=0 459MSICAPMsgAddr=0 460MSICAPMsgCtrl=0 461MSICAPMsgData=0 462MSICAPMsgUpperAddr=0 463MSICAPNextCapability=0 464MSICAPPendingBits=0 465MSIXCAPBaseOffset=0 466MSIXCAPCapId=0 467MSIXCAPNextCapability=0 468MSIXMsgCtrl=0 469MSIXPbaOffset=0 470MSIXTableOffset=0 |
|
| 438MaximumLatency=52 439MinimumGrant=176 | 471MaximumLatency=52 472MinimumGrant=176 |
| 473PMCAPBaseOffset=0 474PMCAPCapId=0 475PMCAPCapabilities=0 476PMCAPCtrlStatus=0 477PMCAPNextCapability=0 478PXCAPBaseOffset=0 479PXCAPCapId=0 480PXCAPCapabilities=0 481PXCAPDevCap2=0 482PXCAPDevCapabilities=0 483PXCAPDevCtrl=0 484PXCAPDevCtrl2=0 485PXCAPDevStatus=0 486PXCAPLinkCap=0 487PXCAPLinkCtrl=0 488PXCAPLinkStatus=0 489PXCAPNextCapability=0 |
|
| 440ProgIF=0 441Revision=0 442Status=656 443SubClassCode=0 444SubsystemID=0 445SubsystemVendorID=0 446VendorID=4107 447clk_domain=system.clk_domain 448config_latency=20000 449dma_data_free=false 450dma_desc_free=false 451dma_no_allocate=true 452dma_read_delay=0 453dma_read_factor=0 454dma_write_delay=0 455dma_write_factor=0 | 490ProgIF=0 491Revision=0 492Status=656 493SubClassCode=0 494SubsystemID=0 495SubsystemVendorID=0 496VendorID=4107 497clk_domain=system.clk_domain 498config_latency=20000 499dma_data_free=false 500dma_desc_free=false 501dma_no_allocate=true 502dma_read_delay=0 503dma_read_factor=0 504dma_write_delay=0 505dma_write_factor=0 |
| 506eventq_index=0 |
|
| 456hardware_address=00:90:00:00:00:01 457intr_delay=10000000 458pci_bus=0 459pci_dev=1 460pci_func=0 461pio_latency=30000 462platform=system.tsunami 463rss=false --- 7 unchanged lines hidden (view full) --- 471tx_thread=false 472config=system.iobus.master[28] 473dma=system.iobus.slave[2] 474pio=system.iobus.master[27] 475 476[system.tsunami.fake_OROM] 477type=IsaFake 478clk_domain=system.clk_domain | 507hardware_address=00:90:00:00:00:01 508intr_delay=10000000 509pci_bus=0 510pci_dev=1 511pci_func=0 512pio_latency=30000 513platform=system.tsunami 514rss=false --- 7 unchanged lines hidden (view full) --- 522tx_thread=false 523config=system.iobus.master[28] 524dma=system.iobus.slave[2] 525pio=system.iobus.master[27] 526 527[system.tsunami.fake_OROM] 528type=IsaFake 529clk_domain=system.clk_domain |
| 530eventq_index=0 |
|
| 479fake_mem=false 480pio_addr=8796093677568 481pio_latency=100000 482pio_size=393216 483ret_bad_addr=false 484ret_data16=65535 485ret_data32=4294967295 486ret_data64=18446744073709551615 487ret_data8=255 488system=system 489update_data=false 490warn_access= 491pio=system.iobus.master[8] 492 493[system.tsunami.fake_ata0] 494type=IsaFake 495clk_domain=system.clk_domain | 531fake_mem=false 532pio_addr=8796093677568 533pio_latency=100000 534pio_size=393216 535ret_bad_addr=false 536ret_data16=65535 537ret_data32=4294967295 538ret_data64=18446744073709551615 539ret_data8=255 540system=system 541update_data=false 542warn_access= 543pio=system.iobus.master[8] 544 545[system.tsunami.fake_ata0] 546type=IsaFake 547clk_domain=system.clk_domain |
| 548eventq_index=0 |
|
| 496fake_mem=false 497pio_addr=8804615848432 498pio_latency=100000 499pio_size=8 500ret_bad_addr=false 501ret_data16=65535 502ret_data32=4294967295 503ret_data64=18446744073709551615 504ret_data8=255 505system=system 506update_data=false 507warn_access= 508pio=system.iobus.master[19] 509 510[system.tsunami.fake_ata1] 511type=IsaFake 512clk_domain=system.clk_domain | 549fake_mem=false 550pio_addr=8804615848432 551pio_latency=100000 552pio_size=8 553ret_bad_addr=false 554ret_data16=65535 555ret_data32=4294967295 556ret_data64=18446744073709551615 557ret_data8=255 558system=system 559update_data=false 560warn_access= 561pio=system.iobus.master[19] 562 563[system.tsunami.fake_ata1] 564type=IsaFake 565clk_domain=system.clk_domain |
| 566eventq_index=0 |
|
| 513fake_mem=false 514pio_addr=8804615848304 515pio_latency=100000 516pio_size=8 517ret_bad_addr=false 518ret_data16=65535 519ret_data32=4294967295 520ret_data64=18446744073709551615 521ret_data8=255 522system=system 523update_data=false 524warn_access= 525pio=system.iobus.master[20] 526 527[system.tsunami.fake_pnp_addr] 528type=IsaFake 529clk_domain=system.clk_domain | 567fake_mem=false 568pio_addr=8804615848304 569pio_latency=100000 570pio_size=8 571ret_bad_addr=false 572ret_data16=65535 573ret_data32=4294967295 574ret_data64=18446744073709551615 575ret_data8=255 576system=system 577update_data=false 578warn_access= 579pio=system.iobus.master[20] 580 581[system.tsunami.fake_pnp_addr] 582type=IsaFake 583clk_domain=system.clk_domain |
| 584eventq_index=0 |
|
| 530fake_mem=false 531pio_addr=8804615848569 532pio_latency=100000 533pio_size=8 534ret_bad_addr=false 535ret_data16=65535 536ret_data32=4294967295 537ret_data64=18446744073709551615 538ret_data8=255 539system=system 540update_data=false 541warn_access= 542pio=system.iobus.master[9] 543 544[system.tsunami.fake_pnp_read0] 545type=IsaFake 546clk_domain=system.clk_domain | 585fake_mem=false 586pio_addr=8804615848569 587pio_latency=100000 588pio_size=8 589ret_bad_addr=false 590ret_data16=65535 591ret_data32=4294967295 592ret_data64=18446744073709551615 593ret_data8=255 594system=system 595update_data=false 596warn_access= 597pio=system.iobus.master[9] 598 599[system.tsunami.fake_pnp_read0] 600type=IsaFake 601clk_domain=system.clk_domain |
| 602eventq_index=0 |
|
| 547fake_mem=false 548pio_addr=8804615848451 549pio_latency=100000 550pio_size=8 551ret_bad_addr=false 552ret_data16=65535 553ret_data32=4294967295 554ret_data64=18446744073709551615 555ret_data8=255 556system=system 557update_data=false 558warn_access= 559pio=system.iobus.master[11] 560 561[system.tsunami.fake_pnp_read1] 562type=IsaFake 563clk_domain=system.clk_domain | 603fake_mem=false 604pio_addr=8804615848451 605pio_latency=100000 606pio_size=8 607ret_bad_addr=false 608ret_data16=65535 609ret_data32=4294967295 610ret_data64=18446744073709551615 611ret_data8=255 612system=system 613update_data=false 614warn_access= 615pio=system.iobus.master[11] 616 617[system.tsunami.fake_pnp_read1] 618type=IsaFake 619clk_domain=system.clk_domain |
| 620eventq_index=0 |
|
| 564fake_mem=false 565pio_addr=8804615848515 566pio_latency=100000 567pio_size=8 568ret_bad_addr=false 569ret_data16=65535 570ret_data32=4294967295 571ret_data64=18446744073709551615 572ret_data8=255 573system=system 574update_data=false 575warn_access= 576pio=system.iobus.master[12] 577 578[system.tsunami.fake_pnp_read2] 579type=IsaFake 580clk_domain=system.clk_domain | 621fake_mem=false 622pio_addr=8804615848515 623pio_latency=100000 624pio_size=8 625ret_bad_addr=false 626ret_data16=65535 627ret_data32=4294967295 628ret_data64=18446744073709551615 629ret_data8=255 630system=system 631update_data=false 632warn_access= 633pio=system.iobus.master[12] 634 635[system.tsunami.fake_pnp_read2] 636type=IsaFake 637clk_domain=system.clk_domain |
| 638eventq_index=0 |
|
| 581fake_mem=false 582pio_addr=8804615848579 583pio_latency=100000 584pio_size=8 585ret_bad_addr=false 586ret_data16=65535 587ret_data32=4294967295 588ret_data64=18446744073709551615 589ret_data8=255 590system=system 591update_data=false 592warn_access= 593pio=system.iobus.master[13] 594 595[system.tsunami.fake_pnp_read3] 596type=IsaFake 597clk_domain=system.clk_domain | 639fake_mem=false 640pio_addr=8804615848579 641pio_latency=100000 642pio_size=8 643ret_bad_addr=false 644ret_data16=65535 645ret_data32=4294967295 646ret_data64=18446744073709551615 647ret_data8=255 648system=system 649update_data=false 650warn_access= 651pio=system.iobus.master[13] 652 653[system.tsunami.fake_pnp_read3] 654type=IsaFake 655clk_domain=system.clk_domain |
| 656eventq_index=0 |
|
| 598fake_mem=false 599pio_addr=8804615848643 600pio_latency=100000 601pio_size=8 602ret_bad_addr=false 603ret_data16=65535 604ret_data32=4294967295 605ret_data64=18446744073709551615 606ret_data8=255 607system=system 608update_data=false 609warn_access= 610pio=system.iobus.master[14] 611 612[system.tsunami.fake_pnp_read4] 613type=IsaFake 614clk_domain=system.clk_domain | 657fake_mem=false 658pio_addr=8804615848643 659pio_latency=100000 660pio_size=8 661ret_bad_addr=false 662ret_data16=65535 663ret_data32=4294967295 664ret_data64=18446744073709551615 665ret_data8=255 666system=system 667update_data=false 668warn_access= 669pio=system.iobus.master[14] 670 671[system.tsunami.fake_pnp_read4] 672type=IsaFake 673clk_domain=system.clk_domain |
| 674eventq_index=0 |
|
| 615fake_mem=false 616pio_addr=8804615848707 617pio_latency=100000 618pio_size=8 619ret_bad_addr=false 620ret_data16=65535 621ret_data32=4294967295 622ret_data64=18446744073709551615 623ret_data8=255 624system=system 625update_data=false 626warn_access= 627pio=system.iobus.master[15] 628 629[system.tsunami.fake_pnp_read5] 630type=IsaFake 631clk_domain=system.clk_domain | 675fake_mem=false 676pio_addr=8804615848707 677pio_latency=100000 678pio_size=8 679ret_bad_addr=false 680ret_data16=65535 681ret_data32=4294967295 682ret_data64=18446744073709551615 683ret_data8=255 684system=system 685update_data=false 686warn_access= 687pio=system.iobus.master[15] 688 689[system.tsunami.fake_pnp_read5] 690type=IsaFake 691clk_domain=system.clk_domain |
| 692eventq_index=0 |
|
| 632fake_mem=false 633pio_addr=8804615848771 634pio_latency=100000 635pio_size=8 636ret_bad_addr=false 637ret_data16=65535 638ret_data32=4294967295 639ret_data64=18446744073709551615 640ret_data8=255 641system=system 642update_data=false 643warn_access= 644pio=system.iobus.master[16] 645 646[system.tsunami.fake_pnp_read6] 647type=IsaFake 648clk_domain=system.clk_domain | 693fake_mem=false 694pio_addr=8804615848771 695pio_latency=100000 696pio_size=8 697ret_bad_addr=false 698ret_data16=65535 699ret_data32=4294967295 700ret_data64=18446744073709551615 701ret_data8=255 702system=system 703update_data=false 704warn_access= 705pio=system.iobus.master[16] 706 707[system.tsunami.fake_pnp_read6] 708type=IsaFake 709clk_domain=system.clk_domain |
| 710eventq_index=0 |
|
| 649fake_mem=false 650pio_addr=8804615848835 651pio_latency=100000 652pio_size=8 653ret_bad_addr=false 654ret_data16=65535 655ret_data32=4294967295 656ret_data64=18446744073709551615 657ret_data8=255 658system=system 659update_data=false 660warn_access= 661pio=system.iobus.master[17] 662 663[system.tsunami.fake_pnp_read7] 664type=IsaFake 665clk_domain=system.clk_domain | 711fake_mem=false 712pio_addr=8804615848835 713pio_latency=100000 714pio_size=8 715ret_bad_addr=false 716ret_data16=65535 717ret_data32=4294967295 718ret_data64=18446744073709551615 719ret_data8=255 720system=system 721update_data=false 722warn_access= 723pio=system.iobus.master[17] 724 725[system.tsunami.fake_pnp_read7] 726type=IsaFake 727clk_domain=system.clk_domain |
| 728eventq_index=0 |
|
| 666fake_mem=false 667pio_addr=8804615848899 668pio_latency=100000 669pio_size=8 670ret_bad_addr=false 671ret_data16=65535 672ret_data32=4294967295 673ret_data64=18446744073709551615 674ret_data8=255 675system=system 676update_data=false 677warn_access= 678pio=system.iobus.master[18] 679 680[system.tsunami.fake_pnp_write] 681type=IsaFake 682clk_domain=system.clk_domain | 729fake_mem=false 730pio_addr=8804615848899 731pio_latency=100000 732pio_size=8 733ret_bad_addr=false 734ret_data16=65535 735ret_data32=4294967295 736ret_data64=18446744073709551615 737ret_data8=255 738system=system 739update_data=false 740warn_access= 741pio=system.iobus.master[18] 742 743[system.tsunami.fake_pnp_write] 744type=IsaFake 745clk_domain=system.clk_domain |
| 746eventq_index=0 |
|
| 683fake_mem=false 684pio_addr=8804615850617 685pio_latency=100000 686pio_size=8 687ret_bad_addr=false 688ret_data16=65535 689ret_data32=4294967295 690ret_data64=18446744073709551615 691ret_data8=255 692system=system 693update_data=false 694warn_access= 695pio=system.iobus.master[10] 696 697[system.tsunami.fake_ppc] 698type=IsaFake 699clk_domain=system.clk_domain | 747fake_mem=false 748pio_addr=8804615850617 749pio_latency=100000 750pio_size=8 751ret_bad_addr=false 752ret_data16=65535 753ret_data32=4294967295 754ret_data64=18446744073709551615 755ret_data8=255 756system=system 757update_data=false 758warn_access= 759pio=system.iobus.master[10] 760 761[system.tsunami.fake_ppc] 762type=IsaFake 763clk_domain=system.clk_domain |
| 764eventq_index=0 |
|
| 700fake_mem=false 701pio_addr=8804615848891 702pio_latency=100000 703pio_size=8 704ret_bad_addr=false 705ret_data16=65535 706ret_data32=4294967295 707ret_data64=18446744073709551615 708ret_data8=255 709system=system 710update_data=false 711warn_access= 712pio=system.iobus.master[7] 713 714[system.tsunami.fake_sm_chip] 715type=IsaFake 716clk_domain=system.clk_domain | 765fake_mem=false 766pio_addr=8804615848891 767pio_latency=100000 768pio_size=8 769ret_bad_addr=false 770ret_data16=65535 771ret_data32=4294967295 772ret_data64=18446744073709551615 773ret_data8=255 774system=system 775update_data=false 776warn_access= 777pio=system.iobus.master[7] 778 779[system.tsunami.fake_sm_chip] 780type=IsaFake 781clk_domain=system.clk_domain |
| 782eventq_index=0 |
|
| 717fake_mem=false 718pio_addr=8804615848816 719pio_latency=100000 720pio_size=8 721ret_bad_addr=false 722ret_data16=65535 723ret_data32=4294967295 724ret_data64=18446744073709551615 725ret_data8=255 726system=system 727update_data=false 728warn_access= 729pio=system.iobus.master[2] 730 731[system.tsunami.fake_uart1] 732type=IsaFake 733clk_domain=system.clk_domain | 783fake_mem=false 784pio_addr=8804615848816 785pio_latency=100000 786pio_size=8 787ret_bad_addr=false 788ret_data16=65535 789ret_data32=4294967295 790ret_data64=18446744073709551615 791ret_data8=255 792system=system 793update_data=false 794warn_access= 795pio=system.iobus.master[2] 796 797[system.tsunami.fake_uart1] 798type=IsaFake 799clk_domain=system.clk_domain |
| 800eventq_index=0 |
|
| 734fake_mem=false 735pio_addr=8804615848696 736pio_latency=100000 737pio_size=8 738ret_bad_addr=false 739ret_data16=65535 740ret_data32=4294967295 741ret_data64=18446744073709551615 742ret_data8=255 743system=system 744update_data=false 745warn_access= 746pio=system.iobus.master[3] 747 748[system.tsunami.fake_uart2] 749type=IsaFake 750clk_domain=system.clk_domain | 801fake_mem=false 802pio_addr=8804615848696 803pio_latency=100000 804pio_size=8 805ret_bad_addr=false 806ret_data16=65535 807ret_data32=4294967295 808ret_data64=18446744073709551615 809ret_data8=255 810system=system 811update_data=false 812warn_access= 813pio=system.iobus.master[3] 814 815[system.tsunami.fake_uart2] 816type=IsaFake 817clk_domain=system.clk_domain |
| 818eventq_index=0 |
|
| 751fake_mem=false 752pio_addr=8804615848936 753pio_latency=100000 754pio_size=8 755ret_bad_addr=false 756ret_data16=65535 757ret_data32=4294967295 758ret_data64=18446744073709551615 759ret_data8=255 760system=system 761update_data=false 762warn_access= 763pio=system.iobus.master[4] 764 765[system.tsunami.fake_uart3] 766type=IsaFake 767clk_domain=system.clk_domain | 819fake_mem=false 820pio_addr=8804615848936 821pio_latency=100000 822pio_size=8 823ret_bad_addr=false 824ret_data16=65535 825ret_data32=4294967295 826ret_data64=18446744073709551615 827ret_data8=255 828system=system 829update_data=false 830warn_access= 831pio=system.iobus.master[4] 832 833[system.tsunami.fake_uart3] 834type=IsaFake 835clk_domain=system.clk_domain |
| 836eventq_index=0 |
|
| 768fake_mem=false 769pio_addr=8804615848680 770pio_latency=100000 771pio_size=8 772ret_bad_addr=false 773ret_data16=65535 774ret_data32=4294967295 775ret_data64=18446744073709551615 776ret_data8=255 777system=system 778update_data=false 779warn_access= 780pio=system.iobus.master[5] 781 782[system.tsunami.fake_uart4] 783type=IsaFake 784clk_domain=system.clk_domain | 837fake_mem=false 838pio_addr=8804615848680 839pio_latency=100000 840pio_size=8 841ret_bad_addr=false 842ret_data16=65535 843ret_data32=4294967295 844ret_data64=18446744073709551615 845ret_data8=255 846system=system 847update_data=false 848warn_access= 849pio=system.iobus.master[5] 850 851[system.tsunami.fake_uart4] 852type=IsaFake 853clk_domain=system.clk_domain |
| 854eventq_index=0 |
|
| 785fake_mem=false 786pio_addr=8804615848944 787pio_latency=100000 788pio_size=8 789ret_bad_addr=false 790ret_data16=65535 791ret_data32=4294967295 792ret_data64=18446744073709551615 793ret_data8=255 794system=system 795update_data=false 796warn_access= 797pio=system.iobus.master[6] 798 799[system.tsunami.fb] 800type=BadDevice 801clk_domain=system.clk_domain 802devicename=FrameBuffer | 855fake_mem=false 856pio_addr=8804615848944 857pio_latency=100000 858pio_size=8 859ret_bad_addr=false 860ret_data16=65535 861ret_data32=4294967295 862ret_data64=18446744073709551615 863ret_data8=255 864system=system 865update_data=false 866warn_access= 867pio=system.iobus.master[6] 868 869[system.tsunami.fb] 870type=BadDevice 871clk_domain=system.clk_domain 872devicename=FrameBuffer |
| 873eventq_index=0 |
|
| 803pio_addr=8804615848912 804pio_latency=100000 805system=system 806pio=system.iobus.master[21] 807 808[system.tsunami.ide] 809type=IdeController 810BAR0=1 --- 11 unchanged lines hidden (view full) --- 822BAR4=1 823BAR4LegacyIO=false 824BAR4Size=16 825BAR5=1 826BAR5LegacyIO=false 827BAR5Size=0 828BIST=0 829CacheLineSize=0 | 874pio_addr=8804615848912 875pio_latency=100000 876system=system 877pio=system.iobus.master[21] 878 879[system.tsunami.ide] 880type=IdeController 881BAR0=1 --- 11 unchanged lines hidden (view full) --- 893BAR4=1 894BAR4LegacyIO=false 895BAR4Size=16 896BAR5=1 897BAR5LegacyIO=false 898BAR5Size=0 899BIST=0 900CacheLineSize=0 |
| 901CapabilityPtr=0 |
|
| 830CardbusCIS=0 831ClassCode=1 832Command=0 833DeviceID=28945 834ExpansionROM=0 835HeaderType=0 836InterruptLine=31 837InterruptPin=1 838LatencyTimer=0 | 902CardbusCIS=0 903ClassCode=1 904Command=0 905DeviceID=28945 906ExpansionROM=0 907HeaderType=0 908InterruptLine=31 909InterruptPin=1 910LatencyTimer=0 |
| 911MSICAPBaseOffset=0 912MSICAPCapId=0 913MSICAPMaskBits=0 914MSICAPMsgAddr=0 915MSICAPMsgCtrl=0 916MSICAPMsgData=0 917MSICAPMsgUpperAddr=0 918MSICAPNextCapability=0 919MSICAPPendingBits=0 920MSIXCAPBaseOffset=0 921MSIXCAPCapId=0 922MSIXCAPNextCapability=0 923MSIXMsgCtrl=0 924MSIXPbaOffset=0 925MSIXTableOffset=0 |
|
| 839MaximumLatency=0 840MinimumGrant=0 | 926MaximumLatency=0 927MinimumGrant=0 |
| 928PMCAPBaseOffset=0 929PMCAPCapId=0 930PMCAPCapabilities=0 931PMCAPCtrlStatus=0 932PMCAPNextCapability=0 933PXCAPBaseOffset=0 934PXCAPCapId=0 935PXCAPCapabilities=0 936PXCAPDevCap2=0 937PXCAPDevCapabilities=0 938PXCAPDevCtrl=0 939PXCAPDevCtrl2=0 940PXCAPDevStatus=0 941PXCAPLinkCap=0 942PXCAPLinkCtrl=0 943PXCAPLinkStatus=0 944PXCAPNextCapability=0 |
|
| 841ProgIF=133 842Revision=0 843Status=640 844SubClassCode=1 845SubsystemID=0 846SubsystemVendorID=0 847VendorID=32902 848clk_domain=system.clk_domain 849config_latency=20000 850ctrl_offset=0 851disks=system.disk0 system.disk2 | 945ProgIF=133 946Revision=0 947Status=640 948SubClassCode=1 949SubsystemID=0 950SubsystemVendorID=0 951VendorID=32902 952clk_domain=system.clk_domain 953config_latency=20000 954ctrl_offset=0 955disks=system.disk0 system.disk2 |
| 956eventq_index=0 |
|
| 852io_shift=0 853pci_bus=0 854pci_dev=0 855pci_func=0 856pio_latency=30000 857platform=system.tsunami 858system=system 859config=system.iobus.master[26] 860dma=system.iobus.slave[1] 861pio=system.iobus.master[25] 862 863[system.tsunami.io] 864type=TsunamiIO 865clk_domain=system.clk_domain | 957io_shift=0 958pci_bus=0 959pci_dev=0 960pci_func=0 961pio_latency=30000 962platform=system.tsunami 963system=system 964config=system.iobus.master[26] 965dma=system.iobus.slave[1] 966pio=system.iobus.master[25] 967 968[system.tsunami.io] 969type=TsunamiIO 970clk_domain=system.clk_domain |
| 971eventq_index=0 |
|
| 866frequency=976562500 867pio_addr=8804615847936 868pio_latency=100000 869system=system 870time=Thu Jan 1 00:00:00 2009 871tsunami=system.tsunami 872year_is_bcd=false 873pio=system.iobus.master[22] 874 875[system.tsunami.pchip] 876type=TsunamiPChip 877clk_domain=system.clk_domain | 972frequency=976562500 973pio_addr=8804615847936 974pio_latency=100000 975system=system 976time=Thu Jan 1 00:00:00 2009 977tsunami=system.tsunami 978year_is_bcd=false 979pio=system.iobus.master[22] 980 981[system.tsunami.pchip] 982type=TsunamiPChip 983clk_domain=system.clk_domain |
| 984eventq_index=0 |
|
| 878pio_addr=8802535473152 879pio_latency=100000 880system=system 881tsunami=system.tsunami 882pio=system.iobus.master[1] 883 884[system.tsunami.pciconfig] 885type=PciConfigAll 886bus=0 887clk_domain=system.clk_domain | 985pio_addr=8802535473152 986pio_latency=100000 987system=system 988tsunami=system.tsunami 989pio=system.iobus.master[1] 990 991[system.tsunami.pciconfig] 992type=PciConfigAll 993bus=0 994clk_domain=system.clk_domain |
| 995eventq_index=0 |
|
| 888pio_addr=0 889pio_latency=30000 890platform=system.tsunami 891size=16777216 892system=system 893pio=system.iobus.default 894 895[system.tsunami.uart] 896type=Uart8250 897clk_domain=system.clk_domain | 996pio_addr=0 997pio_latency=30000 998platform=system.tsunami 999size=16777216 1000system=system 1001pio=system.iobus.default 1002 1003[system.tsunami.uart] 1004type=Uart8250 1005clk_domain=system.clk_domain |
| 1006eventq_index=0 |
|
| 898pio_addr=8804615848952 899pio_latency=100000 900platform=system.tsunami 901system=system 902terminal=system.terminal 903pio=system.iobus.master[23] 904 905[system.voltage_domain] 906type=VoltageDomain | 1007pio_addr=8804615848952 1008pio_latency=100000 1009platform=system.tsunami 1010system=system 1011terminal=system.terminal 1012pio=system.iobus.master[23] 1013 1014[system.voltage_domain] 1015type=VoltageDomain |
| 1016eventq_index=0 |
|
| 907voltage=1.000000 908 | 1017voltage=1.000000 1018 |