| config.ini (8835:7c68f84d7c4e) | config.ini (8983:8800b05e1cb3) |
|---|---|
| 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 5 unchanged lines hidden (view full) --- 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=atomic 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal | 1[root] 2type=Root 3children=system 4full_system=true 5time_sync_enable=false 6time_sync_period=100000000000 7time_sync_spin_threshold=100000000 8 --- 5 unchanged lines hidden (view full) --- 14console=/dist/m5/system/binaries/console 15init_param=0 16kernel=/dist/m5/system/binaries/vmlinux 17load_addr_mask=1099511627775 18mem_mode=atomic 19memories=system.physmem 20num_work_ids=16 21pal=/dist/m5/system/binaries/ts_osfpal |
| 22physmem=system.physmem | |
| 23readfile=tests/halt.sh 24symbolfile= 25system_rev=1024 26system_type=34 27work_begin_ckpt_count=0 28work_begin_cpu_id_exit=-1 29work_begin_exit_count=0 30work_cpus_ckpt_count=0 31work_end_ckpt_count=0 32work_end_exit_count=0 33work_item_id=-1 | 22readfile=tests/halt.sh 23symbolfile= 24system_rev=1024 25system_type=34 26work_begin_ckpt_count=0 27work_begin_cpu_id_exit=-1 28work_begin_exit_count=0 29work_cpus_ckpt_count=0 30work_end_ckpt_count=0 31work_end_exit_count=0 32work_item_id=-1 |
| 34system_port=system.membus.port[2] | 33system_port=system.membus.slave[0] |
| 35 36[system.bridge] 37type=Bridge 38delay=50000 39nack_delay=4000 40ranges=8796093022208:18446744073709551615 41req_size=16 42resp_size=16 43write_ack=false | 34 35[system.bridge] 36type=Bridge 37delay=50000 38nack_delay=4000 39ranges=8796093022208:18446744073709551615 40req_size=16 41resp_size=16 42write_ack=false |
| 44master=system.iobus.port[0] 45slave=system.membus.port[0] | 43master=system.iobus.slave[0] 44slave=system.membus.master[0] |
| 46 47[system.cpu] 48type=AtomicSimpleCPU 49children=dcache dtb icache interrupts itb tracer 50checker=Null 51clock=500 52cpu_id=0 53defer_registration=false 54do_checkpoint_insts=true 55do_quiesce=true 56do_statistics_insts=true 57dtb=system.cpu.dtb | 45 46[system.cpu] 47type=AtomicSimpleCPU 48children=dcache dtb icache interrupts itb tracer 49checker=Null 50clock=500 51cpu_id=0 52defer_registration=false 53do_checkpoint_insts=true 54do_quiesce=true 55do_statistics_insts=true 56dtb=system.cpu.dtb |
| 57fastmem=false |
|
| 58function_trace=false 59function_trace_start=0 60interrupts=system.cpu.interrupts 61itb=system.cpu.itb 62max_insts_all_threads=0 63max_insts_any_thread=0 64max_loads_all_threads=0 65max_loads_any_thread=0 --- 7 unchanged lines hidden (view full) --- 73tracer=system.cpu.tracer 74width=1 75workload= 76dcache_port=system.cpu.dcache.cpu_side 77icache_port=system.cpu.icache.cpu_side 78 79[system.cpu.dcache] 80type=BaseCache | 58function_trace=false 59function_trace_start=0 60interrupts=system.cpu.interrupts 61itb=system.cpu.itb 62max_insts_all_threads=0 63max_insts_any_thread=0 64max_loads_all_threads=0 65max_loads_any_thread=0 --- 7 unchanged lines hidden (view full) --- 73tracer=system.cpu.tracer 74width=1 75workload= 76dcache_port=system.cpu.dcache.cpu_side 77icache_port=system.cpu.icache.cpu_side 78 79[system.cpu.dcache] 80type=BaseCache |
| 81addr_range=0:18446744073709551615 | 81addr_ranges=0:18446744073709551615 |
| 82assoc=4 83block_size=64 84forward_snoops=true 85hash_delay=1 86is_top_level=true 87latency=1000 88max_miss_count=0 89mshrs=4 --- 4 unchanged lines hidden (view full) --- 94size=32768 95subblock_size=0 96system=system 97tgts_per_mshr=8 98trace_addr=0 99two_queue=false 100write_buffers=8 101cpu_side=system.cpu.dcache_port | 82assoc=4 83block_size=64 84forward_snoops=true 85hash_delay=1 86is_top_level=true 87latency=1000 88max_miss_count=0 89mshrs=4 --- 4 unchanged lines hidden (view full) --- 94size=32768 95subblock_size=0 96system=system 97tgts_per_mshr=8 98trace_addr=0 99two_queue=false 100write_buffers=8 101cpu_side=system.cpu.dcache_port |
| 102mem_side=system.toL2Bus.port[2] | 102mem_side=system.toL2Bus.slave[1] |
| 103 104[system.cpu.dtb] 105type=AlphaTLB 106size=64 107 108[system.cpu.icache] 109type=BaseCache | 103 104[system.cpu.dtb] 105type=AlphaTLB 106size=64 107 108[system.cpu.icache] 109type=BaseCache |
| 110addr_range=0:18446744073709551615 | 110addr_ranges=0:18446744073709551615 |
| 111assoc=1 112block_size=64 113forward_snoops=true 114hash_delay=1 115is_top_level=true 116latency=1000 117max_miss_count=0 118mshrs=4 --- 4 unchanged lines hidden (view full) --- 123size=32768 124subblock_size=0 125system=system 126tgts_per_mshr=8 127trace_addr=0 128two_queue=false 129write_buffers=8 130cpu_side=system.cpu.icache_port | 111assoc=1 112block_size=64 113forward_snoops=true 114hash_delay=1 115is_top_level=true 116latency=1000 117max_miss_count=0 118mshrs=4 --- 4 unchanged lines hidden (view full) --- 123size=32768 124subblock_size=0 125system=system 126tgts_per_mshr=8 127trace_addr=0 128two_queue=false 129write_buffers=8 130cpu_side=system.cpu.icache_port |
| 131mem_side=system.toL2Bus.port[1] | 131mem_side=system.toL2Bus.slave[0] |
| 132 133[system.cpu.interrupts] 134type=AlphaInterrupts 135 136[system.cpu.itb] 137type=AlphaTLB 138size=48 139 --- 48 unchanged lines hidden (view full) --- 188type=Bus 189block_size=64 190bus_id=0 191clock=1000 192header_cycles=1 193use_default_range=true 194width=64 195default=system.tsunami.pciconfig.pio | 132 133[system.cpu.interrupts] 134type=AlphaInterrupts 135 136[system.cpu.itb] 137type=AlphaTLB 138size=48 139 --- 48 unchanged lines hidden (view full) --- 188type=Bus 189block_size=64 190bus_id=0 191clock=1000 192header_cycles=1 193use_default_range=true 194width=64 195default=system.tsunami.pciconfig.pio |
| 196port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side | 196master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 197slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma |
| 197 198[system.iocache] 199type=BaseCache | 198 199[system.iocache] 200type=BaseCache |
| 200addr_range=0:8589934591 | 201addr_ranges=0:8589934591 |
| 201assoc=8 202block_size=64 203forward_snoops=false 204hash_delay=1 205is_top_level=true 206latency=50000 207max_miss_count=0 208mshrs=20 209prefetch_on_access=false 210prefetcher=Null 211prioritizeRequests=false 212repl=Null 213size=1024 214subblock_size=0 215system=system 216tgts_per_mshr=12 217trace_addr=0 218two_queue=false 219write_buffers=8 | 202assoc=8 203block_size=64 204forward_snoops=false 205hash_delay=1 206is_top_level=true 207latency=50000 208max_miss_count=0 209mshrs=20 210prefetch_on_access=false 211prefetcher=Null 212prioritizeRequests=false 213repl=Null 214size=1024 215subblock_size=0 216system=system 217tgts_per_mshr=12 218trace_addr=0 219two_queue=false 220write_buffers=8 |
| 220cpu_side=system.iobus.port[32] 221mem_side=system.membus.port[3] | 221cpu_side=system.iobus.master[29] 222mem_side=system.membus.slave[1] |
| 222 223[system.l2c] 224type=BaseCache | 223 224[system.l2c] 225type=BaseCache |
| 225addr_range=0:18446744073709551615 | 226addr_ranges=0:18446744073709551615 |
| 226assoc=8 227block_size=64 228forward_snoops=true 229hash_delay=1 230is_top_level=false 231latency=10000 232max_miss_count=0 233mshrs=92 234prefetch_on_access=false 235prefetcher=Null 236prioritizeRequests=false 237repl=Null 238size=4194304 239subblock_size=0 240system=system 241tgts_per_mshr=16 242trace_addr=0 243two_queue=false 244write_buffers=8 | 227assoc=8 228block_size=64 229forward_snoops=true 230hash_delay=1 231is_top_level=false 232latency=10000 233max_miss_count=0 234mshrs=92 235prefetch_on_access=false 236prefetcher=Null 237prioritizeRequests=false 238repl=Null 239size=4194304 240subblock_size=0 241system=system 242tgts_per_mshr=16 243trace_addr=0 244two_queue=false 245write_buffers=8 |
| 245cpu_side=system.toL2Bus.port[0] 246mem_side=system.membus.port[4] | 246cpu_side=system.toL2Bus.master[0] 247mem_side=system.membus.slave[2] |
| 247 248[system.membus] 249type=Bus 250children=badaddr_responder 251block_size=64 252bus_id=1 253clock=1000 254header_cycles=1 255use_default_range=false 256width=64 257default=system.membus.badaddr_responder.pio | 248 249[system.membus] 250type=Bus 251children=badaddr_responder 252block_size=64 253bus_id=1 254clock=1000 255header_cycles=1 256use_default_range=false 257width=64 258default=system.membus.badaddr_responder.pio |
| 258port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side | 259master=system.bridge.slave system.physmem.port[0] 260slave=system.system_port system.iocache.mem_side system.l2c.mem_side |
| 259 260[system.membus.badaddr_responder] 261type=IsaFake 262fake_mem=false 263pio_addr=0 264pio_latency=1000 265pio_size=8 266ret_bad_addr=true 267ret_data16=65535 268ret_data32=4294967295 269ret_data64=18446744073709551615 270ret_data8=255 271system=system 272update_data=false 273warn_access= 274pio=system.membus.default 275 276[system.physmem] | 261 262[system.membus.badaddr_responder] 263type=IsaFake 264fake_mem=false 265pio_addr=0 266pio_latency=1000 267pio_size=8 268ret_bad_addr=true 269ret_data16=65535 270ret_data32=4294967295 271ret_data64=18446744073709551615 272ret_data8=255 273system=system 274update_data=false 275warn_access= 276pio=system.membus.default 277 278[system.physmem] |
| 277type=PhysicalMemory | 279type=SimpleMemory 280conf_table_reported=false |
| 278file= | 281file= |
| 282in_addr_map=true |
|
| 279latency=30000 280latency_var=0 281null=false 282range=0:134217727 283zero=false | 283latency=30000 284latency_var=0 285null=false 286range=0:134217727 287zero=false |
| 284port=system.membus.port[1] | 288port=system.membus.master[1] |
| 285 286[system.simple_disk] 287type=SimpleDisk 288children=disk 289disk=system.simple_disk.disk 290system=system 291 292[system.simple_disk.disk] --- 11 unchanged lines hidden (view full) --- 304[system.toL2Bus] 305type=Bus 306block_size=64 307bus_id=0 308clock=1000 309header_cycles=1 310use_default_range=false 311width=64 | 289 290[system.simple_disk] 291type=SimpleDisk 292children=disk 293disk=system.simple_disk.disk 294system=system 295 296[system.simple_disk.disk] --- 11 unchanged lines hidden (view full) --- 308[system.toL2Bus] 309type=Bus 310block_size=64 311bus_id=0 312clock=1000 313header_cycles=1 314use_default_range=false 315width=64 |
| 312port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side | 316master=system.l2c.cpu_side 317slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side |
| 313 314[system.tsunami] 315type=Tsunami 316children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 317intrctrl=system.intrctrl 318system=system 319 320[system.tsunami.backdoor] 321type=AlphaBackdoor 322cpu=system.cpu 323disk=system.simple_disk 324pio_addr=8804682956800 325pio_latency=1000 326platform=system.tsunami 327system=system 328terminal=system.terminal | 318 319[system.tsunami] 320type=Tsunami 321children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart 322intrctrl=system.intrctrl 323system=system 324 325[system.tsunami.backdoor] 326type=AlphaBackdoor 327cpu=system.cpu 328disk=system.simple_disk 329pio_addr=8804682956800 330pio_latency=1000 331platform=system.tsunami 332system=system 333terminal=system.terminal |
| 329pio=system.iobus.port[25] | 334pio=system.iobus.master[24] |
| 330 331[system.tsunami.cchip] 332type=TsunamiCChip 333pio_addr=8803072344064 334pio_latency=1000 335system=system 336tsunami=system.tsunami | 335 336[system.tsunami.cchip] 337type=TsunamiCChip 338pio_addr=8803072344064 339pio_latency=1000 340system=system 341tsunami=system.tsunami |
| 337pio=system.iobus.port[1] | 342pio=system.iobus.master[0] |
| 338 339[system.tsunami.ethernet] 340type=NSGigE 341BAR0=1 342BAR0LegacyIO=false 343BAR0Size=256 344BAR1=0 345BAR1LegacyIO=false --- 52 unchanged lines hidden (view full) --- 398rx_delay=1000000 399rx_fifo_size=524288 400rx_filter=true 401rx_thread=false 402system=system 403tx_delay=1000000 404tx_fifo_size=524288 405tx_thread=false | 343 344[system.tsunami.ethernet] 345type=NSGigE 346BAR0=1 347BAR0LegacyIO=false 348BAR0Size=256 349BAR1=0 350BAR1LegacyIO=false --- 52 unchanged lines hidden (view full) --- 403rx_delay=1000000 404rx_fifo_size=524288 405rx_filter=true 406rx_thread=false 407system=system 408tx_delay=1000000 409tx_fifo_size=524288 410tx_thread=false |
| 406config=system.iobus.port[30] 407dma=system.iobus.port[31] 408pio=system.iobus.port[29] | 411config=system.iobus.master[28] 412dma=system.iobus.slave[2] 413pio=system.iobus.master[27] |
| 409 410[system.tsunami.fake_OROM] 411type=IsaFake 412fake_mem=false 413pio_addr=8796093677568 414pio_latency=1000 415pio_size=393216 416ret_bad_addr=false 417ret_data16=65535 418ret_data32=4294967295 419ret_data64=18446744073709551615 420ret_data8=255 421system=system 422update_data=false 423warn_access= | 414 415[system.tsunami.fake_OROM] 416type=IsaFake 417fake_mem=false 418pio_addr=8796093677568 419pio_latency=1000 420pio_size=393216 421ret_bad_addr=false 422ret_data16=65535 423ret_data32=4294967295 424ret_data64=18446744073709551615 425ret_data8=255 426system=system 427update_data=false 428warn_access= |
| 424pio=system.iobus.port[9] | 429pio=system.iobus.master[8] |
| 425 426[system.tsunami.fake_ata0] 427type=IsaFake 428fake_mem=false 429pio_addr=8804615848432 430pio_latency=1000 431pio_size=8 432ret_bad_addr=false 433ret_data16=65535 434ret_data32=4294967295 435ret_data64=18446744073709551615 436ret_data8=255 437system=system 438update_data=false 439warn_access= | 430 431[system.tsunami.fake_ata0] 432type=IsaFake 433fake_mem=false 434pio_addr=8804615848432 435pio_latency=1000 436pio_size=8 437ret_bad_addr=false 438ret_data16=65535 439ret_data32=4294967295 440ret_data64=18446744073709551615 441ret_data8=255 442system=system 443update_data=false 444warn_access= |
| 440pio=system.iobus.port[20] | 445pio=system.iobus.master[19] |
| 441 442[system.tsunami.fake_ata1] 443type=IsaFake 444fake_mem=false 445pio_addr=8804615848304 446pio_latency=1000 447pio_size=8 448ret_bad_addr=false 449ret_data16=65535 450ret_data32=4294967295 451ret_data64=18446744073709551615 452ret_data8=255 453system=system 454update_data=false 455warn_access= | 446 447[system.tsunami.fake_ata1] 448type=IsaFake 449fake_mem=false 450pio_addr=8804615848304 451pio_latency=1000 452pio_size=8 453ret_bad_addr=false 454ret_data16=65535 455ret_data32=4294967295 456ret_data64=18446744073709551615 457ret_data8=255 458system=system 459update_data=false 460warn_access= |
| 456pio=system.iobus.port[21] | 461pio=system.iobus.master[20] |
| 457 458[system.tsunami.fake_pnp_addr] 459type=IsaFake 460fake_mem=false 461pio_addr=8804615848569 462pio_latency=1000 463pio_size=8 464ret_bad_addr=false 465ret_data16=65535 466ret_data32=4294967295 467ret_data64=18446744073709551615 468ret_data8=255 469system=system 470update_data=false 471warn_access= | 462 463[system.tsunami.fake_pnp_addr] 464type=IsaFake 465fake_mem=false 466pio_addr=8804615848569 467pio_latency=1000 468pio_size=8 469ret_bad_addr=false 470ret_data16=65535 471ret_data32=4294967295 472ret_data64=18446744073709551615 473ret_data8=255 474system=system 475update_data=false 476warn_access= |
| 472pio=system.iobus.port[10] | 477pio=system.iobus.master[9] |
| 473 474[system.tsunami.fake_pnp_read0] 475type=IsaFake 476fake_mem=false 477pio_addr=8804615848451 478pio_latency=1000 479pio_size=8 480ret_bad_addr=false 481ret_data16=65535 482ret_data32=4294967295 483ret_data64=18446744073709551615 484ret_data8=255 485system=system 486update_data=false 487warn_access= | 478 479[system.tsunami.fake_pnp_read0] 480type=IsaFake 481fake_mem=false 482pio_addr=8804615848451 483pio_latency=1000 484pio_size=8 485ret_bad_addr=false 486ret_data16=65535 487ret_data32=4294967295 488ret_data64=18446744073709551615 489ret_data8=255 490system=system 491update_data=false 492warn_access= |
| 488pio=system.iobus.port[12] | 493pio=system.iobus.master[11] |
| 489 490[system.tsunami.fake_pnp_read1] 491type=IsaFake 492fake_mem=false 493pio_addr=8804615848515 494pio_latency=1000 495pio_size=8 496ret_bad_addr=false 497ret_data16=65535 498ret_data32=4294967295 499ret_data64=18446744073709551615 500ret_data8=255 501system=system 502update_data=false 503warn_access= | 494 495[system.tsunami.fake_pnp_read1] 496type=IsaFake 497fake_mem=false 498pio_addr=8804615848515 499pio_latency=1000 500pio_size=8 501ret_bad_addr=false 502ret_data16=65535 503ret_data32=4294967295 504ret_data64=18446744073709551615 505ret_data8=255 506system=system 507update_data=false 508warn_access= |
| 504pio=system.iobus.port[13] | 509pio=system.iobus.master[12] |
| 505 506[system.tsunami.fake_pnp_read2] 507type=IsaFake 508fake_mem=false 509pio_addr=8804615848579 510pio_latency=1000 511pio_size=8 512ret_bad_addr=false 513ret_data16=65535 514ret_data32=4294967295 515ret_data64=18446744073709551615 516ret_data8=255 517system=system 518update_data=false 519warn_access= | 510 511[system.tsunami.fake_pnp_read2] 512type=IsaFake 513fake_mem=false 514pio_addr=8804615848579 515pio_latency=1000 516pio_size=8 517ret_bad_addr=false 518ret_data16=65535 519ret_data32=4294967295 520ret_data64=18446744073709551615 521ret_data8=255 522system=system 523update_data=false 524warn_access= |
| 520pio=system.iobus.port[14] | 525pio=system.iobus.master[13] |
| 521 522[system.tsunami.fake_pnp_read3] 523type=IsaFake 524fake_mem=false 525pio_addr=8804615848643 526pio_latency=1000 527pio_size=8 528ret_bad_addr=false 529ret_data16=65535 530ret_data32=4294967295 531ret_data64=18446744073709551615 532ret_data8=255 533system=system 534update_data=false 535warn_access= | 526 527[system.tsunami.fake_pnp_read3] 528type=IsaFake 529fake_mem=false 530pio_addr=8804615848643 531pio_latency=1000 532pio_size=8 533ret_bad_addr=false 534ret_data16=65535 535ret_data32=4294967295 536ret_data64=18446744073709551615 537ret_data8=255 538system=system 539update_data=false 540warn_access= |
| 536pio=system.iobus.port[15] | 541pio=system.iobus.master[14] |
| 537 538[system.tsunami.fake_pnp_read4] 539type=IsaFake 540fake_mem=false 541pio_addr=8804615848707 542pio_latency=1000 543pio_size=8 544ret_bad_addr=false 545ret_data16=65535 546ret_data32=4294967295 547ret_data64=18446744073709551615 548ret_data8=255 549system=system 550update_data=false 551warn_access= | 542 543[system.tsunami.fake_pnp_read4] 544type=IsaFake 545fake_mem=false 546pio_addr=8804615848707 547pio_latency=1000 548pio_size=8 549ret_bad_addr=false 550ret_data16=65535 551ret_data32=4294967295 552ret_data64=18446744073709551615 553ret_data8=255 554system=system 555update_data=false 556warn_access= |
| 552pio=system.iobus.port[16] | 557pio=system.iobus.master[15] |
| 553 554[system.tsunami.fake_pnp_read5] 555type=IsaFake 556fake_mem=false 557pio_addr=8804615848771 558pio_latency=1000 559pio_size=8 560ret_bad_addr=false 561ret_data16=65535 562ret_data32=4294967295 563ret_data64=18446744073709551615 564ret_data8=255 565system=system 566update_data=false 567warn_access= | 558 559[system.tsunami.fake_pnp_read5] 560type=IsaFake 561fake_mem=false 562pio_addr=8804615848771 563pio_latency=1000 564pio_size=8 565ret_bad_addr=false 566ret_data16=65535 567ret_data32=4294967295 568ret_data64=18446744073709551615 569ret_data8=255 570system=system 571update_data=false 572warn_access= |
| 568pio=system.iobus.port[17] | 573pio=system.iobus.master[16] |
| 569 570[system.tsunami.fake_pnp_read6] 571type=IsaFake 572fake_mem=false 573pio_addr=8804615848835 574pio_latency=1000 575pio_size=8 576ret_bad_addr=false 577ret_data16=65535 578ret_data32=4294967295 579ret_data64=18446744073709551615 580ret_data8=255 581system=system 582update_data=false 583warn_access= | 574 575[system.tsunami.fake_pnp_read6] 576type=IsaFake 577fake_mem=false 578pio_addr=8804615848835 579pio_latency=1000 580pio_size=8 581ret_bad_addr=false 582ret_data16=65535 583ret_data32=4294967295 584ret_data64=18446744073709551615 585ret_data8=255 586system=system 587update_data=false 588warn_access= |
| 584pio=system.iobus.port[18] | 589pio=system.iobus.master[17] |
| 585 586[system.tsunami.fake_pnp_read7] 587type=IsaFake 588fake_mem=false 589pio_addr=8804615848899 590pio_latency=1000 591pio_size=8 592ret_bad_addr=false 593ret_data16=65535 594ret_data32=4294967295 595ret_data64=18446744073709551615 596ret_data8=255 597system=system 598update_data=false 599warn_access= | 590 591[system.tsunami.fake_pnp_read7] 592type=IsaFake 593fake_mem=false 594pio_addr=8804615848899 595pio_latency=1000 596pio_size=8 597ret_bad_addr=false 598ret_data16=65535 599ret_data32=4294967295 600ret_data64=18446744073709551615 601ret_data8=255 602system=system 603update_data=false 604warn_access= |
| 600pio=system.iobus.port[19] | 605pio=system.iobus.master[18] |
| 601 602[system.tsunami.fake_pnp_write] 603type=IsaFake 604fake_mem=false 605pio_addr=8804615850617 606pio_latency=1000 607pio_size=8 608ret_bad_addr=false 609ret_data16=65535 610ret_data32=4294967295 611ret_data64=18446744073709551615 612ret_data8=255 613system=system 614update_data=false 615warn_access= | 606 607[system.tsunami.fake_pnp_write] 608type=IsaFake 609fake_mem=false 610pio_addr=8804615850617 611pio_latency=1000 612pio_size=8 613ret_bad_addr=false 614ret_data16=65535 615ret_data32=4294967295 616ret_data64=18446744073709551615 617ret_data8=255 618system=system 619update_data=false 620warn_access= |
| 616pio=system.iobus.port[11] | 621pio=system.iobus.master[10] |
| 617 618[system.tsunami.fake_ppc] 619type=IsaFake 620fake_mem=false 621pio_addr=8804615848891 622pio_latency=1000 623pio_size=8 624ret_bad_addr=false 625ret_data16=65535 626ret_data32=4294967295 627ret_data64=18446744073709551615 628ret_data8=255 629system=system 630update_data=false 631warn_access= | 622 623[system.tsunami.fake_ppc] 624type=IsaFake 625fake_mem=false 626pio_addr=8804615848891 627pio_latency=1000 628pio_size=8 629ret_bad_addr=false 630ret_data16=65535 631ret_data32=4294967295 632ret_data64=18446744073709551615 633ret_data8=255 634system=system 635update_data=false 636warn_access= |
| 632pio=system.iobus.port[8] | 637pio=system.iobus.master[7] |
| 633 634[system.tsunami.fake_sm_chip] 635type=IsaFake 636fake_mem=false 637pio_addr=8804615848816 638pio_latency=1000 639pio_size=8 640ret_bad_addr=false 641ret_data16=65535 642ret_data32=4294967295 643ret_data64=18446744073709551615 644ret_data8=255 645system=system 646update_data=false 647warn_access= | 638 639[system.tsunami.fake_sm_chip] 640type=IsaFake 641fake_mem=false 642pio_addr=8804615848816 643pio_latency=1000 644pio_size=8 645ret_bad_addr=false 646ret_data16=65535 647ret_data32=4294967295 648ret_data64=18446744073709551615 649ret_data8=255 650system=system 651update_data=false 652warn_access= |
| 648pio=system.iobus.port[3] | 653pio=system.iobus.master[2] |
| 649 650[system.tsunami.fake_uart1] 651type=IsaFake 652fake_mem=false 653pio_addr=8804615848696 654pio_latency=1000 655pio_size=8 656ret_bad_addr=false 657ret_data16=65535 658ret_data32=4294967295 659ret_data64=18446744073709551615 660ret_data8=255 661system=system 662update_data=false 663warn_access= | 654 655[system.tsunami.fake_uart1] 656type=IsaFake 657fake_mem=false 658pio_addr=8804615848696 659pio_latency=1000 660pio_size=8 661ret_bad_addr=false 662ret_data16=65535 663ret_data32=4294967295 664ret_data64=18446744073709551615 665ret_data8=255 666system=system 667update_data=false 668warn_access= |
| 664pio=system.iobus.port[4] | 669pio=system.iobus.master[3] |
| 665 666[system.tsunami.fake_uart2] 667type=IsaFake 668fake_mem=false 669pio_addr=8804615848936 670pio_latency=1000 671pio_size=8 672ret_bad_addr=false 673ret_data16=65535 674ret_data32=4294967295 675ret_data64=18446744073709551615 676ret_data8=255 677system=system 678update_data=false 679warn_access= | 670 671[system.tsunami.fake_uart2] 672type=IsaFake 673fake_mem=false 674pio_addr=8804615848936 675pio_latency=1000 676pio_size=8 677ret_bad_addr=false 678ret_data16=65535 679ret_data32=4294967295 680ret_data64=18446744073709551615 681ret_data8=255 682system=system 683update_data=false 684warn_access= |
| 680pio=system.iobus.port[5] | 685pio=system.iobus.master[4] |
| 681 682[system.tsunami.fake_uart3] 683type=IsaFake 684fake_mem=false 685pio_addr=8804615848680 686pio_latency=1000 687pio_size=8 688ret_bad_addr=false 689ret_data16=65535 690ret_data32=4294967295 691ret_data64=18446744073709551615 692ret_data8=255 693system=system 694update_data=false 695warn_access= | 686 687[system.tsunami.fake_uart3] 688type=IsaFake 689fake_mem=false 690pio_addr=8804615848680 691pio_latency=1000 692pio_size=8 693ret_bad_addr=false 694ret_data16=65535 695ret_data32=4294967295 696ret_data64=18446744073709551615 697ret_data8=255 698system=system 699update_data=false 700warn_access= |
| 696pio=system.iobus.port[6] | 701pio=system.iobus.master[5] |
| 697 698[system.tsunami.fake_uart4] 699type=IsaFake 700fake_mem=false 701pio_addr=8804615848944 702pio_latency=1000 703pio_size=8 704ret_bad_addr=false 705ret_data16=65535 706ret_data32=4294967295 707ret_data64=18446744073709551615 708ret_data8=255 709system=system 710update_data=false 711warn_access= | 702 703[system.tsunami.fake_uart4] 704type=IsaFake 705fake_mem=false 706pio_addr=8804615848944 707pio_latency=1000 708pio_size=8 709ret_bad_addr=false 710ret_data16=65535 711ret_data32=4294967295 712ret_data64=18446744073709551615 713ret_data8=255 714system=system 715update_data=false 716warn_access= |
| 712pio=system.iobus.port[7] | 717pio=system.iobus.master[6] |
| 713 714[system.tsunami.fb] 715type=BadDevice 716devicename=FrameBuffer 717pio_addr=8804615848912 718pio_latency=1000 719system=system | 718 719[system.tsunami.fb] 720type=BadDevice 721devicename=FrameBuffer 722pio_addr=8804615848912 723pio_latency=1000 724system=system |
| 720pio=system.iobus.port[22] | 725pio=system.iobus.master[21] |
| 721 722[system.tsunami.ide] 723type=IdeController 724BAR0=1 725BAR0LegacyIO=false 726BAR0Size=8 727BAR1=1 728BAR1LegacyIO=false --- 37 unchanged lines hidden (view full) --- 766max_backoff_delay=10000000 767min_backoff_delay=4000 768pci_bus=0 769pci_dev=0 770pci_func=0 771pio_latency=1000 772platform=system.tsunami 773system=system | 726 727[system.tsunami.ide] 728type=IdeController 729BAR0=1 730BAR0LegacyIO=false 731BAR0Size=8 732BAR1=1 733BAR1LegacyIO=false --- 37 unchanged lines hidden (view full) --- 771max_backoff_delay=10000000 772min_backoff_delay=4000 773pci_bus=0 774pci_dev=0 775pci_func=0 776pio_latency=1000 777platform=system.tsunami 778system=system |
| 774config=system.iobus.port[27] 775dma=system.iobus.port[28] 776pio=system.iobus.port[26] | 779config=system.iobus.master[26] 780dma=system.iobus.slave[1] 781pio=system.iobus.master[25] |
| 777 778[system.tsunami.io] 779type=TsunamiIO 780frequency=976562500 781pio_addr=8804615847936 782pio_latency=1000 783system=system 784time=Thu Jan 1 00:00:00 2009 785tsunami=system.tsunami 786year_is_bcd=false | 782 783[system.tsunami.io] 784type=TsunamiIO 785frequency=976562500 786pio_addr=8804615847936 787pio_latency=1000 788system=system 789time=Thu Jan 1 00:00:00 2009 790tsunami=system.tsunami 791year_is_bcd=false |
| 787pio=system.iobus.port[23] | 792pio=system.iobus.master[22] |
| 788 789[system.tsunami.pchip] 790type=TsunamiPChip 791pio_addr=8802535473152 792pio_latency=1000 793system=system 794tsunami=system.tsunami | 793 794[system.tsunami.pchip] 795type=TsunamiPChip 796pio_addr=8802535473152 797pio_latency=1000 798system=system 799tsunami=system.tsunami |
| 795pio=system.iobus.port[2] | 800pio=system.iobus.master[1] |
| 796 797[system.tsunami.pciconfig] 798type=PciConfigAll 799bus=0 800pio_latency=1 801platform=system.tsunami 802size=16777216 803system=system 804pio=system.iobus.default 805 806[system.tsunami.uart] 807type=Uart8250 808pio_addr=8804615848952 809pio_latency=1000 810platform=system.tsunami 811system=system 812terminal=system.terminal | 801 802[system.tsunami.pciconfig] 803type=PciConfigAll 804bus=0 805pio_latency=1 806platform=system.tsunami 807size=16777216 808system=system 809pio=system.iobus.default 810 811[system.tsunami.uart] 812type=Uart8250 813pio_addr=8804615848952 814pio_latency=1000 815platform=system.tsunami 816system=system 817terminal=system.terminal |
| 813pio=system.iobus.port[24] | 818pio=system.iobus.master[23] |
| 814 | 819 |