| config.ini (10636:9ac724889705) | config.ini (10736:4433fb00fa7d) |
|---|---|
| 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 11 unchanged lines hidden (view full) --- 20init_param=0 21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=atomic 26mem_ranges=0:134217727 27memories=system.physmem | 1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 --- 11 unchanged lines hidden (view full) --- 20init_param=0 21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux 22kernel_addr_check=true 23load_addr_mask=1099511627775 24load_offset=0 25mem_mode=atomic 26mem_ranges=0:134217727 27memories=system.physmem |
| 28mmap_using_noreserve=false |
|
| 28num_work_ids=16 29pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal 30readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh 31symbolfile= 32system_rev=1024 33system_type=34 34work_begin_ckpt_count=0 35work_begin_cpu_id_exit=-1 --- 186 unchanged lines hidden (view full) --- 222hit_latency=20 223sequential_access=false 224size=4194304 225 226[system.cpu.toL2Bus] 227type=CoherentXBar 228clk_domain=system.cpu_clk_domain 229eventq_index=0 | 29num_work_ids=16 30pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal 31readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh 32symbolfile= 33system_rev=1024 34system_type=34 35work_begin_ckpt_count=0 36work_begin_cpu_id_exit=-1 --- 186 unchanged lines hidden (view full) --- 223hit_latency=20 224sequential_access=false 225size=4194304 226 227[system.cpu.toL2Bus] 228type=CoherentXBar 229clk_domain=system.cpu_clk_domain 230eventq_index=0 |
| 230header_cycles=1 | 231forward_latency=0 232frontend_latency=1 233response_latency=1 |
| 231snoop_filter=Null | 234snoop_filter=Null |
| 235snoop_response_latency=1 |
|
| 232system=system 233use_default_range=false 234width=32 235master=system.cpu.l2cache.cpu_side 236slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 237 238[system.cpu.tracer] 239type=ExeTracer --- 65 unchanged lines hidden (view full) --- 305type=IntrControl 306eventq_index=0 307sys=system 308 309[system.iobus] 310type=NoncoherentXBar 311clk_domain=system.clk_domain 312eventq_index=0 | 236system=system 237use_default_range=false 238width=32 239master=system.cpu.l2cache.cpu_side 240slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side 241 242[system.cpu.tracer] 243type=ExeTracer --- 65 unchanged lines hidden (view full) --- 309type=IntrControl 310eventq_index=0 311sys=system 312 313[system.iobus] 314type=NoncoherentXBar 315clk_domain=system.clk_domain 316eventq_index=0 |
| 313header_cycles=1 | 317forward_latency=1 318frontend_latency=2 319response_latency=2 |
| 314use_default_range=true | 320use_default_range=true |
| 315width=8 | 321width=16 |
| 316default=system.tsunami.pciconfig.pio 317master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 318slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 319 320[system.iocache] 321type=BaseCache 322children=tags 323addr_ranges=0:134217727 --- 29 unchanged lines hidden (view full) --- 353sequential_access=false 354size=1024 355 356[system.membus] 357type=CoherentXBar 358children=badaddr_responder 359clk_domain=system.clk_domain 360eventq_index=0 | 322default=system.tsunami.pciconfig.pio 323master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side 324slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 325 326[system.iocache] 327type=BaseCache 328children=tags 329addr_ranges=0:134217727 --- 29 unchanged lines hidden (view full) --- 359sequential_access=false 360size=1024 361 362[system.membus] 363type=CoherentXBar 364children=badaddr_responder 365clk_domain=system.clk_domain 366eventq_index=0 |
| 361header_cycles=1 | 367forward_latency=4 368frontend_latency=3 369response_latency=2 |
| 362snoop_filter=Null | 370snoop_filter=Null |
| 371snoop_response_latency=4 |
|
| 363system=system 364use_default_range=false | 372system=system 373use_default_range=false |
| 365width=8 | 374width=16 |
| 366default=system.membus.badaddr_responder.pio 367master=system.bridge.slave system.physmem.port 368slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 369 370[system.membus.badaddr_responder] 371type=IsaFake 372clk_domain=system.clk_domain 373eventq_index=0 --- 675 unchanged lines hidden --- | 375default=system.membus.badaddr_responder.pio 376master=system.bridge.slave system.physmem.port 377slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 378 379[system.membus.badaddr_responder] 380type=IsaFake 381clk_domain=system.clk_domain 382eventq_index=0 --- 675 unchanged lines hidden --- |