1[root] 2type=Root 3children=system 4eventq_index=0 5full_system=true 6sim_quantum=0 7time_sync_enable=false 8time_sync_period=100000000000 9time_sync_spin_threshold=100000000 10 11[system] 12type=LinuxAlphaSystem 13children=bridge clk_domain cpu cpu_clk_domain disk0 disk2 dvfs_handler intrctrl iobus iocache membus physmem simple_disk terminal tsunami voltage_domain 14boot_cpu_frequency=500 15boot_osflags=root=/dev/hda1 console=ttyS0 16cache_line_size=64 17clk_domain=system.clk_domain |
18console=/arm/projectscratch/randd/systems/dist/binaries/console 19default_p_state=UNDEFINED |
20eventq_index=0 21exit_on_work_items=false 22init_param=0 |
23kernel=/arm/projectscratch/randd/systems/dist/binaries/vmlinux |
24kernel_addr_check=true 25load_addr_mask=1099511627775 26load_offset=0 27mem_mode=atomic 28mem_ranges=0:134217727 29memories=system.physmem 30mmap_using_noreserve=false 31multi_thread=false 32num_work_ids=16 |
33p_state_clk_gate_bins=20 34p_state_clk_gate_max=1000000000000 35p_state_clk_gate_min=1000 36pal=/arm/projectscratch/randd/systems/dist/binaries/ts_osfpal 37power_model=Null 38readfile=/work/curdun01/gem5-external.hg/tests/testing/../halt.sh |
39symbolfile= 40system_rev=1024 41system_type=34 42thermal_components= 43thermal_model=Null 44work_begin_ckpt_count=0 45work_begin_cpu_id_exit=-1 46work_begin_exit_count=0 47work_cpus_ckpt_count=0 48work_end_ckpt_count=0 49work_end_exit_count=0 50work_item_id=-1 51system_port=system.membus.slave[0] 52 53[system.bridge] 54type=Bridge 55clk_domain=system.clk_domain |
56default_p_state=UNDEFINED |
57delay=50000 58eventq_index=0 |
59p_state_clk_gate_bins=20 60p_state_clk_gate_max=1000000000000 61p_state_clk_gate_min=1000 62power_model=Null |
63ranges=8796093022208:18446744073709551615 64req_size=16 65resp_size=16 66master=system.iobus.slave[0] 67slave=system.membus.master[0] 68 69[system.clk_domain] 70type=SrcClockDomain --- 5 unchanged lines hidden (view full) --- 76 77[system.cpu] 78type=AtomicSimpleCPU 79children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer 80branchPred=Null 81checker=Null 82clk_domain=system.cpu_clk_domain 83cpu_id=0 |
84default_p_state=UNDEFINED |
85do_checkpoint_insts=true 86do_quiesce=true 87do_statistics_insts=true 88dtb=system.cpu.dtb 89eventq_index=0 90fastmem=false 91function_trace=false 92function_trace_start=0 93interrupts=system.cpu.interrupts 94isa=system.cpu.isa 95itb=system.cpu.itb 96max_insts_all_threads=0 97max_insts_any_thread=0 98max_loads_all_threads=0 99max_loads_any_thread=0 100numThreads=1 |
101p_state_clk_gate_bins=20 102p_state_clk_gate_max=1000000000000 103p_state_clk_gate_min=1000 104power_model=Null |
105profile=0 106progress_interval=0 107simpoint_start_insts= 108simulate_data_stalls=false 109simulate_inst_stalls=false 110socket_id=0 111switched_out=false 112system=system --- 5 unchanged lines hidden (view full) --- 118 119[system.cpu.dcache] 120type=Cache 121children=tags 122addr_ranges=0:18446744073709551615 123assoc=4 124clk_domain=system.cpu_clk_domain 125clusivity=mostly_incl |
126default_p_state=UNDEFINED |
127demand_mshr_reserve=1 128eventq_index=0 129hit_latency=2 130is_read_only=false 131max_miss_count=0 132mshrs=4 |
133p_state_clk_gate_bins=20 134p_state_clk_gate_max=1000000000000 135p_state_clk_gate_min=1000 136power_model=Null |
137prefetch_on_access=false 138prefetcher=Null 139response_latency=2 140sequential_access=false 141size=32768 142system=system 143tags=system.cpu.dcache.tags 144tgts_per_mshr=20 145write_buffers=8 146writeback_clean=false 147cpu_side=system.cpu.dcache_port 148mem_side=system.cpu.toL2Bus.slave[1] 149 150[system.cpu.dcache.tags] 151type=LRU 152assoc=4 153block_size=64 154clk_domain=system.cpu_clk_domain |
155default_p_state=UNDEFINED |
156eventq_index=0 157hit_latency=2 |
158p_state_clk_gate_bins=20 159p_state_clk_gate_max=1000000000000 160p_state_clk_gate_min=1000 161power_model=Null |
162sequential_access=false 163size=32768 164 165[system.cpu.dtb] 166type=AlphaTLB 167eventq_index=0 168size=64 169 170[system.cpu.icache] 171type=Cache 172children=tags 173addr_ranges=0:18446744073709551615 174assoc=1 175clk_domain=system.cpu_clk_domain 176clusivity=mostly_incl |
177default_p_state=UNDEFINED |
178demand_mshr_reserve=1 179eventq_index=0 180hit_latency=2 181is_read_only=true 182max_miss_count=0 183mshrs=4 |
184p_state_clk_gate_bins=20 185p_state_clk_gate_max=1000000000000 186p_state_clk_gate_min=1000 187power_model=Null |
188prefetch_on_access=false 189prefetcher=Null 190response_latency=2 191sequential_access=false 192size=32768 193system=system 194tags=system.cpu.icache.tags 195tgts_per_mshr=20 196write_buffers=8 197writeback_clean=true 198cpu_side=system.cpu.icache_port 199mem_side=system.cpu.toL2Bus.slave[0] 200 201[system.cpu.icache.tags] 202type=LRU 203assoc=1 204block_size=64 205clk_domain=system.cpu_clk_domain |
206default_p_state=UNDEFINED |
207eventq_index=0 208hit_latency=2 |
209p_state_clk_gate_bins=20 210p_state_clk_gate_max=1000000000000 211p_state_clk_gate_min=1000 212power_model=Null |
213sequential_access=false 214size=32768 215 216[system.cpu.interrupts] 217type=AlphaInterrupts 218eventq_index=0 219 220[system.cpu.isa] --- 8 unchanged lines hidden (view full) --- 229 230[system.cpu.l2cache] 231type=Cache 232children=tags 233addr_ranges=0:18446744073709551615 234assoc=8 235clk_domain=system.cpu_clk_domain 236clusivity=mostly_incl |
237default_p_state=UNDEFINED |
238demand_mshr_reserve=1 239eventq_index=0 240hit_latency=20 241is_read_only=false 242max_miss_count=0 243mshrs=20 |
244p_state_clk_gate_bins=20 245p_state_clk_gate_max=1000000000000 246p_state_clk_gate_min=1000 247power_model=Null |
248prefetch_on_access=false 249prefetcher=Null 250response_latency=20 251sequential_access=false 252size=4194304 253system=system 254tags=system.cpu.l2cache.tags 255tgts_per_mshr=12 256write_buffers=8 257writeback_clean=false 258cpu_side=system.cpu.toL2Bus.master[0] 259mem_side=system.membus.slave[1] 260 261[system.cpu.l2cache.tags] 262type=LRU 263assoc=8 264block_size=64 265clk_domain=system.cpu_clk_domain |
266default_p_state=UNDEFINED |
267eventq_index=0 268hit_latency=20 |
269p_state_clk_gate_bins=20 270p_state_clk_gate_max=1000000000000 271p_state_clk_gate_min=1000 272power_model=Null |
273sequential_access=false 274size=4194304 275 276[system.cpu.toL2Bus] 277type=CoherentXBar 278children=snoop_filter 279clk_domain=system.cpu_clk_domain |
280default_p_state=UNDEFINED |
281eventq_index=0 282forward_latency=0 283frontend_latency=1 |
284p_state_clk_gate_bins=20 285p_state_clk_gate_max=1000000000000 286p_state_clk_gate_min=1000 |
287point_of_coherency=false |
288power_model=Null |
289response_latency=1 290snoop_filter=system.cpu.toL2Bus.snoop_filter 291snoop_response_latency=1 292system=system 293use_default_range=false 294width=32 295master=system.cpu.l2cache.cpu_side 296slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side --- 32 unchanged lines hidden (view full) --- 329eventq_index=0 330image_file= 331read_only=false 332table_size=65536 333 334[system.disk0.image.child] 335type=RawDiskImage 336eventq_index=0 |
337image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img |
338read_only=true 339 340[system.disk2] 341type=IdeDisk 342children=image 343delay=1000000 344driveID=master 345eventq_index=0 --- 6 unchanged lines hidden (view full) --- 352eventq_index=0 353image_file= 354read_only=false 355table_size=65536 356 357[system.disk2.image.child] 358type=RawDiskImage 359eventq_index=0 |
360image_file=/arm/projectscratch/randd/systems/dist/disks/linux-bigswap2.img |
361read_only=true 362 363[system.dvfs_handler] 364type=DVFSHandler 365domains= 366enable=false 367eventq_index=0 368sys_clk_domain=system.clk_domain 369transition_latency=100000000 370 371[system.intrctrl] 372type=IntrControl 373eventq_index=0 374sys=system 375 376[system.iobus] 377type=NoncoherentXBar 378clk_domain=system.clk_domain |
379default_p_state=UNDEFINED |
380eventq_index=0 381forward_latency=1 382frontend_latency=2 |
383p_state_clk_gate_bins=20 384p_state_clk_gate_max=1000000000000 385p_state_clk_gate_min=1000 386power_model=Null |
387response_latency=2 388use_default_range=false 389width=16 390master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ethernet.pio system.iocache.cpu_side 391slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma 392 393[system.iocache] 394type=Cache 395children=tags 396addr_ranges=0:134217727 397assoc=8 398clk_domain=system.clk_domain 399clusivity=mostly_incl |
400default_p_state=UNDEFINED |
401demand_mshr_reserve=1 402eventq_index=0 403hit_latency=50 404is_read_only=false 405max_miss_count=0 406mshrs=20 |
407p_state_clk_gate_bins=20 408p_state_clk_gate_max=1000000000000 409p_state_clk_gate_min=1000 410power_model=Null |
411prefetch_on_access=false 412prefetcher=Null 413response_latency=50 414sequential_access=false 415size=1024 416system=system 417tags=system.iocache.tags 418tgts_per_mshr=12 419write_buffers=8 420writeback_clean=false 421cpu_side=system.iobus.master[27] 422mem_side=system.membus.slave[2] 423 424[system.iocache.tags] 425type=LRU 426assoc=8 427block_size=64 428clk_domain=system.clk_domain |
429default_p_state=UNDEFINED |
430eventq_index=0 431hit_latency=50 |
432p_state_clk_gate_bins=20 433p_state_clk_gate_max=1000000000000 434p_state_clk_gate_min=1000 435power_model=Null |
436sequential_access=false 437size=1024 438 439[system.membus] 440type=CoherentXBar 441children=badaddr_responder 442clk_domain=system.clk_domain |
443default_p_state=UNDEFINED |
444eventq_index=0 445forward_latency=4 446frontend_latency=3 |
447p_state_clk_gate_bins=20 448p_state_clk_gate_max=1000000000000 449p_state_clk_gate_min=1000 |
450point_of_coherency=true |
451power_model=Null |
452response_latency=2 453snoop_filter=Null 454snoop_response_latency=4 455system=system 456use_default_range=false 457width=16 458default=system.membus.badaddr_responder.pio 459master=system.bridge.slave system.physmem.port 460slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side 461 462[system.membus.badaddr_responder] 463type=IsaFake 464clk_domain=system.clk_domain |
465default_p_state=UNDEFINED |
466eventq_index=0 467fake_mem=false |
468p_state_clk_gate_bins=20 469p_state_clk_gate_max=1000000000000 470p_state_clk_gate_min=1000 |
471pio_addr=0 472pio_latency=100000 473pio_size=8 |
474power_model=Null |
475ret_bad_addr=true 476ret_data16=65535 477ret_data32=4294967295 478ret_data64=18446744073709551615 479ret_data8=255 480system=system 481update_data=false 482warn_access= 483pio=system.membus.default 484 485[system.physmem] 486type=SimpleMemory 487bandwidth=73.000000 488clk_domain=system.clk_domain 489conf_table_reported=true |
490default_p_state=UNDEFINED |
491eventq_index=0 492in_addr_map=true 493latency=30000 494latency_var=0 495null=false |
496p_state_clk_gate_bins=20 497p_state_clk_gate_max=1000000000000 498p_state_clk_gate_min=1000 499power_model=Null |
500range=0:134217727 501port=system.membus.master[1] 502 503[system.simple_disk] 504type=SimpleDisk 505children=disk 506disk=system.simple_disk.disk 507eventq_index=0 508system=system 509 510[system.simple_disk.disk] 511type=RawDiskImage 512eventq_index=0 |
513image_file=/arm/projectscratch/randd/systems/dist/disks/linux-latest.img |
514read_only=true 515 516[system.terminal] 517type=Terminal 518eventq_index=0 519intr_control=system.intrctrl 520number=0 521output=true --- 5 unchanged lines hidden (view full) --- 527eventq_index=0 528intrctrl=system.intrctrl 529system=system 530 531[system.tsunami.backdoor] 532type=AlphaBackdoor 533clk_domain=system.clk_domain 534cpu=system.cpu |
535default_p_state=UNDEFINED |
536disk=system.simple_disk 537eventq_index=0 |
538p_state_clk_gate_bins=20 539p_state_clk_gate_max=1000000000000 540p_state_clk_gate_min=1000 |
541pio_addr=8804682956800 542pio_latency=100000 543platform=system.tsunami |
544power_model=Null |
545system=system 546terminal=system.terminal 547pio=system.iobus.master[24] 548 549[system.tsunami.cchip] 550type=TsunamiCChip 551clk_domain=system.clk_domain |
552default_p_state=UNDEFINED |
553eventq_index=0 |
554p_state_clk_gate_bins=20 555p_state_clk_gate_max=1000000000000 556p_state_clk_gate_min=1000 |
557pio_addr=8803072344064 558pio_latency=100000 |
559power_model=Null |
560system=system 561tsunami=system.tsunami 562pio=system.iobus.master[0] 563 564[system.tsunami.ethernet] 565type=NSGigE 566BAR0=1 567BAR0LegacyIO=false --- 64 unchanged lines hidden (view full) --- 632Revision=0 633Status=656 634SubClassCode=0 635SubsystemID=0 636SubsystemVendorID=0 637VendorID=4107 638clk_domain=system.clk_domain 639config_latency=20000 |
640default_p_state=UNDEFINED |
641dma_data_free=false 642dma_desc_free=false 643dma_no_allocate=true 644dma_read_delay=0 645dma_read_factor=0 646dma_write_delay=0 647dma_write_factor=0 648eventq_index=0 649hardware_address=00:90:00:00:00:01 650host=system.tsunami.pchip 651intr_delay=10000000 |
652p_state_clk_gate_bins=20 653p_state_clk_gate_max=1000000000000 654p_state_clk_gate_min=1000 |
655pci_bus=0 656pci_dev=1 657pci_func=0 658pio_latency=30000 |
659power_model=Null |
660rss=false 661rx_delay=1000000 662rx_fifo_size=524288 663rx_filter=true 664rx_thread=false 665system=system 666tx_delay=1000000 667tx_fifo_size=524288 668tx_thread=false 669dma=system.iobus.slave[2] 670pio=system.iobus.master[26] 671 672[system.tsunami.fake_OROM] 673type=IsaFake 674clk_domain=system.clk_domain |
675default_p_state=UNDEFINED |
676eventq_index=0 677fake_mem=false |
678p_state_clk_gate_bins=20 679p_state_clk_gate_max=1000000000000 680p_state_clk_gate_min=1000 |
681pio_addr=8796093677568 682pio_latency=100000 683pio_size=393216 |
684power_model=Null |
685ret_bad_addr=false 686ret_data16=65535 687ret_data32=4294967295 688ret_data64=18446744073709551615 689ret_data8=255 690system=system 691update_data=false 692warn_access= 693pio=system.iobus.master[8] 694 695[system.tsunami.fake_ata0] 696type=IsaFake 697clk_domain=system.clk_domain |
698default_p_state=UNDEFINED |
699eventq_index=0 700fake_mem=false |
701p_state_clk_gate_bins=20 702p_state_clk_gate_max=1000000000000 703p_state_clk_gate_min=1000 |
704pio_addr=8804615848432 705pio_latency=100000 706pio_size=8 |
707power_model=Null |
708ret_bad_addr=false 709ret_data16=65535 710ret_data32=4294967295 711ret_data64=18446744073709551615 712ret_data8=255 713system=system 714update_data=false 715warn_access= 716pio=system.iobus.master[19] 717 718[system.tsunami.fake_ata1] 719type=IsaFake 720clk_domain=system.clk_domain |
721default_p_state=UNDEFINED |
722eventq_index=0 723fake_mem=false |
724p_state_clk_gate_bins=20 725p_state_clk_gate_max=1000000000000 726p_state_clk_gate_min=1000 |
727pio_addr=8804615848304 728pio_latency=100000 729pio_size=8 |
730power_model=Null |
731ret_bad_addr=false 732ret_data16=65535 733ret_data32=4294967295 734ret_data64=18446744073709551615 735ret_data8=255 736system=system 737update_data=false 738warn_access= 739pio=system.iobus.master[20] 740 741[system.tsunami.fake_pnp_addr] 742type=IsaFake 743clk_domain=system.clk_domain |
744default_p_state=UNDEFINED |
745eventq_index=0 746fake_mem=false |
747p_state_clk_gate_bins=20 748p_state_clk_gate_max=1000000000000 749p_state_clk_gate_min=1000 |
750pio_addr=8804615848569 751pio_latency=100000 752pio_size=8 |
753power_model=Null |
754ret_bad_addr=false 755ret_data16=65535 756ret_data32=4294967295 757ret_data64=18446744073709551615 758ret_data8=255 759system=system 760update_data=false 761warn_access= 762pio=system.iobus.master[9] 763 764[system.tsunami.fake_pnp_read0] 765type=IsaFake 766clk_domain=system.clk_domain |
767default_p_state=UNDEFINED |
768eventq_index=0 769fake_mem=false |
770p_state_clk_gate_bins=20 771p_state_clk_gate_max=1000000000000 772p_state_clk_gate_min=1000 |
773pio_addr=8804615848451 774pio_latency=100000 775pio_size=8 |
776power_model=Null |
777ret_bad_addr=false 778ret_data16=65535 779ret_data32=4294967295 780ret_data64=18446744073709551615 781ret_data8=255 782system=system 783update_data=false 784warn_access= 785pio=system.iobus.master[11] 786 787[system.tsunami.fake_pnp_read1] 788type=IsaFake 789clk_domain=system.clk_domain |
790default_p_state=UNDEFINED |
791eventq_index=0 792fake_mem=false |
793p_state_clk_gate_bins=20 794p_state_clk_gate_max=1000000000000 795p_state_clk_gate_min=1000 |
796pio_addr=8804615848515 797pio_latency=100000 798pio_size=8 |
799power_model=Null |
800ret_bad_addr=false 801ret_data16=65535 802ret_data32=4294967295 803ret_data64=18446744073709551615 804ret_data8=255 805system=system 806update_data=false 807warn_access= 808pio=system.iobus.master[12] 809 810[system.tsunami.fake_pnp_read2] 811type=IsaFake 812clk_domain=system.clk_domain |
813default_p_state=UNDEFINED |
814eventq_index=0 815fake_mem=false |
816p_state_clk_gate_bins=20 817p_state_clk_gate_max=1000000000000 818p_state_clk_gate_min=1000 |
819pio_addr=8804615848579 820pio_latency=100000 821pio_size=8 |
822power_model=Null |
823ret_bad_addr=false 824ret_data16=65535 825ret_data32=4294967295 826ret_data64=18446744073709551615 827ret_data8=255 828system=system 829update_data=false 830warn_access= 831pio=system.iobus.master[13] 832 833[system.tsunami.fake_pnp_read3] 834type=IsaFake 835clk_domain=system.clk_domain |
836default_p_state=UNDEFINED |
837eventq_index=0 838fake_mem=false |
839p_state_clk_gate_bins=20 840p_state_clk_gate_max=1000000000000 841p_state_clk_gate_min=1000 |
842pio_addr=8804615848643 843pio_latency=100000 844pio_size=8 |
845power_model=Null |
846ret_bad_addr=false 847ret_data16=65535 848ret_data32=4294967295 849ret_data64=18446744073709551615 850ret_data8=255 851system=system 852update_data=false 853warn_access= 854pio=system.iobus.master[14] 855 856[system.tsunami.fake_pnp_read4] 857type=IsaFake 858clk_domain=system.clk_domain |
859default_p_state=UNDEFINED |
860eventq_index=0 861fake_mem=false |
862p_state_clk_gate_bins=20 863p_state_clk_gate_max=1000000000000 864p_state_clk_gate_min=1000 |
865pio_addr=8804615848707 866pio_latency=100000 867pio_size=8 |
868power_model=Null |
869ret_bad_addr=false 870ret_data16=65535 871ret_data32=4294967295 872ret_data64=18446744073709551615 873ret_data8=255 874system=system 875update_data=false 876warn_access= 877pio=system.iobus.master[15] 878 879[system.tsunami.fake_pnp_read5] 880type=IsaFake 881clk_domain=system.clk_domain |
882default_p_state=UNDEFINED |
883eventq_index=0 884fake_mem=false |
885p_state_clk_gate_bins=20 886p_state_clk_gate_max=1000000000000 887p_state_clk_gate_min=1000 |
888pio_addr=8804615848771 889pio_latency=100000 890pio_size=8 |
891power_model=Null |
892ret_bad_addr=false 893ret_data16=65535 894ret_data32=4294967295 895ret_data64=18446744073709551615 896ret_data8=255 897system=system 898update_data=false 899warn_access= 900pio=system.iobus.master[16] 901 902[system.tsunami.fake_pnp_read6] 903type=IsaFake 904clk_domain=system.clk_domain |
905default_p_state=UNDEFINED |
906eventq_index=0 907fake_mem=false |
908p_state_clk_gate_bins=20 909p_state_clk_gate_max=1000000000000 910p_state_clk_gate_min=1000 |
911pio_addr=8804615848835 912pio_latency=100000 913pio_size=8 |
914power_model=Null |
915ret_bad_addr=false 916ret_data16=65535 917ret_data32=4294967295 918ret_data64=18446744073709551615 919ret_data8=255 920system=system 921update_data=false 922warn_access= 923pio=system.iobus.master[17] 924 925[system.tsunami.fake_pnp_read7] 926type=IsaFake 927clk_domain=system.clk_domain |
928default_p_state=UNDEFINED |
929eventq_index=0 930fake_mem=false |
931p_state_clk_gate_bins=20 932p_state_clk_gate_max=1000000000000 933p_state_clk_gate_min=1000 |
934pio_addr=8804615848899 935pio_latency=100000 936pio_size=8 |
937power_model=Null |
938ret_bad_addr=false 939ret_data16=65535 940ret_data32=4294967295 941ret_data64=18446744073709551615 942ret_data8=255 943system=system 944update_data=false 945warn_access= 946pio=system.iobus.master[18] 947 948[system.tsunami.fake_pnp_write] 949type=IsaFake 950clk_domain=system.clk_domain |
951default_p_state=UNDEFINED |
952eventq_index=0 953fake_mem=false |
954p_state_clk_gate_bins=20 955p_state_clk_gate_max=1000000000000 956p_state_clk_gate_min=1000 |
957pio_addr=8804615850617 958pio_latency=100000 959pio_size=8 |
960power_model=Null |
961ret_bad_addr=false 962ret_data16=65535 963ret_data32=4294967295 964ret_data64=18446744073709551615 965ret_data8=255 966system=system 967update_data=false 968warn_access= 969pio=system.iobus.master[10] 970 971[system.tsunami.fake_ppc] 972type=IsaFake 973clk_domain=system.clk_domain |
974default_p_state=UNDEFINED |
975eventq_index=0 976fake_mem=false |
977p_state_clk_gate_bins=20 978p_state_clk_gate_max=1000000000000 979p_state_clk_gate_min=1000 |
980pio_addr=8804615848891 981pio_latency=100000 982pio_size=8 |
983power_model=Null |
984ret_bad_addr=false 985ret_data16=65535 986ret_data32=4294967295 987ret_data64=18446744073709551615 988ret_data8=255 989system=system 990update_data=false 991warn_access= 992pio=system.iobus.master[7] 993 994[system.tsunami.fake_sm_chip] 995type=IsaFake 996clk_domain=system.clk_domain |
997default_p_state=UNDEFINED |
998eventq_index=0 999fake_mem=false |
1000p_state_clk_gate_bins=20 1001p_state_clk_gate_max=1000000000000 1002p_state_clk_gate_min=1000 |
1003pio_addr=8804615848816 1004pio_latency=100000 1005pio_size=8 |
1006power_model=Null |
1007ret_bad_addr=false 1008ret_data16=65535 1009ret_data32=4294967295 1010ret_data64=18446744073709551615 1011ret_data8=255 1012system=system 1013update_data=false 1014warn_access= 1015pio=system.iobus.master[2] 1016 1017[system.tsunami.fake_uart1] 1018type=IsaFake 1019clk_domain=system.clk_domain |
1020default_p_state=UNDEFINED |
1021eventq_index=0 1022fake_mem=false |
1023p_state_clk_gate_bins=20 1024p_state_clk_gate_max=1000000000000 1025p_state_clk_gate_min=1000 |
1026pio_addr=8804615848696 1027pio_latency=100000 1028pio_size=8 |
1029power_model=Null |
1030ret_bad_addr=false 1031ret_data16=65535 1032ret_data32=4294967295 1033ret_data64=18446744073709551615 1034ret_data8=255 1035system=system 1036update_data=false 1037warn_access= 1038pio=system.iobus.master[3] 1039 1040[system.tsunami.fake_uart2] 1041type=IsaFake 1042clk_domain=system.clk_domain |
1043default_p_state=UNDEFINED |
1044eventq_index=0 1045fake_mem=false |
1046p_state_clk_gate_bins=20 1047p_state_clk_gate_max=1000000000000 1048p_state_clk_gate_min=1000 |
1049pio_addr=8804615848936 1050pio_latency=100000 1051pio_size=8 |
1052power_model=Null |
1053ret_bad_addr=false 1054ret_data16=65535 1055ret_data32=4294967295 1056ret_data64=18446744073709551615 1057ret_data8=255 1058system=system 1059update_data=false 1060warn_access= 1061pio=system.iobus.master[4] 1062 1063[system.tsunami.fake_uart3] 1064type=IsaFake 1065clk_domain=system.clk_domain |
1066default_p_state=UNDEFINED |
1067eventq_index=0 1068fake_mem=false |
1069p_state_clk_gate_bins=20 1070p_state_clk_gate_max=1000000000000 1071p_state_clk_gate_min=1000 |
1072pio_addr=8804615848680 1073pio_latency=100000 1074pio_size=8 |
1075power_model=Null |
1076ret_bad_addr=false 1077ret_data16=65535 1078ret_data32=4294967295 1079ret_data64=18446744073709551615 1080ret_data8=255 1081system=system 1082update_data=false 1083warn_access= 1084pio=system.iobus.master[5] 1085 1086[system.tsunami.fake_uart4] 1087type=IsaFake 1088clk_domain=system.clk_domain |
1089default_p_state=UNDEFINED |
1090eventq_index=0 1091fake_mem=false |
1092p_state_clk_gate_bins=20 1093p_state_clk_gate_max=1000000000000 1094p_state_clk_gate_min=1000 |
1095pio_addr=8804615848944 1096pio_latency=100000 1097pio_size=8 |
1098power_model=Null |
1099ret_bad_addr=false 1100ret_data16=65535 1101ret_data32=4294967295 1102ret_data64=18446744073709551615 1103ret_data8=255 1104system=system 1105update_data=false 1106warn_access= 1107pio=system.iobus.master[6] 1108 1109[system.tsunami.fb] 1110type=BadDevice 1111clk_domain=system.clk_domain |
1112default_p_state=UNDEFINED |
1113devicename=FrameBuffer 1114eventq_index=0 |
1115p_state_clk_gate_bins=20 1116p_state_clk_gate_max=1000000000000 1117p_state_clk_gate_min=1000 |
1118pio_addr=8804615848912 1119pio_latency=100000 |
1120power_model=Null |
1121system=system 1122pio=system.iobus.master[21] 1123 1124[system.tsunami.ide] 1125type=IdeController 1126BAR0=1 1127BAR0LegacyIO=false 1128BAR0Size=8 --- 64 unchanged lines hidden (view full) --- 1193Status=640 1194SubClassCode=1 1195SubsystemID=0 1196SubsystemVendorID=0 1197VendorID=32902 1198clk_domain=system.clk_domain 1199config_latency=20000 1200ctrl_offset=0 |
1201default_p_state=UNDEFINED |
1202disks=system.disk0 system.disk2 1203eventq_index=0 1204host=system.tsunami.pchip 1205io_shift=0 |
1206p_state_clk_gate_bins=20 1207p_state_clk_gate_max=1000000000000 1208p_state_clk_gate_min=1000 |
1209pci_bus=0 1210pci_dev=0 1211pci_func=0 1212pio_latency=30000 |
1213power_model=Null |
1214system=system 1215dma=system.iobus.slave[1] 1216pio=system.iobus.master[25] 1217 1218[system.tsunami.io] 1219type=TsunamiIO 1220clk_domain=system.clk_domain |
1221default_p_state=UNDEFINED |
1222eventq_index=0 1223frequency=976562500 |
1224p_state_clk_gate_bins=20 1225p_state_clk_gate_max=1000000000000 1226p_state_clk_gate_min=1000 |
1227pio_addr=8804615847936 1228pio_latency=100000 |
1229power_model=Null |
1230system=system 1231time=Thu Jan 1 00:00:00 2009 1232tsunami=system.tsunami 1233year_is_bcd=false 1234pio=system.iobus.master[22] 1235 1236[system.tsunami.pchip] 1237type=TsunamiPChip 1238clk_domain=system.clk_domain 1239conf_base=8804649402368 1240conf_device_bits=8 1241conf_size=16777216 |
1242default_p_state=UNDEFINED |
1243eventq_index=0 |
1244p_state_clk_gate_bins=20 1245p_state_clk_gate_max=1000000000000 1246p_state_clk_gate_min=1000 |
1247pci_dma_base=0 1248pci_mem_base=8796093022208 1249pci_pio_base=8804615847936 1250pio_addr=8802535473152 1251pio_latency=100000 1252platform=system.tsunami |
1253power_model=Null |
1254system=system 1255tsunami=system.tsunami 1256pio=system.iobus.master[1] 1257 1258[system.tsunami.uart] 1259type=Uart8250 1260clk_domain=system.clk_domain |
1261default_p_state=UNDEFINED |
1262eventq_index=0 |
1263p_state_clk_gate_bins=20 1264p_state_clk_gate_max=1000000000000 1265p_state_clk_gate_min=1000 |
1266pio_addr=8804615848952 1267pio_latency=100000 1268platform=system.tsunami |
1269power_model=Null |
1270system=system 1271terminal=system.terminal 1272pio=system.iobus.master[23] 1273 1274[system.voltage_domain] 1275type=VoltageDomain 1276eventq_index=0 1277voltage=1.000000 1278 |