stats.txt (11570:4aac82f10951) | stats.txt (11606:6b749761c398) |
---|---|
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357999000 # Number of ticks simulated 5final_tick 1869357999000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357999000 # Number of ticks simulated 5final_tick 1869357999000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
7host_inst_rate 1359256 # Simulator instruction rate (inst/s) 8host_op_rate 1359255 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 39091338244 # Simulator tick rate (ticks/s) 10host_mem_usage 332080 # Number of bytes of host memory used 11host_seconds 47.82 # Real time elapsed on the host | 7host_inst_rate 1685575 # Simulator instruction rate (inst/s) 8host_op_rate 1685575 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 48476092750 # Simulator tick rate (ticks/s) 10host_mem_usage 336716 # Number of bytes of host memory used 11host_seconds 38.56 # Real time elapsed on the host |
12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory | 12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory |
18system.physmem.bytes_read::cpu0.data 66535616 # Number of bytes read from this memory | 18system.physmem.bytes_read::cpu0.data 66535744 # Number of bytes read from this memory |
19system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory | 19system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory |
20system.physmem.bytes_read::cpu1.data 766336 # Number of bytes read from this memory | 20system.physmem.bytes_read::cpu1.data 766400 # Number of bytes read from this memory |
21system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory | 21system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory |
22system.physmem.bytes_read::total 68167296 # Number of bytes read from this memory | 22system.physmem.bytes_read::total 68167488 # Number of bytes read from this memory |
23system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 24system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory 25system.physmem.bytes_inst_read::total 864384 # Number of instructions bytes read from this memory | 23system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 24system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory 25system.physmem.bytes_inst_read::total 864384 # Number of instructions bytes read from this memory |
26system.physmem.bytes_written::writebacks 7836352 # Number of bytes written to this memory 27system.physmem.bytes_written::total 7836352 # Number of bytes written to this memory | 26system.physmem.bytes_written::writebacks 7837888 # Number of bytes written to this memory 27system.physmem.bytes_written::total 7837888 # Number of bytes written to this memory |
28system.physmem.num_reads::cpu0.inst 11848 # Number of read requests responded to by this memory | 28system.physmem.num_reads::cpu0.inst 11848 # Number of read requests responded to by this memory |
29system.physmem.num_reads::cpu0.data 1039619 # Number of read requests responded to by this memory | 29system.physmem.num_reads::cpu0.data 1039621 # Number of read requests responded to by this memory |
30system.physmem.num_reads::cpu1.inst 1658 # Number of read requests responded to by this memory | 30system.physmem.num_reads::cpu1.inst 1658 # Number of read requests responded to by this memory |
31system.physmem.num_reads::cpu1.data 11974 # Number of read requests responded to by this memory | 31system.physmem.num_reads::cpu1.data 11975 # Number of read requests responded to by this memory |
32system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory | 32system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory |
33system.physmem.num_reads::total 1065114 # Number of read requests responded to by this memory 34system.physmem.num_writes::writebacks 122443 # Number of write requests responded to by this memory 35system.physmem.num_writes::total 122443 # Number of write requests responded to by this memory | 33system.physmem.num_reads::total 1065117 # Number of read requests responded to by this memory 34system.physmem.num_writes::writebacks 122467 # Number of write requests responded to by this memory 35system.physmem.num_writes::total 122467 # Number of write requests responded to by this memory |
36system.physmem.bw_read::cpu0.inst 405632 # Total read bandwidth from this memory (bytes/s) | 36system.physmem.bw_read::cpu0.inst 405632 # Total read bandwidth from this memory (bytes/s) |
37system.physmem.bw_read::cpu0.data 35592763 # Total read bandwidth from this memory (bytes/s) | 37system.physmem.bw_read::cpu0.data 35592831 # Total read bandwidth from this memory (bytes/s) |
38system.physmem.bw_read::cpu1.inst 56764 # Total read bandwidth from this memory (bytes/s) | 38system.physmem.bw_read::cpu1.inst 56764 # Total read bandwidth from this memory (bytes/s) |
39system.physmem.bw_read::cpu1.data 409946 # Total read bandwidth from this memory (bytes/s) | 39system.physmem.bw_read::cpu1.data 409980 # Total read bandwidth from this memory (bytes/s) |
40system.physmem.bw_read::tsunami.ide 514 # Total read bandwidth from this memory (bytes/s) | 40system.physmem.bw_read::tsunami.ide 514 # Total read bandwidth from this memory (bytes/s) |
41system.physmem.bw_read::total 36465619 # Total read bandwidth from this memory (bytes/s) | 41system.physmem.bw_read::total 36465721 # Total read bandwidth from this memory (bytes/s) |
42system.physmem.bw_inst_read::cpu0.inst 405632 # Instruction read bandwidth from this memory (bytes/s) 43system.physmem.bw_inst_read::cpu1.inst 56764 # Instruction read bandwidth from this memory (bytes/s) 44system.physmem.bw_inst_read::total 462396 # Instruction read bandwidth from this memory (bytes/s) | 42system.physmem.bw_inst_read::cpu0.inst 405632 # Instruction read bandwidth from this memory (bytes/s) 43system.physmem.bw_inst_read::cpu1.inst 56764 # Instruction read bandwidth from this memory (bytes/s) 44system.physmem.bw_inst_read::total 462396 # Instruction read bandwidth from this memory (bytes/s) |
45system.physmem.bw_write::writebacks 4192002 # Write bandwidth from this memory (bytes/s) 46system.physmem.bw_write::total 4192002 # Write bandwidth from this memory (bytes/s) 47system.physmem.bw_total::writebacks 4192002 # Total bandwidth to/from this memory (bytes/s) | 45system.physmem.bw_write::writebacks 4192823 # Write bandwidth from this memory (bytes/s) 46system.physmem.bw_write::total 4192823 # Write bandwidth from this memory (bytes/s) 47system.physmem.bw_total::writebacks 4192823 # Total bandwidth to/from this memory (bytes/s) |
48system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) | 48system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) |
49system.physmem.bw_total::cpu0.data 35592763 # Total bandwidth to/from this memory (bytes/s) | 49system.physmem.bw_total::cpu0.data 35592831 # Total bandwidth to/from this memory (bytes/s) |
50system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) | 50system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) |
51system.physmem.bw_total::cpu1.data 409946 # Total bandwidth to/from this memory (bytes/s) | 51system.physmem.bw_total::cpu1.data 409980 # Total bandwidth to/from this memory (bytes/s) |
52system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) | 52system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) |
53system.physmem.bw_total::total 40657620 # Total bandwidth to/from this memory (bytes/s) | 53system.physmem.bw_total::total 40658545 # Total bandwidth to/from this memory (bytes/s) |
54system.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 55system.bridge.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 56system.cpu_clk_domain.clock 500 # Clock period in ticks 57system.cpu0.dtb.fetch_hits 0 # ITB hits 58system.cpu0.dtb.fetch_misses 0 # ITB misses 59system.cpu0.dtb.fetch_acv 0 # ITB acv 60system.cpu0.dtb.fetch_accesses 0 # ITB accesses 61system.cpu0.dtb.read_hits 7758808 # DTB read hits --- 197 unchanged lines hidden (view full) --- 259system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 260system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 261system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 262system.cpu0.dcache.tags.tag_accesses 51822038 # Number of tag accesses 263system.cpu0.dcache.tags.data_accesses 51822038 # Number of data accesses 264system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 265system.cpu0.dcache.ReadReq_hits::cpu0.data 6068885 # number of ReadReq hits 266system.cpu0.dcache.ReadReq_hits::total 6068885 # number of ReadReq hits | 54system.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 55system.bridge.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 56system.cpu_clk_domain.clock 500 # Clock period in ticks 57system.cpu0.dtb.fetch_hits 0 # ITB hits 58system.cpu0.dtb.fetch_misses 0 # ITB misses 59system.cpu0.dtb.fetch_acv 0 # ITB acv 60system.cpu0.dtb.fetch_accesses 0 # ITB accesses 61system.cpu0.dtb.read_hits 7758808 # DTB read hits --- 197 unchanged lines hidden (view full) --- 259system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 260system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 261system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 262system.cpu0.dcache.tags.tag_accesses 51822038 # Number of tag accesses 263system.cpu0.dcache.tags.data_accesses 51822038 # Number of data accesses 264system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 265system.cpu0.dcache.ReadReq_hits::cpu0.data 6068885 # number of ReadReq hits 266system.cpu0.dcache.ReadReq_hits::total 6068885 # number of ReadReq hits |
267system.cpu0.dcache.WriteReq_hits::cpu0.data 4360085 # number of WriteReq hits 268system.cpu0.dcache.WriteReq_hits::total 4360085 # number of WriteReq hits | 267system.cpu0.dcache.WriteReq_hits::cpu0.data 4360096 # number of WriteReq hits 268system.cpu0.dcache.WriteReq_hits::total 4360096 # number of WriteReq hits |
269system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 270system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits | 269system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 270system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits |
271system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132849 # number of StoreCondReq hits 272system.cpu0.dcache.StoreCondReq_hits::total 132849 # number of StoreCondReq hits 273system.cpu0.dcache.demand_hits::cpu0.data 10428970 # number of demand (read+write) hits 274system.cpu0.dcache.demand_hits::total 10428970 # number of demand (read+write) hits 275system.cpu0.dcache.overall_hits::cpu0.data 10428970 # number of overall hits 276system.cpu0.dcache.overall_hits::total 10428970 # number of overall hits | 271system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132871 # number of StoreCondReq hits 272system.cpu0.dcache.StoreCondReq_hits::total 132871 # number of StoreCondReq hits 273system.cpu0.dcache.demand_hits::cpu0.data 10428981 # number of demand (read+write) hits 274system.cpu0.dcache.demand_hits::total 10428981 # number of demand (read+write) hits 275system.cpu0.dcache.overall_hits::cpu0.data 10428981 # number of overall hits 276system.cpu0.dcache.overall_hits::total 10428981 # number of overall hits |
277system.cpu0.dcache.ReadReq_misses::cpu0.data 1560065 # number of ReadReq misses 278system.cpu0.dcache.ReadReq_misses::total 1560065 # number of ReadReq misses | 277system.cpu0.dcache.ReadReq_misses::cpu0.data 1560065 # number of ReadReq misses 278system.cpu0.dcache.ReadReq_misses::total 1560065 # number of ReadReq misses |
279system.cpu0.dcache.WriteReq_misses::cpu0.data 236538 # number of WriteReq misses 280system.cpu0.dcache.WriteReq_misses::total 236538 # number of WriteReq misses | 279system.cpu0.dcache.WriteReq_misses::cpu0.data 236527 # number of WriteReq misses 280system.cpu0.dcache.WriteReq_misses::total 236527 # number of WriteReq misses |
281system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 12626 # number of LoadLockedReq misses 282system.cpu0.dcache.LoadLockedReq_misses::total 12626 # number of LoadLockedReq misses | 281system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 12626 # number of LoadLockedReq misses 282system.cpu0.dcache.LoadLockedReq_misses::total 12626 # number of LoadLockedReq misses |
283system.cpu0.dcache.StoreCondReq_misses::cpu0.data 6921 # number of StoreCondReq misses 284system.cpu0.dcache.StoreCondReq_misses::total 6921 # number of StoreCondReq misses 285system.cpu0.dcache.demand_misses::cpu0.data 1796603 # number of demand (read+write) misses 286system.cpu0.dcache.demand_misses::total 1796603 # number of demand (read+write) misses 287system.cpu0.dcache.overall_misses::cpu0.data 1796603 # number of overall misses 288system.cpu0.dcache.overall_misses::total 1796603 # number of overall misses | 283system.cpu0.dcache.StoreCondReq_misses::cpu0.data 6899 # number of StoreCondReq misses 284system.cpu0.dcache.StoreCondReq_misses::total 6899 # number of StoreCondReq misses 285system.cpu0.dcache.demand_misses::cpu0.data 1796592 # number of demand (read+write) misses 286system.cpu0.dcache.demand_misses::total 1796592 # number of demand (read+write) misses 287system.cpu0.dcache.overall_misses::cpu0.data 1796592 # number of overall misses 288system.cpu0.dcache.overall_misses::total 1796592 # number of overall misses |
289system.cpu0.dcache.ReadReq_accesses::cpu0.data 7628950 # number of ReadReq accesses(hits+misses) 290system.cpu0.dcache.ReadReq_accesses::total 7628950 # number of ReadReq accesses(hits+misses) 291system.cpu0.dcache.WriteReq_accesses::cpu0.data 4596623 # number of WriteReq accesses(hits+misses) 292system.cpu0.dcache.WriteReq_accesses::total 4596623 # number of WriteReq accesses(hits+misses) 293system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 140218 # number of LoadLockedReq accesses(hits+misses) 294system.cpu0.dcache.LoadLockedReq_accesses::total 140218 # number of LoadLockedReq accesses(hits+misses) 295system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 139770 # number of StoreCondReq accesses(hits+misses) 296system.cpu0.dcache.StoreCondReq_accesses::total 139770 # number of StoreCondReq accesses(hits+misses) 297system.cpu0.dcache.demand_accesses::cpu0.data 12225573 # number of demand (read+write) accesses 298system.cpu0.dcache.demand_accesses::total 12225573 # number of demand (read+write) accesses 299system.cpu0.dcache.overall_accesses::cpu0.data 12225573 # number of overall (read+write) accesses 300system.cpu0.dcache.overall_accesses::total 12225573 # number of overall (read+write) accesses 301system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.204493 # miss rate for ReadReq accesses 302system.cpu0.dcache.ReadReq_miss_rate::total 0.204493 # miss rate for ReadReq accesses | 289system.cpu0.dcache.ReadReq_accesses::cpu0.data 7628950 # number of ReadReq accesses(hits+misses) 290system.cpu0.dcache.ReadReq_accesses::total 7628950 # number of ReadReq accesses(hits+misses) 291system.cpu0.dcache.WriteReq_accesses::cpu0.data 4596623 # number of WriteReq accesses(hits+misses) 292system.cpu0.dcache.WriteReq_accesses::total 4596623 # number of WriteReq accesses(hits+misses) 293system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 140218 # number of LoadLockedReq accesses(hits+misses) 294system.cpu0.dcache.LoadLockedReq_accesses::total 140218 # number of LoadLockedReq accesses(hits+misses) 295system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 139770 # number of StoreCondReq accesses(hits+misses) 296system.cpu0.dcache.StoreCondReq_accesses::total 139770 # number of StoreCondReq accesses(hits+misses) 297system.cpu0.dcache.demand_accesses::cpu0.data 12225573 # number of demand (read+write) accesses 298system.cpu0.dcache.demand_accesses::total 12225573 # number of demand (read+write) accesses 299system.cpu0.dcache.overall_accesses::cpu0.data 12225573 # number of overall (read+write) accesses 300system.cpu0.dcache.overall_accesses::total 12225573 # number of overall (read+write) accesses 301system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.204493 # miss rate for ReadReq accesses 302system.cpu0.dcache.ReadReq_miss_rate::total 0.204493 # miss rate for ReadReq accesses |
303system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.051459 # miss rate for WriteReq accesses 304system.cpu0.dcache.WriteReq_miss_rate::total 0.051459 # miss rate for WriteReq accesses | 303system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.051457 # miss rate for WriteReq accesses 304system.cpu0.dcache.WriteReq_miss_rate::total 0.051457 # miss rate for WriteReq accesses |
305system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.090046 # miss rate for LoadLockedReq accesses 306system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.090046 # miss rate for LoadLockedReq accesses | 305system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.090046 # miss rate for LoadLockedReq accesses 306system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.090046 # miss rate for LoadLockedReq accesses |
307system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.049517 # miss rate for StoreCondReq accesses 308system.cpu0.dcache.StoreCondReq_miss_rate::total 0.049517 # miss rate for StoreCondReq accesses 309system.cpu0.dcache.demand_miss_rate::cpu0.data 0.146955 # miss rate for demand accesses 310system.cpu0.dcache.demand_miss_rate::total 0.146955 # miss rate for demand accesses 311system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146955 # miss rate for overall accesses 312system.cpu0.dcache.overall_miss_rate::total 0.146955 # miss rate for overall accesses | 307system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.049360 # miss rate for StoreCondReq accesses 308system.cpu0.dcache.StoreCondReq_miss_rate::total 0.049360 # miss rate for StoreCondReq accesses 309system.cpu0.dcache.demand_miss_rate::cpu0.data 0.146954 # miss rate for demand accesses 310system.cpu0.dcache.demand_miss_rate::total 0.146954 # miss rate for demand accesses 311system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146954 # miss rate for overall accesses 312system.cpu0.dcache.overall_miss_rate::total 0.146954 # miss rate for overall accesses |
313system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 314system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 315system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 316system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 317system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 318system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 313system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 314system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 315system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 316system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 317system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 318system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
319system.cpu0.dcache.writebacks::writebacks 633126 # number of writebacks 320system.cpu0.dcache.writebacks::total 633126 # number of writebacks | 319system.cpu0.dcache.writebacks::writebacks 633925 # number of writebacks 320system.cpu0.dcache.writebacks::total 633925 # number of writebacks |
321system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 322system.cpu0.icache.tags.replacements 618292 # number of replacements 323system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 324system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 325system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 326system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 327system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 328system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor --- 226 unchanged lines hidden (view full) --- 555system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 556system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 557system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 558system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 559system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses 560system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 561system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 562system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits | 321system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 322system.cpu0.icache.tags.replacements 618292 # number of replacements 323system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 324system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 325system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 326system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 327system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 328system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor --- 226 unchanged lines hidden (view full) --- 555system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 556system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 557system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 558system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 559system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses 560system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 561system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 562system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits |
563system.cpu1.dcache.WriteReq_hits::cpu1.data 1954643 # number of WriteReq hits 564system.cpu1.dcache.WriteReq_hits::total 1954643 # number of WriteReq hits | 563system.cpu1.dcache.WriteReq_hits::cpu1.data 1954647 # number of WriteReq hits 564system.cpu1.dcache.WriteReq_hits::total 1954647 # number of WriteReq hits |
565system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 566system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits | 565system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 566system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits |
567system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64210 # number of StoreCondReq hits 568system.cpu1.dcache.StoreCondReq_hits::total 64210 # number of StoreCondReq hits 569system.cpu1.dcache.demand_hits::cpu1.data 4587331 # number of demand (read+write) hits 570system.cpu1.dcache.demand_hits::total 4587331 # number of demand (read+write) hits 571system.cpu1.dcache.overall_hits::cpu1.data 4587331 # number of overall hits 572system.cpu1.dcache.overall_hits::total 4587331 # number of overall hits | 567system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64211 # number of StoreCondReq hits 568system.cpu1.dcache.StoreCondReq_hits::total 64211 # number of StoreCondReq hits 569system.cpu1.dcache.demand_hits::cpu1.data 4587335 # number of demand (read+write) hits 570system.cpu1.dcache.demand_hits::total 4587335 # number of demand (read+write) hits 571system.cpu1.dcache.overall_hits::cpu1.data 4587335 # number of overall hits 572system.cpu1.dcache.overall_hits::total 4587335 # number of overall hits |
573system.cpu1.dcache.ReadReq_misses::cpu1.data 140885 # number of ReadReq misses 574system.cpu1.dcache.ReadReq_misses::total 140885 # number of ReadReq misses | 573system.cpu1.dcache.ReadReq_misses::cpu1.data 140885 # number of ReadReq misses 574system.cpu1.dcache.ReadReq_misses::total 140885 # number of ReadReq misses |
575system.cpu1.dcache.WriteReq_misses::cpu1.data 78317 # number of WriteReq misses 576system.cpu1.dcache.WriteReq_misses::total 78317 # number of WriteReq misses | 575system.cpu1.dcache.WriteReq_misses::cpu1.data 78313 # number of WriteReq misses 576system.cpu1.dcache.WriteReq_misses::total 78313 # number of WriteReq misses |
577system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 11000 # number of LoadLockedReq misses 578system.cpu1.dcache.LoadLockedReq_misses::total 11000 # number of LoadLockedReq misses | 577system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 11000 # number of LoadLockedReq misses 578system.cpu1.dcache.LoadLockedReq_misses::total 11000 # number of LoadLockedReq misses |
579system.cpu1.dcache.StoreCondReq_misses::cpu1.data 7305 # number of StoreCondReq misses 580system.cpu1.dcache.StoreCondReq_misses::total 7305 # number of StoreCondReq misses 581system.cpu1.dcache.demand_misses::cpu1.data 219202 # number of demand (read+write) misses 582system.cpu1.dcache.demand_misses::total 219202 # number of demand (read+write) misses 583system.cpu1.dcache.overall_misses::cpu1.data 219202 # number of overall misses 584system.cpu1.dcache.overall_misses::total 219202 # number of overall misses | 579system.cpu1.dcache.StoreCondReq_misses::cpu1.data 7304 # number of StoreCondReq misses 580system.cpu1.dcache.StoreCondReq_misses::total 7304 # number of StoreCondReq misses 581system.cpu1.dcache.demand_misses::cpu1.data 219198 # number of demand (read+write) misses 582system.cpu1.dcache.demand_misses::total 219198 # number of demand (read+write) misses 583system.cpu1.dcache.overall_misses::cpu1.data 219198 # number of overall misses 584system.cpu1.dcache.overall_misses::total 219198 # number of overall misses |
585system.cpu1.dcache.ReadReq_accesses::cpu1.data 2773573 # number of ReadReq accesses(hits+misses) 586system.cpu1.dcache.ReadReq_accesses::total 2773573 # number of ReadReq accesses(hits+misses) 587system.cpu1.dcache.WriteReq_accesses::cpu1.data 2032960 # number of WriteReq accesses(hits+misses) 588system.cpu1.dcache.WriteReq_accesses::total 2032960 # number of WriteReq accesses(hits+misses) 589system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 72098 # number of LoadLockedReq accesses(hits+misses) 590system.cpu1.dcache.LoadLockedReq_accesses::total 72098 # number of LoadLockedReq accesses(hits+misses) 591system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 71515 # number of StoreCondReq accesses(hits+misses) 592system.cpu1.dcache.StoreCondReq_accesses::total 71515 # number of StoreCondReq accesses(hits+misses) 593system.cpu1.dcache.demand_accesses::cpu1.data 4806533 # number of demand (read+write) accesses 594system.cpu1.dcache.demand_accesses::total 4806533 # number of demand (read+write) accesses 595system.cpu1.dcache.overall_accesses::cpu1.data 4806533 # number of overall (read+write) accesses 596system.cpu1.dcache.overall_accesses::total 4806533 # number of overall (read+write) accesses 597system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.050795 # miss rate for ReadReq accesses 598system.cpu1.dcache.ReadReq_miss_rate::total 0.050795 # miss rate for ReadReq accesses | 585system.cpu1.dcache.ReadReq_accesses::cpu1.data 2773573 # number of ReadReq accesses(hits+misses) 586system.cpu1.dcache.ReadReq_accesses::total 2773573 # number of ReadReq accesses(hits+misses) 587system.cpu1.dcache.WriteReq_accesses::cpu1.data 2032960 # number of WriteReq accesses(hits+misses) 588system.cpu1.dcache.WriteReq_accesses::total 2032960 # number of WriteReq accesses(hits+misses) 589system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 72098 # number of LoadLockedReq accesses(hits+misses) 590system.cpu1.dcache.LoadLockedReq_accesses::total 72098 # number of LoadLockedReq accesses(hits+misses) 591system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 71515 # number of StoreCondReq accesses(hits+misses) 592system.cpu1.dcache.StoreCondReq_accesses::total 71515 # number of StoreCondReq accesses(hits+misses) 593system.cpu1.dcache.demand_accesses::cpu1.data 4806533 # number of demand (read+write) accesses 594system.cpu1.dcache.demand_accesses::total 4806533 # number of demand (read+write) accesses 595system.cpu1.dcache.overall_accesses::cpu1.data 4806533 # number of overall (read+write) accesses 596system.cpu1.dcache.overall_accesses::total 4806533 # number of overall (read+write) accesses 597system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.050795 # miss rate for ReadReq accesses 598system.cpu1.dcache.ReadReq_miss_rate::total 0.050795 # miss rate for ReadReq accesses |
599system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.038524 # miss rate for WriteReq accesses 600system.cpu1.dcache.WriteReq_miss_rate::total 0.038524 # miss rate for WriteReq accesses | 599system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.038522 # miss rate for WriteReq accesses 600system.cpu1.dcache.WriteReq_miss_rate::total 0.038522 # miss rate for WriteReq accesses |
601system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.152570 # miss rate for LoadLockedReq accesses 602system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.152570 # miss rate for LoadLockedReq accesses | 601system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.152570 # miss rate for LoadLockedReq accesses 602system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.152570 # miss rate for LoadLockedReq accesses |
603system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.102146 # miss rate for StoreCondReq accesses 604system.cpu1.dcache.StoreCondReq_miss_rate::total 0.102146 # miss rate for StoreCondReq accesses 605system.cpu1.dcache.demand_miss_rate::cpu1.data 0.045605 # miss rate for demand accesses 606system.cpu1.dcache.demand_miss_rate::total 0.045605 # miss rate for demand accesses 607system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045605 # miss rate for overall accesses 608system.cpu1.dcache.overall_miss_rate::total 0.045605 # miss rate for overall accesses | 603system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.102132 # miss rate for StoreCondReq accesses 604system.cpu1.dcache.StoreCondReq_miss_rate::total 0.102132 # miss rate for StoreCondReq accesses 605system.cpu1.dcache.demand_miss_rate::cpu1.data 0.045604 # miss rate for demand accesses 606system.cpu1.dcache.demand_miss_rate::total 0.045604 # miss rate for demand accesses 607system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045604 # miss rate for overall accesses 608system.cpu1.dcache.overall_miss_rate::total 0.045604 # miss rate for overall accesses |
609system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 610system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 611system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 612system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 613system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 614system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 609system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 610system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 611system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 612system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 613system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 614system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
615system.cpu1.dcache.writebacks::writebacks 144536 # number of writebacks 616system.cpu1.dcache.writebacks::total 144536 # number of writebacks | 615system.cpu1.dcache.writebacks::writebacks 144832 # number of writebacks 616system.cpu1.dcache.writebacks::total 144832 # number of writebacks |
617system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 618system.cpu1.icache.tags.replacements 380647 # number of replacements 619system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 620system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 621system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 622system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 623system.cpu1.icache.tags.warmup_cycle 1859777195500 # Cycle when the warmup percentage was hit. 624system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor --- 125 unchanged lines hidden (view full) --- 750system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 751system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 752system.iocache.blocked::no_targets 0 # number of cycles access was blocked 753system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 754system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 755system.iocache.writebacks::writebacks 41520 # number of writebacks 756system.iocache.writebacks::total 41520 # number of writebacks 757system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states | 617system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 618system.cpu1.icache.tags.replacements 380647 # number of replacements 619system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 620system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 621system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 622system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 623system.cpu1.icache.tags.warmup_cycle 1859777195500 # Cycle when the warmup percentage was hit. 624system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor --- 125 unchanged lines hidden (view full) --- 750system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 751system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 752system.iocache.blocked::no_targets 0 # number of cycles access was blocked 753system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 754system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 755system.iocache.writebacks::writebacks 41520 # number of writebacks 756system.iocache.writebacks::total 41520 # number of writebacks 757system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
758system.l2c.tags.replacements 999922 # number of replacements 759system.l2c.tags.tagsinuse 65337.856710 # Cycle average of tags in use 760system.l2c.tags.total_refs 4259780 # Total number of references to valid blocks. 761system.l2c.tags.sampled_refs 1064972 # Sample count of references to valid blocks. 762system.l2c.tags.avg_refs 3.999899 # Average number of references to valid blocks. 763system.l2c.tags.warmup_cycle 838081000 # Cycle when the warmup percentage was hit. 764system.l2c.tags.occ_blocks::writebacks 55997.404382 # Average occupied blocks per requestor 765system.l2c.tags.occ_blocks::cpu0.inst 4860.296070 # Average occupied blocks per requestor 766system.l2c.tags.occ_blocks::cpu0.data 4190.275138 # Average occupied blocks per requestor 767system.l2c.tags.occ_blocks::cpu1.inst 175.171519 # Average occupied blocks per requestor 768system.l2c.tags.occ_blocks::cpu1.data 114.709600 # Average occupied blocks per requestor 769system.l2c.tags.occ_percent::writebacks 0.854453 # Average percentage of cache occupancy 770system.l2c.tags.occ_percent::cpu0.inst 0.074162 # Average percentage of cache occupancy 771system.l2c.tags.occ_percent::cpu0.data 0.063939 # Average percentage of cache occupancy | 758system.l2c.tags.replacements 999962 # number of replacements 759system.l2c.tags.tagsinuse 65520.418446 # Cycle average of tags in use 760system.l2c.tags.total_refs 4560628 # Total number of references to valid blocks. 761system.l2c.tags.sampled_refs 1065470 # Sample count of references to valid blocks. 762system.l2c.tags.avg_refs 4.280391 # Average number of references to valid blocks. 763system.l2c.tags.warmup_cycle 618103500 # Cycle when the warmup percentage was hit. 764system.l2c.tags.occ_blocks::writebacks 304.654016 # Average occupied blocks per requestor 765system.l2c.tags.occ_blocks::cpu0.inst 4865.757369 # Average occupied blocks per requestor 766system.l2c.tags.occ_blocks::cpu0.data 58473.870947 # Average occupied blocks per requestor 767system.l2c.tags.occ_blocks::cpu1.inst 175.171504 # Average occupied blocks per requestor 768system.l2c.tags.occ_blocks::cpu1.data 1700.964609 # Average occupied blocks per requestor 769system.l2c.tags.occ_percent::writebacks 0.004649 # Average percentage of cache occupancy 770system.l2c.tags.occ_percent::cpu0.inst 0.074246 # Average percentage of cache occupancy 771system.l2c.tags.occ_percent::cpu0.data 0.892240 # Average percentage of cache occupancy |
772system.l2c.tags.occ_percent::cpu1.inst 0.002673 # Average percentage of cache occupancy | 772system.l2c.tags.occ_percent::cpu1.inst 0.002673 # Average percentage of cache occupancy |
773system.l2c.tags.occ_percent::cpu1.data 0.001750 # Average percentage of cache occupancy 774system.l2c.tags.occ_percent::total 0.996977 # Average percentage of cache occupancy 775system.l2c.tags.occ_task_id_blocks::1024 65050 # Occupied blocks per task id 776system.l2c.tags.age_task_id_blocks_1024::0 768 # Occupied blocks per task id 777system.l2c.tags.age_task_id_blocks_1024::1 3271 # Occupied blocks per task id 778system.l2c.tags.age_task_id_blocks_1024::2 6047 # Occupied blocks per task id 779system.l2c.tags.age_task_id_blocks_1024::3 5933 # Occupied blocks per task id 780system.l2c.tags.age_task_id_blocks_1024::4 49031 # Occupied blocks per task id 781system.l2c.tags.occ_task_id_percent::1024 0.992584 # Percentage of cache occupancy per task id 782system.l2c.tags.tag_accesses 46377199 # Number of tag accesses 783system.l2c.tags.data_accesses 46377199 # Number of data accesses | 773system.l2c.tags.occ_percent::cpu1.data 0.025955 # Average percentage of cache occupancy 774system.l2c.tags.occ_percent::total 0.999762 # Average percentage of cache occupancy 775system.l2c.tags.occ_task_id_blocks::1024 65508 # Occupied blocks per task id 776system.l2c.tags.age_task_id_blocks_1024::0 674 # Occupied blocks per task id 777system.l2c.tags.age_task_id_blocks_1024::1 2411 # Occupied blocks per task id 778system.l2c.tags.age_task_id_blocks_1024::2 2462 # Occupied blocks per task id 779system.l2c.tags.age_task_id_blocks_1024::3 9328 # Occupied blocks per task id 780system.l2c.tags.age_task_id_blocks_1024::4 50633 # Occupied blocks per task id 781system.l2c.tags.occ_task_id_percent::1024 0.999573 # Percentage of cache occupancy per task id 782system.l2c.tags.tag_accesses 46077158 # Number of tag accesses 783system.l2c.tags.data_accesses 46077158 # Number of data accesses |
784system.l2c.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states | 784system.l2c.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
785system.l2c.WritebackDirty_hits::writebacks 777662 # number of WritebackDirty hits 786system.l2c.WritebackDirty_hits::total 777662 # number of WritebackDirty hits | 785system.l2c.WritebackDirty_hits::writebacks 778757 # number of WritebackDirty hits 786system.l2c.WritebackDirty_hits::total 778757 # number of WritebackDirty hits |
787system.l2c.WritebackClean_hits::writebacks 721480 # number of WritebackClean hits 788system.l2c.WritebackClean_hits::total 721480 # number of WritebackClean hits | 787system.l2c.WritebackClean_hits::writebacks 721480 # number of WritebackClean hits 788system.l2c.WritebackClean_hits::total 721480 # number of WritebackClean hits |
789system.l2c.UpgradeReq_hits::cpu0.data 130 # number of UpgradeReq hits 790system.l2c.UpgradeReq_hits::cpu1.data 604 # number of UpgradeReq hits 791system.l2c.UpgradeReq_hits::total 734 # number of UpgradeReq hits 792system.l2c.SCUpgradeReq_hits::cpu0.data 44 # number of SCUpgradeReq hits 793system.l2c.SCUpgradeReq_hits::cpu1.data 28 # number of SCUpgradeReq hits 794system.l2c.SCUpgradeReq_hits::total 72 # number of SCUpgradeReq hits 795system.l2c.ReadExReq_hits::cpu0.data 111476 # number of ReadExReq hits 796system.l2c.ReadExReq_hits::cpu1.data 56605 # number of ReadExReq hits 797system.l2c.ReadExReq_hits::total 168081 # number of ReadExReq hits | 789system.l2c.UpgradeReq_hits::cpu0.data 3102 # number of UpgradeReq hits 790system.l2c.UpgradeReq_hits::cpu1.data 2744 # number of UpgradeReq hits 791system.l2c.UpgradeReq_hits::total 5846 # number of UpgradeReq hits 792system.l2c.SCUpgradeReq_hits::cpu0.data 1187 # number of SCUpgradeReq hits 793system.l2c.SCUpgradeReq_hits::cpu1.data 1121 # number of SCUpgradeReq hits 794system.l2c.SCUpgradeReq_hits::total 2308 # number of SCUpgradeReq hits 795system.l2c.ReadExReq_hits::cpu0.data 111978 # number of ReadExReq hits 796system.l2c.ReadExReq_hits::cpu1.data 56627 # number of ReadExReq hits 797system.l2c.ReadExReq_hits::total 168605 # number of ReadExReq hits |
798system.l2c.ReadCleanReq_hits::cpu0.inst 607070 # number of ReadCleanReq hits 799system.l2c.ReadCleanReq_hits::cpu1.inst 379530 # number of ReadCleanReq hits 800system.l2c.ReadCleanReq_hits::total 986600 # number of ReadCleanReq hits | 798system.l2c.ReadCleanReq_hits::cpu0.inst 607070 # number of ReadCleanReq hits 799system.l2c.ReadCleanReq_hits::cpu1.inst 379530 # number of ReadCleanReq hits 800system.l2c.ReadCleanReq_hits::total 986600 # number of ReadCleanReq hits |
801system.l2c.ReadSharedReq_hits::cpu0.data 626716 # number of ReadSharedReq hits 802system.l2c.ReadSharedReq_hits::cpu1.data 129010 # number of ReadSharedReq hits 803system.l2c.ReadSharedReq_hits::total 755726 # number of ReadSharedReq hits | 801system.l2c.ReadSharedReq_hits::cpu0.data 626251 # number of ReadSharedReq hits 802system.l2c.ReadSharedReq_hits::cpu1.data 128790 # number of ReadSharedReq hits 803system.l2c.ReadSharedReq_hits::total 755041 # number of ReadSharedReq hits |
804system.l2c.demand_hits::cpu0.inst 607070 # number of demand (read+write) hits | 804system.l2c.demand_hits::cpu0.inst 607070 # number of demand (read+write) hits |
805system.l2c.demand_hits::cpu0.data 738192 # number of demand (read+write) hits | 805system.l2c.demand_hits::cpu0.data 738229 # number of demand (read+write) hits |
806system.l2c.demand_hits::cpu1.inst 379530 # number of demand (read+write) hits | 806system.l2c.demand_hits::cpu1.inst 379530 # number of demand (read+write) hits |
807system.l2c.demand_hits::cpu1.data 185615 # number of demand (read+write) hits 808system.l2c.demand_hits::total 1910407 # number of demand (read+write) hits | 807system.l2c.demand_hits::cpu1.data 185417 # number of demand (read+write) hits 808system.l2c.demand_hits::total 1910246 # number of demand (read+write) hits |
809system.l2c.overall_hits::cpu0.inst 607070 # number of overall hits | 809system.l2c.overall_hits::cpu0.inst 607070 # number of overall hits |
810system.l2c.overall_hits::cpu0.data 738192 # number of overall hits | 810system.l2c.overall_hits::cpu0.data 738229 # number of overall hits |
811system.l2c.overall_hits::cpu1.inst 379530 # number of overall hits | 811system.l2c.overall_hits::cpu1.inst 379530 # number of overall hits |
812system.l2c.overall_hits::cpu1.data 185615 # number of overall hits 813system.l2c.overall_hits::total 1910407 # number of overall hits 814system.l2c.UpgradeReq_misses::cpu0.data 2989 # number of UpgradeReq misses 815system.l2c.UpgradeReq_misses::cpu1.data 2147 # number of UpgradeReq misses 816system.l2c.UpgradeReq_misses::total 5136 # number of UpgradeReq misses 817system.l2c.SCUpgradeReq_misses::cpu0.data 1165 # number of SCUpgradeReq misses 818system.l2c.SCUpgradeReq_misses::cpu1.data 1095 # number of SCUpgradeReq misses 819system.l2c.SCUpgradeReq_misses::total 2260 # number of SCUpgradeReq misses 820system.l2c.ReadExReq_misses::cpu0.data 113871 # number of ReadExReq misses 821system.l2c.ReadExReq_misses::cpu1.data 11066 # number of ReadExReq misses 822system.l2c.ReadExReq_misses::total 124937 # number of ReadExReq misses | 812system.l2c.overall_hits::cpu1.data 185417 # number of overall hits 813system.l2c.overall_hits::total 1910246 # number of overall hits 814system.l2c.UpgradeReq_misses::cpu0.data 4 # number of UpgradeReq misses 815system.l2c.UpgradeReq_misses::cpu1.data 2 # number of UpgradeReq misses 816system.l2c.UpgradeReq_misses::total 6 # number of UpgradeReq misses 817system.l2c.SCUpgradeReq_misses::cpu1.data 1 # number of SCUpgradeReq misses 818system.l2c.SCUpgradeReq_misses::total 1 # number of SCUpgradeReq misses 819system.l2c.ReadExReq_misses::cpu0.data 113307 # number of ReadExReq misses 820system.l2c.ReadExReq_misses::cpu1.data 11044 # number of ReadExReq misses 821system.l2c.ReadExReq_misses::total 124351 # number of ReadExReq misses |
823system.l2c.ReadCleanReq_misses::cpu0.inst 11848 # number of ReadCleanReq misses 824system.l2c.ReadCleanReq_misses::cpu1.inst 1658 # number of ReadCleanReq misses 825system.l2c.ReadCleanReq_misses::total 13506 # number of ReadCleanReq misses | 822system.l2c.ReadCleanReq_misses::cpu0.inst 11848 # number of ReadCleanReq misses 823system.l2c.ReadCleanReq_misses::cpu1.inst 1658 # number of ReadCleanReq misses 824system.l2c.ReadCleanReq_misses::total 13506 # number of ReadCleanReq misses |
826system.l2c.ReadSharedReq_misses::cpu0.data 926615 # number of ReadSharedReq misses 827system.l2c.ReadSharedReq_misses::cpu1.data 1035 # number of ReadSharedReq misses 828system.l2c.ReadSharedReq_misses::total 927650 # number of ReadSharedReq misses | 825system.l2c.ReadSharedReq_misses::cpu0.data 926616 # number of ReadSharedReq misses 826system.l2c.ReadSharedReq_misses::cpu1.data 1036 # number of ReadSharedReq misses 827system.l2c.ReadSharedReq_misses::total 927652 # number of ReadSharedReq misses |
829system.l2c.demand_misses::cpu0.inst 11848 # number of demand (read+write) misses | 828system.l2c.demand_misses::cpu0.inst 11848 # number of demand (read+write) misses |
830system.l2c.demand_misses::cpu0.data 1040486 # number of demand (read+write) misses | 829system.l2c.demand_misses::cpu0.data 1039923 # number of demand (read+write) misses |
831system.l2c.demand_misses::cpu1.inst 1658 # number of demand (read+write) misses | 830system.l2c.demand_misses::cpu1.inst 1658 # number of demand (read+write) misses |
832system.l2c.demand_misses::cpu1.data 12101 # number of demand (read+write) misses 833system.l2c.demand_misses::total 1066093 # number of demand (read+write) misses | 831system.l2c.demand_misses::cpu1.data 12080 # number of demand (read+write) misses 832system.l2c.demand_misses::total 1065509 # number of demand (read+write) misses |
834system.l2c.overall_misses::cpu0.inst 11848 # number of overall misses | 833system.l2c.overall_misses::cpu0.inst 11848 # number of overall misses |
835system.l2c.overall_misses::cpu0.data 1040486 # number of overall misses | 834system.l2c.overall_misses::cpu0.data 1039923 # number of overall misses |
836system.l2c.overall_misses::cpu1.inst 1658 # number of overall misses | 835system.l2c.overall_misses::cpu1.inst 1658 # number of overall misses |
837system.l2c.overall_misses::cpu1.data 12101 # number of overall misses 838system.l2c.overall_misses::total 1066093 # number of overall misses 839system.l2c.WritebackDirty_accesses::writebacks 777662 # number of WritebackDirty accesses(hits+misses) 840system.l2c.WritebackDirty_accesses::total 777662 # number of WritebackDirty accesses(hits+misses) | 836system.l2c.overall_misses::cpu1.data 12080 # number of overall misses 837system.l2c.overall_misses::total 1065509 # number of overall misses 838system.l2c.WritebackDirty_accesses::writebacks 778757 # number of WritebackDirty accesses(hits+misses) 839system.l2c.WritebackDirty_accesses::total 778757 # number of WritebackDirty accesses(hits+misses) |
841system.l2c.WritebackClean_accesses::writebacks 721480 # number of WritebackClean accesses(hits+misses) 842system.l2c.WritebackClean_accesses::total 721480 # number of WritebackClean accesses(hits+misses) | 840system.l2c.WritebackClean_accesses::writebacks 721480 # number of WritebackClean accesses(hits+misses) 841system.l2c.WritebackClean_accesses::total 721480 # number of WritebackClean accesses(hits+misses) |
843system.l2c.UpgradeReq_accesses::cpu0.data 3119 # number of UpgradeReq accesses(hits+misses) 844system.l2c.UpgradeReq_accesses::cpu1.data 2751 # number of UpgradeReq accesses(hits+misses) 845system.l2c.UpgradeReq_accesses::total 5870 # number of UpgradeReq accesses(hits+misses) 846system.l2c.SCUpgradeReq_accesses::cpu0.data 1209 # number of SCUpgradeReq accesses(hits+misses) 847system.l2c.SCUpgradeReq_accesses::cpu1.data 1123 # number of SCUpgradeReq accesses(hits+misses) 848system.l2c.SCUpgradeReq_accesses::total 2332 # number of SCUpgradeReq accesses(hits+misses) 849system.l2c.ReadExReq_accesses::cpu0.data 225347 # number of ReadExReq accesses(hits+misses) | 842system.l2c.UpgradeReq_accesses::cpu0.data 3106 # number of UpgradeReq accesses(hits+misses) 843system.l2c.UpgradeReq_accesses::cpu1.data 2746 # number of UpgradeReq accesses(hits+misses) 844system.l2c.UpgradeReq_accesses::total 5852 # number of UpgradeReq accesses(hits+misses) 845system.l2c.SCUpgradeReq_accesses::cpu0.data 1187 # number of SCUpgradeReq accesses(hits+misses) 846system.l2c.SCUpgradeReq_accesses::cpu1.data 1122 # number of SCUpgradeReq accesses(hits+misses) 847system.l2c.SCUpgradeReq_accesses::total 2309 # number of SCUpgradeReq accesses(hits+misses) 848system.l2c.ReadExReq_accesses::cpu0.data 225285 # number of ReadExReq accesses(hits+misses) |
850system.l2c.ReadExReq_accesses::cpu1.data 67671 # number of ReadExReq accesses(hits+misses) | 849system.l2c.ReadExReq_accesses::cpu1.data 67671 # number of ReadExReq accesses(hits+misses) |
851system.l2c.ReadExReq_accesses::total 293018 # number of ReadExReq accesses(hits+misses) | 850system.l2c.ReadExReq_accesses::total 292956 # number of ReadExReq accesses(hits+misses) |
852system.l2c.ReadCleanReq_accesses::cpu0.inst 618918 # number of ReadCleanReq accesses(hits+misses) 853system.l2c.ReadCleanReq_accesses::cpu1.inst 381188 # number of ReadCleanReq accesses(hits+misses) 854system.l2c.ReadCleanReq_accesses::total 1000106 # number of ReadCleanReq accesses(hits+misses) | 851system.l2c.ReadCleanReq_accesses::cpu0.inst 618918 # number of ReadCleanReq accesses(hits+misses) 852system.l2c.ReadCleanReq_accesses::cpu1.inst 381188 # number of ReadCleanReq accesses(hits+misses) 853system.l2c.ReadCleanReq_accesses::total 1000106 # number of ReadCleanReq accesses(hits+misses) |
855system.l2c.ReadSharedReq_accesses::cpu0.data 1553331 # number of ReadSharedReq accesses(hits+misses) 856system.l2c.ReadSharedReq_accesses::cpu1.data 130045 # number of ReadSharedReq accesses(hits+misses) 857system.l2c.ReadSharedReq_accesses::total 1683376 # number of ReadSharedReq accesses(hits+misses) | 854system.l2c.ReadSharedReq_accesses::cpu0.data 1552867 # number of ReadSharedReq accesses(hits+misses) 855system.l2c.ReadSharedReq_accesses::cpu1.data 129826 # number of ReadSharedReq accesses(hits+misses) 856system.l2c.ReadSharedReq_accesses::total 1682693 # number of ReadSharedReq accesses(hits+misses) |
858system.l2c.demand_accesses::cpu0.inst 618918 # number of demand (read+write) accesses | 857system.l2c.demand_accesses::cpu0.inst 618918 # number of demand (read+write) accesses |
859system.l2c.demand_accesses::cpu0.data 1778678 # number of demand (read+write) accesses | 858system.l2c.demand_accesses::cpu0.data 1778152 # number of demand (read+write) accesses |
860system.l2c.demand_accesses::cpu1.inst 381188 # number of demand (read+write) accesses | 859system.l2c.demand_accesses::cpu1.inst 381188 # number of demand (read+write) accesses |
861system.l2c.demand_accesses::cpu1.data 197716 # number of demand (read+write) accesses 862system.l2c.demand_accesses::total 2976500 # number of demand (read+write) accesses | 860system.l2c.demand_accesses::cpu1.data 197497 # number of demand (read+write) accesses 861system.l2c.demand_accesses::total 2975755 # number of demand (read+write) accesses |
863system.l2c.overall_accesses::cpu0.inst 618918 # number of overall (read+write) accesses | 862system.l2c.overall_accesses::cpu0.inst 618918 # number of overall (read+write) accesses |
864system.l2c.overall_accesses::cpu0.data 1778678 # number of overall (read+write) accesses | 863system.l2c.overall_accesses::cpu0.data 1778152 # number of overall (read+write) accesses |
865system.l2c.overall_accesses::cpu1.inst 381188 # number of overall (read+write) accesses | 864system.l2c.overall_accesses::cpu1.inst 381188 # number of overall (read+write) accesses |
866system.l2c.overall_accesses::cpu1.data 197716 # number of overall (read+write) accesses 867system.l2c.overall_accesses::total 2976500 # number of overall (read+write) accesses 868system.l2c.UpgradeReq_miss_rate::cpu0.data 0.958320 # miss rate for UpgradeReq accesses 869system.l2c.UpgradeReq_miss_rate::cpu1.data 0.780443 # miss rate for UpgradeReq accesses 870system.l2c.UpgradeReq_miss_rate::total 0.874957 # miss rate for UpgradeReq accesses 871system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.963606 # miss rate for SCUpgradeReq accesses 872system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.975067 # miss rate for SCUpgradeReq accesses 873system.l2c.SCUpgradeReq_miss_rate::total 0.969125 # miss rate for SCUpgradeReq accesses 874system.l2c.ReadExReq_miss_rate::cpu0.data 0.505314 # miss rate for ReadExReq accesses 875system.l2c.ReadExReq_miss_rate::cpu1.data 0.163526 # miss rate for ReadExReq accesses 876system.l2c.ReadExReq_miss_rate::total 0.426380 # miss rate for ReadExReq accesses | 865system.l2c.overall_accesses::cpu1.data 197497 # number of overall (read+write) accesses 866system.l2c.overall_accesses::total 2975755 # number of overall (read+write) accesses 867system.l2c.UpgradeReq_miss_rate::cpu0.data 0.001288 # miss rate for UpgradeReq accesses 868system.l2c.UpgradeReq_miss_rate::cpu1.data 0.000728 # miss rate for UpgradeReq accesses 869system.l2c.UpgradeReq_miss_rate::total 0.001025 # miss rate for UpgradeReq accesses 870system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.000891 # miss rate for SCUpgradeReq accesses 871system.l2c.SCUpgradeReq_miss_rate::total 0.000433 # miss rate for SCUpgradeReq accesses 872system.l2c.ReadExReq_miss_rate::cpu0.data 0.502950 # miss rate for ReadExReq accesses 873system.l2c.ReadExReq_miss_rate::cpu1.data 0.163201 # miss rate for ReadExReq accesses 874system.l2c.ReadExReq_miss_rate::total 0.424470 # miss rate for ReadExReq accesses |
877system.l2c.ReadCleanReq_miss_rate::cpu0.inst 0.019143 # miss rate for ReadCleanReq accesses 878system.l2c.ReadCleanReq_miss_rate::cpu1.inst 0.004350 # miss rate for ReadCleanReq accesses 879system.l2c.ReadCleanReq_miss_rate::total 0.013505 # miss rate for ReadCleanReq accesses | 875system.l2c.ReadCleanReq_miss_rate::cpu0.inst 0.019143 # miss rate for ReadCleanReq accesses 876system.l2c.ReadCleanReq_miss_rate::cpu1.inst 0.004350 # miss rate for ReadCleanReq accesses 877system.l2c.ReadCleanReq_miss_rate::total 0.013505 # miss rate for ReadCleanReq accesses |
880system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.596534 # miss rate for ReadSharedReq accesses 881system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.007959 # miss rate for ReadSharedReq accesses 882system.l2c.ReadSharedReq_miss_rate::total 0.551065 # miss rate for ReadSharedReq accesses | 878system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.596713 # miss rate for ReadSharedReq accesses 879system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.007980 # miss rate for ReadSharedReq accesses 880system.l2c.ReadSharedReq_miss_rate::total 0.551290 # miss rate for ReadSharedReq accesses |
883system.l2c.demand_miss_rate::cpu0.inst 0.019143 # miss rate for demand accesses | 881system.l2c.demand_miss_rate::cpu0.inst 0.019143 # miss rate for demand accesses |
884system.l2c.demand_miss_rate::cpu0.data 0.584977 # miss rate for demand accesses | 882system.l2c.demand_miss_rate::cpu0.data 0.584834 # miss rate for demand accesses |
885system.l2c.demand_miss_rate::cpu1.inst 0.004350 # miss rate for demand accesses | 883system.l2c.demand_miss_rate::cpu1.inst 0.004350 # miss rate for demand accesses |
886system.l2c.demand_miss_rate::cpu1.data 0.061204 # miss rate for demand accesses 887system.l2c.demand_miss_rate::total 0.358170 # miss rate for demand accesses | 884system.l2c.demand_miss_rate::cpu1.data 0.061165 # miss rate for demand accesses 885system.l2c.demand_miss_rate::total 0.358063 # miss rate for demand accesses |
888system.l2c.overall_miss_rate::cpu0.inst 0.019143 # miss rate for overall accesses | 886system.l2c.overall_miss_rate::cpu0.inst 0.019143 # miss rate for overall accesses |
889system.l2c.overall_miss_rate::cpu0.data 0.584977 # miss rate for overall accesses | 887system.l2c.overall_miss_rate::cpu0.data 0.584834 # miss rate for overall accesses |
890system.l2c.overall_miss_rate::cpu1.inst 0.004350 # miss rate for overall accesses | 888system.l2c.overall_miss_rate::cpu1.inst 0.004350 # miss rate for overall accesses |
891system.l2c.overall_miss_rate::cpu1.data 0.061204 # miss rate for overall accesses 892system.l2c.overall_miss_rate::total 0.358170 # miss rate for overall accesses | 889system.l2c.overall_miss_rate::cpu1.data 0.061165 # miss rate for overall accesses 890system.l2c.overall_miss_rate::total 0.358063 # miss rate for overall accesses |
893system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 894system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 895system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 896system.l2c.blocked::no_targets 0 # number of cycles access was blocked 897system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 898system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 891system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 892system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 893system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 894system.l2c.blocked::no_targets 0 # number of cycles access was blocked 895system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 896system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
899system.l2c.writebacks::writebacks 80923 # number of writebacks 900system.l2c.writebacks::total 80923 # number of writebacks 901system.membus.snoop_filter.tot_requests 2182334 # Total number of requests made to the snoop filter. 902system.membus.snoop_filter.hit_single_requests 1076327 # Number of requests hitting in the snoop filter with a single holder of the requested data. | 897system.l2c.writebacks::writebacks 80947 # number of writebacks 898system.l2c.writebacks::total 80947 # number of writebacks 899system.membus.snoop_filter.tot_requests 2174394 # Total number of requests made to the snoop filter. 900system.membus.snoop_filter.hit_single_requests 1068384 # Number of requests hitting in the snoop filter with a single holder of the requested data. |
903system.membus.snoop_filter.hit_multi_requests 430 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 904system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 905system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 906system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 907system.membus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 908system.membus.trans_dist::ReadReq 7449 # Transaction distribution | 901system.membus.snoop_filter.hit_multi_requests 430 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 902system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 903system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 904system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 905system.membus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 906system.membus.trans_dist::ReadReq 7449 # Transaction distribution |
909system.membus.trans_dist::ReadResp 948784 # Transaction distribution | 907system.membus.trans_dist::ReadResp 948786 # Transaction distribution |
910system.membus.trans_dist::WriteReq 14588 # Transaction distribution 911system.membus.trans_dist::WriteResp 14588 # Transaction distribution | 908system.membus.trans_dist::WriteReq 14588 # Transaction distribution 909system.membus.trans_dist::WriteResp 14588 # Transaction distribution |
912system.membus.trans_dist::WritebackDirty 122443 # Transaction distribution 913system.membus.trans_dist::CleanEvict 918012 # Transaction distribution 914system.membus.trans_dist::UpgradeReq 19594 # Transaction distribution 915system.membus.trans_dist::SCUpgradeReq 14154 # Transaction distribution 916system.membus.trans_dist::UpgradeResp 8111 # Transaction distribution 917system.membus.trans_dist::ReadExReq 125244 # Transaction distribution 918system.membus.trans_dist::ReadExResp 124222 # Transaction distribution 919system.membus.trans_dist::ReadSharedReq 941335 # Transaction distribution | 910system.membus.trans_dist::WritebackDirty 122467 # Transaction distribution 911system.membus.trans_dist::CleanEvict 918018 # Transaction distribution 912system.membus.trans_dist::UpgradeReq 13880 # Transaction distribution 913system.membus.trans_dist::SCUpgradeReq 11895 # Transaction distribution 914system.membus.trans_dist::UpgradeResp 135 # Transaction distribution 915system.membus.trans_dist::ReadExReq 125245 # Transaction distribution 916system.membus.trans_dist::ReadExResp 124223 # Transaction distribution 917system.membus.trans_dist::ReadSharedReq 941337 # Transaction distribution |
920system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution 921system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution 922system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 44074 # Packet count per connected master and slave (bytes) | 918system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution 919system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution 920system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 44074 # Packet count per connected master and slave (bytes) |
923system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 3172393 # Packet count per connected master and slave (bytes) 924system.membus.pkt_count_system.l2c.mem_side::total 3216467 # Packet count per connected master and slave (bytes) | 921system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 3156480 # Packet count per connected master and slave (bytes) 922system.membus.pkt_count_system.l2c.mem_side::total 3200554 # Packet count per connected master and slave (bytes) |
925system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 125161 # Packet count per connected master and slave (bytes) 926system.membus.pkt_count_system.iocache.mem_side::total 125161 # Packet count per connected master and slave (bytes) | 923system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 125161 # Packet count per connected master and slave (bytes) 924system.membus.pkt_count_system.iocache.mem_side::total 125161 # Packet count per connected master and slave (bytes) |
927system.membus.pkt_count::total 3341628 # Packet count per connected master and slave (bytes) | 925system.membus.pkt_count::total 3325715 # Packet count per connected master and slave (bytes) |
928system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 86162 # Cumulative packet size per connected master and slave (bytes) | 926system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 86162 # Cumulative packet size per connected master and slave (bytes) |
929system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 73363264 # Cumulative packet size per connected master and slave (bytes) 930system.membus.pkt_size_system.l2c.mem_side::total 73449426 # Cumulative packet size per connected master and slave (bytes) | 927system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 73364992 # Cumulative packet size per connected master and slave (bytes) 928system.membus.pkt_size_system.l2c.mem_side::total 73451154 # Cumulative packet size per connected master and slave (bytes) |
931system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2668736 # Cumulative packet size per connected master and slave (bytes) 932system.membus.pkt_size_system.iocache.mem_side::total 2668736 # Cumulative packet size per connected master and slave (bytes) | 929system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2668736 # Cumulative packet size per connected master and slave (bytes) 930system.membus.pkt_size_system.iocache.mem_side::total 2668736 # Cumulative packet size per connected master and slave (bytes) |
933system.membus.pkt_size::total 76118162 # Cumulative packet size per connected master and slave (bytes) | 931system.membus.pkt_size::total 76119890 # Cumulative packet size per connected master and slave (bytes) |
934system.membus.snoops 0 # Total snoops (count) 935system.membus.snoopTraffic 0 # Total snoop traffic (bytes) | 932system.membus.snoops 0 # Total snoops (count) 933system.membus.snoopTraffic 0 # Total snoop traffic (bytes) |
936system.membus.snoop_fanout::samples 2204371 # Request fanout histogram 937system.membus.snoop_fanout::mean 0.000517 # Request fanout histogram 938system.membus.snoop_fanout::stdev 0.022725 # Request fanout histogram | 934system.membus.snoop_fanout::samples 2196431 # Request fanout histogram 935system.membus.snoop_fanout::mean 0.000519 # Request fanout histogram 936system.membus.snoop_fanout::stdev 0.022766 # Request fanout histogram |
939system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram | 937system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram |
940system.membus.snoop_fanout::0 2203232 99.95% 99.95% # Request fanout histogram | 938system.membus.snoop_fanout::0 2195292 99.95% 99.95% # Request fanout histogram |
941system.membus.snoop_fanout::1 1139 0.05% 100.00% # Request fanout histogram 942system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 943system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 944system.membus.snoop_fanout::min_value 0 # Request fanout histogram 945system.membus.snoop_fanout::max_value 1 # Request fanout histogram | 939system.membus.snoop_fanout::1 1139 0.05% 100.00% # Request fanout histogram 940system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 941system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 942system.membus.snoop_fanout::min_value 0 # Request fanout histogram 943system.membus.snoop_fanout::max_value 1 # Request fanout histogram |
946system.membus.snoop_fanout::total 2204371 # Request fanout histogram | 944system.membus.snoop_fanout::total 2196431 # Request fanout histogram |
947system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states | 945system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
948system.toL2Bus.snoop_filter.tot_requests 6035847 # Total number of requests made to the snoop filter. 949system.toL2Bus.snoop_filter.hit_single_requests 3018700 # Number of requests hitting in the snoop filter with a single holder of the requested data. | 946system.toL2Bus.snoop_filter.tot_requests 6035809 # Total number of requests made to the snoop filter. 947system.toL2Bus.snoop_filter.hit_single_requests 3018662 # Number of requests hitting in the snoop filter with a single holder of the requested data. |
950system.toL2Bus.snoop_filter.hit_multi_requests 374456 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. | 948system.toL2Bus.snoop_filter.hit_multi_requests 374456 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. |
951system.toL2Bus.snoop_filter.tot_snoops 1611 # Total number of snoops made to the snoop filter. 952system.toL2Bus.snoop_filter.hit_single_snoops 1521 # Number of snoops hitting in the snoop filter with a single holder of the requested data. | 949system.toL2Bus.snoop_filter.tot_snoops 1621 # Total number of snoops made to the snoop filter. 950system.toL2Bus.snoop_filter.hit_single_snoops 1531 # Number of snoops hitting in the snoop filter with a single holder of the requested data. |
953system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 954system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 955system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 956system.toL2Bus.trans_dist::ReadResp 2732152 # Transaction distribution 957system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 958system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution | 951system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 952system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 953system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 954system.toL2Bus.trans_dist::ReadResp 2732152 # Transaction distribution 955system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 956system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution |
959system.toL2Bus.trans_dist::WritebackDirty 777662 # Transaction distribution | 957system.toL2Bus.trans_dist::WritebackDirty 778757 # Transaction distribution |
960system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution | 958system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution |
961system.toL2Bus.trans_dist::CleanEvict 1205462 # Transaction distribution 962system.toL2Bus.trans_dist::UpgradeReq 19613 # Transaction distribution 963system.toL2Bus.trans_dist::SCUpgradeReq 14226 # Transaction distribution 964system.toL2Bus.trans_dist::UpgradeResp 33839 # Transaction distribution | 959system.toL2Bus.trans_dist::CleanEvict 1204367 # Transaction distribution 960system.toL2Bus.trans_dist::UpgradeReq 19598 # Transaction distribution 961system.toL2Bus.trans_dist::SCUpgradeReq 14203 # Transaction distribution 962system.toL2Bus.trans_dist::UpgradeResp 33801 # Transaction distribution |
965system.toL2Bus.trans_dist::ReadExReq 295242 # Transaction distribution 966system.toL2Bus.trans_dist::ReadExResp 295242 # Transaction distribution 967system.toL2Bus.trans_dist::ReadCleanReq 1000127 # Transaction distribution 968system.toL2Bus.trans_dist::ReadSharedReq 1724576 # Transaction distribution 969system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1856170 # Packet count per connected master and slave (bytes) | 963system.toL2Bus.trans_dist::ReadExReq 295242 # Transaction distribution 964system.toL2Bus.trans_dist::ReadExResp 295242 # Transaction distribution 965system.toL2Bus.trans_dist::ReadCleanReq 1000127 # Transaction distribution 966system.toL2Bus.trans_dist::ReadSharedReq 1724576 # Transaction distribution 967system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1856170 # Packet count per connected master and slave (bytes) |
970system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 5450127 # Packet count per connected master and slave (bytes) | 968system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 5450061 # Packet count per connected master and slave (bytes) |
971system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 1143023 # Packet count per connected master and slave (bytes) | 969system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 1143023 # Packet count per connected master and slave (bytes) |
972system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 684385 # Packet count per connected master and slave (bytes) 973system.toL2Bus.pkt_count::total 9133705 # Packet count per connected master and slave (bytes) | 970system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 684375 # Packet count per connected master and slave (bytes) 971system.toL2Bus.pkt_count::total 9133629 # Packet count per connected master and slave (bytes) |
974system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 79182784 # Cumulative packet size per connected master and slave (bytes) | 972system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 79182784 # Cumulative packet size per connected master and slave (bytes) |
975system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 155766459 # Cumulative packet size per connected master and slave (bytes) | 973system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 155817595 # Cumulative packet size per connected master and slave (bytes) |
976system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 48757440 # Cumulative packet size per connected master and slave (bytes) | 974system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 48757440 # Cumulative packet size per connected master and slave (bytes) |
977system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 23358423 # Cumulative packet size per connected master and slave (bytes) 978system.toL2Bus.pkt_size::total 307065106 # Cumulative packet size per connected master and slave (bytes) 979system.toL2Bus.snoops 1000943 # Total snoops (count) 980system.toL2Bus.snoopTraffic 5195776 # Total snoop traffic (bytes) 981system.toL2Bus.snoop_fanout::samples 7058663 # Request fanout histogram 982system.toL2Bus.snoop_fanout::mean 0.106768 # Request fanout histogram 983system.toL2Bus.snoop_fanout::stdev 0.309067 # Request fanout histogram | 975system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 23377367 # Cumulative packet size per connected master and slave (bytes) 976system.toL2Bus.pkt_size::total 307135186 # Cumulative packet size per connected master and slave (bytes) 977system.toL2Bus.snoops 1000983 # Total snoops (count) 978system.toL2Bus.snoopTraffic 5197312 # Total snoop traffic (bytes) 979system.toL2Bus.snoop_fanout::samples 7058665 # Request fanout histogram 980system.toL2Bus.snoop_fanout::mean 0.106769 # Request fanout histogram 981system.toL2Bus.snoop_fanout::stdev 0.309069 # Request fanout histogram |
984system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram | 982system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram |
985system.toL2Bus.snoop_fanout::0 6305567 89.33% 89.33% # Request fanout histogram 986system.toL2Bus.snoop_fanout::1 752556 10.66% 99.99% # Request fanout histogram | 983system.toL2Bus.snoop_fanout::0 6305559 89.33% 89.33% # Request fanout histogram 984system.toL2Bus.snoop_fanout::1 752566 10.66% 99.99% # Request fanout histogram |
987system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 988system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 989system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 990system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 991system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 992system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram | 985system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 986system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 987system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 988system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 989system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 990system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram |
993system.toL2Bus.snoop_fanout::total 7058663 # Request fanout histogram | 991system.toL2Bus.snoop_fanout::total 7058665 # Request fanout histogram |
994system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 995system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 996system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 997system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 998system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 999system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 1000system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 1001system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA --- 52 unchanged lines hidden --- | 992system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 993system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 994system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 995system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 996system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 997system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 998system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 999system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA --- 52 unchanged lines hidden --- |