| stats.txt (11502:e273e86a873d) | stats.txt (11530:6e143fd2cabf) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357999000 # Number of ticks simulated 5final_tick 1869357999000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357999000 # Number of ticks simulated 5final_tick 1869357999000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1770526 # Simulator instruction rate (inst/s) 8host_op_rate 1770526 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 50919239991 # Simulator tick rate (ticks/s) 10host_mem_usage 331076 # Number of bytes of host memory used 11host_seconds 36.71 # Real time elapsed on the host | 7host_inst_rate 2674040 # Simulator instruction rate (inst/s) 8host_op_rate 2674039 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 76903724257 # Simulator tick rate (ticks/s) 10host_mem_usage 377772 # Number of bytes of host memory used 11host_seconds 24.31 # Real time elapsed on the host |
| 12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks | 12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks |
| 16system.physmem.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 16system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu0.data 66535616 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.data 766336 # Number of bytes read from this memory 20system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 21system.physmem.bytes_read::total 68167296 # Number of bytes read from this memory 22system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 23system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory --- 21 unchanged lines hidden (view full) --- 45system.physmem.bw_write::total 4192002 # Write bandwidth from this memory (bytes/s) 46system.physmem.bw_total::writebacks 4192002 # Total bandwidth to/from this memory (bytes/s) 47system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu0.data 35592763 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu1.data 409946 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.bw_total::total 40657620 # Total bandwidth to/from this memory (bytes/s) | 17system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu0.data 66535616 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 20system.physmem.bytes_read::cpu1.data 766336 # Number of bytes read from this memory 21system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 22system.physmem.bytes_read::total 68167296 # Number of bytes read from this memory 23system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 24system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory --- 21 unchanged lines hidden (view full) --- 46system.physmem.bw_write::total 4192002 # Write bandwidth from this memory (bytes/s) 47system.physmem.bw_total::writebacks 4192002 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu0.data 35592763 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::cpu1.data 409946 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) 53system.physmem.bw_total::total 40657620 # Total bandwidth to/from this memory (bytes/s) |
| 54system.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 55system.bridge.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 53system.cpu_clk_domain.clock 500 # Clock period in ticks 54system.cpu0.dtb.fetch_hits 0 # ITB hits 55system.cpu0.dtb.fetch_misses 0 # ITB misses 56system.cpu0.dtb.fetch_acv 0 # ITB acv 57system.cpu0.dtb.fetch_accesses 0 # ITB accesses 58system.cpu0.dtb.read_hits 7758808 # DTB read hits 59system.cpu0.dtb.read_misses 7155 # DTB read misses 60system.cpu0.dtb.read_acv 152 # DTB read access violations --- 17 unchanged lines hidden (view full) --- 78system.cpu0.itb.write_hits 0 # DTB write hits 79system.cpu0.itb.write_misses 0 # DTB write misses 80system.cpu0.itb.write_acv 0 # DTB write access violations 81system.cpu0.itb.write_accesses 0 # DTB write accesses 82system.cpu0.itb.data_hits 0 # DTB hits 83system.cpu0.itb.data_misses 0 # DTB misses 84system.cpu0.itb.data_acv 0 # DTB access violations 85system.cpu0.itb.data_accesses 0 # DTB accesses | 56system.cpu_clk_domain.clock 500 # Clock period in ticks 57system.cpu0.dtb.fetch_hits 0 # ITB hits 58system.cpu0.dtb.fetch_misses 0 # ITB misses 59system.cpu0.dtb.fetch_acv 0 # ITB acv 60system.cpu0.dtb.fetch_accesses 0 # ITB accesses 61system.cpu0.dtb.read_hits 7758808 # DTB read hits 62system.cpu0.dtb.read_misses 7155 # DTB read misses 63system.cpu0.dtb.read_acv 152 # DTB read access violations --- 17 unchanged lines hidden (view full) --- 81system.cpu0.itb.write_hits 0 # DTB write hits 82system.cpu0.itb.write_misses 0 # DTB write misses 83system.cpu0.itb.write_acv 0 # DTB write access violations 84system.cpu0.itb.write_accesses 0 # DTB write accesses 85system.cpu0.itb.data_hits 0 # DTB hits 86system.cpu0.itb.data_misses 0 # DTB misses 87system.cpu0.itb.data_acv 0 # DTB access violations 88system.cpu0.itb.data_accesses 0 # DTB accesses |
| 89system.cpu0.numPwrStateTransitions 13588 # Number of power state transitions 90system.cpu0.pwrStateClkGateDist::samples 6794 # Distribution of time spent in the clock gated state 91system.cpu0.pwrStateClkGateDist::mean 271506704.857374 # Distribution of time spent in the clock gated state 92system.cpu0.pwrStateClkGateDist::stdev 434955692.191892 # Distribution of time spent in the clock gated state 93system.cpu0.pwrStateClkGateDist::1000-5e+10 6794 100.00% 100.00% # Distribution of time spent in the clock gated state 94system.cpu0.pwrStateClkGateDist::min_value 21000 # Distribution of time spent in the clock gated state 95system.cpu0.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state 96system.cpu0.pwrStateClkGateDist::total 6794 # Distribution of time spent in the clock gated state 97system.cpu0.pwrStateResidencyTicks::ON 24741446199 # Cumulative time (in ticks) in various power states 98system.cpu0.pwrStateResidencyTicks::CLK_GATED 1844616552801 # Cumulative time (in ticks) in various power states |
|
| 86system.cpu0.numCycles 3738722793 # number of cpu cycles simulated 87system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 88system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 89system.cpu0.kern.inst.arm 0 # number of arm instructions executed 90system.cpu0.kern.inst.quiesce 6794 # number of quiesce instructions executed 91system.cpu0.kern.inst.hwrei 150435 # number of hwrei instructions executed 92system.cpu0.kern.ipl_count::0 51398 40.00% 40.00% # number of times we switched to this ipl 93system.cpu0.kern.ipl_count::21 243 0.19% 40.19% # number of times we switched to this ipl --- 132 unchanged lines hidden (view full) --- 226system.cpu0.op_class::SimdFloatMult 0 0.00% 72.96% # Class of executed instruction 227system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 72.96% # Class of executed instruction 228system.cpu0.op_class::SimdFloatSqrt 0 0.00% 72.96% # Class of executed instruction 229system.cpu0.op_class::MemRead 7945590 16.06% 89.02% # Class of executed instruction 230system.cpu0.op_class::MemWrite 4758292 9.62% 98.63% # Class of executed instruction 231system.cpu0.op_class::IprAccess 675558 1.37% 100.00% # Class of executed instruction 232system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 233system.cpu0.op_class::total 49485886 # Class of executed instruction | 99system.cpu0.numCycles 3738722793 # number of cpu cycles simulated 100system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 101system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 102system.cpu0.kern.inst.arm 0 # number of arm instructions executed 103system.cpu0.kern.inst.quiesce 6794 # number of quiesce instructions executed 104system.cpu0.kern.inst.hwrei 150435 # number of hwrei instructions executed 105system.cpu0.kern.ipl_count::0 51398 40.00% 40.00% # number of times we switched to this ipl 106system.cpu0.kern.ipl_count::21 243 0.19% 40.19% # number of times we switched to this ipl --- 132 unchanged lines hidden (view full) --- 239system.cpu0.op_class::SimdFloatMult 0 0.00% 72.96% # Class of executed instruction 240system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 72.96% # Class of executed instruction 241system.cpu0.op_class::SimdFloatSqrt 0 0.00% 72.96% # Class of executed instruction 242system.cpu0.op_class::MemRead 7945590 16.06% 89.02% # Class of executed instruction 243system.cpu0.op_class::MemWrite 4758292 9.62% 98.63% # Class of executed instruction 244system.cpu0.op_class::IprAccess 675558 1.37% 100.00% # Class of executed instruction 245system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 246system.cpu0.op_class::total 49485886 # Class of executed instruction |
| 247system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 234system.cpu0.dcache.tags.replacements 1781367 # number of replacements 235system.cpu0.dcache.tags.tagsinuse 506.187330 # Cycle average of tags in use 236system.cpu0.dcache.tags.total_refs 10705767 # Total number of references to valid blocks. 237system.cpu0.dcache.tags.sampled_refs 1781879 # Sample count of references to valid blocks. 238system.cpu0.dcache.tags.avg_refs 6.008134 # Average number of references to valid blocks. 239system.cpu0.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 240system.cpu0.dcache.tags.occ_blocks::cpu0.data 506.187330 # Average occupied blocks per requestor 241system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988647 # Average percentage of cache occupancy 242system.cpu0.dcache.tags.occ_percent::total 0.988647 # Average percentage of cache occupancy 243system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 244system.cpu0.dcache.tags.age_task_id_blocks_1024::0 446 # Occupied blocks per task id 245system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 246system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 247system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 248system.cpu0.dcache.tags.tag_accesses 51822038 # Number of tag accesses 249system.cpu0.dcache.tags.data_accesses 51822038 # Number of data accesses | 248system.cpu0.dcache.tags.replacements 1781367 # number of replacements 249system.cpu0.dcache.tags.tagsinuse 506.187330 # Cycle average of tags in use 250system.cpu0.dcache.tags.total_refs 10705767 # Total number of references to valid blocks. 251system.cpu0.dcache.tags.sampled_refs 1781879 # Sample count of references to valid blocks. 252system.cpu0.dcache.tags.avg_refs 6.008134 # Average number of references to valid blocks. 253system.cpu0.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 254system.cpu0.dcache.tags.occ_blocks::cpu0.data 506.187330 # Average occupied blocks per requestor 255system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988647 # Average percentage of cache occupancy 256system.cpu0.dcache.tags.occ_percent::total 0.988647 # Average percentage of cache occupancy 257system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 258system.cpu0.dcache.tags.age_task_id_blocks_1024::0 446 # Occupied blocks per task id 259system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 260system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 261system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 262system.cpu0.dcache.tags.tag_accesses 51822038 # Number of tag accesses 263system.cpu0.dcache.tags.data_accesses 51822038 # Number of data accesses |
| 264system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 250system.cpu0.dcache.ReadReq_hits::cpu0.data 6068885 # number of ReadReq hits 251system.cpu0.dcache.ReadReq_hits::total 6068885 # number of ReadReq hits 252system.cpu0.dcache.WriteReq_hits::cpu0.data 4360085 # number of WriteReq hits 253system.cpu0.dcache.WriteReq_hits::total 4360085 # number of WriteReq hits 254system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 255system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits 256system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132849 # number of StoreCondReq hits 257system.cpu0.dcache.StoreCondReq_hits::total 132849 # number of StoreCondReq hits --- 40 unchanged lines hidden (view full) --- 298system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 299system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 300system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 301system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 302system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 303system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 304system.cpu0.dcache.writebacks::writebacks 633126 # number of writebacks 305system.cpu0.dcache.writebacks::total 633126 # number of writebacks | 265system.cpu0.dcache.ReadReq_hits::cpu0.data 6068885 # number of ReadReq hits 266system.cpu0.dcache.ReadReq_hits::total 6068885 # number of ReadReq hits 267system.cpu0.dcache.WriteReq_hits::cpu0.data 4360085 # number of WriteReq hits 268system.cpu0.dcache.WriteReq_hits::total 4360085 # number of WriteReq hits 269system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 270system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits 271system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132849 # number of StoreCondReq hits 272system.cpu0.dcache.StoreCondReq_hits::total 132849 # number of StoreCondReq hits --- 40 unchanged lines hidden (view full) --- 313system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 314system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 315system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 316system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 317system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 318system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 319system.cpu0.dcache.writebacks::writebacks 633126 # number of writebacks 320system.cpu0.dcache.writebacks::total 633126 # number of writebacks |
| 321system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 306system.cpu0.icache.tags.replacements 618292 # number of replacements 307system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 308system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 309system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 310system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 311system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 312system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 313system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy 314system.cpu0.icache.tags.occ_percent::total 0.998517 # Average percentage of cache occupancy 315system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 316system.cpu0.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 317system.cpu0.icache.tags.age_task_id_blocks_1024::1 116 # Occupied blocks per task id 318system.cpu0.icache.tags.age_task_id_blocks_1024::2 333 # Occupied blocks per task id 319system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 320system.cpu0.icache.tags.tag_accesses 50104825 # Number of tag accesses 321system.cpu0.icache.tags.data_accesses 50104825 # Number of data accesses | 322system.cpu0.icache.tags.replacements 618292 # number of replacements 323system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 324system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 325system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 326system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 327system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 328system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 329system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy 330system.cpu0.icache.tags.occ_percent::total 0.998517 # Average percentage of cache occupancy 331system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 332system.cpu0.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 333system.cpu0.icache.tags.age_task_id_blocks_1024::1 116 # Occupied blocks per task id 334system.cpu0.icache.tags.age_task_id_blocks_1024::2 333 # Occupied blocks per task id 335system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 336system.cpu0.icache.tags.tag_accesses 50104825 # Number of tag accesses 337system.cpu0.icache.tags.data_accesses 50104825 # Number of data accesses |
| 338system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 322system.cpu0.icache.ReadReq_hits::cpu0.inst 48866947 # number of ReadReq hits 323system.cpu0.icache.ReadReq_hits::total 48866947 # number of ReadReq hits 324system.cpu0.icache.demand_hits::cpu0.inst 48866947 # number of demand (read+write) hits 325system.cpu0.icache.demand_hits::total 48866947 # number of demand (read+write) hits 326system.cpu0.icache.overall_hits::cpu0.inst 48866947 # number of overall hits 327system.cpu0.icache.overall_hits::total 48866947 # number of overall hits 328system.cpu0.icache.ReadReq_misses::cpu0.inst 618939 # number of ReadReq misses 329system.cpu0.icache.ReadReq_misses::total 618939 # number of ReadReq misses --- 48 unchanged lines hidden (view full) --- 378system.cpu1.itb.write_hits 0 # DTB write hits 379system.cpu1.itb.write_misses 0 # DTB write misses 380system.cpu1.itb.write_acv 0 # DTB write access violations 381system.cpu1.itb.write_accesses 0 # DTB write accesses 382system.cpu1.itb.data_hits 0 # DTB hits 383system.cpu1.itb.data_misses 0 # DTB misses 384system.cpu1.itb.data_acv 0 # DTB access violations 385system.cpu1.itb.data_accesses 0 # DTB accesses | 339system.cpu0.icache.ReadReq_hits::cpu0.inst 48866947 # number of ReadReq hits 340system.cpu0.icache.ReadReq_hits::total 48866947 # number of ReadReq hits 341system.cpu0.icache.demand_hits::cpu0.inst 48866947 # number of demand (read+write) hits 342system.cpu0.icache.demand_hits::total 48866947 # number of demand (read+write) hits 343system.cpu0.icache.overall_hits::cpu0.inst 48866947 # number of overall hits 344system.cpu0.icache.overall_hits::total 48866947 # number of overall hits 345system.cpu0.icache.ReadReq_misses::cpu0.inst 618939 # number of ReadReq misses 346system.cpu0.icache.ReadReq_misses::total 618939 # number of ReadReq misses --- 48 unchanged lines hidden (view full) --- 395system.cpu1.itb.write_hits 0 # DTB write hits 396system.cpu1.itb.write_misses 0 # DTB write misses 397system.cpu1.itb.write_acv 0 # DTB write access violations 398system.cpu1.itb.write_accesses 0 # DTB write accesses 399system.cpu1.itb.data_hits 0 # DTB hits 400system.cpu1.itb.data_misses 0 # DTB misses 401system.cpu1.itb.data_acv 0 # DTB access violations 402system.cpu1.itb.data_accesses 0 # DTB accesses |
| 403system.cpu1.numPwrStateTransitions 5407 # Number of power state transitions 404system.cpu1.pwrStateClkGateDist::samples 2704 # Distribution of time spent in the clock gated state 405system.cpu1.pwrStateClkGateDist::mean 688459933.247041 # Distribution of time spent in the clock gated state 406system.cpu1.pwrStateClkGateDist::stdev 437290592.854298 # Distribution of time spent in the clock gated state 407system.cpu1.pwrStateClkGateDist::1000-5e+10 2704 100.00% 100.00% # Distribution of time spent in the clock gated state 408system.cpu1.pwrStateClkGateDist::min_value 400000 # Distribution of time spent in the clock gated state 409system.cpu1.pwrStateClkGateDist::max_value 976035500 # Distribution of time spent in the clock gated state 410system.cpu1.pwrStateClkGateDist::total 2704 # Distribution of time spent in the clock gated state 411system.cpu1.pwrStateResidencyTicks::ON 7762339500 # Cumulative time (in ticks) in various power states 412system.cpu1.pwrStateResidencyTicks::CLK_GATED 1861595659500 # Cumulative time (in ticks) in various power states |
|
| 386system.cpu1.numCycles 3738296609 # number of cpu cycles simulated 387system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 388system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 389system.cpu1.kern.inst.arm 0 # number of arm instructions executed 390system.cpu1.kern.inst.quiesce 2704 # number of quiesce instructions executed 391system.cpu1.kern.inst.hwrei 92290 # number of hwrei instructions executed 392system.cpu1.kern.ipl_count::0 31964 39.34% 39.34% # number of times we switched to this ipl 393system.cpu1.kern.ipl_count::22 1906 2.35% 41.68% # number of times we switched to this ipl --- 115 unchanged lines hidden (view full) --- 509system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction 510system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction 511system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction 512system.cpu1.op_class::MemRead 2937016 18.92% 83.66% # Class of executed instruction 513system.cpu1.op_class::MemWrite 2113897 13.62% 97.27% # Class of executed instruction 514system.cpu1.op_class::IprAccess 423253 2.73% 100.00% # Class of executed instruction 515system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 516system.cpu1.op_class::total 15525875 # Class of executed instruction | 413system.cpu1.numCycles 3738296609 # number of cpu cycles simulated 414system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 415system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 416system.cpu1.kern.inst.arm 0 # number of arm instructions executed 417system.cpu1.kern.inst.quiesce 2704 # number of quiesce instructions executed 418system.cpu1.kern.inst.hwrei 92290 # number of hwrei instructions executed 419system.cpu1.kern.ipl_count::0 31964 39.34% 39.34% # number of times we switched to this ipl 420system.cpu1.kern.ipl_count::22 1906 2.35% 41.68% # number of times we switched to this ipl --- 115 unchanged lines hidden (view full) --- 536system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction 537system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction 538system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction 539system.cpu1.op_class::MemRead 2937016 18.92% 83.66% # Class of executed instruction 540system.cpu1.op_class::MemWrite 2113897 13.62% 97.27% # Class of executed instruction 541system.cpu1.op_class::IprAccess 423253 2.73% 100.00% # Class of executed instruction 542system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 543system.cpu1.op_class::total 15525875 # Class of executed instruction |
| 544system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 517system.cpu1.dcache.tags.replacements 201757 # number of replacements 518system.cpu1.dcache.tags.tagsinuse 497.601962 # Cycle average of tags in use 519system.cpu1.dcache.tags.total_refs 4718401 # Total number of references to valid blocks. 520system.cpu1.dcache.tags.sampled_refs 202065 # Sample count of references to valid blocks. 521system.cpu1.dcache.tags.avg_refs 23.350907 # Average number of references to valid blocks. 522system.cpu1.dcache.tags.warmup_cycle 15869420000 # Cycle when the warmup percentage was hit. 523system.cpu1.dcache.tags.occ_blocks::cpu1.data 497.601962 # Average occupied blocks per requestor 524system.cpu1.dcache.tags.occ_percent::cpu1.data 0.971879 # Average percentage of cache occupancy 525system.cpu1.dcache.tags.occ_percent::total 0.971879 # Average percentage of cache occupancy 526system.cpu1.dcache.tags.occ_task_id_blocks::1024 308 # Occupied blocks per task id 527system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 528system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 529system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 530system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 531system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses | 545system.cpu1.dcache.tags.replacements 201757 # number of replacements 546system.cpu1.dcache.tags.tagsinuse 497.601962 # Cycle average of tags in use 547system.cpu1.dcache.tags.total_refs 4718401 # Total number of references to valid blocks. 548system.cpu1.dcache.tags.sampled_refs 202065 # Sample count of references to valid blocks. 549system.cpu1.dcache.tags.avg_refs 23.350907 # Average number of references to valid blocks. 550system.cpu1.dcache.tags.warmup_cycle 15869420000 # Cycle when the warmup percentage was hit. 551system.cpu1.dcache.tags.occ_blocks::cpu1.data 497.601962 # Average occupied blocks per requestor 552system.cpu1.dcache.tags.occ_percent::cpu1.data 0.971879 # Average percentage of cache occupancy 553system.cpu1.dcache.tags.occ_percent::total 0.971879 # Average percentage of cache occupancy 554system.cpu1.dcache.tags.occ_task_id_blocks::1024 308 # Occupied blocks per task id 555system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 556system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 557system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 558system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 559system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses |
| 560system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 532system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 533system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits 534system.cpu1.dcache.WriteReq_hits::cpu1.data 1954643 # number of WriteReq hits 535system.cpu1.dcache.WriteReq_hits::total 1954643 # number of WriteReq hits 536system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 537system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits 538system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64210 # number of StoreCondReq hits 539system.cpu1.dcache.StoreCondReq_hits::total 64210 # number of StoreCondReq hits --- 40 unchanged lines hidden (view full) --- 580system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 581system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 582system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 583system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 584system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 585system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 586system.cpu1.dcache.writebacks::writebacks 144536 # number of writebacks 587system.cpu1.dcache.writebacks::total 144536 # number of writebacks | 561system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 562system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits 563system.cpu1.dcache.WriteReq_hits::cpu1.data 1954643 # number of WriteReq hits 564system.cpu1.dcache.WriteReq_hits::total 1954643 # number of WriteReq hits 565system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 566system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits 567system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64210 # number of StoreCondReq hits 568system.cpu1.dcache.StoreCondReq_hits::total 64210 # number of StoreCondReq hits --- 40 unchanged lines hidden (view full) --- 609system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 610system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 611system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 612system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 613system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 614system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 615system.cpu1.dcache.writebacks::writebacks 144536 # number of writebacks 616system.cpu1.dcache.writebacks::total 144536 # number of writebacks |
| 617system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 588system.cpu1.icache.tags.replacements 380647 # number of replacements 589system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 590system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 591system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 592system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 593system.cpu1.icache.tags.warmup_cycle 1859777195500 # Cycle when the warmup percentage was hit. 594system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 595system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy 596system.cpu1.icache.tags.occ_percent::total 0.885027 # Average percentage of cache occupancy 597system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 598system.cpu1.icache.tags.age_task_id_blocks_1024::2 509 # Occupied blocks per task id 599system.cpu1.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id 600system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 601system.cpu1.icache.tags.tag_accesses 15907063 # Number of tag accesses 602system.cpu1.icache.tags.data_accesses 15907063 # Number of data accesses | 618system.cpu1.icache.tags.replacements 380647 # number of replacements 619system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 620system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 621system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 622system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 623system.cpu1.icache.tags.warmup_cycle 1859777195500 # Cycle when the warmup percentage was hit. 624system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 625system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy 626system.cpu1.icache.tags.occ_percent::total 0.885027 # Average percentage of cache occupancy 627system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 628system.cpu1.icache.tags.age_task_id_blocks_1024::2 509 # Occupied blocks per task id 629system.cpu1.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id 630system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 631system.cpu1.icache.tags.tag_accesses 15907063 # Number of tag accesses 632system.cpu1.icache.tags.data_accesses 15907063 # Number of data accesses |
| 633system.cpu1.icache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 603system.cpu1.icache.ReadReq_hits::cpu1.inst 15144687 # number of ReadReq hits 604system.cpu1.icache.ReadReq_hits::total 15144687 # number of ReadReq hits 605system.cpu1.icache.demand_hits::cpu1.inst 15144687 # number of demand (read+write) hits 606system.cpu1.icache.demand_hits::total 15144687 # number of demand (read+write) hits 607system.cpu1.icache.overall_hits::cpu1.inst 15144687 # number of overall hits 608system.cpu1.icache.overall_hits::total 15144687 # number of overall hits 609system.cpu1.icache.ReadReq_misses::cpu1.inst 381188 # number of ReadReq misses 610system.cpu1.icache.ReadReq_misses::total 381188 # number of ReadReq misses --- 28 unchanged lines hidden (view full) --- 639system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 640system.disk0.dma_write_txs 395 # Number of DMA write transactions. 641system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 642system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 643system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 644system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 645system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 646system.disk2.dma_write_txs 1 # Number of DMA write transactions. | 634system.cpu1.icache.ReadReq_hits::cpu1.inst 15144687 # number of ReadReq hits 635system.cpu1.icache.ReadReq_hits::total 15144687 # number of ReadReq hits 636system.cpu1.icache.demand_hits::cpu1.inst 15144687 # number of demand (read+write) hits 637system.cpu1.icache.demand_hits::total 15144687 # number of demand (read+write) hits 638system.cpu1.icache.overall_hits::cpu1.inst 15144687 # number of overall hits 639system.cpu1.icache.overall_hits::total 15144687 # number of overall hits 640system.cpu1.icache.ReadReq_misses::cpu1.inst 381188 # number of ReadReq misses 641system.cpu1.icache.ReadReq_misses::total 381188 # number of ReadReq misses --- 28 unchanged lines hidden (view full) --- 670system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 671system.disk0.dma_write_txs 395 # Number of DMA write transactions. 672system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 673system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 674system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 675system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 676system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 677system.disk2.dma_write_txs 1 # Number of DMA write transactions. |
| 678system.iobus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 647system.iobus.trans_dist::ReadReq 7628 # Transaction distribution 648system.iobus.trans_dist::ReadResp 7628 # Transaction distribution 649system.iobus.trans_dist::WriteReq 56140 # Transaction distribution 650system.iobus.trans_dist::WriteResp 56140 # Transaction distribution 651system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 14686 # Packet count per connected master and slave (bytes) 652system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes) 653system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 654system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) --- 14 unchanged lines hidden (view full) --- 669system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9018 # Cumulative packet size per connected master and slave (bytes) 670system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 9852 # Cumulative packet size per connected master and slave (bytes) 671system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 672system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 673system.iobus.pkt_size_system.bridge.master::total 86162 # Cumulative packet size per connected master and slave (bytes) 674system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661656 # Cumulative packet size per connected master and slave (bytes) 675system.iobus.pkt_size_system.tsunami.ide.dma::total 2661656 # Cumulative packet size per connected master and slave (bytes) 676system.iobus.pkt_size::total 2747818 # Cumulative packet size per connected master and slave (bytes) | 679system.iobus.trans_dist::ReadReq 7628 # Transaction distribution 680system.iobus.trans_dist::ReadResp 7628 # Transaction distribution 681system.iobus.trans_dist::WriteReq 56140 # Transaction distribution 682system.iobus.trans_dist::WriteResp 56140 # Transaction distribution 683system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 14686 # Packet count per connected master and slave (bytes) 684system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes) 685system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 686system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) --- 14 unchanged lines hidden (view full) --- 701system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9018 # Cumulative packet size per connected master and slave (bytes) 702system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 9852 # Cumulative packet size per connected master and slave (bytes) 703system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 704system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 705system.iobus.pkt_size_system.bridge.master::total 86162 # Cumulative packet size per connected master and slave (bytes) 706system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661656 # Cumulative packet size per connected master and slave (bytes) 707system.iobus.pkt_size_system.tsunami.ide.dma::total 2661656 # Cumulative packet size per connected master and slave (bytes) 708system.iobus.pkt_size::total 2747818 # Cumulative packet size per connected master and slave (bytes) |
| 709system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 677system.iocache.tags.replacements 41699 # number of replacements 678system.iocache.tags.tagsinuse 0.434096 # Cycle average of tags in use 679system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 680system.iocache.tags.sampled_refs 41715 # Sample count of references to valid blocks. 681system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 682system.iocache.tags.warmup_cycle 1685787164517 # Cycle when the warmup percentage was hit. 683system.iocache.tags.occ_blocks::tsunami.ide 0.434096 # Average occupied blocks per requestor 684system.iocache.tags.occ_percent::tsunami.ide 0.027131 # Average percentage of cache occupancy 685system.iocache.tags.occ_percent::total 0.027131 # Average percentage of cache occupancy 686system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 687system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 688system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 689system.iocache.tags.tag_accesses 375579 # Number of tag accesses 690system.iocache.tags.data_accesses 375579 # Number of data accesses | 710system.iocache.tags.replacements 41699 # number of replacements 711system.iocache.tags.tagsinuse 0.434096 # Cycle average of tags in use 712system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 713system.iocache.tags.sampled_refs 41715 # Sample count of references to valid blocks. 714system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 715system.iocache.tags.warmup_cycle 1685787164517 # Cycle when the warmup percentage was hit. 716system.iocache.tags.occ_blocks::tsunami.ide 0.434096 # Average occupied blocks per requestor 717system.iocache.tags.occ_percent::tsunami.ide 0.027131 # Average percentage of cache occupancy 718system.iocache.tags.occ_percent::total 0.027131 # Average percentage of cache occupancy 719system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 720system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 721system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 722system.iocache.tags.tag_accesses 375579 # Number of tag accesses 723system.iocache.tags.data_accesses 375579 # Number of data accesses |
| 724system.iocache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 691system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 692system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 693system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 694system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 695system.iocache.demand_misses::tsunami.ide 41731 # number of demand (read+write) misses 696system.iocache.demand_misses::total 41731 # number of demand (read+write) misses 697system.iocache.overall_misses::tsunami.ide 41731 # number of overall misses 698system.iocache.overall_misses::total 41731 # number of overall misses --- 16 unchanged lines hidden (view full) --- 715system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 716system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 717system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 718system.iocache.blocked::no_targets 0 # number of cycles access was blocked 719system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 720system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 721system.iocache.writebacks::writebacks 41520 # number of writebacks 722system.iocache.writebacks::total 41520 # number of writebacks | 725system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 726system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 727system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 728system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 729system.iocache.demand_misses::tsunami.ide 41731 # number of demand (read+write) misses 730system.iocache.demand_misses::total 41731 # number of demand (read+write) misses 731system.iocache.overall_misses::tsunami.ide 41731 # number of overall misses 732system.iocache.overall_misses::total 41731 # number of overall misses --- 16 unchanged lines hidden (view full) --- 749system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 750system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 751system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 752system.iocache.blocked::no_targets 0 # number of cycles access was blocked 753system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 754system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 755system.iocache.writebacks::writebacks 41520 # number of writebacks 756system.iocache.writebacks::total 41520 # number of writebacks |
| 757system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 723system.l2c.tags.replacements 999922 # number of replacements 724system.l2c.tags.tagsinuse 65337.856710 # Cycle average of tags in use 725system.l2c.tags.total_refs 4259780 # Total number of references to valid blocks. 726system.l2c.tags.sampled_refs 1064972 # Sample count of references to valid blocks. 727system.l2c.tags.avg_refs 3.999899 # Average number of references to valid blocks. 728system.l2c.tags.warmup_cycle 838081000 # Cycle when the warmup percentage was hit. 729system.l2c.tags.occ_blocks::writebacks 55997.404382 # Average occupied blocks per requestor 730system.l2c.tags.occ_blocks::cpu0.inst 4860.296070 # Average occupied blocks per requestor --- 10 unchanged lines hidden (view full) --- 741system.l2c.tags.age_task_id_blocks_1024::0 768 # Occupied blocks per task id 742system.l2c.tags.age_task_id_blocks_1024::1 3271 # Occupied blocks per task id 743system.l2c.tags.age_task_id_blocks_1024::2 6047 # Occupied blocks per task id 744system.l2c.tags.age_task_id_blocks_1024::3 5933 # Occupied blocks per task id 745system.l2c.tags.age_task_id_blocks_1024::4 49031 # Occupied blocks per task id 746system.l2c.tags.occ_task_id_percent::1024 0.992584 # Percentage of cache occupancy per task id 747system.l2c.tags.tag_accesses 46377199 # Number of tag accesses 748system.l2c.tags.data_accesses 46377199 # Number of data accesses | 758system.l2c.tags.replacements 999922 # number of replacements 759system.l2c.tags.tagsinuse 65337.856710 # Cycle average of tags in use 760system.l2c.tags.total_refs 4259780 # Total number of references to valid blocks. 761system.l2c.tags.sampled_refs 1064972 # Sample count of references to valid blocks. 762system.l2c.tags.avg_refs 3.999899 # Average number of references to valid blocks. 763system.l2c.tags.warmup_cycle 838081000 # Cycle when the warmup percentage was hit. 764system.l2c.tags.occ_blocks::writebacks 55997.404382 # Average occupied blocks per requestor 765system.l2c.tags.occ_blocks::cpu0.inst 4860.296070 # Average occupied blocks per requestor --- 10 unchanged lines hidden (view full) --- 776system.l2c.tags.age_task_id_blocks_1024::0 768 # Occupied blocks per task id 777system.l2c.tags.age_task_id_blocks_1024::1 3271 # Occupied blocks per task id 778system.l2c.tags.age_task_id_blocks_1024::2 6047 # Occupied blocks per task id 779system.l2c.tags.age_task_id_blocks_1024::3 5933 # Occupied blocks per task id 780system.l2c.tags.age_task_id_blocks_1024::4 49031 # Occupied blocks per task id 781system.l2c.tags.occ_task_id_percent::1024 0.992584 # Percentage of cache occupancy per task id 782system.l2c.tags.tag_accesses 46377199 # Number of tag accesses 783system.l2c.tags.data_accesses 46377199 # Number of data accesses |
| 784system.l2c.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 749system.l2c.WritebackDirty_hits::writebacks 777662 # number of WritebackDirty hits 750system.l2c.WritebackDirty_hits::total 777662 # number of WritebackDirty hits 751system.l2c.WritebackClean_hits::writebacks 721480 # number of WritebackClean hits 752system.l2c.WritebackClean_hits::total 721480 # number of WritebackClean hits 753system.l2c.UpgradeReq_hits::cpu0.data 130 # number of UpgradeReq hits 754system.l2c.UpgradeReq_hits::cpu1.data 604 # number of UpgradeReq hits 755system.l2c.UpgradeReq_hits::total 734 # number of UpgradeReq hits 756system.l2c.SCUpgradeReq_hits::cpu0.data 44 # number of SCUpgradeReq hits --- 106 unchanged lines hidden (view full) --- 863system.l2c.writebacks::writebacks 80923 # number of writebacks 864system.l2c.writebacks::total 80923 # number of writebacks 865system.membus.snoop_filter.tot_requests 2182334 # Total number of requests made to the snoop filter. 866system.membus.snoop_filter.hit_single_requests 1076327 # Number of requests hitting in the snoop filter with a single holder of the requested data. 867system.membus.snoop_filter.hit_multi_requests 430 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 868system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 869system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 870system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 785system.l2c.WritebackDirty_hits::writebacks 777662 # number of WritebackDirty hits 786system.l2c.WritebackDirty_hits::total 777662 # number of WritebackDirty hits 787system.l2c.WritebackClean_hits::writebacks 721480 # number of WritebackClean hits 788system.l2c.WritebackClean_hits::total 721480 # number of WritebackClean hits 789system.l2c.UpgradeReq_hits::cpu0.data 130 # number of UpgradeReq hits 790system.l2c.UpgradeReq_hits::cpu1.data 604 # number of UpgradeReq hits 791system.l2c.UpgradeReq_hits::total 734 # number of UpgradeReq hits 792system.l2c.SCUpgradeReq_hits::cpu0.data 44 # number of SCUpgradeReq hits --- 106 unchanged lines hidden (view full) --- 899system.l2c.writebacks::writebacks 80923 # number of writebacks 900system.l2c.writebacks::total 80923 # number of writebacks 901system.membus.snoop_filter.tot_requests 2182334 # Total number of requests made to the snoop filter. 902system.membus.snoop_filter.hit_single_requests 1076327 # Number of requests hitting in the snoop filter with a single holder of the requested data. 903system.membus.snoop_filter.hit_multi_requests 430 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 904system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 905system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 906system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 907system.membus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 871system.membus.trans_dist::ReadReq 7449 # Transaction distribution 872system.membus.trans_dist::ReadResp 948784 # Transaction distribution 873system.membus.trans_dist::WriteReq 14588 # Transaction distribution 874system.membus.trans_dist::WriteResp 14588 # Transaction distribution 875system.membus.trans_dist::WritebackDirty 122443 # Transaction distribution 876system.membus.trans_dist::CleanEvict 918012 # Transaction distribution 877system.membus.trans_dist::UpgradeReq 19594 # Transaction distribution 878system.membus.trans_dist::SCUpgradeReq 14154 # Transaction distribution --- 22 unchanged lines hidden (view full) --- 901system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 902system.membus.snoop_fanout::0 2203232 99.95% 99.95% # Request fanout histogram 903system.membus.snoop_fanout::1 1139 0.05% 100.00% # Request fanout histogram 904system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 905system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 906system.membus.snoop_fanout::min_value 0 # Request fanout histogram 907system.membus.snoop_fanout::max_value 1 # Request fanout histogram 908system.membus.snoop_fanout::total 2204371 # Request fanout histogram | 908system.membus.trans_dist::ReadReq 7449 # Transaction distribution 909system.membus.trans_dist::ReadResp 948784 # Transaction distribution 910system.membus.trans_dist::WriteReq 14588 # Transaction distribution 911system.membus.trans_dist::WriteResp 14588 # Transaction distribution 912system.membus.trans_dist::WritebackDirty 122443 # Transaction distribution 913system.membus.trans_dist::CleanEvict 918012 # Transaction distribution 914system.membus.trans_dist::UpgradeReq 19594 # Transaction distribution 915system.membus.trans_dist::SCUpgradeReq 14154 # Transaction distribution --- 22 unchanged lines hidden (view full) --- 938system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 939system.membus.snoop_fanout::0 2203232 99.95% 99.95% # Request fanout histogram 940system.membus.snoop_fanout::1 1139 0.05% 100.00% # Request fanout histogram 941system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 942system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 943system.membus.snoop_fanout::min_value 0 # Request fanout histogram 944system.membus.snoop_fanout::max_value 1 # Request fanout histogram 945system.membus.snoop_fanout::total 2204371 # Request fanout histogram |
| 946system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 909system.toL2Bus.snoop_filter.tot_requests 6035847 # Total number of requests made to the snoop filter. 910system.toL2Bus.snoop_filter.hit_single_requests 3018700 # Number of requests hitting in the snoop filter with a single holder of the requested data. 911system.toL2Bus.snoop_filter.hit_multi_requests 374456 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 912system.toL2Bus.snoop_filter.tot_snoops 1611 # Total number of snoops made to the snoop filter. 913system.toL2Bus.snoop_filter.hit_single_snoops 1521 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 914system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. | 947system.toL2Bus.snoop_filter.tot_requests 6035847 # Total number of requests made to the snoop filter. 948system.toL2Bus.snoop_filter.hit_single_requests 3018700 # Number of requests hitting in the snoop filter with a single holder of the requested data. 949system.toL2Bus.snoop_filter.hit_multi_requests 374456 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 950system.toL2Bus.snoop_filter.tot_snoops 1611 # Total number of snoops made to the snoop filter. 951system.toL2Bus.snoop_filter.hit_single_snoops 1521 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 952system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. |
| 953system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 915system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 916system.toL2Bus.trans_dist::ReadResp 2732152 # Transaction distribution 917system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 918system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution 919system.toL2Bus.trans_dist::WritebackDirty 777662 # Transaction distribution 920system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution 921system.toL2Bus.trans_dist::CleanEvict 1205462 # Transaction distribution 922system.toL2Bus.trans_dist::UpgradeReq 19613 # Transaction distribution --- 22 unchanged lines hidden (view full) --- 945system.toL2Bus.snoop_fanout::1 752556 10.66% 99.99% # Request fanout histogram 946system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 947system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 948system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 949system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 950system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 951system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 952system.toL2Bus.snoop_fanout::total 7058663 # Request fanout histogram | 954system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 955system.toL2Bus.trans_dist::ReadResp 2732152 # Transaction distribution 956system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 957system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution 958system.toL2Bus.trans_dist::WritebackDirty 777662 # Transaction distribution 959system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution 960system.toL2Bus.trans_dist::CleanEvict 1205462 # Transaction distribution 961system.toL2Bus.trans_dist::UpgradeReq 19613 # Transaction distribution --- 22 unchanged lines hidden (view full) --- 984system.toL2Bus.snoop_fanout::1 752556 10.66% 99.99% # Request fanout histogram 985system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 986system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 987system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 988system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 989system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 990system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 991system.toL2Bus.snoop_fanout::total 7058663 # Request fanout histogram |
| 992system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 993system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 994system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 995system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 953system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 954system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 955system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 956system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 957system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 958system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 959system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 960system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU --- 15 unchanged lines hidden (view full) --- 976system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 977system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 978system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 979system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 980system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 981system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 982system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 983system.tsunami.ethernet.droppedPackets 0 # number of packets dropped | 996system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 997system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 998system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 999system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 1000system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 1001system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 1002system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 1003system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU --- 15 unchanged lines hidden (view full) --- 1019system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 1020system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 1021system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 1022system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 1023system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 1024system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 1025system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 1026system.tsunami.ethernet.droppedPackets 0 # number of packets dropped |
| 1027system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1028system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1029system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1030system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1031system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1032system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1033system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1034system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1035system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1036system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1037system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1038system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1039system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1040system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1041system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1042system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1043system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1044system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1045system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1046system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1047system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1048system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1049system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states |
|
| 984 985---------- End Simulation Statistics ---------- | 1050 1051---------- End Simulation Statistics ---------- |