| stats.txt (11336:b318499f676c) | stats.txt (11456:c0fb4435b80f) |
|---|---|
| 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357988000 # Number of ticks simulated 5final_tick 1869357988000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks | 1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357988000 # Number of ticks simulated 5final_tick 1869357988000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks |
| 7host_inst_rate 1993950 # Simulator instruction rate (inst/s) 8host_op_rate 1993950 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 57344769220 # Simulator tick rate (ticks/s) 10host_mem_usage 333724 # Number of bytes of host memory used 11host_seconds 32.60 # Real time elapsed on the host | 7host_inst_rate 1670594 # Simulator instruction rate (inst/s) 8host_op_rate 1670593 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 48045239456 # Simulator tick rate (ticks/s) 10host_mem_usage 332628 # Number of bytes of host memory used 11host_seconds 38.91 # Real time elapsed on the host |
| 12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu0.data 66535616 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.data 766336 # Number of bytes read from this memory --- 276 unchanged lines hidden (view full) --- 296system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146955 # miss rate for overall accesses 297system.cpu0.dcache.overall_miss_rate::total 0.146955 # miss rate for overall accesses 298system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 299system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 300system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 301system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 302system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 303system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 17system.physmem.bytes_read::cpu0.data 66535616 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.data 766336 # Number of bytes read from this memory --- 276 unchanged lines hidden (view full) --- 296system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146955 # miss rate for overall accesses 297system.cpu0.dcache.overall_miss_rate::total 0.146955 # miss rate for overall accesses 298system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 299system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 300system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 301system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 302system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 303system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 304system.cpu0.dcache.fast_writes 0 # number of fast writes performed 305system.cpu0.dcache.cache_copies 0 # number of cache copies performed | |
| 306system.cpu0.dcache.writebacks::writebacks 633127 # number of writebacks 307system.cpu0.dcache.writebacks::total 633127 # number of writebacks | 304system.cpu0.dcache.writebacks::writebacks 633127 # number of writebacks 305system.cpu0.dcache.writebacks::total 633127 # number of writebacks |
| 308system.cpu0.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 309system.cpu0.icache.tags.replacements 618292 # number of replacements 310system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 311system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 312system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 313system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 314system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 315system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 316system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy --- 30 unchanged lines hidden (view full) --- 347system.cpu0.icache.overall_miss_rate::cpu0.inst 0.012507 # miss rate for overall accesses 348system.cpu0.icache.overall_miss_rate::total 0.012507 # miss rate for overall accesses 349system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 350system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 351system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 352system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 353system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 354system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 306system.cpu0.icache.tags.replacements 618292 # number of replacements 307system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 308system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 309system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 310system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 311system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 312system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 313system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy --- 30 unchanged lines hidden (view full) --- 344system.cpu0.icache.overall_miss_rate::cpu0.inst 0.012507 # miss rate for overall accesses 345system.cpu0.icache.overall_miss_rate::total 0.012507 # miss rate for overall accesses 346system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 347system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 348system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 349system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 350system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 351system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 355system.cpu0.icache.fast_writes 0 # number of fast writes performed 356system.cpu0.icache.cache_copies 0 # number of cache copies performed | |
| 357system.cpu0.icache.writebacks::writebacks 618292 # number of writebacks 358system.cpu0.icache.writebacks::total 618292 # number of writebacks | 352system.cpu0.icache.writebacks::writebacks 618292 # number of writebacks 353system.cpu0.icache.writebacks::total 618292 # number of writebacks |
| 359system.cpu0.icache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 360system.cpu1.dtb.fetch_hits 0 # ITB hits 361system.cpu1.dtb.fetch_misses 0 # ITB misses 362system.cpu1.dtb.fetch_acv 0 # ITB acv 363system.cpu1.dtb.fetch_accesses 0 # ITB accesses 364system.cpu1.dtb.read_hits 2831559 # DTB read hits 365system.cpu1.dtb.read_misses 3191 # DTB read misses 366system.cpu1.dtb.read_acv 58 # DTB read access violations 367system.cpu1.dtb.read_accesses 198160 # DTB read accesses --- 216 unchanged lines hidden (view full) --- 584system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045605 # miss rate for overall accesses 585system.cpu1.dcache.overall_miss_rate::total 0.045605 # miss rate for overall accesses 586system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 587system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 588system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 589system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 590system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 591system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 354system.cpu1.dtb.fetch_hits 0 # ITB hits 355system.cpu1.dtb.fetch_misses 0 # ITB misses 356system.cpu1.dtb.fetch_acv 0 # ITB acv 357system.cpu1.dtb.fetch_accesses 0 # ITB accesses 358system.cpu1.dtb.read_hits 2831559 # DTB read hits 359system.cpu1.dtb.read_misses 3191 # DTB read misses 360system.cpu1.dtb.read_acv 58 # DTB read access violations 361system.cpu1.dtb.read_accesses 198160 # DTB read accesses --- 216 unchanged lines hidden (view full) --- 578system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045605 # miss rate for overall accesses 579system.cpu1.dcache.overall_miss_rate::total 0.045605 # miss rate for overall accesses 580system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 581system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 582system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 583system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 584system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 585system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 592system.cpu1.dcache.fast_writes 0 # number of fast writes performed 593system.cpu1.dcache.cache_copies 0 # number of cache copies performed | |
| 594system.cpu1.dcache.writebacks::writebacks 144536 # number of writebacks 595system.cpu1.dcache.writebacks::total 144536 # number of writebacks | 586system.cpu1.dcache.writebacks::writebacks 144536 # number of writebacks 587system.cpu1.dcache.writebacks::total 144536 # number of writebacks |
| 596system.cpu1.dcache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 597system.cpu1.icache.tags.replacements 380647 # number of replacements 598system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 599system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 600system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 601system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 602system.cpu1.icache.tags.warmup_cycle 1859777157500 # Cycle when the warmup percentage was hit. 603system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 604system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy --- 29 unchanged lines hidden (view full) --- 634system.cpu1.icache.overall_miss_rate::cpu1.inst 0.024552 # miss rate for overall accesses 635system.cpu1.icache.overall_miss_rate::total 0.024552 # miss rate for overall accesses 636system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 637system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 638system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked 639system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked 640system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 641system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 588system.cpu1.icache.tags.replacements 380647 # number of replacements 589system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 590system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 591system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 592system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 593system.cpu1.icache.tags.warmup_cycle 1859777157500 # Cycle when the warmup percentage was hit. 594system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 595system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy --- 29 unchanged lines hidden (view full) --- 625system.cpu1.icache.overall_miss_rate::cpu1.inst 0.024552 # miss rate for overall accesses 626system.cpu1.icache.overall_miss_rate::total 0.024552 # miss rate for overall accesses 627system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 628system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 629system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked 630system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked 631system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 632system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 642system.cpu1.icache.fast_writes 0 # number of fast writes performed 643system.cpu1.icache.cache_copies 0 # number of cache copies performed | |
| 644system.cpu1.icache.writebacks::writebacks 380647 # number of writebacks 645system.cpu1.icache.writebacks::total 380647 # number of writebacks | 633system.cpu1.icache.writebacks::writebacks 380647 # number of writebacks 634system.cpu1.icache.writebacks::total 380647 # number of writebacks |
| 646system.cpu1.icache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 647system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 648system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). 649system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD). 650system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes. 651system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 652system.disk0.dma_write_txs 395 # Number of DMA write transactions. 653system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 654system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). --- 44 unchanged lines hidden (view full) --- 699system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 700system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 701system.iocache.tags.tag_accesses 375579 # Number of tag accesses 702system.iocache.tags.data_accesses 375579 # Number of data accesses 703system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 704system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 705system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 706system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses | 635system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 636system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). 637system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD). 638system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes. 639system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 640system.disk0.dma_write_txs 395 # Number of DMA write transactions. 641system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 642system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). --- 44 unchanged lines hidden (view full) --- 687system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 688system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 689system.iocache.tags.tag_accesses 375579 # Number of tag accesses 690system.iocache.tags.data_accesses 375579 # Number of data accesses 691system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 692system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 693system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 694system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses |
| 707system.iocache.demand_misses::tsunami.ide 179 # number of demand (read+write) misses 708system.iocache.demand_misses::total 179 # number of demand (read+write) misses 709system.iocache.overall_misses::tsunami.ide 179 # number of overall misses 710system.iocache.overall_misses::total 179 # number of overall misses | 695system.iocache.demand_misses::tsunami.ide 41731 # number of demand (read+write) misses 696system.iocache.demand_misses::total 41731 # number of demand (read+write) misses 697system.iocache.overall_misses::tsunami.ide 41731 # number of overall misses 698system.iocache.overall_misses::total 41731 # number of overall misses |
| 711system.iocache.ReadReq_accesses::tsunami.ide 179 # number of ReadReq accesses(hits+misses) 712system.iocache.ReadReq_accesses::total 179 # number of ReadReq accesses(hits+misses) 713system.iocache.WriteLineReq_accesses::tsunami.ide 41552 # number of WriteLineReq accesses(hits+misses) 714system.iocache.WriteLineReq_accesses::total 41552 # number of WriteLineReq accesses(hits+misses) | 699system.iocache.ReadReq_accesses::tsunami.ide 179 # number of ReadReq accesses(hits+misses) 700system.iocache.ReadReq_accesses::total 179 # number of ReadReq accesses(hits+misses) 701system.iocache.WriteLineReq_accesses::tsunami.ide 41552 # number of WriteLineReq accesses(hits+misses) 702system.iocache.WriteLineReq_accesses::total 41552 # number of WriteLineReq accesses(hits+misses) |
| 715system.iocache.demand_accesses::tsunami.ide 179 # number of demand (read+write) accesses 716system.iocache.demand_accesses::total 179 # number of demand (read+write) accesses 717system.iocache.overall_accesses::tsunami.ide 179 # number of overall (read+write) accesses 718system.iocache.overall_accesses::total 179 # number of overall (read+write) accesses | 703system.iocache.demand_accesses::tsunami.ide 41731 # number of demand (read+write) accesses 704system.iocache.demand_accesses::total 41731 # number of demand (read+write) accesses 705system.iocache.overall_accesses::tsunami.ide 41731 # number of overall (read+write) accesses 706system.iocache.overall_accesses::total 41731 # number of overall (read+write) accesses |
| 719system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses 720system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 721system.iocache.WriteLineReq_miss_rate::tsunami.ide 1 # miss rate for WriteLineReq accesses 722system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 723system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses 724system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 725system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses 726system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 727system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 728system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 729system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 730system.iocache.blocked::no_targets 0 # number of cycles access was blocked 731system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 732system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 707system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses 708system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 709system.iocache.WriteLineReq_miss_rate::tsunami.ide 1 # miss rate for WriteLineReq accesses 710system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 711system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses 712system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 713system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses 714system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 715system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 716system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 717system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 718system.iocache.blocked::no_targets 0 # number of cycles access was blocked 719system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 720system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 733system.iocache.fast_writes 0 # number of fast writes performed 734system.iocache.cache_copies 0 # number of cache copies performed | |
| 735system.iocache.writebacks::writebacks 41520 # number of writebacks 736system.iocache.writebacks::total 41520 # number of writebacks | 721system.iocache.writebacks::writebacks 41520 # number of writebacks 722system.iocache.writebacks::total 41520 # number of writebacks |
| 737system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 738system.l2c.tags.replacements 999922 # number of replacements 739system.l2c.tags.tagsinuse 65337.856722 # Cycle average of tags in use 740system.l2c.tags.total_refs 4259784 # Total number of references to valid blocks. 741system.l2c.tags.sampled_refs 1064972 # Sample count of references to valid blocks. 742system.l2c.tags.avg_refs 3.999902 # Average number of references to valid blocks. 743system.l2c.tags.warmup_cycle 838081000 # Cycle when the warmup percentage was hit. 744system.l2c.tags.occ_blocks::writebacks 55997.404251 # Average occupied blocks per requestor 745system.l2c.tags.occ_blocks::cpu0.inst 4860.296117 # Average occupied blocks per requestor --- 124 unchanged lines hidden (view full) --- 870system.l2c.overall_miss_rate::cpu1.data 0.061204 # miss rate for overall accesses 871system.l2c.overall_miss_rate::total 0.358170 # miss rate for overall accesses 872system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 873system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 874system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 875system.l2c.blocked::no_targets 0 # number of cycles access was blocked 876system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 877system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked | 723system.l2c.tags.replacements 999922 # number of replacements 724system.l2c.tags.tagsinuse 65337.856722 # Cycle average of tags in use 725system.l2c.tags.total_refs 4259784 # Total number of references to valid blocks. 726system.l2c.tags.sampled_refs 1064972 # Sample count of references to valid blocks. 727system.l2c.tags.avg_refs 3.999902 # Average number of references to valid blocks. 728system.l2c.tags.warmup_cycle 838081000 # Cycle when the warmup percentage was hit. 729system.l2c.tags.occ_blocks::writebacks 55997.404251 # Average occupied blocks per requestor 730system.l2c.tags.occ_blocks::cpu0.inst 4860.296117 # Average occupied blocks per requestor --- 124 unchanged lines hidden (view full) --- 855system.l2c.overall_miss_rate::cpu1.data 0.061204 # miss rate for overall accesses 856system.l2c.overall_miss_rate::total 0.358170 # miss rate for overall accesses 857system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 858system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 859system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 860system.l2c.blocked::no_targets 0 # number of cycles access was blocked 861system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 862system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked |
| 878system.l2c.fast_writes 0 # number of fast writes performed 879system.l2c.cache_copies 0 # number of cache copies performed | |
| 880system.l2c.writebacks::writebacks 80923 # number of writebacks 881system.l2c.writebacks::total 80923 # number of writebacks | 863system.l2c.writebacks::writebacks 80923 # number of writebacks 864system.l2c.writebacks::total 80923 # number of writebacks |
| 882system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate | |
| 883system.membus.trans_dist::ReadReq 7449 # Transaction distribution 884system.membus.trans_dist::ReadResp 948784 # Transaction distribution 885system.membus.trans_dist::WriteReq 14588 # Transaction distribution 886system.membus.trans_dist::WriteResp 14588 # Transaction distribution 887system.membus.trans_dist::WritebackDirty 122443 # Transaction distribution 888system.membus.trans_dist::CleanEvict 918012 # Transaction distribution 889system.membus.trans_dist::UpgradeReq 19594 # Transaction distribution 890system.membus.trans_dist::SCUpgradeReq 14154 # Transaction distribution --- 107 unchanged lines hidden --- | 865system.membus.trans_dist::ReadReq 7449 # Transaction distribution 866system.membus.trans_dist::ReadResp 948784 # Transaction distribution 867system.membus.trans_dist::WriteReq 14588 # Transaction distribution 868system.membus.trans_dist::WriteResp 14588 # Transaction distribution 869system.membus.trans_dist::WritebackDirty 122443 # Transaction distribution 870system.membus.trans_dist::CleanEvict 918012 # Transaction distribution 871system.membus.trans_dist::UpgradeReq 19594 # Transaction distribution 872system.membus.trans_dist::SCUpgradeReq 14154 # Transaction distribution --- 107 unchanged lines hidden --- |