Cross Reference: /gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt

1
2---------- Begin Simulation Statistics ----------
3sim_seconds 1.870336 # Number of seconds simulated
4sim_ticks 1870335522500 # Number of ticks simulated
5final_tick 1870335522500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
6sim_freq 1000000000000 # Frequency of simulated ticks

7host_inst_rate 4204751 # Simulator instruction rate (inst/s)
8host_op_rate 4204746 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 124525337361 # Simulator tick rate (ticks/s)
10host_mem_usage 293604 # Number of bytes of host memory used
11host_seconds 15.02 # Real time elapsed on the host

7host_inst_rate 1989571 # Simulator instruction rate (inst/s)
8host_op_rate 1989570 # Simulator op (including micro ops) rate (op/s)
9host_tick_rate 58921958204 # Simulator tick rate (ticks/s)
10host_mem_usage 298304 # Number of bytes of host memory used
11host_seconds 31.74 # Real time elapsed on the host

12sim_insts 63154034 # Number of instructions simulated
13sim_ops 63154034 # Number of ops (including micro ops) simulated
14system.physmem.bytes_read 72297472 # Number of bytes read from this memory
15system.physmem.bytes_inst_read 995008 # Number of instructions bytes read from this memory
16system.physmem.bytes_written 10452352 # Number of bytes written to this memory
17system.physmem.num_reads 1129648 # Number of read requests responded to by this memory
18system.physmem.num_writes 163318 # Number of write requests responded to by this memory
19system.physmem.num_other 0 # Number of other requests responded to by this memory
20system.physmem.bw_read 38654814 # Total read bandwidth from this memory (bytes/s)
21system.physmem.bw_inst_read 531994 # Instruction read bandwidth from this memory (bytes/s)
22system.physmem.bw_write 5588490 # Write bandwidth from this memory (bytes/s)
23system.physmem.bw_total 44243304 # Total bandwidth to/from this memory (bytes/s)
24system.l2c.replacements 1051788 # number of replacements
25system.l2c.tagsinuse 34117.721410 # Cycle average of tags in use
26system.l2c.total_refs 2341203 # Total number of references to valid blocks.
27system.l2c.sampled_refs 1087985 # Sample count of references to valid blocks.
28system.l2c.avg_refs 2.151871 # Average number of references to valid blocks.
29system.l2c.warmup_cycle 990121000 # Cycle when the warmup percentage was hit.
30system.l2c.occ_blocks::writebacks 23831.931773 # Average occupied blocks per requestor
31system.l2c.occ_blocks::cpu0.inst 3683.485712 # Average occupied blocks per requestor
32system.l2c.occ_blocks::cpu0.data 6336.188239 # Average occupied blocks per requestor
33system.l2c.occ_blocks::cpu1.inst 152.381317 # Average occupied blocks per requestor
34system.l2c.occ_blocks::cpu1.data 113.734368 # Average occupied blocks per requestor
35system.l2c.occ_percent::writebacks 0.363646 # Average percentage of cache occupancy
36system.l2c.occ_percent::cpu0.inst 0.056206 # Average percentage of cache occupancy
37system.l2c.occ_percent::cpu0.data 0.096683 # Average percentage of cache occupancy
38system.l2c.occ_percent::cpu1.inst 0.002325 # Average percentage of cache occupancy
39system.l2c.occ_percent::cpu1.data 0.001735 # Average percentage of cache occupancy
40system.l2c.occ_percent::total 0.520595 # Average percentage of cache occupancy
41system.l2c.ReadReq_hits::cpu0.inst 871618 # number of ReadReq hits
42system.l2c.ReadReq_hits::cpu0.data 748887 # number of ReadReq hits
43system.l2c.ReadReq_hits::cpu1.inst 101445 # number of ReadReq hits
44system.l2c.ReadReq_hits::cpu1.data 35685 # number of ReadReq hits
45system.l2c.ReadReq_hits::total 1757635 # number of ReadReq hits
46system.l2c.Writeback_hits::writebacks 811846 # number of Writeback hits
47system.l2c.Writeback_hits::total 811846 # number of Writeback hits
48system.l2c.UpgradeReq_hits::cpu0.data 134 # number of UpgradeReq hits
49system.l2c.UpgradeReq_hits::cpu1.data 39 # number of UpgradeReq hits
50system.l2c.UpgradeReq_hits::total 173 # number of UpgradeReq hits
51system.l2c.SCUpgradeReq_hits::cpu0.data 15 # number of SCUpgradeReq hits
52system.l2c.SCUpgradeReq_hits::cpu1.data 9 # number of SCUpgradeReq hits
53system.l2c.SCUpgradeReq_hits::total 24 # number of SCUpgradeReq hits
54system.l2c.ReadExReq_hits::cpu0.data 164417 # number of ReadExReq hits
55system.l2c.ReadExReq_hits::cpu1.data 14126 # number of ReadExReq hits
56system.l2c.ReadExReq_hits::total 178543 # number of ReadExReq hits
57system.l2c.demand_hits::cpu0.inst 871618 # number of demand (read+write) hits
58system.l2c.demand_hits::cpu0.data 913304 # number of demand (read+write) hits
59system.l2c.demand_hits::cpu1.inst 101445 # number of demand (read+write) hits
60system.l2c.demand_hits::cpu1.data 49811 # number of demand (read+write) hits
61system.l2c.demand_hits::total 1936178 # number of demand (read+write) hits
62system.l2c.overall_hits::cpu0.inst 871618 # number of overall hits
63system.l2c.overall_hits::cpu0.data 913304 # number of overall hits
64system.l2c.overall_hits::cpu1.inst 101445 # number of overall hits
65system.l2c.overall_hits::cpu1.data 49811 # number of overall hits
66system.l2c.overall_hits::total 1936178 # number of overall hits
67system.l2c.ReadReq_misses::cpu0.inst 13362 # number of ReadReq misses
68system.l2c.ReadReq_misses::cpu0.data 943555 # number of ReadReq misses
69system.l2c.ReadReq_misses::cpu1.inst 2185 # number of ReadReq misses
70system.l2c.ReadReq_misses::cpu1.data 2326 # number of ReadReq misses
71system.l2c.ReadReq_misses::total 961428 # number of ReadReq misses
72system.l2c.UpgradeReq_misses::cpu0.data 2441 # number of UpgradeReq misses
73system.l2c.UpgradeReq_misses::cpu1.data 567 # number of UpgradeReq misses
74system.l2c.UpgradeReq_misses::total 3008 # number of UpgradeReq misses
75system.l2c.SCUpgradeReq_misses::cpu0.data 65 # number of SCUpgradeReq misses
76system.l2c.SCUpgradeReq_misses::cpu1.data 101 # number of SCUpgradeReq misses
77system.l2c.SCUpgradeReq_misses::total 166 # number of SCUpgradeReq misses
78system.l2c.ReadExReq_misses::cpu0.data 117481 # number of ReadExReq misses
79system.l2c.ReadExReq_misses::cpu1.data 9826 # number of ReadExReq misses
80system.l2c.ReadExReq_misses::total 127307 # number of ReadExReq misses
81system.l2c.demand_misses::cpu0.inst 13362 # number of demand (read+write) misses
82system.l2c.demand_misses::cpu0.data 1061036 # number of demand (read+write) misses
83system.l2c.demand_misses::cpu1.inst 2185 # number of demand (read+write) misses
84system.l2c.demand_misses::cpu1.data 12152 # number of demand (read+write) misses
85system.l2c.demand_misses::total 1088735 # number of demand (read+write) misses
86system.l2c.overall_misses::cpu0.inst 13362 # number of overall misses
87system.l2c.overall_misses::cpu0.data 1061036 # number of overall misses
88system.l2c.overall_misses::cpu1.inst 2185 # number of overall misses
89system.l2c.overall_misses::cpu1.data 12152 # number of overall misses
90system.l2c.overall_misses::total 1088735 # number of overall misses
91system.l2c.ReadReq_accesses::cpu0.inst 884980 # number of ReadReq accesses(hits+misses)
92system.l2c.ReadReq_accesses::cpu0.data 1692442 # number of ReadReq accesses(hits+misses)
93system.l2c.ReadReq_accesses::cpu1.inst 103630 # number of ReadReq accesses(hits+misses)
94system.l2c.ReadReq_accesses::cpu1.data 38011 # number of ReadReq accesses(hits+misses)
95system.l2c.ReadReq_accesses::total 2719063 # number of ReadReq accesses(hits+misses)
96system.l2c.Writeback_accesses::writebacks 811846 # number of Writeback accesses(hits+misses)
97system.l2c.Writeback_accesses::total 811846 # number of Writeback accesses(hits+misses)
98system.l2c.UpgradeReq_accesses::cpu0.data 2575 # number of UpgradeReq accesses(hits+misses)
99system.l2c.UpgradeReq_accesses::cpu1.data 606 # number of UpgradeReq accesses(hits+misses)
100system.l2c.UpgradeReq_accesses::total 3181 # number of UpgradeReq accesses(hits+misses)
101system.l2c.SCUpgradeReq_accesses::cpu0.data 80 # number of SCUpgradeReq accesses(hits+misses)
102system.l2c.SCUpgradeReq_accesses::cpu1.data 110 # number of SCUpgradeReq accesses(hits+misses)
103system.l2c.SCUpgradeReq_accesses::total 190 # number of SCUpgradeReq accesses(hits+misses)
104system.l2c.ReadExReq_accesses::cpu0.data 281898 # number of ReadExReq accesses(hits+misses)
105system.l2c.ReadExReq_accesses::cpu1.data 23952 # number of ReadExReq accesses(hits+misses)
106system.l2c.ReadExReq_accesses::total 305850 # number of ReadExReq accesses(hits+misses)
107system.l2c.demand_accesses::cpu0.inst 884980 # number of demand (read+write) accesses
108system.l2c.demand_accesses::cpu0.data 1974340 # number of demand (read+write) accesses
109system.l2c.demand_accesses::cpu1.inst 103630 # number of demand (read+write) accesses
110system.l2c.demand_accesses::cpu1.data 61963 # number of demand (read+write) accesses
111system.l2c.demand_accesses::total 3024913 # number of demand (read+write) accesses
112system.l2c.overall_accesses::cpu0.inst 884980 # number of overall (read+write) accesses
113system.l2c.overall_accesses::cpu0.data 1974340 # number of overall (read+write) accesses
114system.l2c.overall_accesses::cpu1.inst 103630 # number of overall (read+write) accesses
115system.l2c.overall_accesses::cpu1.data 61963 # number of overall (read+write) accesses
116system.l2c.overall_accesses::total 3024913 # number of overall (read+write) accesses
117system.l2c.ReadReq_miss_rate::cpu0.inst 0.015099 # miss rate for ReadReq accesses
118system.l2c.ReadReq_miss_rate::cpu0.data 0.557511 # miss rate for ReadReq accesses
119system.l2c.ReadReq_miss_rate::cpu1.inst 0.021085 # miss rate for ReadReq accesses
120system.l2c.ReadReq_miss_rate::cpu1.data 0.061193 # miss rate for ReadReq accesses
121system.l2c.UpgradeReq_miss_rate::cpu0.data 0.947961 # miss rate for UpgradeReq accesses
122system.l2c.UpgradeReq_miss_rate::cpu1.data 0.935644 # miss rate for UpgradeReq accesses
123system.l2c.SCUpgradeReq_miss_rate::cpu0.data 0.812500 # miss rate for SCUpgradeReq accesses
124system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.918182 # miss rate for SCUpgradeReq accesses
125system.l2c.ReadExReq_miss_rate::cpu0.data 0.416750 # miss rate for ReadExReq accesses
126system.l2c.ReadExReq_miss_rate::cpu1.data 0.410237 # miss rate for ReadExReq accesses
127system.l2c.demand_miss_rate::cpu0.inst 0.015099 # miss rate for demand accesses
128system.l2c.demand_miss_rate::cpu0.data 0.537413 # miss rate for demand accesses
129system.l2c.demand_miss_rate::cpu1.inst 0.021085 # miss rate for demand accesses
130system.l2c.demand_miss_rate::cpu1.data 0.196117 # miss rate for demand accesses
131system.l2c.overall_miss_rate::cpu0.inst 0.015099 # miss rate for overall accesses
132system.l2c.overall_miss_rate::cpu0.data 0.537413 # miss rate for overall accesses
133system.l2c.overall_miss_rate::cpu1.inst 0.021085 # miss rate for overall accesses
134system.l2c.overall_miss_rate::cpu1.data 0.196117 # miss rate for overall accesses
135system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
136system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked
137system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked
138system.l2c.blocked::no_targets 0 # number of cycles access was blocked

139system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
140system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

139system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
140system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

141system.l2c.fast_writes 0 # number of fast writes performed
142system.l2c.cache_copies 0 # number of cache copies performed
143system.l2c.writebacks::writebacks 121798 # number of writebacks
144system.l2c.writebacks::total 121798 # number of writebacks
145system.l2c.no_allocate_misses 0 # Number of misses that were no-allocate
146system.iocache.replacements 41695 # number of replacements
147system.iocache.tagsinuse 0.435437 # Cycle average of tags in use
148system.iocache.total_refs 0 # Total number of references to valid blocks.
149system.iocache.sampled_refs 41711 # Sample count of references to valid blocks.
150system.iocache.avg_refs 0 # Average number of references to valid blocks.
151system.iocache.warmup_cycle 1685787165017 # Cycle when the warmup percentage was hit.
152system.iocache.occ_blocks::tsunami.ide 0.435437 # Average occupied blocks per requestor
153system.iocache.occ_percent::tsunami.ide 0.027215 # Average percentage of cache occupancy
154system.iocache.occ_percent::total 0.027215 # Average percentage of cache occupancy
155system.iocache.ReadReq_misses::tsunami.ide 175 # number of ReadReq misses
156system.iocache.ReadReq_misses::total 175 # number of ReadReq misses
157system.iocache.WriteReq_misses::tsunami.ide 41552 # number of WriteReq misses
158system.iocache.WriteReq_misses::total 41552 # number of WriteReq misses
159system.iocache.demand_misses::tsunami.ide 41727 # number of demand (read+write) misses
160system.iocache.demand_misses::total 41727 # number of demand (read+write) misses
161system.iocache.overall_misses::tsunami.ide 41727 # number of overall misses
162system.iocache.overall_misses::total 41727 # number of overall misses
163system.iocache.ReadReq_accesses::tsunami.ide 175 # number of ReadReq accesses(hits+misses)
164system.iocache.ReadReq_accesses::total 175 # number of ReadReq accesses(hits+misses)
165system.iocache.WriteReq_accesses::tsunami.ide 41552 # number of WriteReq accesses(hits+misses)
166system.iocache.WriteReq_accesses::total 41552 # number of WriteReq accesses(hits+misses)
167system.iocache.demand_accesses::tsunami.ide 41727 # number of demand (read+write) accesses
168system.iocache.demand_accesses::total 41727 # number of demand (read+write) accesses
169system.iocache.overall_accesses::tsunami.ide 41727 # number of overall (read+write) accesses
170system.iocache.overall_accesses::total 41727 # number of overall (read+write) accesses
171system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses
172system.iocache.WriteReq_miss_rate::tsunami.ide 1 # miss rate for WriteReq accesses
173system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses
174system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses
175system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
176system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked
177system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked
178system.iocache.blocked::no_targets 0 # number of cycles access was blocked

179system.iocache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
180system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

179system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
180system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

181system.iocache.fast_writes 0 # number of fast writes performed
182system.iocache.cache_copies 0 # number of cache copies performed
183system.iocache.writebacks::writebacks 41520 # number of writebacks
184system.iocache.writebacks::total 41520 # number of writebacks
185system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate
186system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
187system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD).
188system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD).
189system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes.
190system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes.
191system.disk0.dma_write_txs 395 # Number of DMA write transactions.
192system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
193system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
194system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
195system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
196system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
197system.disk2.dma_write_txs 1 # Number of DMA write transactions.
198system.cpu0.dtb.fetch_hits 0 # ITB hits
199system.cpu0.dtb.fetch_misses 0 # ITB misses
200system.cpu0.dtb.fetch_acv 0 # ITB acv
201system.cpu0.dtb.fetch_accesses 0 # ITB accesses
202system.cpu0.dtb.read_hits 9154530 # DTB read hits
203system.cpu0.dtb.read_misses 7079 # DTB read misses
204system.cpu0.dtb.read_acv 152 # DTB read access violations
205system.cpu0.dtb.read_accesses 508987 # DTB read accesses
206system.cpu0.dtb.write_hits 5936899 # DTB write hits
207system.cpu0.dtb.write_misses 726 # DTB write misses
208system.cpu0.dtb.write_acv 99 # DTB write access violations
209system.cpu0.dtb.write_accesses 189050 # DTB write accesses
210system.cpu0.dtb.data_hits 15091429 # DTB hits
211system.cpu0.dtb.data_misses 7805 # DTB misses
212system.cpu0.dtb.data_acv 251 # DTB access violations
213system.cpu0.dtb.data_accesses 698037 # DTB accesses
214system.cpu0.itb.fetch_hits 3855556 # ITB hits
215system.cpu0.itb.fetch_misses 3485 # ITB misses
216system.cpu0.itb.fetch_acv 127 # ITB acv
217system.cpu0.itb.fetch_accesses 3859041 # ITB accesses
218system.cpu0.itb.read_hits 0 # DTB read hits
219system.cpu0.itb.read_misses 0 # DTB read misses
220system.cpu0.itb.read_acv 0 # DTB read access violations
221system.cpu0.itb.read_accesses 0 # DTB read accesses
222system.cpu0.itb.write_hits 0 # DTB write hits
223system.cpu0.itb.write_misses 0 # DTB write misses
224system.cpu0.itb.write_acv 0 # DTB write access violations
225system.cpu0.itb.write_accesses 0 # DTB write accesses
226system.cpu0.itb.data_hits 0 # DTB hits
227system.cpu0.itb.data_misses 0 # DTB misses
228system.cpu0.itb.data_acv 0 # DTB access violations
229system.cpu0.itb.data_accesses 0 # DTB accesses
230system.cpu0.numCycles 3740670933 # number of cpu cycles simulated
231system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started
232system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed
233system.cpu0.committedInsts 57222076 # Number of instructions committed
234system.cpu0.committedOps 57222076 # Number of ops (including micro ops) committed
235system.cpu0.num_int_alu_accesses 53249924 # Number of integer alu accesses
236system.cpu0.num_fp_alu_accesses 299810 # Number of float alu accesses
237system.cpu0.num_func_calls 1399585 # number of times a function call or return occured
238system.cpu0.num_conditional_control_insts 6808233 # number of instructions that are conditional controls
239system.cpu0.num_int_insts 53249924 # number of integer instructions
240system.cpu0.num_fp_insts 299810 # number of float instructions
241system.cpu0.num_int_register_reads 73318596 # number of times the integer registers were read
242system.cpu0.num_int_register_writes 39827534 # number of times the integer registers were written
243system.cpu0.num_fp_register_reads 147724 # number of times the floating registers were read
244system.cpu0.num_fp_register_writes 150835 # number of times the floating registers were written
245system.cpu0.num_mem_refs 15135515 # number of memory refs
246system.cpu0.num_load_insts 9184477 # Number of load instructions
247system.cpu0.num_store_insts 5951038 # Number of store instructions
248system.cpu0.num_idle_cycles 3683437089.313678 # Number of idle cycles
249system.cpu0.num_busy_cycles 57233843.686322 # Number of busy cycles
250system.cpu0.not_idle_fraction 0.015300 # Percentage of non-idle cycles
251system.cpu0.idle_fraction 0.984700 # Percentage of idle cycles
252system.cpu0.kern.inst.arm 0 # number of arm instructions executed
253system.cpu0.kern.inst.quiesce 6283 # number of quiesce instructions executed
254system.cpu0.kern.inst.hwrei 197120 # number of hwrei instructions executed
255system.cpu0.kern.ipl_count::0 71004 40.60% 40.60% # number of times we switched to this ipl
256system.cpu0.kern.ipl_count::21 243 0.14% 40.74% # number of times we switched to this ipl
257system.cpu0.kern.ipl_count::22 1908 1.09% 41.83% # number of times we switched to this ipl
258system.cpu0.kern.ipl_count::30 8 0.00% 41.84% # number of times we switched to this ipl
259system.cpu0.kern.ipl_count::31 101705 58.16% 100.00% # number of times we switched to this ipl
260system.cpu0.kern.ipl_count::total 174868 # number of times we switched to this ipl
261system.cpu0.kern.ipl_good::0 69637 49.24% 49.24% # number of times we switched to this ipl from a different ipl
262system.cpu0.kern.ipl_good::21 243 0.17% 49.41% # number of times we switched to this ipl from a different ipl
263system.cpu0.kern.ipl_good::22 1908 1.35% 50.76% # number of times we switched to this ipl from a different ipl
264system.cpu0.kern.ipl_good::30 8 0.01% 50.77% # number of times we switched to this ipl from a different ipl
265system.cpu0.kern.ipl_good::31 69629 49.23% 100.00% # number of times we switched to this ipl from a different ipl
266system.cpu0.kern.ipl_good::total 141425 # number of times we switched to this ipl from a different ipl
267system.cpu0.kern.ipl_ticks::0 1852989766500 99.07% 99.07% # number of cycles we spent at this ipl
268system.cpu0.kern.ipl_ticks::21 20110000 0.00% 99.07% # number of cycles we spent at this ipl
269system.cpu0.kern.ipl_ticks::22 82044000 0.00% 99.08% # number of cycles we spent at this ipl
270system.cpu0.kern.ipl_ticks::30 949500 0.00% 99.08% # number of cycles we spent at this ipl
271system.cpu0.kern.ipl_ticks::31 17242445000 0.92% 100.00% # number of cycles we spent at this ipl
272system.cpu0.kern.ipl_ticks::total 1870335315000 # number of cycles we spent at this ipl
273system.cpu0.kern.ipl_used::0 0.980748 # fraction of swpipl calls that actually changed the ipl
274system.cpu0.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
275system.cpu0.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
276system.cpu0.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl
277system.cpu0.kern.ipl_used::31 0.684617 # fraction of swpipl calls that actually changed the ipl
278system.cpu0.kern.syscall::2 6 2.65% 2.65% # number of syscalls executed
279system.cpu0.kern.syscall::3 19 8.41% 11.06% # number of syscalls executed
280system.cpu0.kern.syscall::4 2 0.88% 11.95% # number of syscalls executed
281system.cpu0.kern.syscall::6 32 14.16% 26.11% # number of syscalls executed
282system.cpu0.kern.syscall::12 1 0.44% 26.55% # number of syscalls executed
283system.cpu0.kern.syscall::15 1 0.44% 26.99% # number of syscalls executed
284system.cpu0.kern.syscall::17 9 3.98% 30.97% # number of syscalls executed
285system.cpu0.kern.syscall::19 8 3.54% 34.51% # number of syscalls executed
286system.cpu0.kern.syscall::20 6 2.65% 37.17% # number of syscalls executed
287system.cpu0.kern.syscall::23 2 0.88% 38.05% # number of syscalls executed
288system.cpu0.kern.syscall::24 4 1.77% 39.82% # number of syscalls executed
289system.cpu0.kern.syscall::33 7 3.10% 42.92% # number of syscalls executed
290system.cpu0.kern.syscall::41 2 0.88% 43.81% # number of syscalls executed
291system.cpu0.kern.syscall::45 37 16.37% 60.18% # number of syscalls executed
292system.cpu0.kern.syscall::47 4 1.77% 61.95% # number of syscalls executed
293system.cpu0.kern.syscall::48 8 3.54% 65.49% # number of syscalls executed
294system.cpu0.kern.syscall::54 10 4.42% 69.91% # number of syscalls executed
295system.cpu0.kern.syscall::58 1 0.44% 70.35% # number of syscalls executed
296system.cpu0.kern.syscall::59 4 1.77% 72.12% # number of syscalls executed
297system.cpu0.kern.syscall::71 30 13.27% 85.40% # number of syscalls executed
298system.cpu0.kern.syscall::73 3 1.33% 86.73% # number of syscalls executed
299system.cpu0.kern.syscall::74 8 3.54% 90.27% # number of syscalls executed
300system.cpu0.kern.syscall::87 1 0.44% 90.71% # number of syscalls executed
301system.cpu0.kern.syscall::90 2 0.88% 91.59% # number of syscalls executed
302system.cpu0.kern.syscall::92 9 3.98% 95.58% # number of syscalls executed
303system.cpu0.kern.syscall::97 2 0.88% 96.46% # number of syscalls executed
304system.cpu0.kern.syscall::98 2 0.88% 97.35% # number of syscalls executed
305system.cpu0.kern.syscall::132 2 0.88% 98.23% # number of syscalls executed
306system.cpu0.kern.syscall::144 2 0.88% 99.12% # number of syscalls executed
307system.cpu0.kern.syscall::147 2 0.88% 100.00% # number of syscalls executed
308system.cpu0.kern.syscall::total 226 # number of syscalls executed
309system.cpu0.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed
310system.cpu0.kern.callpal::wripir 110 0.06% 0.06% # number of callpals executed
311system.cpu0.kern.callpal::wrmces 1 0.00% 0.06% # number of callpals executed
312system.cpu0.kern.callpal::wrfen 1 0.00% 0.06% # number of callpals executed
313system.cpu0.kern.callpal::wrvptptr 1 0.00% 0.06% # number of callpals executed
314system.cpu0.kern.callpal::swpctx 3762 2.05% 2.11% # number of callpals executed
315system.cpu0.kern.callpal::tbi 38 0.02% 2.14% # number of callpals executed
316system.cpu0.kern.callpal::wrent 7 0.00% 2.14% # number of callpals executed
317system.cpu0.kern.callpal::swpipl 168035 91.68% 93.82% # number of callpals executed
318system.cpu0.kern.callpal::rdps 6150 3.36% 97.17% # number of callpals executed
319system.cpu0.kern.callpal::wrkgp 1 0.00% 97.17% # number of callpals executed
320system.cpu0.kern.callpal::wrusp 3 0.00% 97.17% # number of callpals executed
321system.cpu0.kern.callpal::rdusp 7 0.00% 97.18% # number of callpals executed
322system.cpu0.kern.callpal::whami 2 0.00% 97.18% # number of callpals executed
323system.cpu0.kern.callpal::rti 4673 2.55% 99.73% # number of callpals executed
324system.cpu0.kern.callpal::callsys 357 0.19% 99.92% # number of callpals executed
325system.cpu0.kern.callpal::imb 142 0.08% 100.00% # number of callpals executed
326system.cpu0.kern.callpal::total 183291 # number of callpals executed
327system.cpu0.kern.mode_switch::kernel 7091 # number of protection mode switches
328system.cpu0.kern.mode_switch::user 1158 # number of protection mode switches
329system.cpu0.kern.mode_switch::idle 0 # number of protection mode switches
330system.cpu0.kern.mode_good::kernel 1157
331system.cpu0.kern.mode_good::user 1158
332system.cpu0.kern.mode_good::idle 0
333system.cpu0.kern.mode_switch_good::kernel 0.163165 # fraction of useful protection mode switches
334system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches

335system.cpu0.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches
336system.cpu0.kern.mode_switch_good::total no_value # fraction of useful protection mode switches

335system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches
336system.cpu0.kern.mode_switch_good::total nan # fraction of useful protection mode switches

337system.cpu0.kern.mode_ticks::kernel 1869378305000 99.95% 99.95% # number of ticks spent at the given mode
338system.cpu0.kern.mode_ticks::user 957009000 0.05% 100.00% # number of ticks spent at the given mode
339system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode
340system.cpu0.kern.swap_context 3763 # number of times the context was actually changed
341system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
342system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
343system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
344system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
345system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU

346system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post

346system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post

347system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
348system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU

349system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post

349system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post

350system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
351system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU

352system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post

352system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post

353system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
354system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU

355system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post

355system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post

356system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
357system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU

358system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post

358system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post

359system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
360system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU

361system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post

361system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post

362system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
363system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU

364system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post

364system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post

365system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
366system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU

367system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post

367system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post

368system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR

369system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post

369system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post

370system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
371system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
372system.cpu0.icache.replacements 884404 # number of replacements
373system.cpu0.icache.tagsinuse 511.244754 # Cycle average of tags in use
374system.cpu0.icache.total_refs 56345132 # Total number of references to valid blocks.
375system.cpu0.icache.sampled_refs 884916 # Sample count of references to valid blocks.
376system.cpu0.icache.avg_refs 63.672859 # Average number of references to valid blocks.
377system.cpu0.icache.warmup_cycle 9786576500 # Cycle when the warmup percentage was hit.
378system.cpu0.icache.occ_blocks::cpu0.inst 511.244754 # Average occupied blocks per requestor
379system.cpu0.icache.occ_percent::cpu0.inst 0.998525 # Average percentage of cache occupancy
380system.cpu0.icache.occ_percent::total 0.998525 # Average percentage of cache occupancy
381system.cpu0.icache.ReadReq_hits::cpu0.inst 56345132 # number of ReadReq hits
382system.cpu0.icache.ReadReq_hits::total 56345132 # number of ReadReq hits
383system.cpu0.icache.demand_hits::cpu0.inst 56345132 # number of demand (read+write) hits
384system.cpu0.icache.demand_hits::total 56345132 # number of demand (read+write) hits
385system.cpu0.icache.overall_hits::cpu0.inst 56345132 # number of overall hits
386system.cpu0.icache.overall_hits::total 56345132 # number of overall hits
387system.cpu0.icache.ReadReq_misses::cpu0.inst 885000 # number of ReadReq misses
388system.cpu0.icache.ReadReq_misses::total 885000 # number of ReadReq misses
389system.cpu0.icache.demand_misses::cpu0.inst 885000 # number of demand (read+write) misses
390system.cpu0.icache.demand_misses::total 885000 # number of demand (read+write) misses
391system.cpu0.icache.overall_misses::cpu0.inst 885000 # number of overall misses
392system.cpu0.icache.overall_misses::total 885000 # number of overall misses
393system.cpu0.icache.ReadReq_accesses::cpu0.inst 57230132 # number of ReadReq accesses(hits+misses)
394system.cpu0.icache.ReadReq_accesses::total 57230132 # number of ReadReq accesses(hits+misses)
395system.cpu0.icache.demand_accesses::cpu0.inst 57230132 # number of demand (read+write) accesses
396system.cpu0.icache.demand_accesses::total 57230132 # number of demand (read+write) accesses
397system.cpu0.icache.overall_accesses::cpu0.inst 57230132 # number of overall (read+write) accesses
398system.cpu0.icache.overall_accesses::total 57230132 # number of overall (read+write) accesses
399system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.015464 # miss rate for ReadReq accesses
400system.cpu0.icache.demand_miss_rate::cpu0.inst 0.015464 # miss rate for demand accesses
401system.cpu0.icache.overall_miss_rate::cpu0.inst 0.015464 # miss rate for overall accesses
402system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
403system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
404system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked
405system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked

406system.cpu0.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
407system.cpu0.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

406system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
407system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

408system.cpu0.icache.fast_writes 0 # number of fast writes performed
409system.cpu0.icache.cache_copies 0 # number of cache copies performed
410system.cpu0.icache.writebacks::writebacks 95 # number of writebacks
411system.cpu0.icache.writebacks::total 95 # number of writebacks
412system.cpu0.icache.no_allocate_misses 0 # Number of misses that were no-allocate
413system.cpu0.dcache.replacements 1978962 # number of replacements
414system.cpu0.dcache.tagsinuse 504.827058 # Cycle average of tags in use
415system.cpu0.dcache.total_refs 13123502 # Total number of references to valid blocks.
416system.cpu0.dcache.sampled_refs 1979474 # Sample count of references to valid blocks.
417system.cpu0.dcache.avg_refs 6.629793 # Average number of references to valid blocks.
418system.cpu0.dcache.warmup_cycle 10840000 # Cycle when the warmup percentage was hit.
419system.cpu0.dcache.occ_blocks::cpu0.data 504.827058 # Average occupied blocks per requestor
420system.cpu0.dcache.occ_percent::cpu0.data 0.985990 # Average percentage of cache occupancy
421system.cpu0.dcache.occ_percent::total 0.985990 # Average percentage of cache occupancy
422system.cpu0.dcache.ReadReq_hits::cpu0.data 7298106 # number of ReadReq hits
423system.cpu0.dcache.ReadReq_hits::total 7298106 # number of ReadReq hits
424system.cpu0.dcache.WriteReq_hits::cpu0.data 5462265 # number of WriteReq hits
425system.cpu0.dcache.WriteReq_hits::total 5462265 # number of WriteReq hits
426system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 172138 # number of LoadLockedReq hits
427system.cpu0.dcache.LoadLockedReq_hits::total 172138 # number of LoadLockedReq hits
428system.cpu0.dcache.StoreCondReq_hits::cpu0.data 186635 # number of StoreCondReq hits
429system.cpu0.dcache.StoreCondReq_hits::total 186635 # number of StoreCondReq hits
430system.cpu0.dcache.demand_hits::cpu0.data 12760371 # number of demand (read+write) hits
431system.cpu0.dcache.demand_hits::total 12760371 # number of demand (read+write) hits
432system.cpu0.dcache.overall_hits::cpu0.data 12760371 # number of overall hits
433system.cpu0.dcache.overall_hits::total 12760371 # number of overall hits
434system.cpu0.dcache.ReadReq_misses::cpu0.data 1683563 # number of ReadReq misses
435system.cpu0.dcache.ReadReq_misses::total 1683563 # number of ReadReq misses
436system.cpu0.dcache.WriteReq_misses::cpu0.data 285996 # number of WriteReq misses
437system.cpu0.dcache.WriteReq_misses::total 285996 # number of WriteReq misses
438system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 16159 # number of LoadLockedReq misses
439system.cpu0.dcache.LoadLockedReq_misses::total 16159 # number of LoadLockedReq misses
440system.cpu0.dcache.StoreCondReq_misses::cpu0.data 703 # number of StoreCondReq misses
441system.cpu0.dcache.StoreCondReq_misses::total 703 # number of StoreCondReq misses
442system.cpu0.dcache.demand_misses::cpu0.data 1969559 # number of demand (read+write) misses
443system.cpu0.dcache.demand_misses::total 1969559 # number of demand (read+write) misses
444system.cpu0.dcache.overall_misses::cpu0.data 1969559 # number of overall misses
445system.cpu0.dcache.overall_misses::total 1969559 # number of overall misses
446system.cpu0.dcache.ReadReq_accesses::cpu0.data 8981669 # number of ReadReq accesses(hits+misses)
447system.cpu0.dcache.ReadReq_accesses::total 8981669 # number of ReadReq accesses(hits+misses)
448system.cpu0.dcache.WriteReq_accesses::cpu0.data 5748261 # number of WriteReq accesses(hits+misses)
449system.cpu0.dcache.WriteReq_accesses::total 5748261 # number of WriteReq accesses(hits+misses)
450system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 188297 # number of LoadLockedReq accesses(hits+misses)
451system.cpu0.dcache.LoadLockedReq_accesses::total 188297 # number of LoadLockedReq accesses(hits+misses)
452system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 187338 # number of StoreCondReq accesses(hits+misses)
453system.cpu0.dcache.StoreCondReq_accesses::total 187338 # number of StoreCondReq accesses(hits+misses)
454system.cpu0.dcache.demand_accesses::cpu0.data 14729930 # number of demand (read+write) accesses
455system.cpu0.dcache.demand_accesses::total 14729930 # number of demand (read+write) accesses
456system.cpu0.dcache.overall_accesses::cpu0.data 14729930 # number of overall (read+write) accesses
457system.cpu0.dcache.overall_accesses::total 14729930 # number of overall (read+write) accesses
458system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.187444 # miss rate for ReadReq accesses
459system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.049753 # miss rate for WriteReq accesses
460system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.085817 # miss rate for LoadLockedReq accesses
461system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.003753 # miss rate for StoreCondReq accesses
462system.cpu0.dcache.demand_miss_rate::cpu0.data 0.133711 # miss rate for demand accesses
463system.cpu0.dcache.overall_miss_rate::cpu0.data 0.133711 # miss rate for overall accesses
464system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
465system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
466system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
467system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked

468system.cpu0.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
469system.cpu0.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

468system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
469system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

470system.cpu0.dcache.fast_writes 0 # number of fast writes performed
471system.cpu0.dcache.cache_copies 0 # number of cache copies performed
472system.cpu0.dcache.writebacks::writebacks 771740 # number of writebacks
473system.cpu0.dcache.writebacks::total 771740 # number of writebacks
474system.cpu0.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
475system.cpu1.dtb.fetch_hits 0 # ITB hits
476system.cpu1.dtb.fetch_misses 0 # ITB misses
477system.cpu1.dtb.fetch_acv 0 # ITB acv
478system.cpu1.dtb.fetch_accesses 0 # ITB accesses
479system.cpu1.dtb.read_hits 1163439 # DTB read hits
480system.cpu1.dtb.read_misses 3277 # DTB read misses
481system.cpu1.dtb.read_acv 58 # DTB read access violations
482system.cpu1.dtb.read_accesses 220342 # DTB read accesses
483system.cpu1.dtb.write_hits 751446 # DTB write hits
484system.cpu1.dtb.write_misses 415 # DTB write misses
485system.cpu1.dtb.write_acv 58 # DTB write access violations
486system.cpu1.dtb.write_accesses 103280 # DTB write accesses
487system.cpu1.dtb.data_hits 1914885 # DTB hits
488system.cpu1.dtb.data_misses 3692 # DTB misses
489system.cpu1.dtb.data_acv 116 # DTB access violations
490system.cpu1.dtb.data_accesses 323622 # DTB accesses
491system.cpu1.itb.fetch_hits 1468399 # ITB hits
492system.cpu1.itb.fetch_misses 1539 # ITB misses
493system.cpu1.itb.fetch_acv 57 # ITB acv
494system.cpu1.itb.fetch_accesses 1469938 # ITB accesses
495system.cpu1.itb.read_hits 0 # DTB read hits
496system.cpu1.itb.read_misses 0 # DTB read misses
497system.cpu1.itb.read_acv 0 # DTB read access violations
498system.cpu1.itb.read_accesses 0 # DTB read accesses
499system.cpu1.itb.write_hits 0 # DTB write hits
500system.cpu1.itb.write_misses 0 # DTB write misses
501system.cpu1.itb.write_acv 0 # DTB write access violations
502system.cpu1.itb.write_accesses 0 # DTB write accesses
503system.cpu1.itb.data_hits 0 # DTB hits
504system.cpu1.itb.data_misses 0 # DTB misses
505system.cpu1.itb.data_acv 0 # DTB access violations
506system.cpu1.itb.data_accesses 0 # DTB accesses
507system.cpu1.numCycles 3740248881 # number of cpu cycles simulated
508system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started
509system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed
510system.cpu1.committedInsts 5931958 # Number of instructions committed
511system.cpu1.committedOps 5931958 # Number of ops (including micro ops) committed
512system.cpu1.num_int_alu_accesses 5550578 # Number of integer alu accesses
513system.cpu1.num_fp_alu_accesses 28590 # Number of float alu accesses
514system.cpu1.num_func_calls 182742 # number of times a function call or return occured
515system.cpu1.num_conditional_control_insts 577190 # number of instructions that are conditional controls
516system.cpu1.num_int_insts 5550578 # number of integer instructions
517system.cpu1.num_fp_insts 28590 # number of float instructions
518system.cpu1.num_int_register_reads 7657288 # number of times the integer registers were read
519system.cpu1.num_int_register_writes 4163275 # number of times the integer registers were written
520system.cpu1.num_fp_register_reads 17889 # number of times the floating registers were read
521system.cpu1.num_fp_register_writes 17683 # number of times the floating registers were written
522system.cpu1.num_mem_refs 1926244 # number of memory refs
523system.cpu1.num_load_insts 1170888 # Number of load instructions
524system.cpu1.num_store_insts 755356 # Number of store instructions
525system.cpu1.num_idle_cycles 3734312190.077655 # Number of idle cycles
526system.cpu1.num_busy_cycles 5936690.922345 # Number of busy cycles
527system.cpu1.not_idle_fraction 0.001587 # Percentage of non-idle cycles
528system.cpu1.idle_fraction 0.998413 # Percentage of idle cycles
529system.cpu1.kern.inst.arm 0 # number of arm instructions executed
530system.cpu1.kern.inst.quiesce 2204 # number of quiesce instructions executed
531system.cpu1.kern.inst.hwrei 39554 # number of hwrei instructions executed
532system.cpu1.kern.ipl_count::0 10328 33.46% 33.46% # number of times we switched to this ipl
533system.cpu1.kern.ipl_count::22 1907 6.18% 39.64% # number of times we switched to this ipl
534system.cpu1.kern.ipl_count::30 110 0.36% 40.00% # number of times we switched to this ipl
535system.cpu1.kern.ipl_count::31 18518 60.00% 100.00% # number of times we switched to this ipl
536system.cpu1.kern.ipl_count::total 30863 # number of times we switched to this ipl
537system.cpu1.kern.ipl_good::0 10318 45.77% 45.77% # number of times we switched to this ipl from a different ipl
538system.cpu1.kern.ipl_good::22 1907 8.46% 54.23% # number of times we switched to this ipl from a different ipl
539system.cpu1.kern.ipl_good::30 110 0.49% 54.72% # number of times we switched to this ipl from a different ipl
540system.cpu1.kern.ipl_good::31 10208 45.28% 100.00% # number of times we switched to this ipl from a different ipl
541system.cpu1.kern.ipl_good::total 22543 # number of times we switched to this ipl from a different ipl
542system.cpu1.kern.ipl_ticks::0 1859123008500 99.41% 99.41% # number of cycles we spent at this ipl
543system.cpu1.kern.ipl_ticks::22 82001000 0.00% 99.42% # number of cycles we spent at this ipl
544system.cpu1.kern.ipl_ticks::30 14064500 0.00% 99.42% # number of cycles we spent at this ipl
545system.cpu1.kern.ipl_ticks::31 10905353000 0.58% 100.00% # number of cycles we spent at this ipl
546system.cpu1.kern.ipl_ticks::total 1870124427000 # number of cycles we spent at this ipl
547system.cpu1.kern.ipl_used::0 0.999032 # fraction of swpipl calls that actually changed the ipl
548system.cpu1.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
549system.cpu1.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl
550system.cpu1.kern.ipl_used::31 0.551247 # fraction of swpipl calls that actually changed the ipl
551system.cpu1.kern.syscall::2 2 2.00% 2.00% # number of syscalls executed
552system.cpu1.kern.syscall::3 11 11.00% 13.00% # number of syscalls executed
553system.cpu1.kern.syscall::4 2 2.00% 15.00% # number of syscalls executed
554system.cpu1.kern.syscall::6 10 10.00% 25.00% # number of syscalls executed
555system.cpu1.kern.syscall::17 6 6.00% 31.00% # number of syscalls executed
556system.cpu1.kern.syscall::19 2 2.00% 33.00% # number of syscalls executed
557system.cpu1.kern.syscall::23 2 2.00% 35.00% # number of syscalls executed
558system.cpu1.kern.syscall::24 2 2.00% 37.00% # number of syscalls executed
559system.cpu1.kern.syscall::33 4 4.00% 41.00% # number of syscalls executed
560system.cpu1.kern.syscall::45 17 17.00% 58.00% # number of syscalls executed
561system.cpu1.kern.syscall::47 2 2.00% 60.00% # number of syscalls executed
562system.cpu1.kern.syscall::48 2 2.00% 62.00% # number of syscalls executed
563system.cpu1.kern.syscall::59 3 3.00% 65.00% # number of syscalls executed
564system.cpu1.kern.syscall::71 24 24.00% 89.00% # number of syscalls executed
565system.cpu1.kern.syscall::74 8 8.00% 97.00% # number of syscalls executed
566system.cpu1.kern.syscall::90 1 1.00% 98.00% # number of syscalls executed
567system.cpu1.kern.syscall::132 2 2.00% 100.00% # number of syscalls executed
568system.cpu1.kern.syscall::total 100 # number of syscalls executed
569system.cpu1.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed
570system.cpu1.kern.callpal::wripir 8 0.02% 0.03% # number of callpals executed
571system.cpu1.kern.callpal::wrmces 1 0.00% 0.03% # number of callpals executed
572system.cpu1.kern.callpal::wrfen 1 0.00% 0.03% # number of callpals executed
573system.cpu1.kern.callpal::swpctx 470 1.46% 1.50% # number of callpals executed
574system.cpu1.kern.callpal::tbi 15 0.05% 1.54% # number of callpals executed
575system.cpu1.kern.callpal::wrent 7 0.02% 1.57% # number of callpals executed
576system.cpu1.kern.callpal::swpipl 26238 81.66% 83.22% # number of callpals executed
577system.cpu1.kern.callpal::rdps 2576 8.02% 91.24% # number of callpals executed
578system.cpu1.kern.callpal::wrkgp 1 0.00% 91.25% # number of callpals executed
579system.cpu1.kern.callpal::wrusp 4 0.01% 91.26% # number of callpals executed
580system.cpu1.kern.callpal::rdusp 2 0.01% 91.26% # number of callpals executed
581system.cpu1.kern.callpal::whami 3 0.01% 91.27% # number of callpals executed
582system.cpu1.kern.callpal::rti 2607 8.11% 99.39% # number of callpals executed
583system.cpu1.kern.callpal::callsys 158 0.49% 99.88% # number of callpals executed
584system.cpu1.kern.callpal::imb 38 0.12% 100.00% # number of callpals executed
585system.cpu1.kern.callpal::rdunique 1 0.00% 100.00% # number of callpals executed
586system.cpu1.kern.callpal::total 32131 # number of callpals executed
587system.cpu1.kern.mode_switch::kernel 1033 # number of protection mode switches
588system.cpu1.kern.mode_switch::user 580 # number of protection mode switches
589system.cpu1.kern.mode_switch::idle 2046 # number of protection mode switches
590system.cpu1.kern.mode_good::kernel 612
591system.cpu1.kern.mode_good::user 580
592system.cpu1.kern.mode_good::idle 32
593system.cpu1.kern.mode_switch_good::kernel 0.592449 # fraction of useful protection mode switches
594system.cpu1.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
595system.cpu1.kern.mode_switch_good::idle 0.015640 # fraction of useful protection mode switches
596system.cpu1.kern.mode_switch_good::total 1.608089 # fraction of useful protection mode switches
597system.cpu1.kern.mode_ticks::kernel 1373917500 0.07% 0.07% # number of ticks spent at the given mode
598system.cpu1.kern.mode_ticks::user 508289000 0.03% 0.10% # number of ticks spent at the given mode
599system.cpu1.kern.mode_ticks::idle 1868002549000 99.90% 100.00% # number of ticks spent at the given mode
600system.cpu1.kern.swap_context 471 # number of times the context was actually changed
601system.cpu1.icache.replacements 103091 # number of replacements
602system.cpu1.icache.tagsinuse 427.126317 # Cycle average of tags in use
603system.cpu1.icache.total_refs 5832136 # Total number of references to valid blocks.
604system.cpu1.icache.sampled_refs 103603 # Sample count of references to valid blocks.
605system.cpu1.icache.avg_refs 56.293119 # Average number of references to valid blocks.
606system.cpu1.icache.warmup_cycle 1868933059000 # Cycle when the warmup percentage was hit.
607system.cpu1.icache.occ_blocks::cpu1.inst 427.126317 # Average occupied blocks per requestor
608system.cpu1.icache.occ_percent::cpu1.inst 0.834231 # Average percentage of cache occupancy
609system.cpu1.icache.occ_percent::total 0.834231 # Average percentage of cache occupancy
610system.cpu1.icache.ReadReq_hits::cpu1.inst 5832136 # number of ReadReq hits
611system.cpu1.icache.ReadReq_hits::total 5832136 # number of ReadReq hits
612system.cpu1.icache.demand_hits::cpu1.inst 5832136 # number of demand (read+write) hits
613system.cpu1.icache.demand_hits::total 5832136 # number of demand (read+write) hits
614system.cpu1.icache.overall_hits::cpu1.inst 5832136 # number of overall hits
615system.cpu1.icache.overall_hits::total 5832136 # number of overall hits
616system.cpu1.icache.ReadReq_misses::cpu1.inst 103630 # number of ReadReq misses
617system.cpu1.icache.ReadReq_misses::total 103630 # number of ReadReq misses
618system.cpu1.icache.demand_misses::cpu1.inst 103630 # number of demand (read+write) misses
619system.cpu1.icache.demand_misses::total 103630 # number of demand (read+write) misses
620system.cpu1.icache.overall_misses::cpu1.inst 103630 # number of overall misses
621system.cpu1.icache.overall_misses::total 103630 # number of overall misses
622system.cpu1.icache.ReadReq_accesses::cpu1.inst 5935766 # number of ReadReq accesses(hits+misses)
623system.cpu1.icache.ReadReq_accesses::total 5935766 # number of ReadReq accesses(hits+misses)
624system.cpu1.icache.demand_accesses::cpu1.inst 5935766 # number of demand (read+write) accesses
625system.cpu1.icache.demand_accesses::total 5935766 # number of demand (read+write) accesses
626system.cpu1.icache.overall_accesses::cpu1.inst 5935766 # number of overall (read+write) accesses
627system.cpu1.icache.overall_accesses::total 5935766 # number of overall (read+write) accesses
628system.cpu1.icache.ReadReq_miss_rate::cpu1.inst 0.017459 # miss rate for ReadReq accesses
629system.cpu1.icache.demand_miss_rate::cpu1.inst 0.017459 # miss rate for demand accesses
630system.cpu1.icache.overall_miss_rate::cpu1.inst 0.017459 # miss rate for overall accesses
631system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
632system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
633system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked
634system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked

635system.cpu1.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
636system.cpu1.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

635system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
636system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked

637system.cpu1.icache.fast_writes 0 # number of fast writes performed
638system.cpu1.icache.cache_copies 0 # number of cache copies performed
639system.cpu1.icache.writebacks::writebacks 15 # number of writebacks
640system.cpu1.icache.writebacks::total 15 # number of writebacks
641system.cpu1.icache.no_allocate_misses 0 # Number of misses that were no-allocate
642system.cpu1.dcache.replacements 62338 # number of replacements
643system.cpu1.dcache.tagsinuse 391.951263 # Cycle average of tags in use
644system.cpu1.dcache.total_refs 1834544 # Total number of references to valid blocks.
645system.cpu1.dcache.sampled_refs 62657 # Sample count of references to valid blocks.
646system.cpu1.dcache.avg_refs 29.279155 # Average number of references to valid blocks.
647system.cpu1.dcache.warmup_cycle 1851267520500 # Cycle when the warmup percentage was hit.
648system.cpu1.dcache.occ_blocks::cpu1.data 391.951263 # Average occupied blocks per requestor
649system.cpu1.dcache.occ_percent::cpu1.data 0.765530 # Average percentage of cache occupancy
650system.cpu1.dcache.occ_percent::total 0.765530 # Average percentage of cache occupancy
651system.cpu1.dcache.ReadReq_hits::cpu1.data 1109315 # number of ReadReq hits
652system.cpu1.dcache.ReadReq_hits::total 1109315 # number of ReadReq hits
653system.cpu1.dcache.WriteReq_hits::cpu1.data 707444 # number of WriteReq hits
654system.cpu1.dcache.WriteReq_hits::total 707444 # number of WriteReq hits
655system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 15129 # number of LoadLockedReq hits
656system.cpu1.dcache.LoadLockedReq_hits::total 15129 # number of LoadLockedReq hits
657system.cpu1.dcache.StoreCondReq_hits::cpu1.data 15613 # number of StoreCondReq hits
658system.cpu1.dcache.StoreCondReq_hits::total 15613 # number of StoreCondReq hits
659system.cpu1.dcache.demand_hits::cpu1.data 1816759 # number of demand (read+write) hits
660system.cpu1.dcache.demand_hits::total 1816759 # number of demand (read+write) hits
661system.cpu1.dcache.overall_hits::cpu1.data 1816759 # number of overall hits
662system.cpu1.dcache.overall_hits::total 1816759 # number of overall hits
663system.cpu1.dcache.ReadReq_misses::cpu1.data 41650 # number of ReadReq misses
664system.cpu1.dcache.ReadReq_misses::total 41650 # number of ReadReq misses
665system.cpu1.dcache.WriteReq_misses::cpu1.data 25861 # number of WriteReq misses
666system.cpu1.dcache.WriteReq_misses::total 25861 # number of WriteReq misses
667system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 1289 # number of LoadLockedReq misses
668system.cpu1.dcache.LoadLockedReq_misses::total 1289 # number of LoadLockedReq misses
669system.cpu1.dcache.StoreCondReq_misses::cpu1.data 732 # number of StoreCondReq misses
670system.cpu1.dcache.StoreCondReq_misses::total 732 # number of StoreCondReq misses
671system.cpu1.dcache.demand_misses::cpu1.data 67511 # number of demand (read+write) misses
672system.cpu1.dcache.demand_misses::total 67511 # number of demand (read+write) misses
673system.cpu1.dcache.overall_misses::cpu1.data 67511 # number of overall misses
674system.cpu1.dcache.overall_misses::total 67511 # number of overall misses
675system.cpu1.dcache.ReadReq_accesses::cpu1.data 1150965 # number of ReadReq accesses(hits+misses)
676system.cpu1.dcache.ReadReq_accesses::total 1150965 # number of ReadReq accesses(hits+misses)
677system.cpu1.dcache.WriteReq_accesses::cpu1.data 733305 # number of WriteReq accesses(hits+misses)
678system.cpu1.dcache.WriteReq_accesses::total 733305 # number of WriteReq accesses(hits+misses)
679system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 16418 # number of LoadLockedReq accesses(hits+misses)
680system.cpu1.dcache.LoadLockedReq_accesses::total 16418 # number of LoadLockedReq accesses(hits+misses)
681system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 16345 # number of StoreCondReq accesses(hits+misses)
682system.cpu1.dcache.StoreCondReq_accesses::total 16345 # number of StoreCondReq accesses(hits+misses)
683system.cpu1.dcache.demand_accesses::cpu1.data 1884270 # number of demand (read+write) accesses
684system.cpu1.dcache.demand_accesses::total 1884270 # number of demand (read+write) accesses
685system.cpu1.dcache.overall_accesses::cpu1.data 1884270 # number of overall (read+write) accesses
686system.cpu1.dcache.overall_accesses::total 1884270 # number of overall (read+write) accesses
687system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.036187 # miss rate for ReadReq accesses
688system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.035266 # miss rate for WriteReq accesses
689system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.078511 # miss rate for LoadLockedReq accesses
690system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.044784 # miss rate for StoreCondReq accesses
691system.cpu1.dcache.demand_miss_rate::cpu1.data 0.035829 # miss rate for demand accesses
692system.cpu1.dcache.overall_miss_rate::cpu1.data 0.035829 # miss rate for overall accesses
693system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
694system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
695system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
696system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked

697system.cpu1.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
698system.cpu1.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked

697system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
698system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked