Cross Reference: /gem5/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt

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stats.txt (11606:6b749761c398)	stats.txt (11687:b3d5f0e9e258)
1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357999000 # Number of ticks simulated 5final_tick 1869357999000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks	1 2---------- Begin Simulation Statistics ---------- 3sim_seconds 1.869358 # Number of seconds simulated 4sim_ticks 1869357999000 # Number of ticks simulated 5final_tick 1869357999000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) 6sim_freq 1000000000000 # Frequency of simulated ticks
7host_inst_rate 1685575 # Simulator instruction rate (inst/s) 8host_op_rate 1685575 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 48476092750 # Simulator tick rate (ticks/s) 10host_mem_usage 336716 # Number of bytes of host memory used 11host_seconds 38.56 # Real time elapsed on the host	7host_inst_rate 3011659 # Simulator instruction rate (inst/s) 8host_op_rate 3011657 # Simulator op (including micro ops) rate (op/s) 9host_tick_rate 86613414800 # Simulator tick rate (ticks/s) 10host_mem_usage 336084 # Number of bytes of host memory used 11host_seconds 21.58 # Real time elapsed on the host
12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu0.data 66535744 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 20system.physmem.bytes_read::cpu1.data 766400 # Number of bytes read from this memory 21system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 22system.physmem.bytes_read::total 68167488 # Number of bytes read from this memory 23system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 24system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory 25system.physmem.bytes_inst_read::total 864384 # Number of instructions bytes read from this memory 26system.physmem.bytes_written::writebacks 7837888 # Number of bytes written to this memory 27system.physmem.bytes_written::total 7837888 # Number of bytes written to this memory 28system.physmem.num_reads::cpu0.inst 11848 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu0.data 1039621 # Number of read requests responded to by this memory 30system.physmem.num_reads::cpu1.inst 1658 # Number of read requests responded to by this memory 31system.physmem.num_reads::cpu1.data 11975 # Number of read requests responded to by this memory 32system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory 33system.physmem.num_reads::total 1065117 # Number of read requests responded to by this memory 34system.physmem.num_writes::writebacks 122467 # Number of write requests responded to by this memory 35system.physmem.num_writes::total 122467 # Number of write requests responded to by this memory 36system.physmem.bw_read::cpu0.inst 405632 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu0.data 35592831 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu1.inst 56764 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::cpu1.data 409980 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_read::tsunami.ide 514 # Total read bandwidth from this memory (bytes/s) 41system.physmem.bw_read::total 36465721 # Total read bandwidth from this memory (bytes/s) 42system.physmem.bw_inst_read::cpu0.inst 405632 # Instruction read bandwidth from this memory (bytes/s) 43system.physmem.bw_inst_read::cpu1.inst 56764 # Instruction read bandwidth from this memory (bytes/s) 44system.physmem.bw_inst_read::total 462396 # Instruction read bandwidth from this memory (bytes/s) 45system.physmem.bw_write::writebacks 4192823 # Write bandwidth from this memory (bytes/s) 46system.physmem.bw_write::total 4192823 # Write bandwidth from this memory (bytes/s) 47system.physmem.bw_total::writebacks 4192823 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu0.data 35592831 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::cpu1.data 409980 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) 53system.physmem.bw_total::total 40658545 # Total bandwidth to/from this memory (bytes/s) 54system.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 55system.bridge.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 56system.cpu_clk_domain.clock 500 # Clock period in ticks 57system.cpu0.dtb.fetch_hits 0 # ITB hits 58system.cpu0.dtb.fetch_misses 0 # ITB misses 59system.cpu0.dtb.fetch_acv 0 # ITB acv 60system.cpu0.dtb.fetch_accesses 0 # ITB accesses 61system.cpu0.dtb.read_hits 7758808 # DTB read hits 62system.cpu0.dtb.read_misses 7155 # DTB read misses 63system.cpu0.dtb.read_acv 152 # DTB read access violations 64system.cpu0.dtb.read_accesses 531148 # DTB read accesses 65system.cpu0.dtb.write_hits 4740251 # DTB write hits 66system.cpu0.dtb.write_misses 732 # DTB write misses 67system.cpu0.dtb.write_acv 102 # DTB write access violations 68system.cpu0.dtb.write_accesses 201714 # DTB write accesses 69system.cpu0.dtb.data_hits 12499059 # DTB hits 70system.cpu0.dtb.data_misses 7887 # DTB misses 71system.cpu0.dtb.data_acv 254 # DTB access violations 72system.cpu0.dtb.data_accesses 732862 # DTB accesses 73system.cpu0.itb.fetch_hits 3525726 # ITB hits 74system.cpu0.itb.fetch_misses 3572 # ITB misses 75system.cpu0.itb.fetch_acv 127 # ITB acv 76system.cpu0.itb.fetch_accesses 3529298 # ITB accesses 77system.cpu0.itb.read_hits 0 # DTB read hits 78system.cpu0.itb.read_misses 0 # DTB read misses 79system.cpu0.itb.read_acv 0 # DTB read access violations 80system.cpu0.itb.read_accesses 0 # DTB read accesses 81system.cpu0.itb.write_hits 0 # DTB write hits 82system.cpu0.itb.write_misses 0 # DTB write misses 83system.cpu0.itb.write_acv 0 # DTB write access violations 84system.cpu0.itb.write_accesses 0 # DTB write accesses 85system.cpu0.itb.data_hits 0 # DTB hits 86system.cpu0.itb.data_misses 0 # DTB misses 87system.cpu0.itb.data_acv 0 # DTB access violations 88system.cpu0.itb.data_accesses 0 # DTB accesses 89system.cpu0.numPwrStateTransitions 13588 # Number of power state transitions 90system.cpu0.pwrStateClkGateDist::samples 6794 # Distribution of time spent in the clock gated state 91system.cpu0.pwrStateClkGateDist::mean 271506704.857374 # Distribution of time spent in the clock gated state 92system.cpu0.pwrStateClkGateDist::stdev 434955692.191892 # Distribution of time spent in the clock gated state 93system.cpu0.pwrStateClkGateDist::1000-5e+10 6794 100.00% 100.00% # Distribution of time spent in the clock gated state 94system.cpu0.pwrStateClkGateDist::min_value 21000 # Distribution of time spent in the clock gated state 95system.cpu0.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state 96system.cpu0.pwrStateClkGateDist::total 6794 # Distribution of time spent in the clock gated state 97system.cpu0.pwrStateResidencyTicks::ON 24741446199 # Cumulative time (in ticks) in various power states 98system.cpu0.pwrStateResidencyTicks::CLK_GATED 1844616552801 # Cumulative time (in ticks) in various power states 99system.cpu0.numCycles 3738722793 # number of cpu cycles simulated 100system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 101system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 102system.cpu0.kern.inst.arm 0 # number of arm instructions executed 103system.cpu0.kern.inst.quiesce 6794 # number of quiesce instructions executed 104system.cpu0.kern.inst.hwrei 150435 # number of hwrei instructions executed 105system.cpu0.kern.ipl_count::0 51398 40.00% 40.00% # number of times we switched to this ipl 106system.cpu0.kern.ipl_count::21 243 0.19% 40.19% # number of times we switched to this ipl 107system.cpu0.kern.ipl_count::22 1907 1.48% 41.67% # number of times we switched to this ipl 108system.cpu0.kern.ipl_count::30 514 0.40% 42.07% # number of times we switched to this ipl 109system.cpu0.kern.ipl_count::31 74446 57.93% 100.00% # number of times we switched to this ipl 110system.cpu0.kern.ipl_count::total 128508 # number of times we switched to this ipl 111system.cpu0.kern.ipl_good::0 51050 48.97% 48.97% # number of times we switched to this ipl from a different ipl 112system.cpu0.kern.ipl_good::21 243 0.23% 49.20% # number of times we switched to this ipl from a different ipl 113system.cpu0.kern.ipl_good::22 1907 1.83% 51.03% # number of times we switched to this ipl from a different ipl 114system.cpu0.kern.ipl_good::30 514 0.49% 51.52% # number of times we switched to this ipl from a different ipl 115system.cpu0.kern.ipl_good::31 50536 48.48% 100.00% # number of times we switched to this ipl from a different ipl 116system.cpu0.kern.ipl_good::total 104250 # number of times we switched to this ipl from a different ipl 117system.cpu0.kern.ipl_ticks::0 1853222732000 99.14% 99.14% # number of cycles we spent at this ipl 118system.cpu0.kern.ipl_ticks::21 20110000 0.00% 99.14% # number of cycles we spent at this ipl 119system.cpu0.kern.ipl_ticks::22 82001000 0.00% 99.14% # number of cycles we spent at this ipl 120system.cpu0.kern.ipl_ticks::30 57621500 0.00% 99.15% # number of cycles we spent at this ipl 121system.cpu0.kern.ipl_ticks::31 15975327000 0.85% 100.00% # number of cycles we spent at this ipl 122system.cpu0.kern.ipl_ticks::total 1869357791500 # number of cycles we spent at this ipl 123system.cpu0.kern.ipl_used::0 0.993229 # fraction of swpipl calls that actually changed the ipl 124system.cpu0.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl 125system.cpu0.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 126system.cpu0.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl 127system.cpu0.kern.ipl_used::31 0.678828 # fraction of swpipl calls that actually changed the ipl 128system.cpu0.kern.ipl_used::total 0.811234 # fraction of swpipl calls that actually changed the ipl 129system.cpu0.kern.syscall::2 6 2.63% 2.63% # number of syscalls executed 130system.cpu0.kern.syscall::3 20 8.77% 11.40% # number of syscalls executed 131system.cpu0.kern.syscall::4 2 0.88% 12.28% # number of syscalls executed 132system.cpu0.kern.syscall::6 32 14.04% 26.32% # number of syscalls executed 133system.cpu0.kern.syscall::12 1 0.44% 26.75% # number of syscalls executed 134system.cpu0.kern.syscall::15 1 0.44% 27.19% # number of syscalls executed 135system.cpu0.kern.syscall::17 9 3.95% 31.14% # number of syscalls executed 136system.cpu0.kern.syscall::19 8 3.51% 34.65% # number of syscalls executed 137system.cpu0.kern.syscall::20 6 2.63% 37.28% # number of syscalls executed 138system.cpu0.kern.syscall::23 2 0.88% 38.16% # number of syscalls executed 139system.cpu0.kern.syscall::24 4 1.75% 39.91% # number of syscalls executed 140system.cpu0.kern.syscall::33 7 3.07% 42.98% # number of syscalls executed 141system.cpu0.kern.syscall::41 2 0.88% 43.86% # number of syscalls executed 142system.cpu0.kern.syscall::45 37 16.23% 60.09% # number of syscalls executed 143system.cpu0.kern.syscall::47 4 1.75% 61.84% # number of syscalls executed 144system.cpu0.kern.syscall::48 8 3.51% 65.35% # number of syscalls executed 145system.cpu0.kern.syscall::54 10 4.39% 69.74% # number of syscalls executed 146system.cpu0.kern.syscall::58 1 0.44% 70.18% # number of syscalls executed 147system.cpu0.kern.syscall::59 5 2.19% 72.37% # number of syscalls executed 148system.cpu0.kern.syscall::71 30 13.16% 85.53% # number of syscalls executed 149system.cpu0.kern.syscall::73 3 1.32% 86.84% # number of syscalls executed 150system.cpu0.kern.syscall::74 8 3.51% 90.35% # number of syscalls executed 151system.cpu0.kern.syscall::87 1 0.44% 90.79% # number of syscalls executed 152system.cpu0.kern.syscall::90 2 0.88% 91.67% # number of syscalls executed 153system.cpu0.kern.syscall::92 9 3.95% 95.61% # number of syscalls executed 154system.cpu0.kern.syscall::97 2 0.88% 96.49% # number of syscalls executed 155system.cpu0.kern.syscall::98 2 0.88% 97.37% # number of syscalls executed 156system.cpu0.kern.syscall::132 2 0.88% 98.25% # number of syscalls executed 157system.cpu0.kern.syscall::144 2 0.88% 99.12% # number of syscalls executed 158system.cpu0.kern.syscall::147 2 0.88% 100.00% # number of syscalls executed 159system.cpu0.kern.syscall::total 228 # number of syscalls executed 160system.cpu0.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 161system.cpu0.kern.callpal::wripir 616 0.45% 0.45% # number of callpals executed 162system.cpu0.kern.callpal::wrmces 1 0.00% 0.45% # number of callpals executed 163system.cpu0.kern.callpal::wrfen 1 0.00% 0.46% # number of callpals executed 164system.cpu0.kern.callpal::wrvptptr 1 0.00% 0.46% # number of callpals executed 165system.cpu0.kern.callpal::swpctx 2743 2.02% 2.47% # number of callpals executed 166system.cpu0.kern.callpal::tbi 39 0.03% 2.50% # number of callpals executed 167system.cpu0.kern.callpal::wrent 7 0.01% 2.51% # number of callpals executed 168system.cpu0.kern.callpal::swpipl 121668 89.51% 92.02% # number of callpals executed 169system.cpu0.kern.callpal::rdps 6149 4.52% 96.54% # number of callpals executed 170system.cpu0.kern.callpal::wrkgp 1 0.00% 96.54% # number of callpals executed 171system.cpu0.kern.callpal::wrusp 3 0.00% 96.54% # number of callpals executed 172system.cpu0.kern.callpal::rdusp 7 0.01% 96.55% # number of callpals executed 173system.cpu0.kern.callpal::whami 2 0.00% 96.55% # number of callpals executed 174system.cpu0.kern.callpal::rti 4175 3.07% 99.62% # number of callpals executed 175system.cpu0.kern.callpal::callsys 369 0.27% 99.89% # number of callpals executed 176system.cpu0.kern.callpal::imb 146 0.11% 100.00% # number of callpals executed 177system.cpu0.kern.callpal::total 135929 # number of callpals executed 178system.cpu0.kern.mode_switch::kernel 6593 # number of protection mode switches 179system.cpu0.kern.mode_switch::user 1173 # number of protection mode switches 180system.cpu0.kern.mode_switch::idle 0 # number of protection mode switches 181system.cpu0.kern.mode_good::kernel 1172 182system.cpu0.kern.mode_good::user 1173 183system.cpu0.kern.mode_good::idle 0 184system.cpu0.kern.mode_switch_good::kernel 0.177764 # fraction of useful protection mode switches 185system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 186system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches 187system.cpu0.kern.mode_switch_good::total 0.301957 # fraction of useful protection mode switches 188system.cpu0.kern.mode_ticks::kernel 1868349163500 99.95% 99.95% # number of ticks spent at the given mode 189system.cpu0.kern.mode_ticks::user 1008627000 0.05% 100.00% # number of ticks spent at the given mode 190system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode 191system.cpu0.kern.swap_context 2744 # number of times the context was actually changed 192system.cpu0.committedInsts 49477745 # Number of instructions committed 193system.cpu0.committedOps 49477745 # Number of ops (including micro ops) committed 194system.cpu0.num_int_alu_accesses 46201705 # Number of integer alu accesses 195system.cpu0.num_fp_alu_accesses 197598 # Number of float alu accesses 196system.cpu0.num_func_calls 1124633 # number of times a function call or return occured 197system.cpu0.num_conditional_control_insts 6043603 # number of instructions that are conditional controls 198system.cpu0.num_int_insts 46201705 # number of integer instructions 199system.cpu0.num_fp_insts 197598 # number of float instructions 200system.cpu0.num_int_register_reads 64003225 # number of times the integer registers were read 201system.cpu0.num_int_register_writes 34834421 # number of times the integer registers were written 202system.cpu0.num_fp_register_reads 97440 # number of times the floating registers were read 203system.cpu0.num_fp_register_writes 98967 # number of times the floating registers were written 204system.cpu0.num_mem_refs 12536107 # number of memory refs 205system.cpu0.num_load_insts 7783754 # Number of load instructions 206system.cpu0.num_store_insts 4752353 # Number of store instructions 207system.cpu0.num_idle_cycles 3689239810.666409 # Number of idle cycles 208system.cpu0.num_busy_cycles 49482982.333591 # Number of busy cycles 209system.cpu0.not_idle_fraction 0.013235 # Percentage of non-idle cycles 210system.cpu0.idle_fraction 0.986765 # Percentage of idle cycles 211system.cpu0.Branches 7530826 # Number of branches fetched 212system.cpu0.op_class::No_OpClass 2589816 5.23% 5.23% # Class of executed instruction 213system.cpu0.op_class::IntAlu 33436017 67.57% 72.80% # Class of executed instruction 214system.cpu0.op_class::IntMult 50540 0.10% 72.90% # Class of executed instruction 215system.cpu0.op_class::IntDiv 0 0.00% 72.90% # Class of executed instruction 216system.cpu0.op_class::FloatAdd 27840 0.06% 72.96% # Class of executed instruction 217system.cpu0.op_class::FloatCmp 0 0.00% 72.96% # Class of executed instruction 218system.cpu0.op_class::FloatCvt 0 0.00% 72.96% # Class of executed instruction 219system.cpu0.op_class::FloatMult 0 0.00% 72.96% # Class of executed instruction	12sim_insts 64999904 # Number of instructions simulated 13sim_ops 64999904 # Number of ops (including micro ops) simulated 14system.voltage_domain.voltage 1 # Voltage in Volts 15system.clk_domain.clock 1000 # Clock period in ticks 16system.physmem.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 17system.physmem.bytes_read::cpu0.inst 758272 # Number of bytes read from this memory 18system.physmem.bytes_read::cpu0.data 66535744 # Number of bytes read from this memory 19system.physmem.bytes_read::cpu1.inst 106112 # Number of bytes read from this memory 20system.physmem.bytes_read::cpu1.data 766400 # Number of bytes read from this memory 21system.physmem.bytes_read::tsunami.ide 960 # Number of bytes read from this memory 22system.physmem.bytes_read::total 68167488 # Number of bytes read from this memory 23system.physmem.bytes_inst_read::cpu0.inst 758272 # Number of instructions bytes read from this memory 24system.physmem.bytes_inst_read::cpu1.inst 106112 # Number of instructions bytes read from this memory 25system.physmem.bytes_inst_read::total 864384 # Number of instructions bytes read from this memory 26system.physmem.bytes_written::writebacks 7837888 # Number of bytes written to this memory 27system.physmem.bytes_written::total 7837888 # Number of bytes written to this memory 28system.physmem.num_reads::cpu0.inst 11848 # Number of read requests responded to by this memory 29system.physmem.num_reads::cpu0.data 1039621 # Number of read requests responded to by this memory 30system.physmem.num_reads::cpu1.inst 1658 # Number of read requests responded to by this memory 31system.physmem.num_reads::cpu1.data 11975 # Number of read requests responded to by this memory 32system.physmem.num_reads::tsunami.ide 15 # Number of read requests responded to by this memory 33system.physmem.num_reads::total 1065117 # Number of read requests responded to by this memory 34system.physmem.num_writes::writebacks 122467 # Number of write requests responded to by this memory 35system.physmem.num_writes::total 122467 # Number of write requests responded to by this memory 36system.physmem.bw_read::cpu0.inst 405632 # Total read bandwidth from this memory (bytes/s) 37system.physmem.bw_read::cpu0.data 35592831 # Total read bandwidth from this memory (bytes/s) 38system.physmem.bw_read::cpu1.inst 56764 # Total read bandwidth from this memory (bytes/s) 39system.physmem.bw_read::cpu1.data 409980 # Total read bandwidth from this memory (bytes/s) 40system.physmem.bw_read::tsunami.ide 514 # Total read bandwidth from this memory (bytes/s) 41system.physmem.bw_read::total 36465721 # Total read bandwidth from this memory (bytes/s) 42system.physmem.bw_inst_read::cpu0.inst 405632 # Instruction read bandwidth from this memory (bytes/s) 43system.physmem.bw_inst_read::cpu1.inst 56764 # Instruction read bandwidth from this memory (bytes/s) 44system.physmem.bw_inst_read::total 462396 # Instruction read bandwidth from this memory (bytes/s) 45system.physmem.bw_write::writebacks 4192823 # Write bandwidth from this memory (bytes/s) 46system.physmem.bw_write::total 4192823 # Write bandwidth from this memory (bytes/s) 47system.physmem.bw_total::writebacks 4192823 # Total bandwidth to/from this memory (bytes/s) 48system.physmem.bw_total::cpu0.inst 405632 # Total bandwidth to/from this memory (bytes/s) 49system.physmem.bw_total::cpu0.data 35592831 # Total bandwidth to/from this memory (bytes/s) 50system.physmem.bw_total::cpu1.inst 56764 # Total bandwidth to/from this memory (bytes/s) 51system.physmem.bw_total::cpu1.data 409980 # Total bandwidth to/from this memory (bytes/s) 52system.physmem.bw_total::tsunami.ide 514 # Total bandwidth to/from this memory (bytes/s) 53system.physmem.bw_total::total 40658545 # Total bandwidth to/from this memory (bytes/s) 54system.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 55system.bridge.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 56system.cpu_clk_domain.clock 500 # Clock period in ticks 57system.cpu0.dtb.fetch_hits 0 # ITB hits 58system.cpu0.dtb.fetch_misses 0 # ITB misses 59system.cpu0.dtb.fetch_acv 0 # ITB acv 60system.cpu0.dtb.fetch_accesses 0 # ITB accesses 61system.cpu0.dtb.read_hits 7758808 # DTB read hits 62system.cpu0.dtb.read_misses 7155 # DTB read misses 63system.cpu0.dtb.read_acv 152 # DTB read access violations 64system.cpu0.dtb.read_accesses 531148 # DTB read accesses 65system.cpu0.dtb.write_hits 4740251 # DTB write hits 66system.cpu0.dtb.write_misses 732 # DTB write misses 67system.cpu0.dtb.write_acv 102 # DTB write access violations 68system.cpu0.dtb.write_accesses 201714 # DTB write accesses 69system.cpu0.dtb.data_hits 12499059 # DTB hits 70system.cpu0.dtb.data_misses 7887 # DTB misses 71system.cpu0.dtb.data_acv 254 # DTB access violations 72system.cpu0.dtb.data_accesses 732862 # DTB accesses 73system.cpu0.itb.fetch_hits 3525726 # ITB hits 74system.cpu0.itb.fetch_misses 3572 # ITB misses 75system.cpu0.itb.fetch_acv 127 # ITB acv 76system.cpu0.itb.fetch_accesses 3529298 # ITB accesses 77system.cpu0.itb.read_hits 0 # DTB read hits 78system.cpu0.itb.read_misses 0 # DTB read misses 79system.cpu0.itb.read_acv 0 # DTB read access violations 80system.cpu0.itb.read_accesses 0 # DTB read accesses 81system.cpu0.itb.write_hits 0 # DTB write hits 82system.cpu0.itb.write_misses 0 # DTB write misses 83system.cpu0.itb.write_acv 0 # DTB write access violations 84system.cpu0.itb.write_accesses 0 # DTB write accesses 85system.cpu0.itb.data_hits 0 # DTB hits 86system.cpu0.itb.data_misses 0 # DTB misses 87system.cpu0.itb.data_acv 0 # DTB access violations 88system.cpu0.itb.data_accesses 0 # DTB accesses 89system.cpu0.numPwrStateTransitions 13588 # Number of power state transitions 90system.cpu0.pwrStateClkGateDist::samples 6794 # Distribution of time spent in the clock gated state 91system.cpu0.pwrStateClkGateDist::mean 271506704.857374 # Distribution of time spent in the clock gated state 92system.cpu0.pwrStateClkGateDist::stdev 434955692.191892 # Distribution of time spent in the clock gated state 93system.cpu0.pwrStateClkGateDist::1000-5e+10 6794 100.00% 100.00% # Distribution of time spent in the clock gated state 94system.cpu0.pwrStateClkGateDist::min_value 21000 # Distribution of time spent in the clock gated state 95system.cpu0.pwrStateClkGateDist::max_value 2000000000 # Distribution of time spent in the clock gated state 96system.cpu0.pwrStateClkGateDist::total 6794 # Distribution of time spent in the clock gated state 97system.cpu0.pwrStateResidencyTicks::ON 24741446199 # Cumulative time (in ticks) in various power states 98system.cpu0.pwrStateResidencyTicks::CLK_GATED 1844616552801 # Cumulative time (in ticks) in various power states 99system.cpu0.numCycles 3738722793 # number of cpu cycles simulated 100system.cpu0.numWorkItemsStarted 0 # number of work items this cpu started 101system.cpu0.numWorkItemsCompleted 0 # number of work items this cpu completed 102system.cpu0.kern.inst.arm 0 # number of arm instructions executed 103system.cpu0.kern.inst.quiesce 6794 # number of quiesce instructions executed 104system.cpu0.kern.inst.hwrei 150435 # number of hwrei instructions executed 105system.cpu0.kern.ipl_count::0 51398 40.00% 40.00% # number of times we switched to this ipl 106system.cpu0.kern.ipl_count::21 243 0.19% 40.19% # number of times we switched to this ipl 107system.cpu0.kern.ipl_count::22 1907 1.48% 41.67% # number of times we switched to this ipl 108system.cpu0.kern.ipl_count::30 514 0.40% 42.07% # number of times we switched to this ipl 109system.cpu0.kern.ipl_count::31 74446 57.93% 100.00% # number of times we switched to this ipl 110system.cpu0.kern.ipl_count::total 128508 # number of times we switched to this ipl 111system.cpu0.kern.ipl_good::0 51050 48.97% 48.97% # number of times we switched to this ipl from a different ipl 112system.cpu0.kern.ipl_good::21 243 0.23% 49.20% # number of times we switched to this ipl from a different ipl 113system.cpu0.kern.ipl_good::22 1907 1.83% 51.03% # number of times we switched to this ipl from a different ipl 114system.cpu0.kern.ipl_good::30 514 0.49% 51.52% # number of times we switched to this ipl from a different ipl 115system.cpu0.kern.ipl_good::31 50536 48.48% 100.00% # number of times we switched to this ipl from a different ipl 116system.cpu0.kern.ipl_good::total 104250 # number of times we switched to this ipl from a different ipl 117system.cpu0.kern.ipl_ticks::0 1853222732000 99.14% 99.14% # number of cycles we spent at this ipl 118system.cpu0.kern.ipl_ticks::21 20110000 0.00% 99.14% # number of cycles we spent at this ipl 119system.cpu0.kern.ipl_ticks::22 82001000 0.00% 99.14% # number of cycles we spent at this ipl 120system.cpu0.kern.ipl_ticks::30 57621500 0.00% 99.15% # number of cycles we spent at this ipl 121system.cpu0.kern.ipl_ticks::31 15975327000 0.85% 100.00% # number of cycles we spent at this ipl 122system.cpu0.kern.ipl_ticks::total 1869357791500 # number of cycles we spent at this ipl 123system.cpu0.kern.ipl_used::0 0.993229 # fraction of swpipl calls that actually changed the ipl 124system.cpu0.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl 125system.cpu0.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 126system.cpu0.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl 127system.cpu0.kern.ipl_used::31 0.678828 # fraction of swpipl calls that actually changed the ipl 128system.cpu0.kern.ipl_used::total 0.811234 # fraction of swpipl calls that actually changed the ipl 129system.cpu0.kern.syscall::2 6 2.63% 2.63% # number of syscalls executed 130system.cpu0.kern.syscall::3 20 8.77% 11.40% # number of syscalls executed 131system.cpu0.kern.syscall::4 2 0.88% 12.28% # number of syscalls executed 132system.cpu0.kern.syscall::6 32 14.04% 26.32% # number of syscalls executed 133system.cpu0.kern.syscall::12 1 0.44% 26.75% # number of syscalls executed 134system.cpu0.kern.syscall::15 1 0.44% 27.19% # number of syscalls executed 135system.cpu0.kern.syscall::17 9 3.95% 31.14% # number of syscalls executed 136system.cpu0.kern.syscall::19 8 3.51% 34.65% # number of syscalls executed 137system.cpu0.kern.syscall::20 6 2.63% 37.28% # number of syscalls executed 138system.cpu0.kern.syscall::23 2 0.88% 38.16% # number of syscalls executed 139system.cpu0.kern.syscall::24 4 1.75% 39.91% # number of syscalls executed 140system.cpu0.kern.syscall::33 7 3.07% 42.98% # number of syscalls executed 141system.cpu0.kern.syscall::41 2 0.88% 43.86% # number of syscalls executed 142system.cpu0.kern.syscall::45 37 16.23% 60.09% # number of syscalls executed 143system.cpu0.kern.syscall::47 4 1.75% 61.84% # number of syscalls executed 144system.cpu0.kern.syscall::48 8 3.51% 65.35% # number of syscalls executed 145system.cpu0.kern.syscall::54 10 4.39% 69.74% # number of syscalls executed 146system.cpu0.kern.syscall::58 1 0.44% 70.18% # number of syscalls executed 147system.cpu0.kern.syscall::59 5 2.19% 72.37% # number of syscalls executed 148system.cpu0.kern.syscall::71 30 13.16% 85.53% # number of syscalls executed 149system.cpu0.kern.syscall::73 3 1.32% 86.84% # number of syscalls executed 150system.cpu0.kern.syscall::74 8 3.51% 90.35% # number of syscalls executed 151system.cpu0.kern.syscall::87 1 0.44% 90.79% # number of syscalls executed 152system.cpu0.kern.syscall::90 2 0.88% 91.67% # number of syscalls executed 153system.cpu0.kern.syscall::92 9 3.95% 95.61% # number of syscalls executed 154system.cpu0.kern.syscall::97 2 0.88% 96.49% # number of syscalls executed 155system.cpu0.kern.syscall::98 2 0.88% 97.37% # number of syscalls executed 156system.cpu0.kern.syscall::132 2 0.88% 98.25% # number of syscalls executed 157system.cpu0.kern.syscall::144 2 0.88% 99.12% # number of syscalls executed 158system.cpu0.kern.syscall::147 2 0.88% 100.00% # number of syscalls executed 159system.cpu0.kern.syscall::total 228 # number of syscalls executed 160system.cpu0.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 161system.cpu0.kern.callpal::wripir 616 0.45% 0.45% # number of callpals executed 162system.cpu0.kern.callpal::wrmces 1 0.00% 0.45% # number of callpals executed 163system.cpu0.kern.callpal::wrfen 1 0.00% 0.46% # number of callpals executed 164system.cpu0.kern.callpal::wrvptptr 1 0.00% 0.46% # number of callpals executed 165system.cpu0.kern.callpal::swpctx 2743 2.02% 2.47% # number of callpals executed 166system.cpu0.kern.callpal::tbi 39 0.03% 2.50% # number of callpals executed 167system.cpu0.kern.callpal::wrent 7 0.01% 2.51% # number of callpals executed 168system.cpu0.kern.callpal::swpipl 121668 89.51% 92.02% # number of callpals executed 169system.cpu0.kern.callpal::rdps 6149 4.52% 96.54% # number of callpals executed 170system.cpu0.kern.callpal::wrkgp 1 0.00% 96.54% # number of callpals executed 171system.cpu0.kern.callpal::wrusp 3 0.00% 96.54% # number of callpals executed 172system.cpu0.kern.callpal::rdusp 7 0.01% 96.55% # number of callpals executed 173system.cpu0.kern.callpal::whami 2 0.00% 96.55% # number of callpals executed 174system.cpu0.kern.callpal::rti 4175 3.07% 99.62% # number of callpals executed 175system.cpu0.kern.callpal::callsys 369 0.27% 99.89% # number of callpals executed 176system.cpu0.kern.callpal::imb 146 0.11% 100.00% # number of callpals executed 177system.cpu0.kern.callpal::total 135929 # number of callpals executed 178system.cpu0.kern.mode_switch::kernel 6593 # number of protection mode switches 179system.cpu0.kern.mode_switch::user 1173 # number of protection mode switches 180system.cpu0.kern.mode_switch::idle 0 # number of protection mode switches 181system.cpu0.kern.mode_good::kernel 1172 182system.cpu0.kern.mode_good::user 1173 183system.cpu0.kern.mode_good::idle 0 184system.cpu0.kern.mode_switch_good::kernel 0.177764 # fraction of useful protection mode switches 185system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 186system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches 187system.cpu0.kern.mode_switch_good::total 0.301957 # fraction of useful protection mode switches 188system.cpu0.kern.mode_ticks::kernel 1868349163500 99.95% 99.95% # number of ticks spent at the given mode 189system.cpu0.kern.mode_ticks::user 1008627000 0.05% 100.00% # number of ticks spent at the given mode 190system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode 191system.cpu0.kern.swap_context 2744 # number of times the context was actually changed 192system.cpu0.committedInsts 49477745 # Number of instructions committed 193system.cpu0.committedOps 49477745 # Number of ops (including micro ops) committed 194system.cpu0.num_int_alu_accesses 46201705 # Number of integer alu accesses 195system.cpu0.num_fp_alu_accesses 197598 # Number of float alu accesses 196system.cpu0.num_func_calls 1124633 # number of times a function call or return occured 197system.cpu0.num_conditional_control_insts 6043603 # number of instructions that are conditional controls 198system.cpu0.num_int_insts 46201705 # number of integer instructions 199system.cpu0.num_fp_insts 197598 # number of float instructions 200system.cpu0.num_int_register_reads 64003225 # number of times the integer registers were read 201system.cpu0.num_int_register_writes 34834421 # number of times the integer registers were written 202system.cpu0.num_fp_register_reads 97440 # number of times the floating registers were read 203system.cpu0.num_fp_register_writes 98967 # number of times the floating registers were written 204system.cpu0.num_mem_refs 12536107 # number of memory refs 205system.cpu0.num_load_insts 7783754 # Number of load instructions 206system.cpu0.num_store_insts 4752353 # Number of store instructions 207system.cpu0.num_idle_cycles 3689239810.666409 # Number of idle cycles 208system.cpu0.num_busy_cycles 49482982.333591 # Number of busy cycles 209system.cpu0.not_idle_fraction 0.013235 # Percentage of non-idle cycles 210system.cpu0.idle_fraction 0.986765 # Percentage of idle cycles 211system.cpu0.Branches 7530826 # Number of branches fetched 212system.cpu0.op_class::No_OpClass 2589816 5.23% 5.23% # Class of executed instruction 213system.cpu0.op_class::IntAlu 33436017 67.57% 72.80% # Class of executed instruction 214system.cpu0.op_class::IntMult 50540 0.10% 72.90% # Class of executed instruction 215system.cpu0.op_class::IntDiv 0 0.00% 72.90% # Class of executed instruction 216system.cpu0.op_class::FloatAdd 27840 0.06% 72.96% # Class of executed instruction 217system.cpu0.op_class::FloatCmp 0 0.00% 72.96% # Class of executed instruction 218system.cpu0.op_class::FloatCvt 0 0.00% 72.96% # Class of executed instruction 219system.cpu0.op_class::FloatMult 0 0.00% 72.96% # Class of executed instruction
	220system.cpu0.op_class::FloatMultAcc 0 0.00% 72.96% # Class of executed instruction
220system.cpu0.op_class::FloatDiv 2233 0.00% 72.96% # Class of executed instruction	221system.cpu0.op_class::FloatDiv 2233 0.00% 72.96% # Class of executed instruction
	222system.cpu0.op_class::FloatMisc 0 0.00% 72.96% # Class of executed instruction
221system.cpu0.op_class::FloatSqrt 0 0.00% 72.96% # Class of executed instruction 222system.cpu0.op_class::SimdAdd 0 0.00% 72.96% # Class of executed instruction 223system.cpu0.op_class::SimdAddAcc 0 0.00% 72.96% # Class of executed instruction 224system.cpu0.op_class::SimdAlu 0 0.00% 72.96% # Class of executed instruction 225system.cpu0.op_class::SimdCmp 0 0.00% 72.96% # Class of executed instruction 226system.cpu0.op_class::SimdCvt 0 0.00% 72.96% # Class of executed instruction 227system.cpu0.op_class::SimdMisc 0 0.00% 72.96% # Class of executed instruction 228system.cpu0.op_class::SimdMult 0 0.00% 72.96% # Class of executed instruction 229system.cpu0.op_class::SimdMultAcc 0 0.00% 72.96% # Class of executed instruction 230system.cpu0.op_class::SimdShift 0 0.00% 72.96% # Class of executed instruction 231system.cpu0.op_class::SimdShiftAcc 0 0.00% 72.96% # Class of executed instruction 232system.cpu0.op_class::SimdSqrt 0 0.00% 72.96% # Class of executed instruction 233system.cpu0.op_class::SimdFloatAdd 0 0.00% 72.96% # Class of executed instruction 234system.cpu0.op_class::SimdFloatAlu 0 0.00% 72.96% # Class of executed instruction 235system.cpu0.op_class::SimdFloatCmp 0 0.00% 72.96% # Class of executed instruction 236system.cpu0.op_class::SimdFloatCvt 0 0.00% 72.96% # Class of executed instruction 237system.cpu0.op_class::SimdFloatDiv 0 0.00% 72.96% # Class of executed instruction 238system.cpu0.op_class::SimdFloatMisc 0 0.00% 72.96% # Class of executed instruction 239system.cpu0.op_class::SimdFloatMult 0 0.00% 72.96% # Class of executed instruction 240system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 72.96% # Class of executed instruction 241system.cpu0.op_class::SimdFloatSqrt 0 0.00% 72.96% # Class of executed instruction	223system.cpu0.op_class::FloatSqrt 0 0.00% 72.96% # Class of executed instruction 224system.cpu0.op_class::SimdAdd 0 0.00% 72.96% # Class of executed instruction 225system.cpu0.op_class::SimdAddAcc 0 0.00% 72.96% # Class of executed instruction 226system.cpu0.op_class::SimdAlu 0 0.00% 72.96% # Class of executed instruction 227system.cpu0.op_class::SimdCmp 0 0.00% 72.96% # Class of executed instruction 228system.cpu0.op_class::SimdCvt 0 0.00% 72.96% # Class of executed instruction 229system.cpu0.op_class::SimdMisc 0 0.00% 72.96% # Class of executed instruction 230system.cpu0.op_class::SimdMult 0 0.00% 72.96% # Class of executed instruction 231system.cpu0.op_class::SimdMultAcc 0 0.00% 72.96% # Class of executed instruction 232system.cpu0.op_class::SimdShift 0 0.00% 72.96% # Class of executed instruction 233system.cpu0.op_class::SimdShiftAcc 0 0.00% 72.96% # Class of executed instruction 234system.cpu0.op_class::SimdSqrt 0 0.00% 72.96% # Class of executed instruction 235system.cpu0.op_class::SimdFloatAdd 0 0.00% 72.96% # Class of executed instruction 236system.cpu0.op_class::SimdFloatAlu 0 0.00% 72.96% # Class of executed instruction 237system.cpu0.op_class::SimdFloatCmp 0 0.00% 72.96% # Class of executed instruction 238system.cpu0.op_class::SimdFloatCvt 0 0.00% 72.96% # Class of executed instruction 239system.cpu0.op_class::SimdFloatDiv 0 0.00% 72.96% # Class of executed instruction 240system.cpu0.op_class::SimdFloatMisc 0 0.00% 72.96% # Class of executed instruction 241system.cpu0.op_class::SimdFloatMult 0 0.00% 72.96% # Class of executed instruction 242system.cpu0.op_class::SimdFloatMultAcc 0 0.00% 72.96% # Class of executed instruction 243system.cpu0.op_class::SimdFloatSqrt 0 0.00% 72.96% # Class of executed instruction
242system.cpu0.op_class::MemRead 7945590 16.06% 89.02% # Class of executed instruction 243system.cpu0.op_class::MemWrite 4758292 9.62% 98.63% # Class of executed instruction	244system.cpu0.op_class::MemRead 7859946 15.88% 88.85% # Class of executed instruction 245system.cpu0.op_class::MemWrite 4676411 9.45% 98.30% # Class of executed instruction 246system.cpu0.op_class::FloatMemRead 85644 0.17% 98.47% # Class of executed instruction 247system.cpu0.op_class::FloatMemWrite 81881 0.17% 98.63% # Class of executed instruction
244system.cpu0.op_class::IprAccess 675558 1.37% 100.00% # Class of executed instruction 245system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 246system.cpu0.op_class::total 49485886 # Class of executed instruction 247system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 248system.cpu0.dcache.tags.replacements 1781367 # number of replacements 249system.cpu0.dcache.tags.tagsinuse 506.187330 # Cycle average of tags in use 250system.cpu0.dcache.tags.total_refs 10705767 # Total number of references to valid blocks. 251system.cpu0.dcache.tags.sampled_refs 1781879 # Sample count of references to valid blocks. 252system.cpu0.dcache.tags.avg_refs 6.008134 # Average number of references to valid blocks. 253system.cpu0.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 254system.cpu0.dcache.tags.occ_blocks::cpu0.data 506.187330 # Average occupied blocks per requestor 255system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988647 # Average percentage of cache occupancy 256system.cpu0.dcache.tags.occ_percent::total 0.988647 # Average percentage of cache occupancy 257system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 258system.cpu0.dcache.tags.age_task_id_blocks_1024::0 446 # Occupied blocks per task id 259system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 260system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 261system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 262system.cpu0.dcache.tags.tag_accesses 51822038 # Number of tag accesses 263system.cpu0.dcache.tags.data_accesses 51822038 # Number of data accesses 264system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 265system.cpu0.dcache.ReadReq_hits::cpu0.data 6068885 # number of ReadReq hits 266system.cpu0.dcache.ReadReq_hits::total 6068885 # number of ReadReq hits 267system.cpu0.dcache.WriteReq_hits::cpu0.data 4360096 # number of WriteReq hits 268system.cpu0.dcache.WriteReq_hits::total 4360096 # number of WriteReq hits 269system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 270system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits 271system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132871 # number of StoreCondReq hits 272system.cpu0.dcache.StoreCondReq_hits::total 132871 # number of StoreCondReq hits 273system.cpu0.dcache.demand_hits::cpu0.data 10428981 # number of demand (read+write) hits 274system.cpu0.dcache.demand_hits::total 10428981 # number of demand (read+write) hits 275system.cpu0.dcache.overall_hits::cpu0.data 10428981 # number of overall hits 276system.cpu0.dcache.overall_hits::total 10428981 # number of overall hits 277system.cpu0.dcache.ReadReq_misses::cpu0.data 1560065 # number of ReadReq misses 278system.cpu0.dcache.ReadReq_misses::total 1560065 # number of ReadReq misses 279system.cpu0.dcache.WriteReq_misses::cpu0.data 236527 # number of WriteReq misses 280system.cpu0.dcache.WriteReq_misses::total 236527 # number of WriteReq misses 281system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 12626 # number of LoadLockedReq misses 282system.cpu0.dcache.LoadLockedReq_misses::total 12626 # number of LoadLockedReq misses 283system.cpu0.dcache.StoreCondReq_misses::cpu0.data 6899 # number of StoreCondReq misses 284system.cpu0.dcache.StoreCondReq_misses::total 6899 # number of StoreCondReq misses 285system.cpu0.dcache.demand_misses::cpu0.data 1796592 # number of demand (read+write) misses 286system.cpu0.dcache.demand_misses::total 1796592 # number of demand (read+write) misses 287system.cpu0.dcache.overall_misses::cpu0.data 1796592 # number of overall misses 288system.cpu0.dcache.overall_misses::total 1796592 # number of overall misses 289system.cpu0.dcache.ReadReq_accesses::cpu0.data 7628950 # number of ReadReq accesses(hits+misses) 290system.cpu0.dcache.ReadReq_accesses::total 7628950 # number of ReadReq accesses(hits+misses) 291system.cpu0.dcache.WriteReq_accesses::cpu0.data 4596623 # number of WriteReq accesses(hits+misses) 292system.cpu0.dcache.WriteReq_accesses::total 4596623 # number of WriteReq accesses(hits+misses) 293system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 140218 # number of LoadLockedReq accesses(hits+misses) 294system.cpu0.dcache.LoadLockedReq_accesses::total 140218 # number of LoadLockedReq accesses(hits+misses) 295system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 139770 # number of StoreCondReq accesses(hits+misses) 296system.cpu0.dcache.StoreCondReq_accesses::total 139770 # number of StoreCondReq accesses(hits+misses) 297system.cpu0.dcache.demand_accesses::cpu0.data 12225573 # number of demand (read+write) accesses 298system.cpu0.dcache.demand_accesses::total 12225573 # number of demand (read+write) accesses 299system.cpu0.dcache.overall_accesses::cpu0.data 12225573 # number of overall (read+write) accesses 300system.cpu0.dcache.overall_accesses::total 12225573 # number of overall (read+write) accesses 301system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.204493 # miss rate for ReadReq accesses 302system.cpu0.dcache.ReadReq_miss_rate::total 0.204493 # miss rate for ReadReq accesses 303system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.051457 # miss rate for WriteReq accesses 304system.cpu0.dcache.WriteReq_miss_rate::total 0.051457 # miss rate for WriteReq accesses 305system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.090046 # miss rate for LoadLockedReq accesses 306system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.090046 # miss rate for LoadLockedReq accesses 307system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.049360 # miss rate for StoreCondReq accesses 308system.cpu0.dcache.StoreCondReq_miss_rate::total 0.049360 # miss rate for StoreCondReq accesses 309system.cpu0.dcache.demand_miss_rate::cpu0.data 0.146954 # miss rate for demand accesses 310system.cpu0.dcache.demand_miss_rate::total 0.146954 # miss rate for demand accesses 311system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146954 # miss rate for overall accesses 312system.cpu0.dcache.overall_miss_rate::total 0.146954 # miss rate for overall accesses 313system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 314system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 315system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 316system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 317system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 318system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 319system.cpu0.dcache.writebacks::writebacks 633925 # number of writebacks 320system.cpu0.dcache.writebacks::total 633925 # number of writebacks 321system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 322system.cpu0.icache.tags.replacements 618292 # number of replacements 323system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 324system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 325system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 326system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 327system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 328system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 329system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy 330system.cpu0.icache.tags.occ_percent::total 0.998517 # Average percentage of cache occupancy 331system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 332system.cpu0.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 333system.cpu0.icache.tags.age_task_id_blocks_1024::1 116 # Occupied blocks per task id 334system.cpu0.icache.tags.age_task_id_blocks_1024::2 333 # Occupied blocks per task id 335system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 336system.cpu0.icache.tags.tag_accesses 50104825 # Number of tag accesses 337system.cpu0.icache.tags.data_accesses 50104825 # Number of data accesses 338system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 339system.cpu0.icache.ReadReq_hits::cpu0.inst 48866947 # number of ReadReq hits 340system.cpu0.icache.ReadReq_hits::total 48866947 # number of ReadReq hits 341system.cpu0.icache.demand_hits::cpu0.inst 48866947 # number of demand (read+write) hits 342system.cpu0.icache.demand_hits::total 48866947 # number of demand (read+write) hits 343system.cpu0.icache.overall_hits::cpu0.inst 48866947 # number of overall hits 344system.cpu0.icache.overall_hits::total 48866947 # number of overall hits 345system.cpu0.icache.ReadReq_misses::cpu0.inst 618939 # number of ReadReq misses 346system.cpu0.icache.ReadReq_misses::total 618939 # number of ReadReq misses 347system.cpu0.icache.demand_misses::cpu0.inst 618939 # number of demand (read+write) misses 348system.cpu0.icache.demand_misses::total 618939 # number of demand (read+write) misses 349system.cpu0.icache.overall_misses::cpu0.inst 618939 # number of overall misses 350system.cpu0.icache.overall_misses::total 618939 # number of overall misses 351system.cpu0.icache.ReadReq_accesses::cpu0.inst 49485886 # number of ReadReq accesses(hits+misses) 352system.cpu0.icache.ReadReq_accesses::total 49485886 # number of ReadReq accesses(hits+misses) 353system.cpu0.icache.demand_accesses::cpu0.inst 49485886 # number of demand (read+write) accesses 354system.cpu0.icache.demand_accesses::total 49485886 # number of demand (read+write) accesses 355system.cpu0.icache.overall_accesses::cpu0.inst 49485886 # number of overall (read+write) accesses 356system.cpu0.icache.overall_accesses::total 49485886 # number of overall (read+write) accesses 357system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.012507 # miss rate for ReadReq accesses 358system.cpu0.icache.ReadReq_miss_rate::total 0.012507 # miss rate for ReadReq accesses 359system.cpu0.icache.demand_miss_rate::cpu0.inst 0.012507 # miss rate for demand accesses 360system.cpu0.icache.demand_miss_rate::total 0.012507 # miss rate for demand accesses 361system.cpu0.icache.overall_miss_rate::cpu0.inst 0.012507 # miss rate for overall accesses 362system.cpu0.icache.overall_miss_rate::total 0.012507 # miss rate for overall accesses 363system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 364system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 365system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 366system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 367system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 368system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 369system.cpu0.icache.writebacks::writebacks 618292 # number of writebacks 370system.cpu0.icache.writebacks::total 618292 # number of writebacks 371system.cpu1.dtb.fetch_hits 0 # ITB hits 372system.cpu1.dtb.fetch_misses 0 # ITB misses 373system.cpu1.dtb.fetch_acv 0 # ITB acv 374system.cpu1.dtb.fetch_accesses 0 # ITB accesses 375system.cpu1.dtb.read_hits 2831559 # DTB read hits 376system.cpu1.dtb.read_misses 3191 # DTB read misses 377system.cpu1.dtb.read_acv 58 # DTB read access violations 378system.cpu1.dtb.read_accesses 198160 # DTB read accesses 379system.cpu1.dtb.write_hits 2101673 # DTB write hits 380system.cpu1.dtb.write_misses 412 # DTB write misses 381system.cpu1.dtb.write_acv 55 # DTB write access violations 382system.cpu1.dtb.write_accesses 90619 # DTB write accesses 383system.cpu1.dtb.data_hits 4933232 # DTB hits 384system.cpu1.dtb.data_misses 3603 # DTB misses 385system.cpu1.dtb.data_acv 113 # DTB access violations 386system.cpu1.dtb.data_accesses 288779 # DTB accesses 387system.cpu1.itb.fetch_hits 1950883 # ITB hits 388system.cpu1.itb.fetch_misses 1451 # ITB misses 389system.cpu1.itb.fetch_acv 57 # ITB acv 390system.cpu1.itb.fetch_accesses 1952334 # ITB accesses 391system.cpu1.itb.read_hits 0 # DTB read hits 392system.cpu1.itb.read_misses 0 # DTB read misses 393system.cpu1.itb.read_acv 0 # DTB read access violations 394system.cpu1.itb.read_accesses 0 # DTB read accesses 395system.cpu1.itb.write_hits 0 # DTB write hits 396system.cpu1.itb.write_misses 0 # DTB write misses 397system.cpu1.itb.write_acv 0 # DTB write access violations 398system.cpu1.itb.write_accesses 0 # DTB write accesses 399system.cpu1.itb.data_hits 0 # DTB hits 400system.cpu1.itb.data_misses 0 # DTB misses 401system.cpu1.itb.data_acv 0 # DTB access violations 402system.cpu1.itb.data_accesses 0 # DTB accesses 403system.cpu1.numPwrStateTransitions 5407 # Number of power state transitions 404system.cpu1.pwrStateClkGateDist::samples 2704 # Distribution of time spent in the clock gated state 405system.cpu1.pwrStateClkGateDist::mean 688459933.247041 # Distribution of time spent in the clock gated state 406system.cpu1.pwrStateClkGateDist::stdev 437290592.854298 # Distribution of time spent in the clock gated state 407system.cpu1.pwrStateClkGateDist::1000-5e+10 2704 100.00% 100.00% # Distribution of time spent in the clock gated state 408system.cpu1.pwrStateClkGateDist::min_value 400000 # Distribution of time spent in the clock gated state 409system.cpu1.pwrStateClkGateDist::max_value 976035500 # Distribution of time spent in the clock gated state 410system.cpu1.pwrStateClkGateDist::total 2704 # Distribution of time spent in the clock gated state 411system.cpu1.pwrStateResidencyTicks::ON 7762339500 # Cumulative time (in ticks) in various power states 412system.cpu1.pwrStateResidencyTicks::CLK_GATED 1861595659500 # Cumulative time (in ticks) in various power states 413system.cpu1.numCycles 3738296609 # number of cpu cycles simulated 414system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 415system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 416system.cpu1.kern.inst.arm 0 # number of arm instructions executed 417system.cpu1.kern.inst.quiesce 2704 # number of quiesce instructions executed 418system.cpu1.kern.inst.hwrei 92290 # number of hwrei instructions executed 419system.cpu1.kern.ipl_count::0 31964 39.34% 39.34% # number of times we switched to this ipl 420system.cpu1.kern.ipl_count::22 1906 2.35% 41.68% # number of times we switched to this ipl 421system.cpu1.kern.ipl_count::30 616 0.76% 42.44% # number of times we switched to this ipl 422system.cpu1.kern.ipl_count::31 46769 57.56% 100.00% # number of times we switched to this ipl 423system.cpu1.kern.ipl_count::total 81255 # number of times we switched to this ipl 424system.cpu1.kern.ipl_good::0 30935 48.51% 48.51% # number of times we switched to this ipl from a different ipl 425system.cpu1.kern.ipl_good::22 1906 2.99% 51.49% # number of times we switched to this ipl from a different ipl 426system.cpu1.kern.ipl_good::30 616 0.97% 52.46% # number of times we switched to this ipl from a different ipl 427system.cpu1.kern.ipl_good::31 30319 47.54% 100.00% # number of times we switched to this ipl from a different ipl 428system.cpu1.kern.ipl_good::total 63776 # number of times we switched to this ipl from a different ipl 429system.cpu1.kern.ipl_ticks::0 1856123501500 99.30% 99.30% # number of cycles we spent at this ipl 430system.cpu1.kern.ipl_ticks::22 81958000 0.00% 99.31% # number of cycles we spent at this ipl 431system.cpu1.kern.ipl_ticks::30 70736500 0.00% 99.31% # number of cycles we spent at this ipl 432system.cpu1.kern.ipl_ticks::31 12870743500 0.69% 100.00% # number of cycles we spent at this ipl 433system.cpu1.kern.ipl_ticks::total 1869146939500 # number of cycles we spent at this ipl 434system.cpu1.kern.ipl_used::0 0.967808 # fraction of swpipl calls that actually changed the ipl 435system.cpu1.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 436system.cpu1.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl 437system.cpu1.kern.ipl_used::31 0.648271 # fraction of swpipl calls that actually changed the ipl 438system.cpu1.kern.ipl_used::total 0.784887 # fraction of swpipl calls that actually changed the ipl 439system.cpu1.kern.syscall::2 2 2.04% 2.04% # number of syscalls executed 440system.cpu1.kern.syscall::3 10 10.20% 12.24% # number of syscalls executed 441system.cpu1.kern.syscall::4 2 2.04% 14.29% # number of syscalls executed 442system.cpu1.kern.syscall::6 10 10.20% 24.49% # number of syscalls executed 443system.cpu1.kern.syscall::17 6 6.12% 30.61% # number of syscalls executed 444system.cpu1.kern.syscall::19 2 2.04% 32.65% # number of syscalls executed 445system.cpu1.kern.syscall::23 2 2.04% 34.69% # number of syscalls executed 446system.cpu1.kern.syscall::24 2 2.04% 36.73% # number of syscalls executed 447system.cpu1.kern.syscall::33 4 4.08% 40.82% # number of syscalls executed 448system.cpu1.kern.syscall::45 17 17.35% 58.16% # number of syscalls executed 449system.cpu1.kern.syscall::47 2 2.04% 60.20% # number of syscalls executed 450system.cpu1.kern.syscall::48 2 2.04% 62.24% # number of syscalls executed 451system.cpu1.kern.syscall::59 2 2.04% 64.29% # number of syscalls executed 452system.cpu1.kern.syscall::71 24 24.49% 88.78% # number of syscalls executed 453system.cpu1.kern.syscall::74 8 8.16% 96.94% # number of syscalls executed 454system.cpu1.kern.syscall::90 1 1.02% 97.96% # number of syscalls executed 455system.cpu1.kern.syscall::132 2 2.04% 100.00% # number of syscalls executed 456system.cpu1.kern.syscall::total 98 # number of syscalls executed 457system.cpu1.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 458system.cpu1.kern.callpal::wripir 514 0.61% 0.61% # number of callpals executed 459system.cpu1.kern.callpal::wrmces 1 0.00% 0.61% # number of callpals executed 460system.cpu1.kern.callpal::wrfen 1 0.00% 0.61% # number of callpals executed 461system.cpu1.kern.callpal::swpctx 2506 2.96% 3.58% # number of callpals executed 462system.cpu1.kern.callpal::tbi 14 0.02% 3.59% # number of callpals executed 463system.cpu1.kern.callpal::wrent 7 0.01% 3.60% # number of callpals executed 464system.cpu1.kern.callpal::swpipl 74617 88.26% 91.86% # number of callpals executed 465system.cpu1.kern.callpal::rdps 2575 3.05% 94.91% # number of callpals executed 466system.cpu1.kern.callpal::wrkgp 1 0.00% 94.91% # number of callpals executed 467system.cpu1.kern.callpal::wrusp 4 0.00% 94.91% # number of callpals executed 468system.cpu1.kern.callpal::rdusp 2 0.00% 94.91% # number of callpals executed 469system.cpu1.kern.callpal::whami 3 0.00% 94.92% # number of callpals executed 470system.cpu1.kern.callpal::rti 4115 4.87% 99.79% # number of callpals executed 471system.cpu1.kern.callpal::callsys 146 0.17% 99.96% # number of callpals executed 472system.cpu1.kern.callpal::imb 34 0.04% 100.00% # number of callpals executed 473system.cpu1.kern.callpal::rdunique 1 0.00% 100.00% # number of callpals executed 474system.cpu1.kern.callpal::total 84542 # number of callpals executed 475system.cpu1.kern.mode_switch::kernel 2548 # number of protection mode switches 476system.cpu1.kern.mode_switch::user 564 # number of protection mode switches 477system.cpu1.kern.mode_switch::idle 3056 # number of protection mode switches 478system.cpu1.kern.mode_good::kernel 1106 479system.cpu1.kern.mode_good::user 564 480system.cpu1.kern.mode_good::idle 542 481system.cpu1.kern.mode_switch_good::kernel 0.434066 # fraction of useful protection mode switches 482system.cpu1.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 483system.cpu1.kern.mode_switch_good::idle 0.177356 # fraction of useful protection mode switches 484system.cpu1.kern.mode_switch_good::total 0.358625 # fraction of useful protection mode switches 485system.cpu1.kern.mode_ticks::kernel 5986368000 0.32% 0.32% # number of ticks spent at the given mode 486system.cpu1.kern.mode_ticks::user 456602000 0.02% 0.34% # number of ticks spent at the given mode 487system.cpu1.kern.mode_ticks::idle 1862102413500 99.66% 100.00% # number of ticks spent at the given mode 488system.cpu1.kern.swap_context 2507 # number of times the context was actually changed 489system.cpu1.committedInsts 15522159 # Number of instructions committed 490system.cpu1.committedOps 15522159 # Number of ops (including micro ops) committed 491system.cpu1.num_int_alu_accesses 14295544 # Number of integer alu accesses 492system.cpu1.num_fp_alu_accesses 198941 # Number of float alu accesses 493system.cpu1.num_func_calls 493140 # number of times a function call or return occured 494system.cpu1.num_conditional_control_insts 1540068 # number of instructions that are conditional controls 495system.cpu1.num_int_insts 14295544 # number of integer instructions 496system.cpu1.num_fp_insts 198941 # number of float instructions 497system.cpu1.num_int_register_reads 19514289 # number of times the integer registers were read 498system.cpu1.num_int_register_writes 10457600 # number of times the integer registers were written 499system.cpu1.num_fp_register_reads 101734 # number of times the floating registers were read 500system.cpu1.num_fp_register_writes 104129 # number of times the floating registers were written 501system.cpu1.num_mem_refs 4961786 # number of memory refs 502system.cpu1.num_load_insts 2849090 # Number of load instructions 503system.cpu1.num_store_insts 2112696 # Number of store instructions 504system.cpu1.num_idle_cycles 3722773671.474783 # Number of idle cycles 505system.cpu1.num_busy_cycles 15522937.525217 # Number of busy cycles 506system.cpu1.not_idle_fraction 0.004152 # Percentage of non-idle cycles 507system.cpu1.idle_fraction 0.995848 # Percentage of idle cycles 508system.cpu1.Branches 2214163 # Number of branches fetched 509system.cpu1.op_class::No_OpClass 856043 5.51% 5.51% # Class of executed instruction 510system.cpu1.op_class::IntAlu 9156766 58.98% 64.49% # Class of executed instruction 511system.cpu1.op_class::IntMult 25065 0.16% 64.65% # Class of executed instruction 512system.cpu1.op_class::IntDiv 0 0.00% 64.65% # Class of executed instruction 513system.cpu1.op_class::FloatAdd 12426 0.08% 64.73% # Class of executed instruction 514system.cpu1.op_class::FloatCmp 0 0.00% 64.73% # Class of executed instruction 515system.cpu1.op_class::FloatCvt 0 0.00% 64.73% # Class of executed instruction 516system.cpu1.op_class::FloatMult 0 0.00% 64.73% # Class of executed instruction	248system.cpu0.op_class::IprAccess 675558 1.37% 100.00% # Class of executed instruction 249system.cpu0.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 250system.cpu0.op_class::total 49485886 # Class of executed instruction 251system.cpu0.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 252system.cpu0.dcache.tags.replacements 1781367 # number of replacements 253system.cpu0.dcache.tags.tagsinuse 506.187330 # Cycle average of tags in use 254system.cpu0.dcache.tags.total_refs 10705767 # Total number of references to valid blocks. 255system.cpu0.dcache.tags.sampled_refs 1781879 # Sample count of references to valid blocks. 256system.cpu0.dcache.tags.avg_refs 6.008134 # Average number of references to valid blocks. 257system.cpu0.dcache.tags.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. 258system.cpu0.dcache.tags.occ_blocks::cpu0.data 506.187330 # Average occupied blocks per requestor 259system.cpu0.dcache.tags.occ_percent::cpu0.data 0.988647 # Average percentage of cache occupancy 260system.cpu0.dcache.tags.occ_percent::total 0.988647 # Average percentage of cache occupancy 261system.cpu0.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 262system.cpu0.dcache.tags.age_task_id_blocks_1024::0 446 # Occupied blocks per task id 263system.cpu0.dcache.tags.age_task_id_blocks_1024::1 62 # Occupied blocks per task id 264system.cpu0.dcache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id 265system.cpu0.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 266system.cpu0.dcache.tags.tag_accesses 51822038 # Number of tag accesses 267system.cpu0.dcache.tags.data_accesses 51822038 # Number of data accesses 268system.cpu0.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 269system.cpu0.dcache.ReadReq_hits::cpu0.data 6068885 # number of ReadReq hits 270system.cpu0.dcache.ReadReq_hits::total 6068885 # number of ReadReq hits 271system.cpu0.dcache.WriteReq_hits::cpu0.data 4360096 # number of WriteReq hits 272system.cpu0.dcache.WriteReq_hits::total 4360096 # number of WriteReq hits 273system.cpu0.dcache.LoadLockedReq_hits::cpu0.data 127592 # number of LoadLockedReq hits 274system.cpu0.dcache.LoadLockedReq_hits::total 127592 # number of LoadLockedReq hits 275system.cpu0.dcache.StoreCondReq_hits::cpu0.data 132871 # number of StoreCondReq hits 276system.cpu0.dcache.StoreCondReq_hits::total 132871 # number of StoreCondReq hits 277system.cpu0.dcache.demand_hits::cpu0.data 10428981 # number of demand (read+write) hits 278system.cpu0.dcache.demand_hits::total 10428981 # number of demand (read+write) hits 279system.cpu0.dcache.overall_hits::cpu0.data 10428981 # number of overall hits 280system.cpu0.dcache.overall_hits::total 10428981 # number of overall hits 281system.cpu0.dcache.ReadReq_misses::cpu0.data 1560065 # number of ReadReq misses 282system.cpu0.dcache.ReadReq_misses::total 1560065 # number of ReadReq misses 283system.cpu0.dcache.WriteReq_misses::cpu0.data 236527 # number of WriteReq misses 284system.cpu0.dcache.WriteReq_misses::total 236527 # number of WriteReq misses 285system.cpu0.dcache.LoadLockedReq_misses::cpu0.data 12626 # number of LoadLockedReq misses 286system.cpu0.dcache.LoadLockedReq_misses::total 12626 # number of LoadLockedReq misses 287system.cpu0.dcache.StoreCondReq_misses::cpu0.data 6899 # number of StoreCondReq misses 288system.cpu0.dcache.StoreCondReq_misses::total 6899 # number of StoreCondReq misses 289system.cpu0.dcache.demand_misses::cpu0.data 1796592 # number of demand (read+write) misses 290system.cpu0.dcache.demand_misses::total 1796592 # number of demand (read+write) misses 291system.cpu0.dcache.overall_misses::cpu0.data 1796592 # number of overall misses 292system.cpu0.dcache.overall_misses::total 1796592 # number of overall misses 293system.cpu0.dcache.ReadReq_accesses::cpu0.data 7628950 # number of ReadReq accesses(hits+misses) 294system.cpu0.dcache.ReadReq_accesses::total 7628950 # number of ReadReq accesses(hits+misses) 295system.cpu0.dcache.WriteReq_accesses::cpu0.data 4596623 # number of WriteReq accesses(hits+misses) 296system.cpu0.dcache.WriteReq_accesses::total 4596623 # number of WriteReq accesses(hits+misses) 297system.cpu0.dcache.LoadLockedReq_accesses::cpu0.data 140218 # number of LoadLockedReq accesses(hits+misses) 298system.cpu0.dcache.LoadLockedReq_accesses::total 140218 # number of LoadLockedReq accesses(hits+misses) 299system.cpu0.dcache.StoreCondReq_accesses::cpu0.data 139770 # number of StoreCondReq accesses(hits+misses) 300system.cpu0.dcache.StoreCondReq_accesses::total 139770 # number of StoreCondReq accesses(hits+misses) 301system.cpu0.dcache.demand_accesses::cpu0.data 12225573 # number of demand (read+write) accesses 302system.cpu0.dcache.demand_accesses::total 12225573 # number of demand (read+write) accesses 303system.cpu0.dcache.overall_accesses::cpu0.data 12225573 # number of overall (read+write) accesses 304system.cpu0.dcache.overall_accesses::total 12225573 # number of overall (read+write) accesses 305system.cpu0.dcache.ReadReq_miss_rate::cpu0.data 0.204493 # miss rate for ReadReq accesses 306system.cpu0.dcache.ReadReq_miss_rate::total 0.204493 # miss rate for ReadReq accesses 307system.cpu0.dcache.WriteReq_miss_rate::cpu0.data 0.051457 # miss rate for WriteReq accesses 308system.cpu0.dcache.WriteReq_miss_rate::total 0.051457 # miss rate for WriteReq accesses 309system.cpu0.dcache.LoadLockedReq_miss_rate::cpu0.data 0.090046 # miss rate for LoadLockedReq accesses 310system.cpu0.dcache.LoadLockedReq_miss_rate::total 0.090046 # miss rate for LoadLockedReq accesses 311system.cpu0.dcache.StoreCondReq_miss_rate::cpu0.data 0.049360 # miss rate for StoreCondReq accesses 312system.cpu0.dcache.StoreCondReq_miss_rate::total 0.049360 # miss rate for StoreCondReq accesses 313system.cpu0.dcache.demand_miss_rate::cpu0.data 0.146954 # miss rate for demand accesses 314system.cpu0.dcache.demand_miss_rate::total 0.146954 # miss rate for demand accesses 315system.cpu0.dcache.overall_miss_rate::cpu0.data 0.146954 # miss rate for overall accesses 316system.cpu0.dcache.overall_miss_rate::total 0.146954 # miss rate for overall accesses 317system.cpu0.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 318system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 319system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 320system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked 321system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 322system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 323system.cpu0.dcache.writebacks::writebacks 633925 # number of writebacks 324system.cpu0.dcache.writebacks::total 633925 # number of writebacks 325system.cpu0.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 326system.cpu0.icache.tags.replacements 618292 # number of replacements 327system.cpu0.icache.tags.tagsinuse 511.240644 # Cycle average of tags in use 328system.cpu0.icache.tags.total_refs 48866947 # Total number of references to valid blocks. 329system.cpu0.icache.tags.sampled_refs 618804 # Sample count of references to valid blocks. 330system.cpu0.icache.tags.avg_refs 78.969992 # Average number of references to valid blocks. 331system.cpu0.icache.tags.warmup_cycle 9786048500 # Cycle when the warmup percentage was hit. 332system.cpu0.icache.tags.occ_blocks::cpu0.inst 511.240644 # Average occupied blocks per requestor 333system.cpu0.icache.tags.occ_percent::cpu0.inst 0.998517 # Average percentage of cache occupancy 334system.cpu0.icache.tags.occ_percent::total 0.998517 # Average percentage of cache occupancy 335system.cpu0.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 336system.cpu0.icache.tags.age_task_id_blocks_1024::0 63 # Occupied blocks per task id 337system.cpu0.icache.tags.age_task_id_blocks_1024::1 116 # Occupied blocks per task id 338system.cpu0.icache.tags.age_task_id_blocks_1024::2 333 # Occupied blocks per task id 339system.cpu0.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 340system.cpu0.icache.tags.tag_accesses 50104825 # Number of tag accesses 341system.cpu0.icache.tags.data_accesses 50104825 # Number of data accesses 342system.cpu0.icache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 343system.cpu0.icache.ReadReq_hits::cpu0.inst 48866947 # number of ReadReq hits 344system.cpu0.icache.ReadReq_hits::total 48866947 # number of ReadReq hits 345system.cpu0.icache.demand_hits::cpu0.inst 48866947 # number of demand (read+write) hits 346system.cpu0.icache.demand_hits::total 48866947 # number of demand (read+write) hits 347system.cpu0.icache.overall_hits::cpu0.inst 48866947 # number of overall hits 348system.cpu0.icache.overall_hits::total 48866947 # number of overall hits 349system.cpu0.icache.ReadReq_misses::cpu0.inst 618939 # number of ReadReq misses 350system.cpu0.icache.ReadReq_misses::total 618939 # number of ReadReq misses 351system.cpu0.icache.demand_misses::cpu0.inst 618939 # number of demand (read+write) misses 352system.cpu0.icache.demand_misses::total 618939 # number of demand (read+write) misses 353system.cpu0.icache.overall_misses::cpu0.inst 618939 # number of overall misses 354system.cpu0.icache.overall_misses::total 618939 # number of overall misses 355system.cpu0.icache.ReadReq_accesses::cpu0.inst 49485886 # number of ReadReq accesses(hits+misses) 356system.cpu0.icache.ReadReq_accesses::total 49485886 # number of ReadReq accesses(hits+misses) 357system.cpu0.icache.demand_accesses::cpu0.inst 49485886 # number of demand (read+write) accesses 358system.cpu0.icache.demand_accesses::total 49485886 # number of demand (read+write) accesses 359system.cpu0.icache.overall_accesses::cpu0.inst 49485886 # number of overall (read+write) accesses 360system.cpu0.icache.overall_accesses::total 49485886 # number of overall (read+write) accesses 361system.cpu0.icache.ReadReq_miss_rate::cpu0.inst 0.012507 # miss rate for ReadReq accesses 362system.cpu0.icache.ReadReq_miss_rate::total 0.012507 # miss rate for ReadReq accesses 363system.cpu0.icache.demand_miss_rate::cpu0.inst 0.012507 # miss rate for demand accesses 364system.cpu0.icache.demand_miss_rate::total 0.012507 # miss rate for demand accesses 365system.cpu0.icache.overall_miss_rate::cpu0.inst 0.012507 # miss rate for overall accesses 366system.cpu0.icache.overall_miss_rate::total 0.012507 # miss rate for overall accesses 367system.cpu0.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 368system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 369system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked 370system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked 371system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 372system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 373system.cpu0.icache.writebacks::writebacks 618292 # number of writebacks 374system.cpu0.icache.writebacks::total 618292 # number of writebacks 375system.cpu1.dtb.fetch_hits 0 # ITB hits 376system.cpu1.dtb.fetch_misses 0 # ITB misses 377system.cpu1.dtb.fetch_acv 0 # ITB acv 378system.cpu1.dtb.fetch_accesses 0 # ITB accesses 379system.cpu1.dtb.read_hits 2831559 # DTB read hits 380system.cpu1.dtb.read_misses 3191 # DTB read misses 381system.cpu1.dtb.read_acv 58 # DTB read access violations 382system.cpu1.dtb.read_accesses 198160 # DTB read accesses 383system.cpu1.dtb.write_hits 2101673 # DTB write hits 384system.cpu1.dtb.write_misses 412 # DTB write misses 385system.cpu1.dtb.write_acv 55 # DTB write access violations 386system.cpu1.dtb.write_accesses 90619 # DTB write accesses 387system.cpu1.dtb.data_hits 4933232 # DTB hits 388system.cpu1.dtb.data_misses 3603 # DTB misses 389system.cpu1.dtb.data_acv 113 # DTB access violations 390system.cpu1.dtb.data_accesses 288779 # DTB accesses 391system.cpu1.itb.fetch_hits 1950883 # ITB hits 392system.cpu1.itb.fetch_misses 1451 # ITB misses 393system.cpu1.itb.fetch_acv 57 # ITB acv 394system.cpu1.itb.fetch_accesses 1952334 # ITB accesses 395system.cpu1.itb.read_hits 0 # DTB read hits 396system.cpu1.itb.read_misses 0 # DTB read misses 397system.cpu1.itb.read_acv 0 # DTB read access violations 398system.cpu1.itb.read_accesses 0 # DTB read accesses 399system.cpu1.itb.write_hits 0 # DTB write hits 400system.cpu1.itb.write_misses 0 # DTB write misses 401system.cpu1.itb.write_acv 0 # DTB write access violations 402system.cpu1.itb.write_accesses 0 # DTB write accesses 403system.cpu1.itb.data_hits 0 # DTB hits 404system.cpu1.itb.data_misses 0 # DTB misses 405system.cpu1.itb.data_acv 0 # DTB access violations 406system.cpu1.itb.data_accesses 0 # DTB accesses 407system.cpu1.numPwrStateTransitions 5407 # Number of power state transitions 408system.cpu1.pwrStateClkGateDist::samples 2704 # Distribution of time spent in the clock gated state 409system.cpu1.pwrStateClkGateDist::mean 688459933.247041 # Distribution of time spent in the clock gated state 410system.cpu1.pwrStateClkGateDist::stdev 437290592.854298 # Distribution of time spent in the clock gated state 411system.cpu1.pwrStateClkGateDist::1000-5e+10 2704 100.00% 100.00% # Distribution of time spent in the clock gated state 412system.cpu1.pwrStateClkGateDist::min_value 400000 # Distribution of time spent in the clock gated state 413system.cpu1.pwrStateClkGateDist::max_value 976035500 # Distribution of time spent in the clock gated state 414system.cpu1.pwrStateClkGateDist::total 2704 # Distribution of time spent in the clock gated state 415system.cpu1.pwrStateResidencyTicks::ON 7762339500 # Cumulative time (in ticks) in various power states 416system.cpu1.pwrStateResidencyTicks::CLK_GATED 1861595659500 # Cumulative time (in ticks) in various power states 417system.cpu1.numCycles 3738296609 # number of cpu cycles simulated 418system.cpu1.numWorkItemsStarted 0 # number of work items this cpu started 419system.cpu1.numWorkItemsCompleted 0 # number of work items this cpu completed 420system.cpu1.kern.inst.arm 0 # number of arm instructions executed 421system.cpu1.kern.inst.quiesce 2704 # number of quiesce instructions executed 422system.cpu1.kern.inst.hwrei 92290 # number of hwrei instructions executed 423system.cpu1.kern.ipl_count::0 31964 39.34% 39.34% # number of times we switched to this ipl 424system.cpu1.kern.ipl_count::22 1906 2.35% 41.68% # number of times we switched to this ipl 425system.cpu1.kern.ipl_count::30 616 0.76% 42.44% # number of times we switched to this ipl 426system.cpu1.kern.ipl_count::31 46769 57.56% 100.00% # number of times we switched to this ipl 427system.cpu1.kern.ipl_count::total 81255 # number of times we switched to this ipl 428system.cpu1.kern.ipl_good::0 30935 48.51% 48.51% # number of times we switched to this ipl from a different ipl 429system.cpu1.kern.ipl_good::22 1906 2.99% 51.49% # number of times we switched to this ipl from a different ipl 430system.cpu1.kern.ipl_good::30 616 0.97% 52.46% # number of times we switched to this ipl from a different ipl 431system.cpu1.kern.ipl_good::31 30319 47.54% 100.00% # number of times we switched to this ipl from a different ipl 432system.cpu1.kern.ipl_good::total 63776 # number of times we switched to this ipl from a different ipl 433system.cpu1.kern.ipl_ticks::0 1856123501500 99.30% 99.30% # number of cycles we spent at this ipl 434system.cpu1.kern.ipl_ticks::22 81958000 0.00% 99.31% # number of cycles we spent at this ipl 435system.cpu1.kern.ipl_ticks::30 70736500 0.00% 99.31% # number of cycles we spent at this ipl 436system.cpu1.kern.ipl_ticks::31 12870743500 0.69% 100.00% # number of cycles we spent at this ipl 437system.cpu1.kern.ipl_ticks::total 1869146939500 # number of cycles we spent at this ipl 438system.cpu1.kern.ipl_used::0 0.967808 # fraction of swpipl calls that actually changed the ipl 439system.cpu1.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl 440system.cpu1.kern.ipl_used::30 1 # fraction of swpipl calls that actually changed the ipl 441system.cpu1.kern.ipl_used::31 0.648271 # fraction of swpipl calls that actually changed the ipl 442system.cpu1.kern.ipl_used::total 0.784887 # fraction of swpipl calls that actually changed the ipl 443system.cpu1.kern.syscall::2 2 2.04% 2.04% # number of syscalls executed 444system.cpu1.kern.syscall::3 10 10.20% 12.24% # number of syscalls executed 445system.cpu1.kern.syscall::4 2 2.04% 14.29% # number of syscalls executed 446system.cpu1.kern.syscall::6 10 10.20% 24.49% # number of syscalls executed 447system.cpu1.kern.syscall::17 6 6.12% 30.61% # number of syscalls executed 448system.cpu1.kern.syscall::19 2 2.04% 32.65% # number of syscalls executed 449system.cpu1.kern.syscall::23 2 2.04% 34.69% # number of syscalls executed 450system.cpu1.kern.syscall::24 2 2.04% 36.73% # number of syscalls executed 451system.cpu1.kern.syscall::33 4 4.08% 40.82% # number of syscalls executed 452system.cpu1.kern.syscall::45 17 17.35% 58.16% # number of syscalls executed 453system.cpu1.kern.syscall::47 2 2.04% 60.20% # number of syscalls executed 454system.cpu1.kern.syscall::48 2 2.04% 62.24% # number of syscalls executed 455system.cpu1.kern.syscall::59 2 2.04% 64.29% # number of syscalls executed 456system.cpu1.kern.syscall::71 24 24.49% 88.78% # number of syscalls executed 457system.cpu1.kern.syscall::74 8 8.16% 96.94% # number of syscalls executed 458system.cpu1.kern.syscall::90 1 1.02% 97.96% # number of syscalls executed 459system.cpu1.kern.syscall::132 2 2.04% 100.00% # number of syscalls executed 460system.cpu1.kern.syscall::total 98 # number of syscalls executed 461system.cpu1.kern.callpal::cserve 1 0.00% 0.00% # number of callpals executed 462system.cpu1.kern.callpal::wripir 514 0.61% 0.61% # number of callpals executed 463system.cpu1.kern.callpal::wrmces 1 0.00% 0.61% # number of callpals executed 464system.cpu1.kern.callpal::wrfen 1 0.00% 0.61% # number of callpals executed 465system.cpu1.kern.callpal::swpctx 2506 2.96% 3.58% # number of callpals executed 466system.cpu1.kern.callpal::tbi 14 0.02% 3.59% # number of callpals executed 467system.cpu1.kern.callpal::wrent 7 0.01% 3.60% # number of callpals executed 468system.cpu1.kern.callpal::swpipl 74617 88.26% 91.86% # number of callpals executed 469system.cpu1.kern.callpal::rdps 2575 3.05% 94.91% # number of callpals executed 470system.cpu1.kern.callpal::wrkgp 1 0.00% 94.91% # number of callpals executed 471system.cpu1.kern.callpal::wrusp 4 0.00% 94.91% # number of callpals executed 472system.cpu1.kern.callpal::rdusp 2 0.00% 94.91% # number of callpals executed 473system.cpu1.kern.callpal::whami 3 0.00% 94.92% # number of callpals executed 474system.cpu1.kern.callpal::rti 4115 4.87% 99.79% # number of callpals executed 475system.cpu1.kern.callpal::callsys 146 0.17% 99.96% # number of callpals executed 476system.cpu1.kern.callpal::imb 34 0.04% 100.00% # number of callpals executed 477system.cpu1.kern.callpal::rdunique 1 0.00% 100.00% # number of callpals executed 478system.cpu1.kern.callpal::total 84542 # number of callpals executed 479system.cpu1.kern.mode_switch::kernel 2548 # number of protection mode switches 480system.cpu1.kern.mode_switch::user 564 # number of protection mode switches 481system.cpu1.kern.mode_switch::idle 3056 # number of protection mode switches 482system.cpu1.kern.mode_good::kernel 1106 483system.cpu1.kern.mode_good::user 564 484system.cpu1.kern.mode_good::idle 542 485system.cpu1.kern.mode_switch_good::kernel 0.434066 # fraction of useful protection mode switches 486system.cpu1.kern.mode_switch_good::user 1 # fraction of useful protection mode switches 487system.cpu1.kern.mode_switch_good::idle 0.177356 # fraction of useful protection mode switches 488system.cpu1.kern.mode_switch_good::total 0.358625 # fraction of useful protection mode switches 489system.cpu1.kern.mode_ticks::kernel 5986368000 0.32% 0.32% # number of ticks spent at the given mode 490system.cpu1.kern.mode_ticks::user 456602000 0.02% 0.34% # number of ticks spent at the given mode 491system.cpu1.kern.mode_ticks::idle 1862102413500 99.66% 100.00% # number of ticks spent at the given mode 492system.cpu1.kern.swap_context 2507 # number of times the context was actually changed 493system.cpu1.committedInsts 15522159 # Number of instructions committed 494system.cpu1.committedOps 15522159 # Number of ops (including micro ops) committed 495system.cpu1.num_int_alu_accesses 14295544 # Number of integer alu accesses 496system.cpu1.num_fp_alu_accesses 198941 # Number of float alu accesses 497system.cpu1.num_func_calls 493140 # number of times a function call or return occured 498system.cpu1.num_conditional_control_insts 1540068 # number of instructions that are conditional controls 499system.cpu1.num_int_insts 14295544 # number of integer instructions 500system.cpu1.num_fp_insts 198941 # number of float instructions 501system.cpu1.num_int_register_reads 19514289 # number of times the integer registers were read 502system.cpu1.num_int_register_writes 10457600 # number of times the integer registers were written 503system.cpu1.num_fp_register_reads 101734 # number of times the floating registers were read 504system.cpu1.num_fp_register_writes 104129 # number of times the floating registers were written 505system.cpu1.num_mem_refs 4961786 # number of memory refs 506system.cpu1.num_load_insts 2849090 # Number of load instructions 507system.cpu1.num_store_insts 2112696 # Number of store instructions 508system.cpu1.num_idle_cycles 3722773671.474783 # Number of idle cycles 509system.cpu1.num_busy_cycles 15522937.525217 # Number of busy cycles 510system.cpu1.not_idle_fraction 0.004152 # Percentage of non-idle cycles 511system.cpu1.idle_fraction 0.995848 # Percentage of idle cycles 512system.cpu1.Branches 2214163 # Number of branches fetched 513system.cpu1.op_class::No_OpClass 856043 5.51% 5.51% # Class of executed instruction 514system.cpu1.op_class::IntAlu 9156766 58.98% 64.49% # Class of executed instruction 515system.cpu1.op_class::IntMult 25065 0.16% 64.65% # Class of executed instruction 516system.cpu1.op_class::IntDiv 0 0.00% 64.65% # Class of executed instruction 517system.cpu1.op_class::FloatAdd 12426 0.08% 64.73% # Class of executed instruction 518system.cpu1.op_class::FloatCmp 0 0.00% 64.73% # Class of executed instruction 519system.cpu1.op_class::FloatCvt 0 0.00% 64.73% # Class of executed instruction 520system.cpu1.op_class::FloatMult 0 0.00% 64.73% # Class of executed instruction
	521system.cpu1.op_class::FloatMultAcc 0 0.00% 64.73% # Class of executed instruction
517system.cpu1.op_class::FloatDiv 1409 0.01% 64.74% # Class of executed instruction	522system.cpu1.op_class::FloatDiv 1409 0.01% 64.74% # Class of executed instruction
	523system.cpu1.op_class::FloatMisc 0 0.00% 64.74% # Class of executed instruction
518system.cpu1.op_class::FloatSqrt 0 0.00% 64.74% # Class of executed instruction 519system.cpu1.op_class::SimdAdd 0 0.00% 64.74% # Class of executed instruction 520system.cpu1.op_class::SimdAddAcc 0 0.00% 64.74% # Class of executed instruction 521system.cpu1.op_class::SimdAlu 0 0.00% 64.74% # Class of executed instruction 522system.cpu1.op_class::SimdCmp 0 0.00% 64.74% # Class of executed instruction 523system.cpu1.op_class::SimdCvt 0 0.00% 64.74% # Class of executed instruction 524system.cpu1.op_class::SimdMisc 0 0.00% 64.74% # Class of executed instruction 525system.cpu1.op_class::SimdMult 0 0.00% 64.74% # Class of executed instruction 526system.cpu1.op_class::SimdMultAcc 0 0.00% 64.74% # Class of executed instruction 527system.cpu1.op_class::SimdShift 0 0.00% 64.74% # Class of executed instruction 528system.cpu1.op_class::SimdShiftAcc 0 0.00% 64.74% # Class of executed instruction 529system.cpu1.op_class::SimdSqrt 0 0.00% 64.74% # Class of executed instruction 530system.cpu1.op_class::SimdFloatAdd 0 0.00% 64.74% # Class of executed instruction 531system.cpu1.op_class::SimdFloatAlu 0 0.00% 64.74% # Class of executed instruction 532system.cpu1.op_class::SimdFloatCmp 0 0.00% 64.74% # Class of executed instruction 533system.cpu1.op_class::SimdFloatCvt 0 0.00% 64.74% # Class of executed instruction 534system.cpu1.op_class::SimdFloatDiv 0 0.00% 64.74% # Class of executed instruction 535system.cpu1.op_class::SimdFloatMisc 0 0.00% 64.74% # Class of executed instruction 536system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction 537system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction 538system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction	524system.cpu1.op_class::FloatSqrt 0 0.00% 64.74% # Class of executed instruction 525system.cpu1.op_class::SimdAdd 0 0.00% 64.74% # Class of executed instruction 526system.cpu1.op_class::SimdAddAcc 0 0.00% 64.74% # Class of executed instruction 527system.cpu1.op_class::SimdAlu 0 0.00% 64.74% # Class of executed instruction 528system.cpu1.op_class::SimdCmp 0 0.00% 64.74% # Class of executed instruction 529system.cpu1.op_class::SimdCvt 0 0.00% 64.74% # Class of executed instruction 530system.cpu1.op_class::SimdMisc 0 0.00% 64.74% # Class of executed instruction 531system.cpu1.op_class::SimdMult 0 0.00% 64.74% # Class of executed instruction 532system.cpu1.op_class::SimdMultAcc 0 0.00% 64.74% # Class of executed instruction 533system.cpu1.op_class::SimdShift 0 0.00% 64.74% # Class of executed instruction 534system.cpu1.op_class::SimdShiftAcc 0 0.00% 64.74% # Class of executed instruction 535system.cpu1.op_class::SimdSqrt 0 0.00% 64.74% # Class of executed instruction 536system.cpu1.op_class::SimdFloatAdd 0 0.00% 64.74% # Class of executed instruction 537system.cpu1.op_class::SimdFloatAlu 0 0.00% 64.74% # Class of executed instruction 538system.cpu1.op_class::SimdFloatCmp 0 0.00% 64.74% # Class of executed instruction 539system.cpu1.op_class::SimdFloatCvt 0 0.00% 64.74% # Class of executed instruction 540system.cpu1.op_class::SimdFloatDiv 0 0.00% 64.74% # Class of executed instruction 541system.cpu1.op_class::SimdFloatMisc 0 0.00% 64.74% # Class of executed instruction 542system.cpu1.op_class::SimdFloatMult 0 0.00% 64.74% # Class of executed instruction 543system.cpu1.op_class::SimdFloatMultAcc 0 0.00% 64.74% # Class of executed instruction 544system.cpu1.op_class::SimdFloatSqrt 0 0.00% 64.74% # Class of executed instruction
539system.cpu1.op_class::MemRead 2937016 18.92% 83.66% # Class of executed instruction 540system.cpu1.op_class::MemWrite 2113897 13.62% 97.27% # Class of executed instruction	545system.cpu1.op_class::MemRead 2842559 18.31% 83.05% # Class of executed instruction 546system.cpu1.op_class::MemWrite 2023248 13.03% 96.08% # Class of executed instruction 547system.cpu1.op_class::FloatMemRead 94457 0.61% 96.69% # Class of executed instruction 548system.cpu1.op_class::FloatMemWrite 90649 0.58% 97.27% # Class of executed instruction
541system.cpu1.op_class::IprAccess 423253 2.73% 100.00% # Class of executed instruction 542system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 543system.cpu1.op_class::total 15525875 # Class of executed instruction 544system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 545system.cpu1.dcache.tags.replacements 201757 # number of replacements 546system.cpu1.dcache.tags.tagsinuse 497.601962 # Cycle average of tags in use 547system.cpu1.dcache.tags.total_refs 4718401 # Total number of references to valid blocks. 548system.cpu1.dcache.tags.sampled_refs 202065 # Sample count of references to valid blocks. 549system.cpu1.dcache.tags.avg_refs 23.350907 # Average number of references to valid blocks. 550system.cpu1.dcache.tags.warmup_cycle 15869420000 # Cycle when the warmup percentage was hit. 551system.cpu1.dcache.tags.occ_blocks::cpu1.data 497.601962 # Average occupied blocks per requestor 552system.cpu1.dcache.tags.occ_percent::cpu1.data 0.971879 # Average percentage of cache occupancy 553system.cpu1.dcache.tags.occ_percent::total 0.971879 # Average percentage of cache occupancy 554system.cpu1.dcache.tags.occ_task_id_blocks::1024 308 # Occupied blocks per task id 555system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 556system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 557system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 558system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 559system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses 560system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 561system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 562system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits 563system.cpu1.dcache.WriteReq_hits::cpu1.data 1954647 # number of WriteReq hits 564system.cpu1.dcache.WriteReq_hits::total 1954647 # number of WriteReq hits 565system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 566system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits 567system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64211 # number of StoreCondReq hits 568system.cpu1.dcache.StoreCondReq_hits::total 64211 # number of StoreCondReq hits 569system.cpu1.dcache.demand_hits::cpu1.data 4587335 # number of demand (read+write) hits 570system.cpu1.dcache.demand_hits::total 4587335 # number of demand (read+write) hits 571system.cpu1.dcache.overall_hits::cpu1.data 4587335 # number of overall hits 572system.cpu1.dcache.overall_hits::total 4587335 # number of overall hits 573system.cpu1.dcache.ReadReq_misses::cpu1.data 140885 # number of ReadReq misses 574system.cpu1.dcache.ReadReq_misses::total 140885 # number of ReadReq misses 575system.cpu1.dcache.WriteReq_misses::cpu1.data 78313 # number of WriteReq misses 576system.cpu1.dcache.WriteReq_misses::total 78313 # number of WriteReq misses 577system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 11000 # number of LoadLockedReq misses 578system.cpu1.dcache.LoadLockedReq_misses::total 11000 # number of LoadLockedReq misses 579system.cpu1.dcache.StoreCondReq_misses::cpu1.data 7304 # number of StoreCondReq misses 580system.cpu1.dcache.StoreCondReq_misses::total 7304 # number of StoreCondReq misses 581system.cpu1.dcache.demand_misses::cpu1.data 219198 # number of demand (read+write) misses 582system.cpu1.dcache.demand_misses::total 219198 # number of demand (read+write) misses 583system.cpu1.dcache.overall_misses::cpu1.data 219198 # number of overall misses 584system.cpu1.dcache.overall_misses::total 219198 # number of overall misses 585system.cpu1.dcache.ReadReq_accesses::cpu1.data 2773573 # number of ReadReq accesses(hits+misses) 586system.cpu1.dcache.ReadReq_accesses::total 2773573 # number of ReadReq accesses(hits+misses) 587system.cpu1.dcache.WriteReq_accesses::cpu1.data 2032960 # number of WriteReq accesses(hits+misses) 588system.cpu1.dcache.WriteReq_accesses::total 2032960 # number of WriteReq accesses(hits+misses) 589system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 72098 # number of LoadLockedReq accesses(hits+misses) 590system.cpu1.dcache.LoadLockedReq_accesses::total 72098 # number of LoadLockedReq accesses(hits+misses) 591system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 71515 # number of StoreCondReq accesses(hits+misses) 592system.cpu1.dcache.StoreCondReq_accesses::total 71515 # number of StoreCondReq accesses(hits+misses) 593system.cpu1.dcache.demand_accesses::cpu1.data 4806533 # number of demand (read+write) accesses 594system.cpu1.dcache.demand_accesses::total 4806533 # number of demand (read+write) accesses 595system.cpu1.dcache.overall_accesses::cpu1.data 4806533 # number of overall (read+write) accesses 596system.cpu1.dcache.overall_accesses::total 4806533 # number of overall (read+write) accesses 597system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.050795 # miss rate for ReadReq accesses 598system.cpu1.dcache.ReadReq_miss_rate::total 0.050795 # miss rate for ReadReq accesses 599system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.038522 # miss rate for WriteReq accesses 600system.cpu1.dcache.WriteReq_miss_rate::total 0.038522 # miss rate for WriteReq accesses 601system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.152570 # miss rate for LoadLockedReq accesses 602system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.152570 # miss rate for LoadLockedReq accesses 603system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.102132 # miss rate for StoreCondReq accesses 604system.cpu1.dcache.StoreCondReq_miss_rate::total 0.102132 # miss rate for StoreCondReq accesses 605system.cpu1.dcache.demand_miss_rate::cpu1.data 0.045604 # miss rate for demand accesses 606system.cpu1.dcache.demand_miss_rate::total 0.045604 # miss rate for demand accesses 607system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045604 # miss rate for overall accesses 608system.cpu1.dcache.overall_miss_rate::total 0.045604 # miss rate for overall accesses 609system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 610system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 611system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 612system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 613system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 614system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 615system.cpu1.dcache.writebacks::writebacks 144832 # number of writebacks 616system.cpu1.dcache.writebacks::total 144832 # number of writebacks 617system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 618system.cpu1.icache.tags.replacements 380647 # number of replacements 619system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 620system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 621system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 622system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 623system.cpu1.icache.tags.warmup_cycle 1859777195500 # Cycle when the warmup percentage was hit. 624system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 625system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy 626system.cpu1.icache.tags.occ_percent::total 0.885027 # Average percentage of cache occupancy 627system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 628system.cpu1.icache.tags.age_task_id_blocks_1024::2 509 # Occupied blocks per task id 629system.cpu1.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id 630system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 631system.cpu1.icache.tags.tag_accesses 15907063 # Number of tag accesses 632system.cpu1.icache.tags.data_accesses 15907063 # Number of data accesses 633system.cpu1.icache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 634system.cpu1.icache.ReadReq_hits::cpu1.inst 15144687 # number of ReadReq hits 635system.cpu1.icache.ReadReq_hits::total 15144687 # number of ReadReq hits 636system.cpu1.icache.demand_hits::cpu1.inst 15144687 # number of demand (read+write) hits 637system.cpu1.icache.demand_hits::total 15144687 # number of demand (read+write) hits 638system.cpu1.icache.overall_hits::cpu1.inst 15144687 # number of overall hits 639system.cpu1.icache.overall_hits::total 15144687 # number of overall hits 640system.cpu1.icache.ReadReq_misses::cpu1.inst 381188 # number of ReadReq misses 641system.cpu1.icache.ReadReq_misses::total 381188 # number of ReadReq misses 642system.cpu1.icache.demand_misses::cpu1.inst 381188 # number of demand (read+write) misses 643system.cpu1.icache.demand_misses::total 381188 # number of demand (read+write) misses 644system.cpu1.icache.overall_misses::cpu1.inst 381188 # number of overall misses 645system.cpu1.icache.overall_misses::total 381188 # number of overall misses 646system.cpu1.icache.ReadReq_accesses::cpu1.inst 15525875 # number of ReadReq accesses(hits+misses) 647system.cpu1.icache.ReadReq_accesses::total 15525875 # number of ReadReq accesses(hits+misses) 648system.cpu1.icache.demand_accesses::cpu1.inst 15525875 # number of demand (read+write) accesses 649system.cpu1.icache.demand_accesses::total 15525875 # number of demand (read+write) accesses 650system.cpu1.icache.overall_accesses::cpu1.inst 15525875 # number of overall (read+write) accesses 651system.cpu1.icache.overall_accesses::total 15525875 # number of overall (read+write) accesses 652system.cpu1.icache.ReadReq_miss_rate::cpu1.inst 0.024552 # miss rate for ReadReq accesses 653system.cpu1.icache.ReadReq_miss_rate::total 0.024552 # miss rate for ReadReq accesses 654system.cpu1.icache.demand_miss_rate::cpu1.inst 0.024552 # miss rate for demand accesses 655system.cpu1.icache.demand_miss_rate::total 0.024552 # miss rate for demand accesses 656system.cpu1.icache.overall_miss_rate::cpu1.inst 0.024552 # miss rate for overall accesses 657system.cpu1.icache.overall_miss_rate::total 0.024552 # miss rate for overall accesses 658system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 659system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 660system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked 661system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked 662system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 663system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 664system.cpu1.icache.writebacks::writebacks 380647 # number of writebacks 665system.cpu1.icache.writebacks::total 380647 # number of writebacks 666system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 667system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). 668system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD). 669system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes. 670system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 671system.disk0.dma_write_txs 395 # Number of DMA write transactions. 672system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 673system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 674system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 675system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 676system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 677system.disk2.dma_write_txs 1 # Number of DMA write transactions. 678system.iobus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 679system.iobus.trans_dist::ReadReq 7628 # Transaction distribution 680system.iobus.trans_dist::ReadResp 7628 # Transaction distribution 681system.iobus.trans_dist::WriteReq 56140 # Transaction distribution 682system.iobus.trans_dist::WriteResp 56140 # Transaction distribution 683system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 14686 # Packet count per connected master and slave (bytes) 684system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes) 685system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 686system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) 687system.iobus.pkt_count_system.bridge.master::system.tsunami.io.pio 1076 # Packet count per connected master and slave (bytes) 688system.iobus.pkt_count_system.bridge.master::system.tsunami.uart.pio 18036 # Packet count per connected master and slave (bytes) 689system.iobus.pkt_count_system.bridge.master::system.tsunami.backdoor.pio 2468 # Packet count per connected master and slave (bytes) 690system.iobus.pkt_count_system.bridge.master::system.tsunami.ide.pio 6672 # Packet count per connected master and slave (bytes) 691system.iobus.pkt_count_system.bridge.master::system.tsunami.ethernet.pio 102 # Packet count per connected master and slave (bytes) 692system.iobus.pkt_count_system.bridge.master::total 44074 # Packet count per connected master and slave (bytes) 693system.iobus.pkt_count_system.tsunami.ide.dma::system.iocache.cpu_side 83462 # Packet count per connected master and slave (bytes) 694system.iobus.pkt_count_system.tsunami.ide.dma::total 83462 # Packet count per connected master and slave (bytes) 695system.iobus.pkt_count::total 127536 # Packet count per connected master and slave (bytes) 696system.iobus.pkt_size_system.bridge.master::system.tsunami.cchip.pio 58744 # Cumulative packet size per connected master and slave (bytes) 697system.iobus.pkt_size_system.bridge.master::system.tsunami.pchip.pio 2749 # Cumulative packet size per connected master and slave (bytes) 698system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_sm_chip.pio 5 # Cumulative packet size per connected master and slave (bytes) 699system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_uart4.pio 5 # Cumulative packet size per connected master and slave (bytes) 700system.iobus.pkt_size_system.bridge.master::system.tsunami.io.pio 1392 # Cumulative packet size per connected master and slave (bytes) 701system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9018 # Cumulative packet size per connected master and slave (bytes) 702system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 9852 # Cumulative packet size per connected master and slave (bytes) 703system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 704system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 705system.iobus.pkt_size_system.bridge.master::total 86162 # Cumulative packet size per connected master and slave (bytes) 706system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661656 # Cumulative packet size per connected master and slave (bytes) 707system.iobus.pkt_size_system.tsunami.ide.dma::total 2661656 # Cumulative packet size per connected master and slave (bytes) 708system.iobus.pkt_size::total 2747818 # Cumulative packet size per connected master and slave (bytes) 709system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 710system.iocache.tags.replacements 41699 # number of replacements 711system.iocache.tags.tagsinuse 0.434096 # Cycle average of tags in use 712system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 713system.iocache.tags.sampled_refs 41715 # Sample count of references to valid blocks. 714system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 715system.iocache.tags.warmup_cycle 1685787164517 # Cycle when the warmup percentage was hit. 716system.iocache.tags.occ_blocks::tsunami.ide 0.434096 # Average occupied blocks per requestor 717system.iocache.tags.occ_percent::tsunami.ide 0.027131 # Average percentage of cache occupancy 718system.iocache.tags.occ_percent::total 0.027131 # Average percentage of cache occupancy 719system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 720system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 721system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 722system.iocache.tags.tag_accesses 375579 # Number of tag accesses 723system.iocache.tags.data_accesses 375579 # Number of data accesses 724system.iocache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 725system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 726system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 727system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 728system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 729system.iocache.demand_misses::tsunami.ide 41731 # number of demand (read+write) misses 730system.iocache.demand_misses::total 41731 # number of demand (read+write) misses 731system.iocache.overall_misses::tsunami.ide 41731 # number of overall misses 732system.iocache.overall_misses::total 41731 # number of overall misses 733system.iocache.ReadReq_accesses::tsunami.ide 179 # number of ReadReq accesses(hits+misses) 734system.iocache.ReadReq_accesses::total 179 # number of ReadReq accesses(hits+misses) 735system.iocache.WriteLineReq_accesses::tsunami.ide 41552 # number of WriteLineReq accesses(hits+misses) 736system.iocache.WriteLineReq_accesses::total 41552 # number of WriteLineReq accesses(hits+misses) 737system.iocache.demand_accesses::tsunami.ide 41731 # number of demand (read+write) accesses 738system.iocache.demand_accesses::total 41731 # number of demand (read+write) accesses 739system.iocache.overall_accesses::tsunami.ide 41731 # number of overall (read+write) accesses 740system.iocache.overall_accesses::total 41731 # number of overall (read+write) accesses 741system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses 742system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 743system.iocache.WriteLineReq_miss_rate::tsunami.ide 1 # miss rate for WriteLineReq accesses 744system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 745system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses 746system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 747system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses 748system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 749system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 750system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 751system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 752system.iocache.blocked::no_targets 0 # number of cycles access was blocked 753system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 754system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 755system.iocache.writebacks::writebacks 41520 # number of writebacks 756system.iocache.writebacks::total 41520 # number of writebacks 757system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 758system.l2c.tags.replacements 999962 # number of replacements 759system.l2c.tags.tagsinuse 65520.418446 # Cycle average of tags in use 760system.l2c.tags.total_refs 4560628 # Total number of references to valid blocks. 761system.l2c.tags.sampled_refs 1065470 # Sample count of references to valid blocks. 762system.l2c.tags.avg_refs 4.280391 # Average number of references to valid blocks. 763system.l2c.tags.warmup_cycle 618103500 # Cycle when the warmup percentage was hit. 764system.l2c.tags.occ_blocks::writebacks 304.654016 # Average occupied blocks per requestor 765system.l2c.tags.occ_blocks::cpu0.inst 4865.757369 # Average occupied blocks per requestor 766system.l2c.tags.occ_blocks::cpu0.data 58473.870947 # Average occupied blocks per requestor 767system.l2c.tags.occ_blocks::cpu1.inst 175.171504 # Average occupied blocks per requestor 768system.l2c.tags.occ_blocks::cpu1.data 1700.964609 # Average occupied blocks per requestor 769system.l2c.tags.occ_percent::writebacks 0.004649 # Average percentage of cache occupancy 770system.l2c.tags.occ_percent::cpu0.inst 0.074246 # Average percentage of cache occupancy 771system.l2c.tags.occ_percent::cpu0.data 0.892240 # Average percentage of cache occupancy 772system.l2c.tags.occ_percent::cpu1.inst 0.002673 # Average percentage of cache occupancy 773system.l2c.tags.occ_percent::cpu1.data 0.025955 # Average percentage of cache occupancy 774system.l2c.tags.occ_percent::total 0.999762 # Average percentage of cache occupancy 775system.l2c.tags.occ_task_id_blocks::1024 65508 # Occupied blocks per task id 776system.l2c.tags.age_task_id_blocks_1024::0 674 # Occupied blocks per task id 777system.l2c.tags.age_task_id_blocks_1024::1 2411 # Occupied blocks per task id 778system.l2c.tags.age_task_id_blocks_1024::2 2462 # Occupied blocks per task id 779system.l2c.tags.age_task_id_blocks_1024::3 9328 # Occupied blocks per task id 780system.l2c.tags.age_task_id_blocks_1024::4 50633 # Occupied blocks per task id 781system.l2c.tags.occ_task_id_percent::1024 0.999573 # Percentage of cache occupancy per task id 782system.l2c.tags.tag_accesses 46077158 # Number of tag accesses 783system.l2c.tags.data_accesses 46077158 # Number of data accesses 784system.l2c.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 785system.l2c.WritebackDirty_hits::writebacks 778757 # number of WritebackDirty hits 786system.l2c.WritebackDirty_hits::total 778757 # number of WritebackDirty hits 787system.l2c.WritebackClean_hits::writebacks 721480 # number of WritebackClean hits 788system.l2c.WritebackClean_hits::total 721480 # number of WritebackClean hits 789system.l2c.UpgradeReq_hits::cpu0.data 3102 # number of UpgradeReq hits 790system.l2c.UpgradeReq_hits::cpu1.data 2744 # number of UpgradeReq hits 791system.l2c.UpgradeReq_hits::total 5846 # number of UpgradeReq hits 792system.l2c.SCUpgradeReq_hits::cpu0.data 1187 # number of SCUpgradeReq hits 793system.l2c.SCUpgradeReq_hits::cpu1.data 1121 # number of SCUpgradeReq hits 794system.l2c.SCUpgradeReq_hits::total 2308 # number of SCUpgradeReq hits 795system.l2c.ReadExReq_hits::cpu0.data 111978 # number of ReadExReq hits 796system.l2c.ReadExReq_hits::cpu1.data 56627 # number of ReadExReq hits 797system.l2c.ReadExReq_hits::total 168605 # number of ReadExReq hits 798system.l2c.ReadCleanReq_hits::cpu0.inst 607070 # number of ReadCleanReq hits 799system.l2c.ReadCleanReq_hits::cpu1.inst 379530 # number of ReadCleanReq hits 800system.l2c.ReadCleanReq_hits::total 986600 # number of ReadCleanReq hits 801system.l2c.ReadSharedReq_hits::cpu0.data 626251 # number of ReadSharedReq hits 802system.l2c.ReadSharedReq_hits::cpu1.data 128790 # number of ReadSharedReq hits 803system.l2c.ReadSharedReq_hits::total 755041 # number of ReadSharedReq hits 804system.l2c.demand_hits::cpu0.inst 607070 # number of demand (read+write) hits 805system.l2c.demand_hits::cpu0.data 738229 # number of demand (read+write) hits 806system.l2c.demand_hits::cpu1.inst 379530 # number of demand (read+write) hits 807system.l2c.demand_hits::cpu1.data 185417 # number of demand (read+write) hits 808system.l2c.demand_hits::total 1910246 # number of demand (read+write) hits 809system.l2c.overall_hits::cpu0.inst 607070 # number of overall hits 810system.l2c.overall_hits::cpu0.data 738229 # number of overall hits 811system.l2c.overall_hits::cpu1.inst 379530 # number of overall hits 812system.l2c.overall_hits::cpu1.data 185417 # number of overall hits 813system.l2c.overall_hits::total 1910246 # number of overall hits 814system.l2c.UpgradeReq_misses::cpu0.data 4 # number of UpgradeReq misses 815system.l2c.UpgradeReq_misses::cpu1.data 2 # number of UpgradeReq misses 816system.l2c.UpgradeReq_misses::total 6 # number of UpgradeReq misses 817system.l2c.SCUpgradeReq_misses::cpu1.data 1 # number of SCUpgradeReq misses 818system.l2c.SCUpgradeReq_misses::total 1 # number of SCUpgradeReq misses 819system.l2c.ReadExReq_misses::cpu0.data 113307 # number of ReadExReq misses 820system.l2c.ReadExReq_misses::cpu1.data 11044 # number of ReadExReq misses 821system.l2c.ReadExReq_misses::total 124351 # number of ReadExReq misses 822system.l2c.ReadCleanReq_misses::cpu0.inst 11848 # number of ReadCleanReq misses 823system.l2c.ReadCleanReq_misses::cpu1.inst 1658 # number of ReadCleanReq misses 824system.l2c.ReadCleanReq_misses::total 13506 # number of ReadCleanReq misses 825system.l2c.ReadSharedReq_misses::cpu0.data 926616 # number of ReadSharedReq misses 826system.l2c.ReadSharedReq_misses::cpu1.data 1036 # number of ReadSharedReq misses 827system.l2c.ReadSharedReq_misses::total 927652 # number of ReadSharedReq misses 828system.l2c.demand_misses::cpu0.inst 11848 # number of demand (read+write) misses 829system.l2c.demand_misses::cpu0.data 1039923 # number of demand (read+write) misses 830system.l2c.demand_misses::cpu1.inst 1658 # number of demand (read+write) misses 831system.l2c.demand_misses::cpu1.data 12080 # number of demand (read+write) misses 832system.l2c.demand_misses::total 1065509 # number of demand (read+write) misses 833system.l2c.overall_misses::cpu0.inst 11848 # number of overall misses 834system.l2c.overall_misses::cpu0.data 1039923 # number of overall misses 835system.l2c.overall_misses::cpu1.inst 1658 # number of overall misses 836system.l2c.overall_misses::cpu1.data 12080 # number of overall misses 837system.l2c.overall_misses::total 1065509 # number of overall misses 838system.l2c.WritebackDirty_accesses::writebacks 778757 # number of WritebackDirty accesses(hits+misses) 839system.l2c.WritebackDirty_accesses::total 778757 # number of WritebackDirty accesses(hits+misses) 840system.l2c.WritebackClean_accesses::writebacks 721480 # number of WritebackClean accesses(hits+misses) 841system.l2c.WritebackClean_accesses::total 721480 # number of WritebackClean accesses(hits+misses) 842system.l2c.UpgradeReq_accesses::cpu0.data 3106 # number of UpgradeReq accesses(hits+misses) 843system.l2c.UpgradeReq_accesses::cpu1.data 2746 # number of UpgradeReq accesses(hits+misses) 844system.l2c.UpgradeReq_accesses::total 5852 # number of UpgradeReq accesses(hits+misses) 845system.l2c.SCUpgradeReq_accesses::cpu0.data 1187 # number of SCUpgradeReq accesses(hits+misses) 846system.l2c.SCUpgradeReq_accesses::cpu1.data 1122 # number of SCUpgradeReq accesses(hits+misses) 847system.l2c.SCUpgradeReq_accesses::total 2309 # number of SCUpgradeReq accesses(hits+misses) 848system.l2c.ReadExReq_accesses::cpu0.data 225285 # number of ReadExReq accesses(hits+misses) 849system.l2c.ReadExReq_accesses::cpu1.data 67671 # number of ReadExReq accesses(hits+misses) 850system.l2c.ReadExReq_accesses::total 292956 # number of ReadExReq accesses(hits+misses) 851system.l2c.ReadCleanReq_accesses::cpu0.inst 618918 # number of ReadCleanReq accesses(hits+misses) 852system.l2c.ReadCleanReq_accesses::cpu1.inst 381188 # number of ReadCleanReq accesses(hits+misses) 853system.l2c.ReadCleanReq_accesses::total 1000106 # number of ReadCleanReq accesses(hits+misses) 854system.l2c.ReadSharedReq_accesses::cpu0.data 1552867 # number of ReadSharedReq accesses(hits+misses) 855system.l2c.ReadSharedReq_accesses::cpu1.data 129826 # number of ReadSharedReq accesses(hits+misses) 856system.l2c.ReadSharedReq_accesses::total 1682693 # number of ReadSharedReq accesses(hits+misses) 857system.l2c.demand_accesses::cpu0.inst 618918 # number of demand (read+write) accesses 858system.l2c.demand_accesses::cpu0.data 1778152 # number of demand (read+write) accesses 859system.l2c.demand_accesses::cpu1.inst 381188 # number of demand (read+write) accesses 860system.l2c.demand_accesses::cpu1.data 197497 # number of demand (read+write) accesses 861system.l2c.demand_accesses::total 2975755 # number of demand (read+write) accesses 862system.l2c.overall_accesses::cpu0.inst 618918 # number of overall (read+write) accesses 863system.l2c.overall_accesses::cpu0.data 1778152 # number of overall (read+write) accesses 864system.l2c.overall_accesses::cpu1.inst 381188 # number of overall (read+write) accesses 865system.l2c.overall_accesses::cpu1.data 197497 # number of overall (read+write) accesses 866system.l2c.overall_accesses::total 2975755 # number of overall (read+write) accesses 867system.l2c.UpgradeReq_miss_rate::cpu0.data 0.001288 # miss rate for UpgradeReq accesses 868system.l2c.UpgradeReq_miss_rate::cpu1.data 0.000728 # miss rate for UpgradeReq accesses 869system.l2c.UpgradeReq_miss_rate::total 0.001025 # miss rate for UpgradeReq accesses 870system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.000891 # miss rate for SCUpgradeReq accesses 871system.l2c.SCUpgradeReq_miss_rate::total 0.000433 # miss rate for SCUpgradeReq accesses 872system.l2c.ReadExReq_miss_rate::cpu0.data 0.502950 # miss rate for ReadExReq accesses 873system.l2c.ReadExReq_miss_rate::cpu1.data 0.163201 # miss rate for ReadExReq accesses 874system.l2c.ReadExReq_miss_rate::total 0.424470 # miss rate for ReadExReq accesses 875system.l2c.ReadCleanReq_miss_rate::cpu0.inst 0.019143 # miss rate for ReadCleanReq accesses 876system.l2c.ReadCleanReq_miss_rate::cpu1.inst 0.004350 # miss rate for ReadCleanReq accesses 877system.l2c.ReadCleanReq_miss_rate::total 0.013505 # miss rate for ReadCleanReq accesses 878system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.596713 # miss rate for ReadSharedReq accesses 879system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.007980 # miss rate for ReadSharedReq accesses 880system.l2c.ReadSharedReq_miss_rate::total 0.551290 # miss rate for ReadSharedReq accesses 881system.l2c.demand_miss_rate::cpu0.inst 0.019143 # miss rate for demand accesses 882system.l2c.demand_miss_rate::cpu0.data 0.584834 # miss rate for demand accesses 883system.l2c.demand_miss_rate::cpu1.inst 0.004350 # miss rate for demand accesses 884system.l2c.demand_miss_rate::cpu1.data 0.061165 # miss rate for demand accesses 885system.l2c.demand_miss_rate::total 0.358063 # miss rate for demand accesses 886system.l2c.overall_miss_rate::cpu0.inst 0.019143 # miss rate for overall accesses 887system.l2c.overall_miss_rate::cpu0.data 0.584834 # miss rate for overall accesses 888system.l2c.overall_miss_rate::cpu1.inst 0.004350 # miss rate for overall accesses 889system.l2c.overall_miss_rate::cpu1.data 0.061165 # miss rate for overall accesses 890system.l2c.overall_miss_rate::total 0.358063 # miss rate for overall accesses 891system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 892system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 893system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 894system.l2c.blocked::no_targets 0 # number of cycles access was blocked 895system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 896system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 897system.l2c.writebacks::writebacks 80947 # number of writebacks 898system.l2c.writebacks::total 80947 # number of writebacks 899system.membus.snoop_filter.tot_requests 2174394 # Total number of requests made to the snoop filter. 900system.membus.snoop_filter.hit_single_requests 1068384 # Number of requests hitting in the snoop filter with a single holder of the requested data. 901system.membus.snoop_filter.hit_multi_requests 430 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 902system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 903system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 904system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 905system.membus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 906system.membus.trans_dist::ReadReq 7449 # Transaction distribution 907system.membus.trans_dist::ReadResp 948786 # Transaction distribution 908system.membus.trans_dist::WriteReq 14588 # Transaction distribution 909system.membus.trans_dist::WriteResp 14588 # Transaction distribution 910system.membus.trans_dist::WritebackDirty 122467 # Transaction distribution 911system.membus.trans_dist::CleanEvict 918018 # Transaction distribution 912system.membus.trans_dist::UpgradeReq 13880 # Transaction distribution 913system.membus.trans_dist::SCUpgradeReq 11895 # Transaction distribution 914system.membus.trans_dist::UpgradeResp 135 # Transaction distribution 915system.membus.trans_dist::ReadExReq 125245 # Transaction distribution 916system.membus.trans_dist::ReadExResp 124223 # Transaction distribution 917system.membus.trans_dist::ReadSharedReq 941337 # Transaction distribution 918system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution 919system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution 920system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 44074 # Packet count per connected master and slave (bytes) 921system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 3156480 # Packet count per connected master and slave (bytes) 922system.membus.pkt_count_system.l2c.mem_side::total 3200554 # Packet count per connected master and slave (bytes) 923system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 125161 # Packet count per connected master and slave (bytes) 924system.membus.pkt_count_system.iocache.mem_side::total 125161 # Packet count per connected master and slave (bytes) 925system.membus.pkt_count::total 3325715 # Packet count per connected master and slave (bytes) 926system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 86162 # Cumulative packet size per connected master and slave (bytes) 927system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 73364992 # Cumulative packet size per connected master and slave (bytes) 928system.membus.pkt_size_system.l2c.mem_side::total 73451154 # Cumulative packet size per connected master and slave (bytes) 929system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2668736 # Cumulative packet size per connected master and slave (bytes) 930system.membus.pkt_size_system.iocache.mem_side::total 2668736 # Cumulative packet size per connected master and slave (bytes) 931system.membus.pkt_size::total 76119890 # Cumulative packet size per connected master and slave (bytes) 932system.membus.snoops 0 # Total snoops (count) 933system.membus.snoopTraffic 0 # Total snoop traffic (bytes) 934system.membus.snoop_fanout::samples 2196431 # Request fanout histogram 935system.membus.snoop_fanout::mean 0.000519 # Request fanout histogram 936system.membus.snoop_fanout::stdev 0.022766 # Request fanout histogram 937system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 938system.membus.snoop_fanout::0 2195292 99.95% 99.95% # Request fanout histogram 939system.membus.snoop_fanout::1 1139 0.05% 100.00% # Request fanout histogram 940system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 941system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 942system.membus.snoop_fanout::min_value 0 # Request fanout histogram 943system.membus.snoop_fanout::max_value 1 # Request fanout histogram 944system.membus.snoop_fanout::total 2196431 # Request fanout histogram 945system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 946system.toL2Bus.snoop_filter.tot_requests 6035809 # Total number of requests made to the snoop filter. 947system.toL2Bus.snoop_filter.hit_single_requests 3018662 # Number of requests hitting in the snoop filter with a single holder of the requested data. 948system.toL2Bus.snoop_filter.hit_multi_requests 374456 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 949system.toL2Bus.snoop_filter.tot_snoops 1621 # Total number of snoops made to the snoop filter. 950system.toL2Bus.snoop_filter.hit_single_snoops 1531 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 951system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 952system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 953system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 954system.toL2Bus.trans_dist::ReadResp 2732152 # Transaction distribution 955system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 956system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution 957system.toL2Bus.trans_dist::WritebackDirty 778757 # Transaction distribution 958system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution 959system.toL2Bus.trans_dist::CleanEvict 1204367 # Transaction distribution 960system.toL2Bus.trans_dist::UpgradeReq 19598 # Transaction distribution 961system.toL2Bus.trans_dist::SCUpgradeReq 14203 # Transaction distribution 962system.toL2Bus.trans_dist::UpgradeResp 33801 # Transaction distribution 963system.toL2Bus.trans_dist::ReadExReq 295242 # Transaction distribution 964system.toL2Bus.trans_dist::ReadExResp 295242 # Transaction distribution 965system.toL2Bus.trans_dist::ReadCleanReq 1000127 # Transaction distribution 966system.toL2Bus.trans_dist::ReadSharedReq 1724576 # Transaction distribution 967system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1856170 # Packet count per connected master and slave (bytes) 968system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 5450061 # Packet count per connected master and slave (bytes) 969system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 1143023 # Packet count per connected master and slave (bytes) 970system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 684375 # Packet count per connected master and slave (bytes) 971system.toL2Bus.pkt_count::total 9133629 # Packet count per connected master and slave (bytes) 972system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 79182784 # Cumulative packet size per connected master and slave (bytes) 973system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 155817595 # Cumulative packet size per connected master and slave (bytes) 974system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 48757440 # Cumulative packet size per connected master and slave (bytes) 975system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 23377367 # Cumulative packet size per connected master and slave (bytes) 976system.toL2Bus.pkt_size::total 307135186 # Cumulative packet size per connected master and slave (bytes) 977system.toL2Bus.snoops 1000983 # Total snoops (count) 978system.toL2Bus.snoopTraffic 5197312 # Total snoop traffic (bytes) 979system.toL2Bus.snoop_fanout::samples 7058665 # Request fanout histogram 980system.toL2Bus.snoop_fanout::mean 0.106769 # Request fanout histogram 981system.toL2Bus.snoop_fanout::stdev 0.309069 # Request fanout histogram 982system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 983system.toL2Bus.snoop_fanout::0 6305559 89.33% 89.33% # Request fanout histogram 984system.toL2Bus.snoop_fanout::1 752566 10.66% 99.99% # Request fanout histogram 985system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 986system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 987system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 988system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 989system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 990system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 991system.toL2Bus.snoop_fanout::total 7058665 # Request fanout histogram 992system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 993system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 994system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 995system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 996system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 997system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 998system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 999system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 1000system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 1001system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 1002system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 1003system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 1004system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post 1005system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 1006system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 1007system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post 1008system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 1009system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU 1010system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post 1011system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR 1012system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 1013system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post 1014system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 1015system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU 1016system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post 1017system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR 1018system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 1019system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 1020system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 1021system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 1022system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 1023system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 1024system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 1025system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 1026system.tsunami.ethernet.droppedPackets 0 # number of packets dropped 1027system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1028system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1029system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1030system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1031system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1032system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1033system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1034system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1035system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1036system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1037system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1038system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1039system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1040system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1041system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1042system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1043system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1044system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1045system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1046system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1047system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1048system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1049system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1050 1051---------- End Simulation Statistics ----------	549system.cpu1.op_class::IprAccess 423253 2.73% 100.00% # Class of executed instruction 550system.cpu1.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction 551system.cpu1.op_class::total 15525875 # Class of executed instruction 552system.cpu1.dcache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 553system.cpu1.dcache.tags.replacements 201757 # number of replacements 554system.cpu1.dcache.tags.tagsinuse 497.601962 # Cycle average of tags in use 555system.cpu1.dcache.tags.total_refs 4718401 # Total number of references to valid blocks. 556system.cpu1.dcache.tags.sampled_refs 202065 # Sample count of references to valid blocks. 557system.cpu1.dcache.tags.avg_refs 23.350907 # Average number of references to valid blocks. 558system.cpu1.dcache.tags.warmup_cycle 15869420000 # Cycle when the warmup percentage was hit. 559system.cpu1.dcache.tags.occ_blocks::cpu1.data 497.601962 # Average occupied blocks per requestor 560system.cpu1.dcache.tags.occ_percent::cpu1.data 0.971879 # Average percentage of cache occupancy 561system.cpu1.dcache.tags.occ_percent::total 0.971879 # Average percentage of cache occupancy 562system.cpu1.dcache.tags.occ_task_id_blocks::1024 308 # Occupied blocks per task id 563system.cpu1.dcache.tags.age_task_id_blocks_1024::2 306 # Occupied blocks per task id 564system.cpu1.dcache.tags.age_task_id_blocks_1024::3 2 # Occupied blocks per task id 565system.cpu1.dcache.tags.occ_task_id_percent::1024 0.601562 # Percentage of cache occupancy per task id 566system.cpu1.dcache.tags.tag_accesses 20020608 # Number of tag accesses 567system.cpu1.dcache.tags.data_accesses 20020608 # Number of data accesses 568system.cpu1.dcache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 569system.cpu1.dcache.ReadReq_hits::cpu1.data 2632688 # number of ReadReq hits 570system.cpu1.dcache.ReadReq_hits::total 2632688 # number of ReadReq hits 571system.cpu1.dcache.WriteReq_hits::cpu1.data 1954647 # number of WriteReq hits 572system.cpu1.dcache.WriteReq_hits::total 1954647 # number of WriteReq hits 573system.cpu1.dcache.LoadLockedReq_hits::cpu1.data 61098 # number of LoadLockedReq hits 574system.cpu1.dcache.LoadLockedReq_hits::total 61098 # number of LoadLockedReq hits 575system.cpu1.dcache.StoreCondReq_hits::cpu1.data 64211 # number of StoreCondReq hits 576system.cpu1.dcache.StoreCondReq_hits::total 64211 # number of StoreCondReq hits 577system.cpu1.dcache.demand_hits::cpu1.data 4587335 # number of demand (read+write) hits 578system.cpu1.dcache.demand_hits::total 4587335 # number of demand (read+write) hits 579system.cpu1.dcache.overall_hits::cpu1.data 4587335 # number of overall hits 580system.cpu1.dcache.overall_hits::total 4587335 # number of overall hits 581system.cpu1.dcache.ReadReq_misses::cpu1.data 140885 # number of ReadReq misses 582system.cpu1.dcache.ReadReq_misses::total 140885 # number of ReadReq misses 583system.cpu1.dcache.WriteReq_misses::cpu1.data 78313 # number of WriteReq misses 584system.cpu1.dcache.WriteReq_misses::total 78313 # number of WriteReq misses 585system.cpu1.dcache.LoadLockedReq_misses::cpu1.data 11000 # number of LoadLockedReq misses 586system.cpu1.dcache.LoadLockedReq_misses::total 11000 # number of LoadLockedReq misses 587system.cpu1.dcache.StoreCondReq_misses::cpu1.data 7304 # number of StoreCondReq misses 588system.cpu1.dcache.StoreCondReq_misses::total 7304 # number of StoreCondReq misses 589system.cpu1.dcache.demand_misses::cpu1.data 219198 # number of demand (read+write) misses 590system.cpu1.dcache.demand_misses::total 219198 # number of demand (read+write) misses 591system.cpu1.dcache.overall_misses::cpu1.data 219198 # number of overall misses 592system.cpu1.dcache.overall_misses::total 219198 # number of overall misses 593system.cpu1.dcache.ReadReq_accesses::cpu1.data 2773573 # number of ReadReq accesses(hits+misses) 594system.cpu1.dcache.ReadReq_accesses::total 2773573 # number of ReadReq accesses(hits+misses) 595system.cpu1.dcache.WriteReq_accesses::cpu1.data 2032960 # number of WriteReq accesses(hits+misses) 596system.cpu1.dcache.WriteReq_accesses::total 2032960 # number of WriteReq accesses(hits+misses) 597system.cpu1.dcache.LoadLockedReq_accesses::cpu1.data 72098 # number of LoadLockedReq accesses(hits+misses) 598system.cpu1.dcache.LoadLockedReq_accesses::total 72098 # number of LoadLockedReq accesses(hits+misses) 599system.cpu1.dcache.StoreCondReq_accesses::cpu1.data 71515 # number of StoreCondReq accesses(hits+misses) 600system.cpu1.dcache.StoreCondReq_accesses::total 71515 # number of StoreCondReq accesses(hits+misses) 601system.cpu1.dcache.demand_accesses::cpu1.data 4806533 # number of demand (read+write) accesses 602system.cpu1.dcache.demand_accesses::total 4806533 # number of demand (read+write) accesses 603system.cpu1.dcache.overall_accesses::cpu1.data 4806533 # number of overall (read+write) accesses 604system.cpu1.dcache.overall_accesses::total 4806533 # number of overall (read+write) accesses 605system.cpu1.dcache.ReadReq_miss_rate::cpu1.data 0.050795 # miss rate for ReadReq accesses 606system.cpu1.dcache.ReadReq_miss_rate::total 0.050795 # miss rate for ReadReq accesses 607system.cpu1.dcache.WriteReq_miss_rate::cpu1.data 0.038522 # miss rate for WriteReq accesses 608system.cpu1.dcache.WriteReq_miss_rate::total 0.038522 # miss rate for WriteReq accesses 609system.cpu1.dcache.LoadLockedReq_miss_rate::cpu1.data 0.152570 # miss rate for LoadLockedReq accesses 610system.cpu1.dcache.LoadLockedReq_miss_rate::total 0.152570 # miss rate for LoadLockedReq accesses 611system.cpu1.dcache.StoreCondReq_miss_rate::cpu1.data 0.102132 # miss rate for StoreCondReq accesses 612system.cpu1.dcache.StoreCondReq_miss_rate::total 0.102132 # miss rate for StoreCondReq accesses 613system.cpu1.dcache.demand_miss_rate::cpu1.data 0.045604 # miss rate for demand accesses 614system.cpu1.dcache.demand_miss_rate::total 0.045604 # miss rate for demand accesses 615system.cpu1.dcache.overall_miss_rate::cpu1.data 0.045604 # miss rate for overall accesses 616system.cpu1.dcache.overall_miss_rate::total 0.045604 # miss rate for overall accesses 617system.cpu1.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 618system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked 619system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked 620system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked 621system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 622system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 623system.cpu1.dcache.writebacks::writebacks 144832 # number of writebacks 624system.cpu1.dcache.writebacks::total 144832 # number of writebacks 625system.cpu1.icache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 626system.cpu1.icache.tags.replacements 380647 # number of replacements 627system.cpu1.icache.tags.tagsinuse 453.133719 # Cycle average of tags in use 628system.cpu1.icache.tags.total_refs 15144687 # Total number of references to valid blocks. 629system.cpu1.icache.tags.sampled_refs 381159 # Sample count of references to valid blocks. 630system.cpu1.icache.tags.avg_refs 39.733253 # Average number of references to valid blocks. 631system.cpu1.icache.tags.warmup_cycle 1859777195500 # Cycle when the warmup percentage was hit. 632system.cpu1.icache.tags.occ_blocks::cpu1.inst 453.133719 # Average occupied blocks per requestor 633system.cpu1.icache.tags.occ_percent::cpu1.inst 0.885027 # Average percentage of cache occupancy 634system.cpu1.icache.tags.occ_percent::total 0.885027 # Average percentage of cache occupancy 635system.cpu1.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id 636system.cpu1.icache.tags.age_task_id_blocks_1024::2 509 # Occupied blocks per task id 637system.cpu1.icache.tags.age_task_id_blocks_1024::3 3 # Occupied blocks per task id 638system.cpu1.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id 639system.cpu1.icache.tags.tag_accesses 15907063 # Number of tag accesses 640system.cpu1.icache.tags.data_accesses 15907063 # Number of data accesses 641system.cpu1.icache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 642system.cpu1.icache.ReadReq_hits::cpu1.inst 15144687 # number of ReadReq hits 643system.cpu1.icache.ReadReq_hits::total 15144687 # number of ReadReq hits 644system.cpu1.icache.demand_hits::cpu1.inst 15144687 # number of demand (read+write) hits 645system.cpu1.icache.demand_hits::total 15144687 # number of demand (read+write) hits 646system.cpu1.icache.overall_hits::cpu1.inst 15144687 # number of overall hits 647system.cpu1.icache.overall_hits::total 15144687 # number of overall hits 648system.cpu1.icache.ReadReq_misses::cpu1.inst 381188 # number of ReadReq misses 649system.cpu1.icache.ReadReq_misses::total 381188 # number of ReadReq misses 650system.cpu1.icache.demand_misses::cpu1.inst 381188 # number of demand (read+write) misses 651system.cpu1.icache.demand_misses::total 381188 # number of demand (read+write) misses 652system.cpu1.icache.overall_misses::cpu1.inst 381188 # number of overall misses 653system.cpu1.icache.overall_misses::total 381188 # number of overall misses 654system.cpu1.icache.ReadReq_accesses::cpu1.inst 15525875 # number of ReadReq accesses(hits+misses) 655system.cpu1.icache.ReadReq_accesses::total 15525875 # number of ReadReq accesses(hits+misses) 656system.cpu1.icache.demand_accesses::cpu1.inst 15525875 # number of demand (read+write) accesses 657system.cpu1.icache.demand_accesses::total 15525875 # number of demand (read+write) accesses 658system.cpu1.icache.overall_accesses::cpu1.inst 15525875 # number of overall (read+write) accesses 659system.cpu1.icache.overall_accesses::total 15525875 # number of overall (read+write) accesses 660system.cpu1.icache.ReadReq_miss_rate::cpu1.inst 0.024552 # miss rate for ReadReq accesses 661system.cpu1.icache.ReadReq_miss_rate::total 0.024552 # miss rate for ReadReq accesses 662system.cpu1.icache.demand_miss_rate::cpu1.inst 0.024552 # miss rate for demand accesses 663system.cpu1.icache.demand_miss_rate::total 0.024552 # miss rate for demand accesses 664system.cpu1.icache.overall_miss_rate::cpu1.inst 0.024552 # miss rate for overall accesses 665system.cpu1.icache.overall_miss_rate::total 0.024552 # miss rate for overall accesses 666system.cpu1.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 667system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked 668system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked 669system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked 670system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 671system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 672system.cpu1.icache.writebacks::writebacks 380647 # number of writebacks 673system.cpu1.icache.writebacks::total 380647 # number of writebacks 674system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 675system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). 676system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD). 677system.disk0.dma_write_full_pages 298 # Number of full page size DMA writes. 678system.disk0.dma_write_bytes 2651136 # Number of bytes transfered via DMA writes. 679system.disk0.dma_write_txs 395 # Number of DMA write transactions. 680system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). 681system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). 682system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). 683system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes. 684system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes. 685system.disk2.dma_write_txs 1 # Number of DMA write transactions. 686system.iobus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 687system.iobus.trans_dist::ReadReq 7628 # Transaction distribution 688system.iobus.trans_dist::ReadResp 7628 # Transaction distribution 689system.iobus.trans_dist::WriteReq 56140 # Transaction distribution 690system.iobus.trans_dist::WriteResp 56140 # Transaction distribution 691system.iobus.pkt_count_system.bridge.master::system.tsunami.cchip.pio 14686 # Packet count per connected master and slave (bytes) 692system.iobus.pkt_count_system.bridge.master::system.tsunami.pchip.pio 1014 # Packet count per connected master and slave (bytes) 693system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_sm_chip.pio 10 # Packet count per connected master and slave (bytes) 694system.iobus.pkt_count_system.bridge.master::system.tsunami.fake_uart4.pio 10 # Packet count per connected master and slave (bytes) 695system.iobus.pkt_count_system.bridge.master::system.tsunami.io.pio 1076 # Packet count per connected master and slave (bytes) 696system.iobus.pkt_count_system.bridge.master::system.tsunami.uart.pio 18036 # Packet count per connected master and slave (bytes) 697system.iobus.pkt_count_system.bridge.master::system.tsunami.backdoor.pio 2468 # Packet count per connected master and slave (bytes) 698system.iobus.pkt_count_system.bridge.master::system.tsunami.ide.pio 6672 # Packet count per connected master and slave (bytes) 699system.iobus.pkt_count_system.bridge.master::system.tsunami.ethernet.pio 102 # Packet count per connected master and slave (bytes) 700system.iobus.pkt_count_system.bridge.master::total 44074 # Packet count per connected master and slave (bytes) 701system.iobus.pkt_count_system.tsunami.ide.dma::system.iocache.cpu_side 83462 # Packet count per connected master and slave (bytes) 702system.iobus.pkt_count_system.tsunami.ide.dma::total 83462 # Packet count per connected master and slave (bytes) 703system.iobus.pkt_count::total 127536 # Packet count per connected master and slave (bytes) 704system.iobus.pkt_size_system.bridge.master::system.tsunami.cchip.pio 58744 # Cumulative packet size per connected master and slave (bytes) 705system.iobus.pkt_size_system.bridge.master::system.tsunami.pchip.pio 2749 # Cumulative packet size per connected master and slave (bytes) 706system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_sm_chip.pio 5 # Cumulative packet size per connected master and slave (bytes) 707system.iobus.pkt_size_system.bridge.master::system.tsunami.fake_uart4.pio 5 # Cumulative packet size per connected master and slave (bytes) 708system.iobus.pkt_size_system.bridge.master::system.tsunami.io.pio 1392 # Cumulative packet size per connected master and slave (bytes) 709system.iobus.pkt_size_system.bridge.master::system.tsunami.uart.pio 9018 # Cumulative packet size per connected master and slave (bytes) 710system.iobus.pkt_size_system.bridge.master::system.tsunami.backdoor.pio 9852 # Cumulative packet size per connected master and slave (bytes) 711system.iobus.pkt_size_system.bridge.master::system.tsunami.ide.pio 4193 # Cumulative packet size per connected master and slave (bytes) 712system.iobus.pkt_size_system.bridge.master::system.tsunami.ethernet.pio 204 # Cumulative packet size per connected master and slave (bytes) 713system.iobus.pkt_size_system.bridge.master::total 86162 # Cumulative packet size per connected master and slave (bytes) 714system.iobus.pkt_size_system.tsunami.ide.dma::system.iocache.cpu_side 2661656 # Cumulative packet size per connected master and slave (bytes) 715system.iobus.pkt_size_system.tsunami.ide.dma::total 2661656 # Cumulative packet size per connected master and slave (bytes) 716system.iobus.pkt_size::total 2747818 # Cumulative packet size per connected master and slave (bytes) 717system.iocache.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 718system.iocache.tags.replacements 41699 # number of replacements 719system.iocache.tags.tagsinuse 0.434096 # Cycle average of tags in use 720system.iocache.tags.total_refs 0 # Total number of references to valid blocks. 721system.iocache.tags.sampled_refs 41715 # Sample count of references to valid blocks. 722system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. 723system.iocache.tags.warmup_cycle 1685787164517 # Cycle when the warmup percentage was hit. 724system.iocache.tags.occ_blocks::tsunami.ide 0.434096 # Average occupied blocks per requestor 725system.iocache.tags.occ_percent::tsunami.ide 0.027131 # Average percentage of cache occupancy 726system.iocache.tags.occ_percent::total 0.027131 # Average percentage of cache occupancy 727system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id 728system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id 729system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id 730system.iocache.tags.tag_accesses 375579 # Number of tag accesses 731system.iocache.tags.data_accesses 375579 # Number of data accesses 732system.iocache.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 733system.iocache.ReadReq_misses::tsunami.ide 179 # number of ReadReq misses 734system.iocache.ReadReq_misses::total 179 # number of ReadReq misses 735system.iocache.WriteLineReq_misses::tsunami.ide 41552 # number of WriteLineReq misses 736system.iocache.WriteLineReq_misses::total 41552 # number of WriteLineReq misses 737system.iocache.demand_misses::tsunami.ide 41731 # number of demand (read+write) misses 738system.iocache.demand_misses::total 41731 # number of demand (read+write) misses 739system.iocache.overall_misses::tsunami.ide 41731 # number of overall misses 740system.iocache.overall_misses::total 41731 # number of overall misses 741system.iocache.ReadReq_accesses::tsunami.ide 179 # number of ReadReq accesses(hits+misses) 742system.iocache.ReadReq_accesses::total 179 # number of ReadReq accesses(hits+misses) 743system.iocache.WriteLineReq_accesses::tsunami.ide 41552 # number of WriteLineReq accesses(hits+misses) 744system.iocache.WriteLineReq_accesses::total 41552 # number of WriteLineReq accesses(hits+misses) 745system.iocache.demand_accesses::tsunami.ide 41731 # number of demand (read+write) accesses 746system.iocache.demand_accesses::total 41731 # number of demand (read+write) accesses 747system.iocache.overall_accesses::tsunami.ide 41731 # number of overall (read+write) accesses 748system.iocache.overall_accesses::total 41731 # number of overall (read+write) accesses 749system.iocache.ReadReq_miss_rate::tsunami.ide 1 # miss rate for ReadReq accesses 750system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses 751system.iocache.WriteLineReq_miss_rate::tsunami.ide 1 # miss rate for WriteLineReq accesses 752system.iocache.WriteLineReq_miss_rate::total 1 # miss rate for WriteLineReq accesses 753system.iocache.demand_miss_rate::tsunami.ide 1 # miss rate for demand accesses 754system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses 755system.iocache.overall_miss_rate::tsunami.ide 1 # miss rate for overall accesses 756system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses 757system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 758system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked 759system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked 760system.iocache.blocked::no_targets 0 # number of cycles access was blocked 761system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 762system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 763system.iocache.writebacks::writebacks 41520 # number of writebacks 764system.iocache.writebacks::total 41520 # number of writebacks 765system.l2c.tags.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 766system.l2c.tags.replacements 999962 # number of replacements 767system.l2c.tags.tagsinuse 65520.418446 # Cycle average of tags in use 768system.l2c.tags.total_refs 4560628 # Total number of references to valid blocks. 769system.l2c.tags.sampled_refs 1065470 # Sample count of references to valid blocks. 770system.l2c.tags.avg_refs 4.280391 # Average number of references to valid blocks. 771system.l2c.tags.warmup_cycle 618103500 # Cycle when the warmup percentage was hit. 772system.l2c.tags.occ_blocks::writebacks 304.654016 # Average occupied blocks per requestor 773system.l2c.tags.occ_blocks::cpu0.inst 4865.757369 # Average occupied blocks per requestor 774system.l2c.tags.occ_blocks::cpu0.data 58473.870947 # Average occupied blocks per requestor 775system.l2c.tags.occ_blocks::cpu1.inst 175.171504 # Average occupied blocks per requestor 776system.l2c.tags.occ_blocks::cpu1.data 1700.964609 # Average occupied blocks per requestor 777system.l2c.tags.occ_percent::writebacks 0.004649 # Average percentage of cache occupancy 778system.l2c.tags.occ_percent::cpu0.inst 0.074246 # Average percentage of cache occupancy 779system.l2c.tags.occ_percent::cpu0.data 0.892240 # Average percentage of cache occupancy 780system.l2c.tags.occ_percent::cpu1.inst 0.002673 # Average percentage of cache occupancy 781system.l2c.tags.occ_percent::cpu1.data 0.025955 # Average percentage of cache occupancy 782system.l2c.tags.occ_percent::total 0.999762 # Average percentage of cache occupancy 783system.l2c.tags.occ_task_id_blocks::1024 65508 # Occupied blocks per task id 784system.l2c.tags.age_task_id_blocks_1024::0 674 # Occupied blocks per task id 785system.l2c.tags.age_task_id_blocks_1024::1 2411 # Occupied blocks per task id 786system.l2c.tags.age_task_id_blocks_1024::2 2462 # Occupied blocks per task id 787system.l2c.tags.age_task_id_blocks_1024::3 9328 # Occupied blocks per task id 788system.l2c.tags.age_task_id_blocks_1024::4 50633 # Occupied blocks per task id 789system.l2c.tags.occ_task_id_percent::1024 0.999573 # Percentage of cache occupancy per task id 790system.l2c.tags.tag_accesses 46077158 # Number of tag accesses 791system.l2c.tags.data_accesses 46077158 # Number of data accesses 792system.l2c.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 793system.l2c.WritebackDirty_hits::writebacks 778757 # number of WritebackDirty hits 794system.l2c.WritebackDirty_hits::total 778757 # number of WritebackDirty hits 795system.l2c.WritebackClean_hits::writebacks 721480 # number of WritebackClean hits 796system.l2c.WritebackClean_hits::total 721480 # number of WritebackClean hits 797system.l2c.UpgradeReq_hits::cpu0.data 3102 # number of UpgradeReq hits 798system.l2c.UpgradeReq_hits::cpu1.data 2744 # number of UpgradeReq hits 799system.l2c.UpgradeReq_hits::total 5846 # number of UpgradeReq hits 800system.l2c.SCUpgradeReq_hits::cpu0.data 1187 # number of SCUpgradeReq hits 801system.l2c.SCUpgradeReq_hits::cpu1.data 1121 # number of SCUpgradeReq hits 802system.l2c.SCUpgradeReq_hits::total 2308 # number of SCUpgradeReq hits 803system.l2c.ReadExReq_hits::cpu0.data 111978 # number of ReadExReq hits 804system.l2c.ReadExReq_hits::cpu1.data 56627 # number of ReadExReq hits 805system.l2c.ReadExReq_hits::total 168605 # number of ReadExReq hits 806system.l2c.ReadCleanReq_hits::cpu0.inst 607070 # number of ReadCleanReq hits 807system.l2c.ReadCleanReq_hits::cpu1.inst 379530 # number of ReadCleanReq hits 808system.l2c.ReadCleanReq_hits::total 986600 # number of ReadCleanReq hits 809system.l2c.ReadSharedReq_hits::cpu0.data 626251 # number of ReadSharedReq hits 810system.l2c.ReadSharedReq_hits::cpu1.data 128790 # number of ReadSharedReq hits 811system.l2c.ReadSharedReq_hits::total 755041 # number of ReadSharedReq hits 812system.l2c.demand_hits::cpu0.inst 607070 # number of demand (read+write) hits 813system.l2c.demand_hits::cpu0.data 738229 # number of demand (read+write) hits 814system.l2c.demand_hits::cpu1.inst 379530 # number of demand (read+write) hits 815system.l2c.demand_hits::cpu1.data 185417 # number of demand (read+write) hits 816system.l2c.demand_hits::total 1910246 # number of demand (read+write) hits 817system.l2c.overall_hits::cpu0.inst 607070 # number of overall hits 818system.l2c.overall_hits::cpu0.data 738229 # number of overall hits 819system.l2c.overall_hits::cpu1.inst 379530 # number of overall hits 820system.l2c.overall_hits::cpu1.data 185417 # number of overall hits 821system.l2c.overall_hits::total 1910246 # number of overall hits 822system.l2c.UpgradeReq_misses::cpu0.data 4 # number of UpgradeReq misses 823system.l2c.UpgradeReq_misses::cpu1.data 2 # number of UpgradeReq misses 824system.l2c.UpgradeReq_misses::total 6 # number of UpgradeReq misses 825system.l2c.SCUpgradeReq_misses::cpu1.data 1 # number of SCUpgradeReq misses 826system.l2c.SCUpgradeReq_misses::total 1 # number of SCUpgradeReq misses 827system.l2c.ReadExReq_misses::cpu0.data 113307 # number of ReadExReq misses 828system.l2c.ReadExReq_misses::cpu1.data 11044 # number of ReadExReq misses 829system.l2c.ReadExReq_misses::total 124351 # number of ReadExReq misses 830system.l2c.ReadCleanReq_misses::cpu0.inst 11848 # number of ReadCleanReq misses 831system.l2c.ReadCleanReq_misses::cpu1.inst 1658 # number of ReadCleanReq misses 832system.l2c.ReadCleanReq_misses::total 13506 # number of ReadCleanReq misses 833system.l2c.ReadSharedReq_misses::cpu0.data 926616 # number of ReadSharedReq misses 834system.l2c.ReadSharedReq_misses::cpu1.data 1036 # number of ReadSharedReq misses 835system.l2c.ReadSharedReq_misses::total 927652 # number of ReadSharedReq misses 836system.l2c.demand_misses::cpu0.inst 11848 # number of demand (read+write) misses 837system.l2c.demand_misses::cpu0.data 1039923 # number of demand (read+write) misses 838system.l2c.demand_misses::cpu1.inst 1658 # number of demand (read+write) misses 839system.l2c.demand_misses::cpu1.data 12080 # number of demand (read+write) misses 840system.l2c.demand_misses::total 1065509 # number of demand (read+write) misses 841system.l2c.overall_misses::cpu0.inst 11848 # number of overall misses 842system.l2c.overall_misses::cpu0.data 1039923 # number of overall misses 843system.l2c.overall_misses::cpu1.inst 1658 # number of overall misses 844system.l2c.overall_misses::cpu1.data 12080 # number of overall misses 845system.l2c.overall_misses::total 1065509 # number of overall misses 846system.l2c.WritebackDirty_accesses::writebacks 778757 # number of WritebackDirty accesses(hits+misses) 847system.l2c.WritebackDirty_accesses::total 778757 # number of WritebackDirty accesses(hits+misses) 848system.l2c.WritebackClean_accesses::writebacks 721480 # number of WritebackClean accesses(hits+misses) 849system.l2c.WritebackClean_accesses::total 721480 # number of WritebackClean accesses(hits+misses) 850system.l2c.UpgradeReq_accesses::cpu0.data 3106 # number of UpgradeReq accesses(hits+misses) 851system.l2c.UpgradeReq_accesses::cpu1.data 2746 # number of UpgradeReq accesses(hits+misses) 852system.l2c.UpgradeReq_accesses::total 5852 # number of UpgradeReq accesses(hits+misses) 853system.l2c.SCUpgradeReq_accesses::cpu0.data 1187 # number of SCUpgradeReq accesses(hits+misses) 854system.l2c.SCUpgradeReq_accesses::cpu1.data 1122 # number of SCUpgradeReq accesses(hits+misses) 855system.l2c.SCUpgradeReq_accesses::total 2309 # number of SCUpgradeReq accesses(hits+misses) 856system.l2c.ReadExReq_accesses::cpu0.data 225285 # number of ReadExReq accesses(hits+misses) 857system.l2c.ReadExReq_accesses::cpu1.data 67671 # number of ReadExReq accesses(hits+misses) 858system.l2c.ReadExReq_accesses::total 292956 # number of ReadExReq accesses(hits+misses) 859system.l2c.ReadCleanReq_accesses::cpu0.inst 618918 # number of ReadCleanReq accesses(hits+misses) 860system.l2c.ReadCleanReq_accesses::cpu1.inst 381188 # number of ReadCleanReq accesses(hits+misses) 861system.l2c.ReadCleanReq_accesses::total 1000106 # number of ReadCleanReq accesses(hits+misses) 862system.l2c.ReadSharedReq_accesses::cpu0.data 1552867 # number of ReadSharedReq accesses(hits+misses) 863system.l2c.ReadSharedReq_accesses::cpu1.data 129826 # number of ReadSharedReq accesses(hits+misses) 864system.l2c.ReadSharedReq_accesses::total 1682693 # number of ReadSharedReq accesses(hits+misses) 865system.l2c.demand_accesses::cpu0.inst 618918 # number of demand (read+write) accesses 866system.l2c.demand_accesses::cpu0.data 1778152 # number of demand (read+write) accesses 867system.l2c.demand_accesses::cpu1.inst 381188 # number of demand (read+write) accesses 868system.l2c.demand_accesses::cpu1.data 197497 # number of demand (read+write) accesses 869system.l2c.demand_accesses::total 2975755 # number of demand (read+write) accesses 870system.l2c.overall_accesses::cpu0.inst 618918 # number of overall (read+write) accesses 871system.l2c.overall_accesses::cpu0.data 1778152 # number of overall (read+write) accesses 872system.l2c.overall_accesses::cpu1.inst 381188 # number of overall (read+write) accesses 873system.l2c.overall_accesses::cpu1.data 197497 # number of overall (read+write) accesses 874system.l2c.overall_accesses::total 2975755 # number of overall (read+write) accesses 875system.l2c.UpgradeReq_miss_rate::cpu0.data 0.001288 # miss rate for UpgradeReq accesses 876system.l2c.UpgradeReq_miss_rate::cpu1.data 0.000728 # miss rate for UpgradeReq accesses 877system.l2c.UpgradeReq_miss_rate::total 0.001025 # miss rate for UpgradeReq accesses 878system.l2c.SCUpgradeReq_miss_rate::cpu1.data 0.000891 # miss rate for SCUpgradeReq accesses 879system.l2c.SCUpgradeReq_miss_rate::total 0.000433 # miss rate for SCUpgradeReq accesses 880system.l2c.ReadExReq_miss_rate::cpu0.data 0.502950 # miss rate for ReadExReq accesses 881system.l2c.ReadExReq_miss_rate::cpu1.data 0.163201 # miss rate for ReadExReq accesses 882system.l2c.ReadExReq_miss_rate::total 0.424470 # miss rate for ReadExReq accesses 883system.l2c.ReadCleanReq_miss_rate::cpu0.inst 0.019143 # miss rate for ReadCleanReq accesses 884system.l2c.ReadCleanReq_miss_rate::cpu1.inst 0.004350 # miss rate for ReadCleanReq accesses 885system.l2c.ReadCleanReq_miss_rate::total 0.013505 # miss rate for ReadCleanReq accesses 886system.l2c.ReadSharedReq_miss_rate::cpu0.data 0.596713 # miss rate for ReadSharedReq accesses 887system.l2c.ReadSharedReq_miss_rate::cpu1.data 0.007980 # miss rate for ReadSharedReq accesses 888system.l2c.ReadSharedReq_miss_rate::total 0.551290 # miss rate for ReadSharedReq accesses 889system.l2c.demand_miss_rate::cpu0.inst 0.019143 # miss rate for demand accesses 890system.l2c.demand_miss_rate::cpu0.data 0.584834 # miss rate for demand accesses 891system.l2c.demand_miss_rate::cpu1.inst 0.004350 # miss rate for demand accesses 892system.l2c.demand_miss_rate::cpu1.data 0.061165 # miss rate for demand accesses 893system.l2c.demand_miss_rate::total 0.358063 # miss rate for demand accesses 894system.l2c.overall_miss_rate::cpu0.inst 0.019143 # miss rate for overall accesses 895system.l2c.overall_miss_rate::cpu0.data 0.584834 # miss rate for overall accesses 896system.l2c.overall_miss_rate::cpu1.inst 0.004350 # miss rate for overall accesses 897system.l2c.overall_miss_rate::cpu1.data 0.061165 # miss rate for overall accesses 898system.l2c.overall_miss_rate::total 0.358063 # miss rate for overall accesses 899system.l2c.blocked_cycles::no_mshrs 0 # number of cycles access was blocked 900system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked 901system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked 902system.l2c.blocked::no_targets 0 # number of cycles access was blocked 903system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked 904system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked 905system.l2c.writebacks::writebacks 80947 # number of writebacks 906system.l2c.writebacks::total 80947 # number of writebacks 907system.membus.snoop_filter.tot_requests 2174394 # Total number of requests made to the snoop filter. 908system.membus.snoop_filter.hit_single_requests 1068384 # Number of requests hitting in the snoop filter with a single holder of the requested data. 909system.membus.snoop_filter.hit_multi_requests 430 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 910system.membus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. 911system.membus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 912system.membus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 913system.membus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 914system.membus.trans_dist::ReadReq 7449 # Transaction distribution 915system.membus.trans_dist::ReadResp 948786 # Transaction distribution 916system.membus.trans_dist::WriteReq 14588 # Transaction distribution 917system.membus.trans_dist::WriteResp 14588 # Transaction distribution 918system.membus.trans_dist::WritebackDirty 122467 # Transaction distribution 919system.membus.trans_dist::CleanEvict 918018 # Transaction distribution 920system.membus.trans_dist::UpgradeReq 13880 # Transaction distribution 921system.membus.trans_dist::SCUpgradeReq 11895 # Transaction distribution 922system.membus.trans_dist::UpgradeResp 135 # Transaction distribution 923system.membus.trans_dist::ReadExReq 125245 # Transaction distribution 924system.membus.trans_dist::ReadExResp 124223 # Transaction distribution 925system.membus.trans_dist::ReadSharedReq 941337 # Transaction distribution 926system.membus.trans_dist::InvalidateReq 41552 # Transaction distribution 927system.membus.trans_dist::InvalidateResp 41552 # Transaction distribution 928system.membus.pkt_count_system.l2c.mem_side::system.bridge.slave 44074 # Packet count per connected master and slave (bytes) 929system.membus.pkt_count_system.l2c.mem_side::system.physmem.port 3156480 # Packet count per connected master and slave (bytes) 930system.membus.pkt_count_system.l2c.mem_side::total 3200554 # Packet count per connected master and slave (bytes) 931system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 125161 # Packet count per connected master and slave (bytes) 932system.membus.pkt_count_system.iocache.mem_side::total 125161 # Packet count per connected master and slave (bytes) 933system.membus.pkt_count::total 3325715 # Packet count per connected master and slave (bytes) 934system.membus.pkt_size_system.l2c.mem_side::system.bridge.slave 86162 # Cumulative packet size per connected master and slave (bytes) 935system.membus.pkt_size_system.l2c.mem_side::system.physmem.port 73364992 # Cumulative packet size per connected master and slave (bytes) 936system.membus.pkt_size_system.l2c.mem_side::total 73451154 # Cumulative packet size per connected master and slave (bytes) 937system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 2668736 # Cumulative packet size per connected master and slave (bytes) 938system.membus.pkt_size_system.iocache.mem_side::total 2668736 # Cumulative packet size per connected master and slave (bytes) 939system.membus.pkt_size::total 76119890 # Cumulative packet size per connected master and slave (bytes) 940system.membus.snoops 0 # Total snoops (count) 941system.membus.snoopTraffic 0 # Total snoop traffic (bytes) 942system.membus.snoop_fanout::samples 2196431 # Request fanout histogram 943system.membus.snoop_fanout::mean 0.000519 # Request fanout histogram 944system.membus.snoop_fanout::stdev 0.022766 # Request fanout histogram 945system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 946system.membus.snoop_fanout::0 2195292 99.95% 99.95% # Request fanout histogram 947system.membus.snoop_fanout::1 1139 0.05% 100.00% # Request fanout histogram 948system.membus.snoop_fanout::2 0 0.00% 100.00% # Request fanout histogram 949system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 950system.membus.snoop_fanout::min_value 0 # Request fanout histogram 951system.membus.snoop_fanout::max_value 1 # Request fanout histogram 952system.membus.snoop_fanout::total 2196431 # Request fanout histogram 953system.membus.badaddr_responder.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 954system.toL2Bus.snoop_filter.tot_requests 6035809 # Total number of requests made to the snoop filter. 955system.toL2Bus.snoop_filter.hit_single_requests 3018662 # Number of requests hitting in the snoop filter with a single holder of the requested data. 956system.toL2Bus.snoop_filter.hit_multi_requests 374456 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. 957system.toL2Bus.snoop_filter.tot_snoops 1621 # Total number of snoops made to the snoop filter. 958system.toL2Bus.snoop_filter.hit_single_snoops 1531 # Number of snoops hitting in the snoop filter with a single holder of the requested data. 959system.toL2Bus.snoop_filter.hit_multi_snoops 90 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. 960system.toL2Bus.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 961system.toL2Bus.trans_dist::ReadReq 7449 # Transaction distribution 962system.toL2Bus.trans_dist::ReadResp 2732152 # Transaction distribution 963system.toL2Bus.trans_dist::WriteReq 14588 # Transaction distribution 964system.toL2Bus.trans_dist::WriteResp 14588 # Transaction distribution 965system.toL2Bus.trans_dist::WritebackDirty 778757 # Transaction distribution 966system.toL2Bus.trans_dist::WritebackClean 998939 # Transaction distribution 967system.toL2Bus.trans_dist::CleanEvict 1204367 # Transaction distribution 968system.toL2Bus.trans_dist::UpgradeReq 19598 # Transaction distribution 969system.toL2Bus.trans_dist::SCUpgradeReq 14203 # Transaction distribution 970system.toL2Bus.trans_dist::UpgradeResp 33801 # Transaction distribution 971system.toL2Bus.trans_dist::ReadExReq 295242 # Transaction distribution 972system.toL2Bus.trans_dist::ReadExResp 295242 # Transaction distribution 973system.toL2Bus.trans_dist::ReadCleanReq 1000127 # Transaction distribution 974system.toL2Bus.trans_dist::ReadSharedReq 1724576 # Transaction distribution 975system.toL2Bus.pkt_count_system.cpu0.icache.mem_side::system.l2c.cpu_side 1856170 # Packet count per connected master and slave (bytes) 976system.toL2Bus.pkt_count_system.cpu0.dcache.mem_side::system.l2c.cpu_side 5450061 # Packet count per connected master and slave (bytes) 977system.toL2Bus.pkt_count_system.cpu1.icache.mem_side::system.l2c.cpu_side 1143023 # Packet count per connected master and slave (bytes) 978system.toL2Bus.pkt_count_system.cpu1.dcache.mem_side::system.l2c.cpu_side 684375 # Packet count per connected master and slave (bytes) 979system.toL2Bus.pkt_count::total 9133629 # Packet count per connected master and slave (bytes) 980system.toL2Bus.pkt_size_system.cpu0.icache.mem_side::system.l2c.cpu_side 79182784 # Cumulative packet size per connected master and slave (bytes) 981system.toL2Bus.pkt_size_system.cpu0.dcache.mem_side::system.l2c.cpu_side 155817595 # Cumulative packet size per connected master and slave (bytes) 982system.toL2Bus.pkt_size_system.cpu1.icache.mem_side::system.l2c.cpu_side 48757440 # Cumulative packet size per connected master and slave (bytes) 983system.toL2Bus.pkt_size_system.cpu1.dcache.mem_side::system.l2c.cpu_side 23377367 # Cumulative packet size per connected master and slave (bytes) 984system.toL2Bus.pkt_size::total 307135186 # Cumulative packet size per connected master and slave (bytes) 985system.toL2Bus.snoops 1000983 # Total snoops (count) 986system.toL2Bus.snoopTraffic 5197312 # Total snoop traffic (bytes) 987system.toL2Bus.snoop_fanout::samples 7058665 # Request fanout histogram 988system.toL2Bus.snoop_fanout::mean 0.106769 # Request fanout histogram 989system.toL2Bus.snoop_fanout::stdev 0.309069 # Request fanout histogram 990system.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram 991system.toL2Bus.snoop_fanout::0 6305559 89.33% 89.33% # Request fanout histogram 992system.toL2Bus.snoop_fanout::1 752566 10.66% 99.99% # Request fanout histogram 993system.toL2Bus.snoop_fanout::2 538 0.01% 100.00% # Request fanout histogram 994system.toL2Bus.snoop_fanout::3 2 0.00% 100.00% # Request fanout histogram 995system.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Request fanout histogram 996system.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram 997system.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram 998system.toL2Bus.snoop_fanout::max_value 3 # Request fanout histogram 999system.toL2Bus.snoop_fanout::total 7058665 # Request fanout histogram 1000system.tsunami.backdoor.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1001system.tsunami.cchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1002system.tsunami.pchip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1003system.tsunami.ethernet.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1004system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA 1005system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA 1006system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA 1007system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA 1008system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU 1009system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post 1010system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR 1011system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU 1012system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post 1013system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR 1014system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU 1015system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post 1016system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR 1017system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU 1018system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post 1019system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR 1020system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU 1021system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post 1022system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR 1023system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU 1024system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post 1025system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR 1026system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU 1027system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post 1028system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR 1029system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU 1030system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post 1031system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR 1032system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post 1033system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU 1034system.tsunami.ethernet.droppedPackets 0 # number of packets dropped 1035system.tsunami.fake_OROM.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1036system.tsunami.fake_ata0.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1037system.tsunami.fake_ata1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1038system.tsunami.fake_pnp_addr.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1039system.tsunami.fake_pnp_read0.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1040system.tsunami.fake_pnp_read1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1041system.tsunami.fake_pnp_read2.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1042system.tsunami.fake_pnp_read3.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1043system.tsunami.fake_pnp_read4.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1044system.tsunami.fake_pnp_read5.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1045system.tsunami.fake_pnp_read6.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1046system.tsunami.fake_pnp_read7.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1047system.tsunami.fake_pnp_write.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1048system.tsunami.fake_ppc.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1049system.tsunami.fake_sm_chip.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1050system.tsunami.fake_uart1.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1051system.tsunami.fake_uart2.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1052system.tsunami.fake_uart3.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1053system.tsunami.fake_uart4.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1054system.tsunami.fb.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1055system.tsunami.ide.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1056system.tsunami.io.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1057system.tsunami.uart.pwrStateResidencyTicks::UNDEFINED 1869357999000 # Cumulative time (in ticks) in various power states 1058 1059---------- End Simulation Statistics ----------