config.ini (10636:9ac724889705) config.ini (10736:4433fb00fa7d)
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 11 unchanged lines hidden (view full) ---

20init_param=0
21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=atomic
26mem_ranges=0:134217727
27memories=system.physmem
1[root]
2type=Root
3children=system
4eventq_index=0
5full_system=true
6sim_quantum=0
7time_sync_enable=false
8time_sync_period=100000000000

--- 11 unchanged lines hidden (view full) ---

20init_param=0
21kernel=/scratch/nilay/GEM5/system/binaries/vmlinux
22kernel_addr_check=true
23load_addr_mask=1099511627775
24load_offset=0
25mem_mode=atomic
26mem_ranges=0:134217727
27memories=system.physmem
28mmap_using_noreserve=false
28num_work_ids=16
29pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
30readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
31symbolfile=
32system_rev=1024
33system_type=34
34work_begin_ckpt_count=0
35work_begin_cpu_id_exit=-1

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389type=IntrControl
390eventq_index=0
391sys=system
392
393[system.iobus]
394type=NoncoherentXBar
395clk_domain=system.clk_domain
396eventq_index=0
29num_work_ids=16
30pal=/scratch/nilay/GEM5/system/binaries/ts_osfpal
31readfile=/scratch/nilay/GEM5/gem5/tests/halt.sh
32symbolfile=
33system_rev=1024
34system_type=34
35work_begin_ckpt_count=0
36work_begin_cpu_id_exit=-1

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390type=IntrControl
391eventq_index=0
392sys=system
393
394[system.iobus]
395type=NoncoherentXBar
396clk_domain=system.clk_domain
397eventq_index=0
397header_cycles=1
398forward_latency=1
399frontend_latency=2
400response_latency=2
398use_default_range=true
401use_default_range=true
399width=8
402width=16
400default=system.tsunami.pciconfig.pio
401master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
402slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
403
404[system.iocache]
405type=BaseCache
406children=tags
407addr_ranges=0:134217727

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473sequential_access=false
474size=4194304
475
476[system.membus]
477type=CoherentXBar
478children=badaddr_responder
479clk_domain=system.clk_domain
480eventq_index=0
403default=system.tsunami.pciconfig.pio
404master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
405slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
406
407[system.iocache]
408type=BaseCache
409children=tags
410addr_ranges=0:134217727

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476sequential_access=false
477size=4194304
478
479[system.membus]
480type=CoherentXBar
481children=badaddr_responder
482clk_domain=system.clk_domain
483eventq_index=0
481header_cycles=1
484forward_latency=4
485frontend_latency=3
486response_latency=2
482snoop_filter=Null
487snoop_filter=Null
488snoop_response_latency=4
483system=system
484use_default_range=false
489system=system
490use_default_range=false
485width=8
491width=16
486default=system.membus.badaddr_responder.pio
487master=system.bridge.slave system.physmem.port
488slave=system.system_port system.l2c.mem_side system.iocache.mem_side
489
490[system.membus.badaddr_responder]
491type=IsaFake
492clk_domain=system.clk_domain
493eventq_index=0

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538number=0
539output=true
540port=3456
541
542[system.toL2Bus]
543type=CoherentXBar
544clk_domain=system.cpu_clk_domain
545eventq_index=0
492default=system.membus.badaddr_responder.pio
493master=system.bridge.slave system.physmem.port
494slave=system.system_port system.l2c.mem_side system.iocache.mem_side
495
496[system.membus.badaddr_responder]
497type=IsaFake
498clk_domain=system.clk_domain
499eventq_index=0

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544number=0
545output=true
546port=3456
547
548[system.toL2Bus]
549type=CoherentXBar
550clk_domain=system.cpu_clk_domain
551eventq_index=0
546header_cycles=1
552forward_latency=0
553frontend_latency=1
554response_latency=1
547snoop_filter=Null
555snoop_filter=Null
556snoop_response_latency=1
548system=system
549use_default_range=false
557system=system
558use_default_range=false
550width=8
559width=32
551master=system.l2c.cpu_side
552slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
553
554[system.tsunami]
555type=Tsunami
556children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
557eventq_index=0
558intrctrl=system.intrctrl

--- 622 unchanged lines hidden --- 		560master=system.l2c.cpu_side
561slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
562
563[system.tsunami]
564type=Tsunami
565children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
566eventq_index=0
567intrctrl=system.intrctrl

--- 622 unchanged lines hidden ---